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VTU LD Lab Manual

The document describes experiments to study and verify logic gates, realize Boolean functions, and design adders and subtractors using logic gates. The experiments aim to identify logic integrated circuits, simplify Boolean expressions using K-maps, and realize half adders, full adders, half subtractors and full subtractors. The experiments require logic gate ICs, connecting wires, and an IC trainer kit. Logic gates perform basic Boolean operations like AND, OR, NAND, NOR. Common logic families include TTL, ECL, MOS and CMOS.

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Manjesh Shetty
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192 views

VTU LD Lab Manual

The document describes experiments to study and verify logic gates, realize Boolean functions, and design adders and subtractors using logic gates. The experiments aim to identify logic integrated circuits, simplify Boolean expressions using K-maps, and realize half adders, full adders, half subtractors and full subtractors. The experiments require logic gate ICs, connecting wires, and an IC trainer kit. Logic gates perform basic Boolean operations like AND, OR, NAND, NOR. Common logic families include TTL, ECL, MOS and CMOS.

Uploaded by

Manjesh Shetty
Copyright
© © All Rights Reserved
Available Formats
Download as RTF, PDF, TXT or read online on Scribd
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EXPERIMENT: 1 LOGIC GATES

AIM: To study and verify the truth table of logic gates


LEARNING OBJECTIVE: Identify various ICs and their specification.
COMPONENTS REQUIRED: Logic gates (IC) trainer kit. Connecting patch
chords. IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, IC 7404, IC 7486
THEORY: The basic logic gates are the building blocks of more complex logic
circuits. These logic gates perform the basic Boolean functions, such as AND,
OR, NAND, NOR, Inversion, Exclusive-OR, Exclusive-NOR. Fig. below shows the
circuit symbol, Boolean function, and truth. It is seen from the Fig that each
gate has one or two binary inputs, A and B, and one binary output, C. The
small circle on the output of the circuit symbols designates the logic
complement. The AND, OR, NAND, and NOR gates can be extended to have
more than two inputs. A gate can be extended to have multiple inputs if the
binary operation it represents is commutative and associative.
These basic logic gates are implemented as small-scale integrated circuits
(SSICs) or as part of more complex medium scale (MSI) or very large-scale
(VLSI) integrated circuits. Digital IC gates are classified not only by their logic
operation, but also the specific logic-circuit family to which they belong. Each
logic family has its own basic electronic circuit upon which more complex
digital circuits and functions are developed. The following logic families are
the most frequently used.
TTL

Transistor-transistor logic
ECL

Emitter-coupled logic
MOS

Metal-oxide semiconductor
CMOS

Complementary metal-oxide semiconductor


TTL and ECL are based upon bipolar transistors. TTL has a well established
popularity among logic families. ECL is used only in systems requiring highspeed operation. MOS and CMOS, are based on field effect transistors. They
are widely used in large scale integrated circuits because of their high
component density and relatively low power consumption. CMOS logic
consumes far less power than MOS logic. There are various commercial
Logic Design Laboratory Manual 2
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integrated circuit chips available. TTL ICs are usually distinguished by
numerical designation as the 5400 and 7400 series.
PROCEDURE: 1. Check the components for their working. 2. Insert the
appropriate IC into the IC base. 3. Make connections as shown in the circuit
diagram. 4. Provide the input data via the input switches and observe the
output on output LEDs
Logic Design Laboratory Manual 3
___________________________________________________________________________
VIVA QUESTIONS:
1. Why NAND & NOR gates are called universal gates? 2. Realize the EX OR
gates using minimum number of NAND gates. 3. Give the truth table for EXNOR and realize using NAND gates? 4. What are the logic low and High levels
of TTL ICs and CMOS ICs? 5. Compare TTL logic family with CMOS family? 6.
Which logic family is fastest and which has low power dissipation?
EXPERIMENT: 2 REALIZATION OF A BOOLEAN FUNCTION.
AIM: To simplify the given expression and to realize it using Basic gates and
Universal gates
LEARNING OBJECTIVE:

To simplify the Boolean expression and to build the logic circuit.

Given a Truth table to derive the Boolean expressions and build the logic
circuit to realize it.
COMPONENTS REQUIRED: IC 7400, IC 7408, IC 7432, IC 7406, IC 7402, Patch
Cords & IC Trainer Kit.

THEORY: Canonical Forms (Normal Forms): Any Boolean function can be


written in disjunctive normal form (sum of min-terms) or conjunctive normal
form (product of max-terms). A Boolean function can be represented by a
Karnaugh map in which each cell corresponds to a minterm. The cells are
arranged in such a way that any two immediately adjacent cells correspond
to two minterms of distance 1. There is more than one way to construct a
map with this property. Karnaugh Maps
For a function of two variables, say, f(x, y),
For a function of three variables, say, f(x, y, z)
For a function of four variables: f(w, x, y, z)
Logic Design Laboratory Manual 4
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Realization of Boolean expression:
1) Y= BCD DABCDABCDABCDADABCABCCDAB ______________ ++++++ AB
1 1 11111
After simplifying using K-Map method we get Y =A
_B+C
_D
Realization using Basic gates
TABLE

TRUTH

Realization using NAND gates


Realization using NOR gates
INPUTS OUTPUT A B C D Y 0 0 0 0 0 0 0 0 1 0 0 0 1 0 1 0 0 1 1 0 0 1 0 0 0 0 1
01001101011101000110011101011011111000110
101110111110
Logic Design Laboratory Manual 5
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2) For the given Truth Table, realize a logical circuit using basic gates and
NAND gates
PROCEDURE: Check the components for their working. Insert the appropriate
IC into the IC base. Make connections as shown in the circuit diagram. Provide
the input data via the input switches and observe the output on output LEDs
Verify the Truth Table

RESULT: Simplified and verified the Boolean function using basic gates and
universal gates
VIVA QUESTIONS: 1) What are the different methods to obtain minimal
expression? 2) What is a Min term and Max term 3) State the difference
between SOP and POS.
Inputs Output A B C D Y 0 0 0 0 1 0 0 0 1 1 0 0 1 0 0 0 0 1 1 0 0 1 0 0 1 0 1 0
11011000111010000100101010010110110001101
11110011111
Logic Design Laboratory Manual 6
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4) What is meant by canonical representation? 5) What is K-map? Why is it
used? 6) What are universal gates?
EXPERIMENT: 3 ADDERS AND SUBTRACTORS
AIM: To realize
i) Half Adder and Full Adder ii) Half Subtractor and Full
Subtractor by using Basic gates and NAND gates
LEARNING OBJECTIVE:

To realize the adder and subtractor circuits using basic gates and universal
gates

To realize full adder using two half adders

To realize a full subtractor using two half subtractors


COMPONENTS REQUIRED: IC 7400, IC 7408, IC 7486, IC 7432, Patch Cords &
IC Trainer Kit.
THEORY: Half-Adder: A combinational logic circuit that performs the addition
of two data bits, A and B, is called a half-adder. Addition will result in two
output bits; one of which is the sum bit, S, and the other is the carry bit, C.
The Boolean functions describing the half-adder are: S =A B
C=AB
Full-Adder: The half-adder does not take the carry bit from its previous stage
into account. This carry bit from its previous stage is called carry-in bit. A
combinational logic circuit that adds two data bits, A and B, and a carry-in bit,
Cin , is called a full-adder. The Boolean functions describing the full-adder

are: S = (x y) Cin

C = xy + Cin (x y)

Half Subtractor: Subtracting a single-bit binary value B from another A (i.e. A


-B ) produces a difference bit D and a borrow out bit B-out. This operation is
called half subtraction and the circuit to realize it is called a half subtractor.
The Boolean functions describing the half- Subtractor are: S =A B
C = A
B
Full Subtractor: Subtracting two single-bit binary values, B, Cin from a singlebit value A produces a difference bit D and a borrow out Br bit. This is called
full subtraction. The Boolean functions describing the full-subtracter are: D =
(x y) Cin Br= AB + A(Cin) + B(Cin)

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