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This 3-sentence summary provides the essential information from the 12-question digital logic exam document: The document contains a 12-question final exam covering topics in digital logic including binary, octal, decimal, and hexadecimal number systems; addition, subtraction, multiplication, and division in different number bases; characteristics and excitation tables of flip-flops; implementation of logic gates using NAND gates; design of counters and decoders; creation of state diagrams; and determination of excitation equations and output expressions of sequential circuits. Students are asked to complete number conversions, perform arithmetic operations, analyze flip-flop behavior, implement logic functions, design digital components, and model state-based systems.

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Aditya Mishra
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113 views

Solution

This 3-sentence summary provides the essential information from the 12-question digital logic exam document: The document contains a 12-question final exam covering topics in digital logic including binary, octal, decimal, and hexadecimal number systems; addition, subtraction, multiplication, and division in different number bases; characteristics and excitation tables of flip-flops; implementation of logic gates using NAND gates; design of counters and decoders; creation of state diagrams; and determination of excitation equations and output expressions of sequential circuits. Students are asked to complete number conversions, perform arithmetic operations, analyze flip-flop behavior, implement logic functions, design digital components, and model state-based systems.

Uploaded by

Aditya Mishra
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 5

COE/EE 243

Digital Logic

Session 44; Page 1/5


Spring 2003

Sample Final Exam

COE/EE 243

From Fall 98

Solutions
Show your work. Do NOT use a calculator!
1. (9 pts) Complete the following table of equivalent values.
Binary
1011.0011
11101.11111101
11011.010011

Octal
13.14
35.77
33.23

Decimal
11.1875
29.99
27 19
64

Hexadecimal
B.3
1D.FD
1B.4C

2. (12 pts) Calculate the following


a) 110012 plus 1012
b) 110102 minus 101012 using 1s complement representation
c) 11012 times 10012
d) 1011012 divided by 1102

 11110
 000101
 1110101
 111

3. (9 pts) Complete the following table of equivalent values. Use binary numbers with a sign bit and
5 bits for the value
Decimal
11
2
1

Signed Magnitude
101011
100010
100001

Twos Complement
110101
111110
111111

Ones Complement
110100
111101
111110

4. (8 pts) Give the Characteristic equations and the Excitation tables for the SR and JK flip-flops.
SR flip-flop

JK flip-flop

Q  S  R Q

Q  JQ  K Q

S
0
0
0
0
1
1
1
1

J
0
0
0
0
1
1
1
1

R
0
0
1
1
0
0
1
1

Q
0
1
0
1
0
1
0
1

Q+
0
1
0
0
1
1
-

K
0
0
1
1
0
0
1
1

Q
0
1
0
1
0
1
0
1

Q+
0
1
0
0
1
1
1
0

COE/EE 243
Digital Logic

Session 44; Page 2/5


Spring 2003

5. (10 pts) (a) Explain the difference between a Moore machine and a Mealy machine.
Sol The outputs in a Moore machine depend only on the present state. The outputs in a Mealy
machine depend on both the present state and the present input.
(b) What is the same about both kinds of state machines?
Sol Both have present state dependent on past inputs.
(c) Draw a block diagram indicating the structure of a general state machine. Indicate on the
diagram where one can find the present state and next state.
Next
State
Logic

Flip
Flops

Ouput
Logic

6. (5 pts) Give a truth table and a standard sum of products expression that describes
F  A  B C
A
0
0
0
0
1
1
1
1

B
0
0
1
1
0
0
1
1

C
0
1
0
1
0
1
0
1

F
0
1
1
0
1
0
0
1

 ABC  A BC  A BC  ABC

7. (8 pts) Indicate how a Nand gate can be used to implement:


5V

(a) An Inverter:

(b) An And Gate:

or could do

A
B

A
X=A+B
= (AB)

(c) An Or Gate:

X
B

(d) Because a Nand gate can be used to implement all three basic Boolean functions, how would
we describe it? Functionally Complete

COE/EE 243
Digital Logic

Session 44; Page 3/5


Spring 2003

8. (8 pts) Using the 74ALS163 counter shown below and logic gates design a counter that counts in
the sequence 3,4, 5, 6, 7, 8, 9, 10, 11, 12, 3, ... Connect all unused inputs. The counter may cycle
through several unwanted states before settling into the final count sequence. Q d is the MSB of the
counter output.
1

DD

DC

DB

DA

74S163

CLR

RCO

LD
CLK

CLK

QD

QC

QB

9. (6 pts) Find a minimum sum of products expresssion for F

QA

 abc  bc d  cd  a b

f
cd
ab

00

01

11

10

00

01

1
F = ab + cd + bc

11

10

COE/EE 243
Digital Logic

Session 44; Page 4/5


Spring 2003

10. (10 pts) Create a state diagram for a sequence detector that outputs a 1 when it detects the final bit
in the serial data stream 1101.

Mealy Machine

Moore Machine
X=0

X/Z
S0
Z=0

0/0

S0 1/0 S1 1/0 S2 0/0 S3


0/0

0/0

X=0
X=0

1/0

X=1

1/1
S4
Z=1

X=1
S1
Z=0
X=1

X=1
S2
Z=0

X=0
X=1

S3
Z=0

X=0

COE/EE 243
Digital Logic

Session 44; Page 5/5


Spring 2003

11. (10 pts) Determine the D flip-flop excitation equations for the system represented with in the statetransition table below. Assign states: S0  00, S1  01, S2  10 and S3  11.
Da
AB
X

Present
AB
00
01
10
11

Present
S
S0
S1
S2
S3

Next State
X=0 X=1
S1
S2
S1
S2
S2
S3
S3
S0

Output
Z
0
1
1
0

00

01

11

10

AB
Da = XA + XA + {
XB

Db
AB
X

00

01

11

10

Db = XAB + XA + XB

12. (5 pts) Give the output expression for the 8-to-1 MUX shown below.
I0
I1
I2

8 to 1
MUX

I3
I4

I5
I6
I7
A B

Z  A BC I0  A BCI1  ABC I2  A BCI3  ABC I4  ABCI5  ABCI6  ABCI7

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