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EKT 121/4 Elektronik Digit 1: Introduction To Programmable Logic Devices (PLD)

This document provides an introduction to Programmable Logic Devices (PLDs). It discusses that PLDs allow the user to program the logic function, unlike fixed function devices where the logic is permanent. There are three major types of PLDs: Simple PLDs (SPLDs), Complex PLDs (CPLDs), and Field Programmable Gate Arrays (FPGAs). SPLDs include PROMs, PLAs, PALs, and GALs and have the least complexity. CPLDs have a higher capacity than SPLDs. FPGAs have the greatest logic capacity consisting of arrays of logic blocks. PLDs offer advantages over fixed logic by reducing components, changing designs

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87 views

EKT 121/4 Elektronik Digit 1: Introduction To Programmable Logic Devices (PLD)

This document provides an introduction to Programmable Logic Devices (PLDs). It discusses that PLDs allow the user to program the logic function, unlike fixed function devices where the logic is permanent. There are three major types of PLDs: Simple PLDs (SPLDs), Complex PLDs (CPLDs), and Field Programmable Gate Arrays (FPGAs). SPLDs include PROMs, PLAs, PALs, and GALs and have the least complexity. CPLDs have a higher capacity than SPLDs. FPGAs have the greatest logic capacity consisting of arrays of logic blocks. PLDs offer advantages over fixed logic by reducing components, changing designs

Uploaded by

MasterArvin
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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EKT 121/4

ELEKTRONIK DIGIT 1
Kolej Universiti
Kejuruteraan Utara Malaysia

Introduction to
Programmable Logic Devices
(PLD)

Introduction
Fixed function devices a specific logic
function is contained in the IC, it can never be
changed.
Programmable Logic Devices (PLDs) the
logic function is programmed by the user
PLDs in some cases can be programmed
many times.

Digital Systems Family Tree


Digital
systems
Standard
logic

TTL

CMOS

ECL

SPLDs

Fuse

EPROM

Microprocessors
and DSP

ASICs
PLDs

Gate
arrays

Standard
cell

CPLDs

EEPROM

EPROM EEPROM

Full
custom

FPGAs

Flash

SRAM Flash

Antifuse

Digital System Categories

Three major categories :


1. Standard Logic (Logik Piawai)
- TTL , CMOS, ECL
2. Application-Specific Integrated Circuits (ASICs)
(Litar Bersepadu Penggunaan-Tentu)

- PLDs, Gate Arrays, Standard Cells, Full


Custom
3. Microprocessors and Digital Signal Processing (DSP)
(Mikropemproses dan Pemprosesan Isyarat Digit)

1.Standard Logic
Basic functional digital components (gates, FF,
decoders, MUX, register, counter,etc.)
Available as SSI and MSI chips
(refer to page 20 of your text book for details)

3 majors families of standard logic :


1) TTL
2) CMOS
3) ECL (for higher-speed designs)
Most popular is CMOS.
Why ????? because low power consumption.

2.Application-Specific Integrated
Circuits (ASICs)
Represents modern hardware design solution for
digital systems
An IC is designed to implement a specific desired
application
Four subcategories of ASICs devices :
1) PLDs
2) gate arrays
3) standard cell
4) full-custom

3.Microprocessor and DSP


Contain of various type of functional blocks
Devices can be controlled electronically, data can be
manipulated by executing a program of instructions.
Flexibility all you have to do is change a program
Major downfall is SPEED.
Hardware solution of digital system design is
always faster that a software solution

Programmable Logic Devices


(PLDs)
What is PLDs?
- IC that contains a large number of interconnected
logic functions.
- Users can program the IC for a specific function
by selectively breaking the appropriate
interconnections.
- PLD has replaced the hard-wired fixed-function
logic device in many applications.

Programmable Arrays
All PLDs consists of programmable arrays
Essentially a grid of conductors that forms rows and
columns with a fusible link at each cross point
OR array original diode array evolved into the
integrated OR array, which consists of an array of
OR gates connected to a programmable matrix with
fusible links at each cross point of a row and
column.
AND array an array consists of AND gates
connected to a programmable matrix with fusible
links at each cross point.

Example : a basic programmable OR array.

Example : a basic programmable AND array.

Type of PLDs
3 major types of programmable logic:
1) Simple Programmable Logic Devices (SPLD)
2) Complex Programmable Logic Devices
(CPLD)
3) Field Programmable Logic Array (FPGA)

1.Simple Programmable Logic Devices


(SPLD)
The least complex form of PLDs
An arrays of AND gates and OR gates that can
be programmed to achieve logic function
Typical package has 24 to 28 pins
Four types :
1) PROM (Programmable Read-Only Memory)
2) PLA (Programmable Logic Array)
3) PAL (Programmable Array Logic)
4) GAL (Generic Array Logic)

PROM (Programmable Read-Only


Memory).
A fixed AND array and programmable OR array.
Used as a memory device and normally not as a logic
circuit

Block diagram

PLA (Programmable Logic Array)


Programmable AND and OR array

Block diagram

PAL (Programmable Array Logic)


Programmable AND array and a fixed OR array
with programmable output logic
One-time programmable (OTP)

Block diagram

PAL Operation
The structure allows any SOP logic expression with
a defined number of variables to be implemented.

cell

Basic structure of PAL

PAL Operation contd


A simple array is programmed so that product term
AB is produced AND1 gate, AB by AND2 gate and
AB by AND3 gate.

AND1

AND2

AND3

PAL implementation of SOP expression

PAL Operation contd

Simplified diagram of a programmed PAL

PAL Operation contd


Block diagram of
PAL16L8

8 outputs
16 inputs
Programmable
Array Logic

Active-LOW
output

GAL (generic array logic)


Reprogrammable AND array, a fixed OR array, and
programmable output logic macrocells.

(E2CMOS
programmable
AND array)

(OLMC)

Block diagram

GAL Operation contd


This structure allows
any SOP logic
expression with a
defined number of
variables to be
implemented.
Essentially a grid of
conductors forming
rows and column with
electrically erasable
CMOS (E2CMOS) cell
at each cross point.

Basic E2CMOS array structure


of a GAL

GAL Operation contd


A simple GAL
array is
programmed so
that product term
AB is produced
AND1 gate, AB
by AND2 gate
and AB by AND3
gate.

AND1

AND2

AND3

GAL implementation of SOP expression

GAL Operation contd


GAL is programmed for the 3-variable logic function:
X = ABC + ABC + BC +AB

General Concept of SPLD Programming


From the hardware standpoint, programming falls
into 2 major categories:
1) Conventional method
2) In-system programming (ISP)
From the software standpoint, a logic design is
programmed into a PLD using either schematic
entry software , HDL software or combination of
both.

Example: Flow chart of an SPLD conventional


programming sequence.

General Concept of SPLD Programming


contd

Typical configuration for


conventional PLD
programming

Typical configuration for insystem programming of a


PLD.

2.Complex Programmable Logic Devices


(CPLD)
Have a much higher capacity than SPLDs
Permitting more complex logic circuits to be
programmed into them.
Several forms of CPLD, which vary in complexity
and programming capability
Typically come in 44-pins to 160-pin packages
depending on the complexity

Basic diagram of a CPLD

Basic Logic array block in a


CPLD

3.Field Programmable Grid Array


(FPGA)
Different from SPLDs and CPLDs in their
internal organization and have the greatest logic
capacity
Consists of an array anywhere from 64 to
thousands of logic-gates group (logic blocks)
Two basic classes :
1) course grained (has large logic blocks)
2) fined-grained (has much smaller logic blocks)
Come in packages ranging up to 1000 pins

PLD Programming
2 basic methods used to enter a logic design for a PLDs:
1) Schematic entry
- the software allows user to enter a logic design using
logic components and to interconnect them on the
computer screen to form schematic diagram
2) Text-based entry (language-based entry)
- the software allows user to enter a logic design in the
form of text using HDL (hardware description
language)
VHDL & Verilog are widely used for programming
CPLDs and FPGAs.

Advantages of PLDs

Save a lot of space - many more logic circuits can


be stuffed into a much smaller area compared to
fixed function logic devices
Reduce the actual number and cost of device.
Logic design can be readily changed without
rewiring or replacing components.
Generally, a PLDs design can be implemented
faster than one using fixed-function ICs once the
required language is mastered.

- Thank you -

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