EECS 142

Lecture 3: High-Speed Amplifiers and Tuned Amplifiers

Prof. Ali M. Niknejad
University of California, Berkeley
c 2005 by Ali M. Niknejad
Copyright

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 1/44

p. 1

CS/CE Amplifier Bandwidth

RL
+
vo

C
RS
+
vs

Cdb + CL

Due to Miller multiplication, the input cap is usually the

dominant pole
01 Rs (Cin + |Av |C )
01 = Rs Cin (1 + |Av |) Rs Cin |Av |
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 2/44

p. 2

CS/CE Amplifier Gain-Bandwidth

Assuming the voltage gain is given by the
low-frequency value of gm RL , we have
01

Cin

= Rs Cin gm RL = (gm Rs )(gm RL )

gm
01

2 Rs

= |Av |

RL

T1

The amplifier has a bandwidth reduction factor of A2v



1
RL
2

0 |Av | = T
Rs

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 3/44

p. 3

Bandwidth Example
L
Say we need a gain of 60 dB (Av = 1000) and R
Rs = 2.
The technology has a capacitance ratio of = 0.2:

0 |Av |2 = 106 0 = T 2 5
T
0 = 5
10
Compare this to a current mirror amplifier. When we
follow the normal gain-bandwidth tradeoff, we have
T
T
0 =
=
Ai
1000

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 4/44

p. 4

Common Base Amplifier

C

Cin

RS
+
vs

+
vin

gm vin

ro

RL

RL

RS
+
vs

Write KCL at base node of circuit

vs + vin
+gm vin +sCin vin = 0 vs =
Rs
A. M. Niknejad

University of California, Berkeley

vin (1+gm Rs +sCin Rs )

EECS 142 Lecture 3 p. 5/44

p. 5

Common Base Amp (cont)

And write KCL at the output node
1
)vo + gm vin + sC vo = 0
(sCo +
RL


1
vo
+ s(Co + C ) = gm vin
RL

The voltage gain is a product of two terms

vo
gm RL
vx
Av =
=
vs
1 + s(Co + C )RL vs
G m RL
Av =
Cin
(1 + s(Co + C )RL )(1 + sRs 1+g
)
m Rs
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 6/44

p. 6

Common Base Bandwidth

Note the transconductance is degenerated,
Gm = gm /(1 + gm Rs ). Note that the input capacitance is
also degenerated by the action of series feedback.
Unlike a CE/CS ampilifier, the poles do not interact (due
to absence of feedback capacitor)
First lets take the limit of high loop gain, gm Rs 1
Av =

RL
Rs

(1 + s/T )(1 + s/L )

where L = ((Co + C )RL )1 is the pole at the output.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 7/44

p. 7

Matched Common Base Amp

The common-base amplifier has the nice property that
the input impedance is low (roughly 1/gm ) and
broadband, thus easily providing a termination to the
driver (a filter, the antenna, or a previous stage). If we
assume that Rs = 1/gm , we have
Av =

1
2 gm RL

(1 + s/2T )(1 + s/L )

The 3dB bandwidth is thus most likely set by the time

constant at the load.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 8/44

p. 8

Shunt Feedback Amp

VCC
RL
RF
vo
RS

+
vs

The shunt-feedback amplifier is a nice high-frequency

broadband amplifier building block. The action of the
shunt feedback is used to lower the input impedance
and to set the gain.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 9/44

p. 9

Shunt Feedback Gain / Input Resis

The in-band voltage gain and input impedance is given
by (see PS 1)
RF
Av =
Rs
Rin

RF 1
= (1 +
)
RL gm

1
RF
F
For an input match, Rs = (1 + R
)
,
or
g
R
=
(1
+
m s
RL gm
RL )

Since the voltage gain sets RF , the input impedance

match determines the required transconductance gm
(and hence the power dissipation)
A bipolar version will dissipate much less power due to
the higher intrinsic gm
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 10/44

p.

Shunt Feedback Amp BW

The amplifier is broadband and approximately obeys
the classic gain-bandwidth tradeoff Av 0 T
A zero-value time constant analysis identifies the
dominant pole
!
RL
RF (1 + RF )
1 = Cin Rs ||r ||
1 + gm R L
2 = C

RL (Rs ||r )
RF ||
Rs ||r || g1m ||RL

3dB
A. M. Niknejad

1 + 2

University of California, Berkeley

EECS 142 Lecture 3 p. 11/44

p.

Shunt Feedback/CC Cascade

If the shunt-FB amplifier needs to drive a low
impedance load, a broadband voltage buffer is needed
As shown below, an emitter follower (or source follower)
provides the solution (note this is a fast pnp). Note the
buffer is broadband (gain 1) and only loads the core
amplifier by the degenerated input capacitance
Cin2 /(1 + gm2 RE )
VCC
RL
RF
RS

RE
vo

+
vs

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 12/44

p.

Series RLC Circuis

Z

+
vs

C
R

+
vo

The RLC circuit shown is deceptively simple. The

impedance seen by the source is simply given by


1
1
Z = jL +
+ R = R + jL 1
jC
2 LC
The impedance is purely real at at the resonant
1
. At resonance
frequency when (Z) = 0, or = LC
the impedance takes on a minimal value.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 13/44

p.

Series Resonance
vL

vL

vL

vs
vR

vR

vR
vs

vs
vC
< 0

vC
vC
= 0

> 0

Its worthwhile to investigate the cause of resonance, or

the cancellation of the reactive components due to the
inductor and capacitor. Since the inductor and capacitor
voltages are always 180 out of phase, and one
reactance is dropping while the other is increasing,
there is clearly always a frequency when the
magnitudes are equal.
Resonance occurs when L =
A. M. Niknejad

1
C .

University of California, Berkeley

EECS 142 Lecture 3 p. 14/44

p.

Quality Factor
So whats the magic about this circuit? The first
observation is that at resonance, the voltage across the
reactances can be larger, in fact much larger, than the
voltage across the resistors R. In other words, this
circuit has voltage gain. Of course it does not have
power gain, for it is a passive circuit. The voltage across
the inductor is given by
vs
vs
vL = j0 Li = j0 L
= j0 L = jQ vs
Z(j0 )
R

where we have defined a circuit Q factor at resonance

as
0 L
Q=
R
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 15/44

p.

Voltage Multiplication
Its easy to show that the same voltage multiplication
occurs across the capacitor
1
1 vs
vs
1
i=
=
=
vC =
j0 C
j0 C Z(j0 )
j0 RC R

jQ vs

This voltage multiplication property is the key feature of

the circuit that allows it to be used as an impedance
transformer.
Its important to distinguish this Q factor from the
intrinsic Q of the inductor and capacitor. For now, we
assume the inductor and capacitor are ideal.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 16/44

p.

More of Q
We can re-write the Q factor in several equivalent forms
owing to the equality of the reactances at resonance
r

1 1
LC 1
L1
Z0
0 L
=
=
=
=
Q=
R
0 C R
C R
CR
R
q
where we have defined the Z0 = CL as the
characteristic impedance of the circuit.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 17/44

p.

Circuit Transfer Function

Lets now examine the transfer function of the circuit
vo
R
H(j) =
=
1
vs
+R
jL + jC
H(j) =

jRC
2 LC + jRC

Obviously, the circuit cannot conduct DC current, so

there is a zero in the transfer function. The denominator
is a quadratic polynomial. Its worthwhile to put it into a
standard form that quickly reveals important circuit
parameters
H(j) =
A. M. Niknejad

j R
L
1
LC

+ (j)2 + j R
L

University of California, Berkeley

EECS 142 Lecture 3 p. 18/44

p.

Canonical Form
Using the definition of Q and 0 for the circuit
H(j) =

j Q0
0
02 + (j)2 + j
Q

Factoring the denominator with the assumption that

Q > 12 gives us the complex poles of the circuit
r
0
1

s =
j0 1
2Q
4Q2
The poles have a constant magnitude equal to the
resonant frequency
v ,
,!
u
u 2
1
0
2
t
|s| =
+ 0 1
= 0
2
2
4Q
4Q

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 19/44

p.

Q<

1
2

"

"
"
"

Q>

" " ""

""

Root Locus
"

1
2

"

"

"
"
"

""" !!!!!

""

""

A root-locus plot of the poles as a function of Q. As

Q , the poles move to the imaginary axis. In fact,
the real part of the poles is inversely related to the Q
factor.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 20/44

p.

Circuit Bandwidth
H(j0 ) = 1
1

0.8

0.6

Q=1
0.4

0.2

Q = 10
Q = 100
0.5

1.5

2.5

3.5

As we plot the magnitude of the transfer function, we

see that the selectivity of the circuit is also related
inversely to the Q factor.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 21/44

p.

Selectivity
In the limit that Q , the circuit is infinitely selective
and only allows signals at resonance 0 to travel to the
load.
Note that the peak gain in the circuit is always unity,
regardless of Q, since at resonance the L and C
together disappear and effectively all the source voltage
appears across the load.
The selectivity of the circuit lends itself well to filter
applications. To characterize the peakiness, lets
compute the frequency when the magnitude squared of
the transfer function drops by half
2

Q0
1
2
|H(j)| =
2 =



2
2
02 2 + Q0

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 22/44

p.

Selectivity Bandwidth
This happens when


02

2
2

0 /Q

=1

Solving the above equation yields four solutions,

corresponding to two positive and two negative
frequencies. The peakiness is characterized by the
difference between these frequencies, or the
bandwidth, given by
= +

A. M. Niknejad

0
=
Q

University of California, Berkeley

EECS 142 Lecture 3 p. 23/44

p.

Selectivity Bandwidth (cont)

The normalized bandwidth is inversely proportional to
the circuit Q.
1

=
0
Q
You can also show that the resonance frequency is the
geometric mean frequency of the 3 dB frequencies

0 =

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 24/44

p.

Parallel RLC
Y

is

io

The parallel RLC circuit is the dual of the series circuit.

By dual we mean that the role of voltage and currents
are interchanged.
Hence the circuit is most naturally probed with a current
source is . In other words, the circuit has current gain as
opposed to voltage gain, and the admittance minimizes
at resonance as opposed to the impedance.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 25/44

p.

Duality
The role of capacitance and inductance are also
interchanged. In principle, therefore, we dont have to
repeat all the detailed calculations we just performed for
the series case, but in practice its worthwhile exercise.
The admittance of the circuit is given by

1
Y = jC +
+ G = G + jC 1
jL

1
2 LC

which has the same form as before. The resonant

frequency also occurs when (Y ) = 0, or when
= 0 = 1 .
LC

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 26/44

p.

Duality (cont)
Likewise, at resonance the admittance takes on a
minimal value. Equivalently, the impedance at
resonance is maximum.
This property makes the parallel RLC circuit an
important element in tuned amplifier loads. Its also
easy to show that at resonance the circuit has a current
gain of Q
is
is
= j0 C = jQ is
iC = j0 Cvo = j0 C
Y (j0 )
G

where we have defined the circuit Q factor at resonance

by
0 C
Q=
G
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 27/44

p.

Current Multiplication
The current gain through the inductor is also easily
derived
iL = jQ is

The equivalent expressions for the circuit Q factor are

given by the inverse of the previous relations
0 C
R
Q=
=
=
G
0 L

A. M. Niknejad

R
1
LC

University of California, Berkeley

R
R
=q =
Z0
L
L
C

EECS 142 Lecture 3 p. 28/44

p.

Phase Response
The phase response of a resonant circuit is also related
to the Q factor. For the parallel RLC circuit the phase of
the admittance is given by

!
1
1 C 1
2 LC
Y (j) = tan
G
The rate of change of phase at resonance is given by

dY (j) 
2Q
=

d
0
0

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 29/44

p.

Phase Response
100

Q = 100
75

Q = 10
Q=2

50

Q=

1
2

25

-25

-50

-75

0.2

0.5

10

/0

A plot of the admittance phase as a function of

frequency and Q is shown. Higher Q circuits go through
a more rapid transition.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 30/44

p.

Circuit Transfer Function

Given the duality of the series and parallel RLC circuits,
its easy to deduce the behavior of the circuit. Whereas
the series RLC circuit acted as a filter and was only
sensitive to voltages near resonance 0 , likewise the
parallel RLC circuit is only sensitive to currents near
resonance
vo G
G
io
=
=
H(j) =
1
is
vo Y (j)
+G
jC + jL

which can be put into the same canonical form as

before
j Q0
H(j) = 2
0
0 + (j)2 + j
Q
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 31/44

p.

Circuit Transfer Function (cont)

We have appropriately re-defined the circuit Q to
correspond the parallel RLC circuit. Notice that the
impedance of the circuit takes on the same form
1
1
=
Z(j) =
1
Y (j)
jC + jL
+G

which can be simplified to

1
j 0 GQ
Z(j) =
 2

+
j
1 + j
0
0 Q

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 32/44

p.

Parallel Resonance
At resonance, the real terms in the denominator cancel
R
jQ
Z(j0 ) =
=R
2

j0
+j Q1
1+
0
{z
}
|
=0

Its not hard to see that this circuit has the same half
power bandwidth as the series RLC circuit, since the
denominator has the same functional form
1

=
0
Q

plot of this impedance versus frequency has the same

form as before multiplied by the resistance R.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 33/44

p.

Tuned Amplifiers
L
C

+
vs

RL

+
vo

Cdb + CL

Av =

The RLC loaded amplifier is a

tuned amplifier. A transconductance device drives a shunt RLC
load which results in a voltage
gain.

gm
gm Z(j) =
Y (j)

The peak gain occurs at resonance

Av,max =
A. M. Niknejad

gm Reff

University of California, Berkeley

EECS 142 Lecture 3 p. 34/44

p.

Tuned Amp (cont)

Ref f is the loaded resistance of the tank
Reff = RL ||ro ||Rx,L ||Rx,C

In order to maximize the gain, we employ high-Q

inductors and capacitors in the load and omit the
explicit load resistance RL . The peak gain is thus
Av,max

gm (Rx,L ||Rx,C )

Assuming the Q factor is dominated by the inductor, a

good assumption for monolithic IC inductors, we have
Av,max

A. M. Niknejad

gm Rx,L =

University of California, Berkeley

gm QL L

EECS 142 Lecture 3 p. 35/44

p.

Shunt-Series Transformation
Rs
Xp

Xs

Rp

The key calculation aid is the series to parallel

transformation. Consider the impedance shown above,
which we wish to represent as a parallel impedance.
We can do this at a single frequency as long as the
impedance of the series network equals the impedance
of the shunt network
Rs + jXs =
A. M. Niknejad

1
Rp

University of California, Berkeley

1
1
+ jX
p
EECS 142 Lecture 3 p. 36/44

p.

Transformation (cont)
Equating the real and imaginary parts
Rp Xp2
Rs = 2
Rp + Xp2
Rp2 Xp
Xs = 2
Rp + Xp2

which can be simplified by using the definition of Q

Rp2 Xp
Rp
Xs
Qs =
=
= Qp = Q
=
2
Rs
Rp Xp
Xp

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 37/44

p.

Transformation (cont)
Which shows that
Rp = Rs (1 + Q2 )

and
Xp = Xs (1 + Q2 ) Xs

where the approximation applies under high Q

conditions.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 38/44

p.

Q Calculation
We used the series to parallel transformation to
calculate the effective shunt resistance due to the
inductor
Reff =

(1 + Q2L )Rx,L

Q2L Rx,L

2 L
QL
QL

= QL L

The gain is maximized at a fixed bias current and

frequency by maximizing the product QL L. So in
theory, there is no limit to the voltage gain of the
amplifier as long as we can maximize the quality factor
QL .

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 39/44

p.

Selection of L
Note that the capacitance of the circuit is not
detrimental since it is resonated away with the shunt
inductance. In other words L is chosen such that
1
L= 2
0 Ceff

where Ceff = Cdb + (1

|A1
v |)C + CL .

The ability to tune out the parasitic capacitances in the

circuit is a major advantage of the tuned amplifier. This
is especially important as it allows low-power operation.
Another important advantage of the circuit is that there
is practically no DC voltage drop across the inductor,
allowing very low supply voltage operation.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 40/44

p.

Tuned Amplifier Advantages

Another less obvious advantage is the improved voltage
swing at the output of the amplifier. Usually the voltage
swing is limited by the supply voltage and the Vds,sat of
the amplifier.
In this case, though, the voltage can swing above the
supply. Since the average DC voltage across an
inductor is zero, the output voltage can swing around
the DC operating point of Vdd .
This is a major efficiency boost for the amplifier and is
an indispensable tool in designing power amplifiers and
buffers.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 41/44

p.

Cascode Tuned Amplifier

RL

M2
C1
+
vs

+
vo

Cdb + C2 + CL

M1

Besides the obvious advantage of boosting the

output impedance, thus
maximizing the Q of the
load, the cascode device
solves a major stability
problem of the amplifier.

Well show that a feedback C path can easily lead to

unwanted oscillations in the amplifier. The cascode
tuned amplifier effectively has zero feedback and thus is
much more stable. The loss in voltage headroom is a
small price to pay considering the improved headroom
afforded by the inductor.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 42/44

p.

Bandwidth
Its interesting to note that the bandwidth of the circuit is
still determined by the RC time constant at the load.
0
1
0
=
=
BW =
Q
0 RC
RC

The ultimate sacrifice for high frequency operation in a

tuned amplifier is that the amplifier is narrow-band with
zero gain at DC. In fact, the larger the Q of the tank, the
higher the gain and the lower the bandwidth.

A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 43/44

p.

How high can we go?

To win some of the bandwidth back requires other
techniques, such as shunt peaking and distributed
amplifiers. Other techniques (some invented here at
Berkeley) can also help out.
But can we tune out parasitics and design amplifiers
operating at arbitrarily high frequency?
Based on the simple analysis thus far, it seems that for
any given frequency, no matter how high, we can simply
absorb the parasitic capacitance of the amplifier with an
appropriately small inductor (say a short section of
transmission line) and thus realize an amplifier at an
arbitrary frequency. This is of course ludicrous and well
re-examine this question in future lecture.
A. M. Niknejad

University of California, Berkeley

EECS 142 Lecture 3 p. 44/44

p.