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Experiment-3: Aim: Implement Half Adder and Subtractor Using VHDL Half Adder

This document describes implementing a half adder and half subtractor in VHDL. A half adder is used to add two 1-bit numbers and has two inputs, two outputs - one for the sum and one for the carry. It is formed by connecting an AND gate to the inputs of an XOR gate to produce the carry. A half subtractor subtracts two 1-bit numbers and has two inputs for the bits, and two outputs for the difference and borrow bits. It uses an XOR gate along with an AND gate where one input is complemented, to perform the subtraction and borrow operation.

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Saurabh Anand
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37 views2 pages

Experiment-3: Aim: Implement Half Adder and Subtractor Using VHDL Half Adder

This document describes implementing a half adder and half subtractor in VHDL. A half adder is used to add two 1-bit numbers and has two inputs, two outputs - one for the sum and one for the carry. It is formed by connecting an AND gate to the inputs of an XOR gate to produce the carry. A half subtractor subtracts two 1-bit numbers and has two inputs for the bits, and two outputs for the difference and borrow bits. It uses an XOR gate along with an AND gate where one input is complemented, to perform the subtraction and borrow operation.

Uploaded by

Saurabh Anand
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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Experiment-3

Aim: Implement half adder and subtractor using VHDL


Half Adder
A logic circuit block used for adding two one bit numbers or simply two bits is called as a half
adder circuit. This circuit has two inputs which accept the two bits and two outputs, with one .
To accomplish the binary addition with Ex-OR gate, there is need of additional circuitry to
perform the carry operation. Hence, a half adder is formed by connecting AND gate to the input
terminals of the Ex-OR gate so as to produce the carry as shown in below figure.

Half Subtractor
A half subtractor is a multiple output combinational logic network that does the subtraction of
two bits of binary data. It has input variables and two output variables. Two inputs are
corresponding to two input bits and two output variables corresponds to the difference bit and
borrow bit.The binary subtraction is also performed by the Ex-OR gate with additional circuitry to
perform the borrow operation. Thus, a half subtractor is designed by an Ex-OR gate including

AND gate with A input complemented before fed to the gate.

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