ELG4157: Digital Control Systems

Discrete Equivalents
Z-Transform
Stability Criteria
Steady State Error
Design of Digital Control Systems

Advantages and Disadvantages

Improved sensitivity.
Use digital components.
Control algorithms easily
modified.
Many systems inherently
are digital.

Develop complex math

algorithms.
Lose information during
conversions due to
technical problems.
Most signals continuous
in nature.

Digitization
The difference between the continuous and digital systems is that
the digital system operates on samples of the sensed plant rather
than the continuous signal and that the control provided by the
digital controller D(s) must be generated by algebraic equations.
In this regard, we will consider the action of the analog-to-digital
(A/D) converter on the signal. This device samples a physical signal,
mostly voltage, and convert it to binary number that usually consists
of 10 to 16 bits.
Conversion from the analog signal y(t) to the samples y(kt), occurs
repeatedly at instants of time T seconds apart.
A system having both discrete and continuous signals is called
sampled data system.
The sample rate required depends on the closed-loop bandwidth of
the system. Generally, sample rates should be about 20 times the
bandwidth or faster in order to assure that the digital controller will
match the performance of the continuous controller.
3

Digital Control System

D

A
ADC

D
Micro
Processor

DAC

Correction
Element

Process

Clock

Measurement

A: Analog
D: Digital
4

Continuous Controller and Digital Control

y(t)

R(t)
+

Gc(s)

Plant

Continuous Controller
r(t)

A/D

Digital
Controller

Digital Controller

r(kT) D/A and

Hold

p(t)

y(t)
Plant

m(kT)

D/A

m(t)
5

Applications of Automatic Computer

Controlled Systems
Most control systems today use digital computers
(usually microprocessors) to implement the controllers).
Some applications are:
Machine Tools
Metal Working Processes
Chemical Processes
Aircraft Control
Automobile Traffic Control
Automobile Air-Fuel Ratio
Digital Control Improves Sensitivity to Signal Noise.
6

Digital Control System

Analog electronics can integrate and differentiate signals. In order
for a digital computer to accomplish these tasks, the differential
equations describing compensation must be approximated by
reducing them to algebraic equations involving addition, division,
and multiplication.
A digital computer may serve as a compensator or controller in a
feedback control system. Since the computer receives data only at
specific intervals, it is necessary to develop a method for describing
and analyzing the performance of computer control systems.
The computer system uses data sampled at prescribed intervals,
resulting in a series of signals. These time series, called sampled
data, can be transformed to the s-domain, and then to the z-domain
by the relation z = ezt.
Assume that all numbers that enter or leave the computer has the
same fixed period T, called the sampling period.
A sampler is basically a switch that closes every T seconds for one
instant of time.
7

Sampler
r(t)
Continuous

r*(t)
Sampled

2T

3T

4T

r(3T)
r(4T)

r(2T)
r(kT)

r(T)
T

2T

3T

Zero-order
Hold
Go(s)

P(t)

1 1 sT 1 e sT
G0 ( s) e
s s
s

4T
8

Modeling of Digital Computer

r(t)

e(t)

A/D

u*(t)

e*(t) Computer

u(t)
D/A

Process

Measure

Sampling analysis
Expression of the sampling signal

x * (t ) x(t ) T (t ) x(t )

k 0

k 0

(t kT) x(kT) (t kT)

c(t)

Analog to Digital Conversion: Sampling

An input signal is converted from continuous-varying
physical value (e.g. pressure in air, or frequency or
wavelength of light), by some electro-mechanical device
into a continuously varying electrical signal. This signal has
a range of amplitude, and a range of frequencies that can
present. This continuously varying electrical signal may
then be converted to a sequence of digital values, called
samples, by some analog to digital conversion circuit.
There are two factors which determine the accuracy with which the
digital sequence of values captures the original continuous signal: the
maximum rate at which we sample, and the number of bits used in
each sample. This latter value is known as the quantization level
10

Zero-Order Hold
The Zero-Order Hold block samples and holds its input
for the specified sample period.
The block accepts one input and generates one output,
both of which can be scalar or vector. If the input is a
vector, all elements of the vector are held for the same
sample period.
This device provides a mechanism for discretizing one or
more signals in time, or resampling the signal at a
different rate.
The sample rate of the Zero-Order Hold must be set to
that of the slower block. For slow-to-fast transitions, use
the unit delay block.

11

The z-Transform
The z-Transform is used to take discrete time domain signals into a complexvariable frequency domain. It plays a similar role to the one the Laplace
transform does in the continuous time domain. The z-transform opens up new
ways of solving problems and designing discrete domain applications. The ztransform converts a discrete time domain signal, which is a sequence of real
numbers, into a complex frequency domain representation.

r * (t ) r (kT ) (t kT )
k 0

For a signal t 0, Using the Laplace transforms, we have

{r * (t )} r (kT )e ksT
k 0

z e sT

Z {r (t )} Z {r * (t )} r (kT ) z k
k 0

U ( z)

z
z 1

Z { f (t )} F ( z ) f (kT ) z k
k 0

12

Transfer Function of Open-Loop System

r(t)

T=1

r*(t)

Zero-order
Hold Go(s)

Process

(1 e st )
1
Go ( s )
; G p ( s)
s
s ( s 1)
Y (s)
1 e st
Go ( s )G p ( s ) G ( s ) 2
R * ( s)
s ( s 1)
1 1
1
Expanding into partial fraction : G ( s ) 1 e st ( 2
)
s s 1
s
0.3678 z 0.2644
G( z) 2
z 1.3678 z 0.3678

13

14

Z-Transform
Z-transform method: Partial-fraction expansion approaches
If :

Kn
K1
K2
A(s)

( s a1 )( s a2 ) ( s an ) s a1 s a2
s an

X(s)

Then : X ( z )

z e

Ki z

i 1

Example:

ai T

5( s 4)
5 10 z
15 z
5z
10 15
Z

s s 1 s 2 z 1
z e T z e 2T

s( s 1)( s 2)

Inverse Z-transform method: Partial-fraction expansion approaches

If :

X(z)

A(z)
(z e
n

then : X (kT )

a1T

)( z e

a2T

) (s e

a nT

K1 z
z e

a1T

K2 z
se

a2T

K i e ai kT

i 1

Example:

2T

z
(
1

e
) 1 z
z
1
2kT
x(kT) Z

z 1

2T
z e 2T

( z 1)( z e )

Closed-Loop Feedback Sampled-Data Systems

r(t)

R(z)

E(z)

G(z)

Y(z)

Y(z)

R(z)

D(z)

E(z)

G(z)

Y(z)

Y(z)

Y ( z)
G( z )
G ( z ) D( z )
T ( z)

R( z )
1 G ( z ) 1 G ( z ) D( z )

16

Now Let us Continue with the Closed-Loop System for the

Same Problem

Y ( z)
G( z)
0.3678 z 0.2644

2
R( z ) 1 G ( z )
z z 0.6322
z
Assume an a unit step input : R( z )
z 1
z (0.3678 z 0.2644)
0.3678 z 2 0.2644 z
Y ( z)
3
2
( z 1)( z z 0.6322) z 2 z 2 1.6322 z 0.6322
Y ( z ) 0.3678 z 1 z 2 1.4 z 3 1.4 z 4 1.147 z 5

17

Stability
The difference between the stability of the continuous
system and digital system is the effect of sampling rate
on the transient response.
Changes in sampling rate not only change the nature of
the response from overdamped to underdamped, but
also can turn the system to an unstable.
Stability of a digital system can be discussed from two
perspectives:
z-plane
s-plane

18

Stability Analysis in the z-Plane

A linear continuous feedback control system is stable if all poles of the
closed-loop transfer function T(s) lie in the left half of the s-plane.
In the left-hand s-plane, 0; therefore, the related magnitude of z
varies between 0 and 1. Accordingly the imaginary axis of the s-plane
corresponds to the unit circle in the z-plane, and the inside of the unit
circle corresponds to the left half of the s-plane.
A sampled system is stable if all the poles of the closed-loop transfer
function T(z) lie within the unit circle of the z-plane.

ze

sT

( j )T

z eT
z T
19

The Stability Analysis

Critical stability Im z-plane

The graphic expression of the stability

condition for the sampling control systems

The stability criterion

Unstable zone

Re

Stable zone

In the characteristic equation 1+GH(z)=0, substitute z with

s 1
s 1

Bilinear transformation

We can analyze the stability of the sampling control systems the same as we did
in chapter 3 (Routh criterion in the s-plane) .
Proof : suppose w j , z x jy , then :

z 1 x jy 1 x 1 jy x 2 y 2 1
2y

z 1 x jy 1 x 1 jy ( x 1) 2 y 2
( x 1) 2 y 2

2
2
2
2

y
1

( for the left half of the s-plane) (inside the unit circle of the z-plane)

The Stability Analysis

1 G( z ) 1

0.632 Kz
z 1.368 z 0.368
2

Determine K for the stable system

Solution:

0.632 Kz
z 1.368 z 0.368
2

Make

s 1
s 1

0 0.632 Ks 1.264 s (2.736 0.632 K ) 0

In terms o f the Routh criterion :

0.632 K
1.264
2.736 0.632 K

We have: 0 < K < 4.33

2.736 0.632 K

Example: Stability of a closed-loop system

r(t)

Go(s)

Gp(s)

Y(t)

K
K (0.3678 z 0.2644)
K (az b)
; G( z)

s ( s 1)
z 2 1.3678 z 0.3678 z 2 (1 a ) z a
The poles of the losed - loop transfer function t(z) are the roots of the equation
[1 G(z)] 0 : z 2 (1 a ) z a Kaz Kb 0
G p (s)

K 1; z 2 z 0.6322 ( z 0.5 j 0.6182)( z 0.5 j 0.6182) 0

The systemis stable because the roots lie within the unit circle, When K 10
z 2 2.310 z 3.012 ( z 1.115 j1.295) ( z 1.115 j1.295) (unstable)
This systemis stable for : 0 K 2.39
Second - order sampled systemis unstable for increased gain where the continuous22is
stable for all values of gain.

Example

23

The Steady State Error Analysis

ess lim ( z 1) E ( z )
z 1

E ( z ) R( z ) c( z ) R( z )

R( z )G( z )
R( z )

1 G( z ) 1 G( z )

ess lim ( z 1) E ( z ) lim ( z 1)

z 1

*
1 K p
T
*
Kv
T2
*
K a

z 1

r (t ) t

R( z )
2

G(s)

R( z )
1 G( z)

r (t ) 1(t ) R( z )
r (t ) t

R( z )

z
;
z 1
Tz
( z 1)

K *p lim G ( z )
z 1

;
2

T 2 z ( z 1)
( z 1) 3

K v* lim ( z 1)G ( z )
z 1

; K a* lim ( z 1) 2 G ( z )
z 1

Example
e

Z.O.H

T 1s
1) Determine K for the stable system.

G (s)

K
G( s)
s( s 5)

2) If r(t) = 1+t, determine ess=

Solution

1)
1 e Ts
K
G( z) Z

s
s
(
s

5
)

(1 e ) Z 2

s ( s 5)
K
K
K
Ts
5
5
(1 e ) Z 2
25
s
s
s5

Ts

Kz
Kz
KTz

5
5
25
(1 z )

( z 1) 2 z 1 z e 5T

T 1
1

K z 2 2.2067 z 0.2135

5
( z 1)( z 0.0067 )

The charecteristic equation of the system:

K z 2 2.2067 z 0.2135
1 G( z) 1
0
5
( z 1)( z 0.0067 )
(5-K ) z 2 (2.2067 K 5.0335 ) z (0.0335 0.2135 K ) 0
z

s 1
0.9932 w (9.993 1.573 K ) w (10 .067 2.4202 K ) 0
s 1

0 K 4.16
2)

2
K
z
2.2067 z 0.2135
K *p lim G ( z ) lim

z 1
z 1 5
( z 1)( z 0.0067 )

K v*

K z 2 2.2067 z 0.2135
lim ( z 1)G ( z ) lim
0.2 K
z 1
z 1 5
( z 0.0067 )

ess

1
1 K *p

T
K v*

T
0.2 K

T 1

5
K

Steady State Error and System Type

1) For unity feedback in figure below,

2)

Design of Digital Control Systems

The Procedure:

Start with continuous system.

Add sampled-data system elements.
Chose sample period, usually small but not too small.
Use sampling period T = 1 / 10 fB, where fB = B / 2 and
B is the bandwidth of the closed-loop system.
Practical limit for sampling frequency: 20 s / B 40
Digitize control law.
Check performance using discrete model or SIMULINK.

30

31

Start with a Continuous Design

D(s) may be given as an existing design or by using root
locus or bode design.

E(z)
r(t)

R(z)

D(z)

G(z)

Y(z)

Y(z)

32

Add Samples Necessary for Digital Control

Transform D(s) to D(z): We will obtain a discrete system
with a similar behavior to the continuous one.
Include D/A converter, usually a zero-order-device.
Include A/D converter modeled as an ideal sampler.

And an antialiasing filter, a low pass filter, unity gain filter

with a sharp cutoff frequency.
Chose a sample frequency based on the closed-loop
bandwidth B of the continuous system.
33

Closed-Loop System with Digital Computer Compensation

Y ( z)
G ( z ) D( z )
T ( z)
R( z )
1 G ( z ) D( z )
U ( z)
The tranfer function of the computer is
D( z )
E( z)
Consider the second order systemwith a zero - order hold and a plant
1
0.3678z 0.7189
k ( z 0.3678)
Gp( s )
when T 1; G ( z )
; If we select D( z )
z 1z 0.3678
s ( s 1)
(z r)
We cancer the pole of G ( z )at z 0.3678 and have the two parameters r and K .
1.359 z 0.7189
0.5 z 0.7189
D( z )
; G ( z ) D( z )
z 0.240
z 1z 0.240
1 A K a
sa
zA
Gc ( s ) K
; D( z ) C
; Z {Gc ( s )} D( z ); A e aT ; B e bT ; C
1 B
sb
zB
b

34

Compensation Networks (10.3; page 747)

The compensation network, Gc(s) is cascaded with the unalterable process
G(s) in order to provide a suitable loop transfer function Gc(s)G(s)H(s).
Compensation
R(s)

Gc(s)

G(s)

Y(s)

j
H(s)
M

Gc ( s)

K ( s zi )
i 1
N

( s pi )

-p

-z

j 1

K (s z)
First order compensator
Gc ( s )
( s p)
When z p, the network is called a phase - lead network

35

Closed-Loop System with Digital Computer Compensation

There are two methods of compensator design:
(1) Gc(s)-to-D(z) conversion method, and
(2) Root locus z-plane method.

The Gc(s)-to-D(z) Conversion Method

sa
Gc ( s ) K
(First - Order Compensator)
sb
zA
D( z ) C
(Digital Controller)
zB
Z {Gc ( s )} D( z ) (z - transform)
Ae

aT

;B e

bT

1 A
a
;C
K when s 0
1 B
b
36

The Frequency Response

The frequency response of a system is defined as the
steady-state response of the system to a sinusoidal input
signal.
The sinusoid is a unique input signal, and the resulting
output signal for a linear system, as well as signals
throughout the system, is sinusoidal in the steady-state; it
differs form the input waveform only in amplitude and
phase.

37

Phase-Lead Compensator Using Frequency Response

A first-order phase-lead compensator can be designed using the frequency
response. A lead compensator in frequency response form is given by

Gc( s )

1 s
1 s

z p

sin m

1
1

In frequency response design, the phase-lead compensator adds positive phase to

the system over the frequency range. A bode plot of a phase-lead compensator
looks like the following

Phase-Lead Compensator Using Frequency Response

Additional positive phase increases the phase margin and
thus increases the stability of the system. This type of
compensator is designed by determining alfa from the
amount of phase needed to satisfy the phase margin
requirements.
Another effect of the lead compensator can be seen in the
magnitude plot. The lead compensator increases the gain of
the system at high frequencies (the amount of this gain is
equal to alfa. This can increase the crossover frequency,
which will help to decrease the rise time and settling time of
the system.

Phase-Lag Compensator Using Root Locus

A first-order lag compensator can be designed using the root locus. A lag
compensator in root locus form is given by

G c( s )

( s z)
( s p)

where the magnitude of z is greater than the magnitude of p. A phase-lag

compensator tends to shift the root locus to the right, which is undesirable. For this
reason, the pole and zero of a lag compensator must be placed close together
(usually near the origin) so they do not appreciably change the transient response
or stability characteristics of the system.
When a lag compensator is added to a system, the value of this intersection will be
a smaller negative number than it was before. The net number of zeros and poles
will be the same (one zero and one pole are added), but the added pole is a
smaller negative number than the added zero. Thus, the result of a lag
compensator is that the asymptotes' intersection is moved closer to the right half
plane, and the entire root locus will be shifted to the right.

Lag or Phase-Lag Compensator using Frequency Response

A first-order phase-lag compensator can be designed using the frequency
response. A lag compensator in frequency response form is given by

G c( s )

1 s
1 s

The phase-lag compensator looks similar to a phase-lead compensator, except

that a is now less than 1. The main difference is that the lag compensator adds
negative phase to the system over the specified frequency range, while a lead
compensator adds positive phase over the specified frequency. A bode plot of a
phase-lag compensator looks like the following

Example: Design to meet a Phase Margin Specification

Based on Chapter 10 (Dorf): Example 13.7

G p (s)

1740
. We will attempt to design Gc ( s ) so that we achieve
s (0.25s 1)

a phase margin of 45o with a crossover frequeny c 125 rad/s (Fig 10.10).
Using the Bode diagram of G p ( s ), we find that the phase margin is 2 o (Eq 10.24).
Based on 10.4, we find that the required pole - zero ratio is 6.25 (Eq 10.18).
1
2

c ab ; a 50; and b 312; Gc ( s )

K ( s 50)
( s 312)

We select K in order to yield GGc ( j) 1

When c 125 rad/s. Then K 5.6.
Now the compensator Gc ( s ) is to be realized by D( z ).
Set T 0.001 second. We have
4.85( z 0.95)
( z 0.73)
If we select another value for the sampling period, the the coefficient of D( z ) would differ!
A e 0.05 0.95, B e -0.312 0.73, and C 4.85; D( z )

42

The Root Locus of Digital Control Systems

R(s)
D(z)

+
-

Zero
Order
hold

Y(s)
KGp(s)

Y ( z)
KG ( z ) D( z )

; 1 KG ( z ) D( z ) 0 (Characteristic equation)
R( z ) 1 KG ( z ) D( z )
Plot the root locus for the characteri stic equation of the sampled systemas K varies.
1. The root locus starts at the poles and progresses to the zeros.
2. The root locus lies on a section of the real axis to the left of an odd number of poles and zeros.
3. The root locus is symmetrical with respect to the horizontal real axis.
4. 1 KG ( z ) D( z ) 0 or KG ( z ) D( z ) 1 and KG ( z ) D( z ) 180o k 360o
43

Root Locus of a Second Order System

K increasing
Im {z}

Unstable

Root locus
Unit circle

One zero
At z = -1
-3

-2

-1

Re {z}
0

2 poles at
z=1

K ( z 1)
0
2
( z 1)
Let z and solve for K

1 KG ( z ) 1

( 1) 2
K
F ( )
( 1)
dF ( )
0; 1 3; 2 1
d

44

Design of a Digital Controller

In order to achieve a specified response utilizing a root locus method,
( z a)
we will select a controller
D( z )
( z b)
Use (z - a) to cancel one pole at G(z) that lies on the positive real axis
of the z - plane.
Select (z - b) so that the locus of the compensated systemwill give
a set of complex roots
at a desired point within the unit circle on the z - plane.

45

Example: Design of a digital compensator

Let us design a compensator D(z) that will result in a stable system
when G p ( s ) is as described in Example 13.8.
With D( z ) 1, we have unstable system.Select D( z )

za
z b

K ( z 1)( z a )
KG ( z ) D( z )
( z 1) 2 ( z b)
If we select a 1 and b 0.2,
k ( z 1)
we have KG ( z ) D( z )
( z 1)( z 0.2)
Using the equation for F ( ), we obtain the entry point as z -2.56.
The root locus is on the unit circle at K 0.8.
Thus the systemis stable for K 0.8.
46

If the systemperformance were inadequate , we would improve

the root locus by selecting a 1 and b - 0.98 so that
K ( z 1)
K
KG ( z ) D( z )

( z 1)( z 0.98) ( z 1)
Then the root locus would lie on the real axis of the z - plane.
When K 1, the root of the characteri stic equation is at the origin.

47

Im{z}
K=0.8
K increasing

Unit circle

Re{z}
-1

0.2

+1

Entry point at
z = -2.56

Root locus
48

P13.10 Dorf
1
; T 0.1; D( z ) K
s ( s 10)
0.0037 z 0.0026
(a) The transfer function G ( z ) D( z ) K 2
z 1.368 z 0.3679
0.0037 z 0.0026
(b) The closed - loop systemcharacteri stic equation is 1 K 2
0
z 1.368 z 0.3679
(c) Using root locus method, maximum value of K is 239.
(d) Using Figure 13.19 for T/ 1 and maximum overshoot of 0.3, we find K 75.
0.2759 z 0.1982
(e) When K 75; T ( z ) 2
z 1.092 z 0.5661
(f)
When K 119.5, the poles are z 0.4641 j 0.6843. The overshoot is 0.55.
G p (s)

49

P13.11 Dorf

sa
sb
By using Bode Plot, we may select a 0.7, b 0.1, and K 150.
The compensated systemovershoot and safety - state tracking error
(for a ramp input) are PO 30% and ess 0.01.
(a) Gc ( s ) K

(b) Use Gc ( s ) to D( z ) method (T 0.1) : D( z ) C

zA
z 0.9324
155.3
zB
z 0.99

1 A
a
A e ; B e ;C
K
1 B
b
A e 0.007 0.9324; B e 0.01 0.99; C 155.3
aT

bT

(d) Use Gc ( s ) to D( z ) method (T 0.01) : D( z ) C

zA
z 0.993
150
zB
z 0.999

1 A
a
A e ; B e ;C
K
1 B
b
A e 0.07 0.993; B e 0.01 0.999; C 150
aT

bT

50