Appendix D-Memory Areas CPM1A Memory Area Functions Memory Area Structure
Appendix D-Memory Areas CPM1A Memory Area Functions Memory Area Structure
Note: 1. IR and LR bits that are not used for their allocated functions can be
used as work bits.
2. The contents of the HR area, LR area, Counter area, and read/write DM area
are backed up by a capacitor. At 25 *C, the capacitor will back up memory
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10. Appendix D- Memory Areas
for 20 days.
3. When accessing a PV, TC numbers are used as word data; when accessing
Completing Flags, they are used as bit data.
4. Data in DM6144 to DM6655 cannot be overwritten from the program, but
they can be changed from a Peripheral Device.
SR Area
These bits mainly serve as flags related to CPM2A operation or contain present and set values for
various functions. The functions of the SR area are explained in the following
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10. Appendix D- Memory Areas
07
08 Peripheral Port
Turn On to reset peripheral port.(Not valid when peripheral device is
connected.)
Automatically turns OFF when reset is complete.
09 Not Used.
10 PLC Setup Reset Bit
Turn ON to initialize PC Setup (DM 6600 through DM 6655). Automatically turns
OFF again when reset is complete. Only effective if the PC is in PROGRAM mode.
11 Forced Status Hold Bit
OFF : The forced status of bit that are forced set/reset are cleared when
switching between PROGRAM mode and MONITOR mode.
ON : The status of bits that are forced set/reset are maintained when switching
between PROGRAM mode and MONITOR mode.
SR area
Word(s) Bit(s) Function
SR 252 12 I/O Hold Bit
OFF : IR and LR bits are reset when starting or stopping operation.
ON : IR and LR bit status is maintained when starting or stopping operation
13 Not used.
14 Error Log Reset Bit
Turn ON to clear error log. Automatically turns OFF again when operation is
complete.
15 Not Used
SR 253 00 to FAL Error Code
07 The error code (a 2-digit number) is stored here when an error occurs. The FAL
number is stored here when FAL(06) or FALS(07) is executed. This word is reset
(to 00) by executing a FAL 00 instruction or by clearing the error from a
Peripheral Device.
08 No Used
09 Cycle Time Overrun Flag
Turns ON when a cycle time overrun occurs (i.e., when the cycle time exceeds
100 ms).
10 to Not used.
12
13 Always ON Flag
14 Always OFF Flag
15 First Cycle Flag
Turns ON for 1 cycle at the start of operation.
SR 254 00 1-minute clock pulse (30 seconds ON; 30 seconds OFF)
01 0.02-second clock pulse (0.01 second ON; 0.01 second OFF)
02 Negative (N) Flag
03 to Not used.
05
06 Differential Monitor Complete Flag
07 STEP (08) Execution Flag
Turns ON for 1 cycle only at the start of process based on STEP(08).
08 to Not used.
15
SR 255 00 0.1-second clock pulse (0.05 second ON; 0.05 second OFF)
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10. Appendix D- Memory Areas
AR Area
These bits mainly serve as flags related to CPM1A operation. These bits retain their status even
after the CPM1A power supply has been turned off or when operation begins or stops.
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10. Appendix D- Memory Areas
ON: Stopped.
OFF: Pulse being output.
AR12 00 to 15 Not Used.
AR13 00 Power-up PC Setup Error Flag
Turns ON when there is an error in DM 6600 to DM 6614 (the part of the PC
Setup area that is read at power-up).
01 Start-up PC Setup Error Flag
Turns ON when there is an error in DM 6615 to DM 6644 (the part of the PC
Setup area that is read at the beginning of operation).
02 RUN PC Setup Error Flag
Turns ON when there is an error in DM 6645 to DM 6655 (the part of the PC
Setup area that is always read).
03,04 Not Used.
05 Long Cycle Time Flag
Turns ON if the actual cycle time is longer than the cycle time set in DM 6619.
06,07 Not Used.
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10. Appendix D- Memory Areas
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10. Appendix D- Memory Areas
Note: 1. IR and LR bits that are not used for their allocated function can be used
as work bits.
2. The contents of the HR area, LR area, Counter area, and read/write DM are
backed up by the CPU Unit's battery. IF the battery is removed or fails, the
content of these area will be lost and unstable.
3. When a TC numbers is used as a word operand, the timer or counter PV is
accessed; when used as a bit operand, its Completion Flag is accessed.
4. Data is DM 6144 to DM 6655 cannot be overwritten from the program, but
they can be changed from a Programming Device.
5. The program and data in DM 6144 to DM 6655 are stored in flash memory.
SR Area
These bits mainly serve as flags related to CPM2A operation or contain present and set values for
various functions. The functions of the SR area are explained in the following
Word(s) Bit(s) Function
SR 228 00 to Pulse output PV 0 96777215 (16777215) to 16777215 Low 4 digits
15 When negative value, Left most bit = 1.
SR 229 00 to This CH cannot be sued as aux relay even when Pulse High 4 digits
15 output is not used
SR 230 00 to Pulse output PV 1 96777215 (16777215) to 16777215 Low 4 digits
15 When negative value, Left most bit = 1.
SR 231 00 to This CH cannot be sued as aux relay even when Pulse High 4 digits
15 output is not used
SR 232 00 to Macro Function Input Area
to SR 15 Contains the input operands for MCRO(99).
235 (Can be used as work bits when MCRO(99) is not used.)
SR 236 00 to Macro Function Output Area
to SR 15 Contains the output operands for MCRO(99).
239 (Can be used as work bits when MCRO(99) is not used.)
SR240 00 to Input Interrupt 0 Counter Mode SV
15 SV when input interrupt 0 is used in counter mode (4 digits hexadecimal).
(Can be used as work bits when input interrupt 0 is not used in counter mode.)
SR241 00 to Input Interrupt 1 Counter Mode SV
15 SV when input interrupt 1 is used in counter mode (4 digits hexadecimal).
(Can be used as work bits when input interrupt 1 is not used in counter mode.)
SR242 00 to Input Interrupt Z Counter Mode SV
15 SV when input interrupt 2 is used in counter mode (4 digits hexadecimal).
(Can be used as work bits when input interrupt 2 is not used in counter mode.)
SR 243 00 to Input Interrupt counter Mode SV
15 SV when input interrupt 3 is used in counter mode (4 digits hexadecimal).
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10. Appendix D- Memory Areas
(Can be used as work bits when input interrupt 3 is not used in counter mode.)
SR 244 00 to Input Interrupt 0 Counter Mode PV
15 Counter PV when input interrupt 0 is used in counter mode (4 digits
hexadecimal).
SR 245 00 to Input Interrupt 1 Counter Mode PV
15 Counter PV when input interrupt 1 is used in counter mode (4 digits
hexadecimal).
SR 246 00 to Input Interrupt 2 Counter Mode PV
15 Counter PV when input interrupt 2 is used in counter mode (4 digits
hexadecimal).
SR 247 00 to Input Interrupt 3 Counter Mode PV
15 Counter PV when input interrupt 3 is used in counter mode (4 digits
hexadecimal).
SR 248, 00 to High-speed Counter PV Area
SR 249 15 Differential Pulse Input mode: F8388608(-8388608) to 08388607
Pulse + Direction input mode: F8388608(-8388608) to 08388607
Reversible Pulse Input mode: F8388608(-8388608) to 08388607
Increment mode: 00000000 to 16777215
Sync mode:00000000 to 00020000(Hz)
When negative value, Left most byte is F
SR 250 00 to Analog Volume Setting 0
15 Used to store the 4-digit BCD set value (0000 to 0200) from analog volume
control 0.
SR 251 00 to Analog Volume Setting 1
15 Used to store the 4-digit BCD set value (0000 to 0200) from analog volume
control 1.
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10. Appendix D- Memory Areas
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10. Appendix D- Memory Areas
08 to Not used.
15
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10. Appendix D- Memory Areas
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10. Appendix D- Memory Areas
AR Area
These bits mainly serve as flags related to CPM2A operation. These bits retain their status
even after the CPM2A power supply has been turned off or when operation begins or stops.
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10. Appendix D- Memory Areas
Turns ON when the PLC has completed reading data. (No-Protocol only)
15 Peripheral Port Reception Overflow Flag
Turns ON when an overflow has occurred. (No-Protocol only)
AR09 00 to 15 RS-232C Port Reception Counter (4 digits BCD)
Valid only when no-protocol communication are used.
AR10 00 to 15 Peripheral Device Reception Counter
Valid only when no-protocol communication are used.
AR Area
Word(s) Bit(s) Function
AR11 00 to 07 High-speed Counter Range Comparison Flags
00 ON: Counter PY is within comparison range 1
0l ON: Counter PV is within comparison range 2
02 ON: Counter PV is within comparison range 3
03 ON: Counter PV is within comparison range 4
04 ON: Counter PV is within comparison range 5
05 ON: Counter PY is within comparison range 6
06 ON: Counter PV is within comparison range 7
07 ON: Counter PV is within comparison range 8
08 High Speed Counter Comparison
ON: Operating
OFF: Stopped
09 High-Speed Counter PV overflow/underflow
ON: Overflow/Underflow occurred.
OFF: Normal operation
10 Not Used.
11 Pulse Output 0 Accelerating /Decelerating Flag
ON: Accelerate/Decelerate
OFF: Constant rate
12 Pulse Output 0 Overflow/underflow Flag
ON: Overflow/Underflow
OFF: Normal
13 Pulse Output 0 Pulse Quantity Set Flag
ON: Pulse quantity has been set.
OFF: Pulse quantity has not been set.
14 Pulse Output 0 Output Completed Flag
ON: Completed
OFF: Not Completed
15 Pulse Output 0 Output Status
ON: Pulses being output.
OFF: Stopped.
AR12 00 to 11 Not Used.
12 Pulse Output 1 Overflow/underflow Flag
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10. Appendix D- Memory Areas
ON: Overflow/Underflow
OFF: Normal
13 Pulse Output 1 Pulse Quantity Set Flag
ON: Pulse quantity has been set.
OFF: Pulse quantity has not been set.
14 Pulse Output 1 Output Completed Flag
ON: Completed
OFF: Not Completed
15 Pulse Output 1 Output Status
ON: Pulses being output.
OFF: Stopped.
AR Area
Word(s) Bit(s) Function
AR13 00 Power-up PC Setup Error Flag
Turns ON when there is an error in DM 6600 to DM 6614 (the part of the PC
Setup area that is read at power-up).
01 Start-up PC Setup Error Flag
Turns ON when there is an error in DM 6615 to DM 6644 (the part of the PC
Setup area that is read at the beginning of operation).
02 RUN PC Setup Error Flag
Turns ON when there is an error in DM 6645 to DM 6655 (the part of the PC
Setup area that is always read).
03,04 Not Used.
05 Long Cycle Time Flag
Turns ON if the actual cycle time is longer than the cycle time set in DM 6619.
06,07 Not Used.
08 Memory Area Specification Error Flag
Turns ON when a non-existent data area address is specified in the program.
09 Flash Memory Error Flag
Turns ON when there is an error in flash memory.
10 Read-only DM Error Flag
Turns ON when a checksum error occurs in the read-only DM (DM 6144 to DM
6599) and that area is initialized.
11 PC Setup Error Flag
Turns ON when a checksum error occurs in the PC Setup area.
12 Program Error Flag
Turns ON when a checksum error occurs in the program memory (UM) area, or
when an improper instruction is executed.
13 Expansion Instruction Error Flag
Turns ON when a checksum error occurs in the expansion instruction data.
14 Data Save Error Flag
Urns ON if the data could not be retained with the backup battery.
15 Not Used.
AR14 00 to 15 Maximum Cycle Time (4 digits BCD)
The longest cycle time since the beginning of operation is stored. It is not
cleared when operation stops, buts iti is cleared when the operation starts
again.
AR15 00 to 15 Current Cycle Time (4 digits BCD)
The most recent cycle time during operation is stored. The current Cycle Time
is not cleared when operation stops.
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10. Appendix D- Memory Areas
AR Area
Word(s) Bit(s) Function
AR20 00 to 07 Month (01 to 12, BCD)
08 to 15 Year (00 to 99,BCD)
AR21 00 to 07 Day of the Week
00: Sunday
01: Monday
02: Tuesday
03: Wednesday
04: Thursday
05: Friday
06: Saturday
08 to 12 Not Used.
13 30-second Compensation Bit
14 Clock Stop Bit
Turn this bit ON to stop the clock. The time/data can be overwritten while this
bit is ON.
15 Clock Set Bit
To change the time/date, turn ON AR 2114, write the new time/date, and then
turn this bit ON to enable a new time/date setting.
AR22 00 to 15 Not Used.
AR23 00 to 15 Power off Counter (4 digit BCD)
This is the count of the number of times that the power has been turned off.
To clear the count , write “0000” from a Programming Device.
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