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73 views

468lec01 Intro

ddddddddddddd

Uploaded by

suprajaconjeti
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

ECEN 468

Advanced Digital System Design


Lecture 1: Introduction

ECEN 468 Lecture 1


Course Overview

! Digital system design


o With an emphasis on system-level design
o Only hardware
! SystemC
! Verilog
! VerilogAMS
! Some component designs
o SRAM array
o Bus
o UART
o Phase-locked loop
! Lab: image processing chip design

ECEN 468 Lecture 1 2


Main References

ECEN 468 Lecture 1 3


System/Architecture Level Decisions

! Should a function be implemented in hardware, software or an


alternative algorithm?
! Does this function use less power in hardware or software?
! Do we have enough interconnect bandwidth for our algorithm?
! What is the minimum precision required for our algorithm to
work?
!

ECEN 468 Lecture 1 4


Design Abstraction Levels

! Architecture
SystemC
! Behavioral
! RTL
Verilog
! Gates
! Transistor
Circuit netlist

ECEN 468 Lecture 1 5


Design Complexity Growth

100M
#Lines of Code

1M

10K

Behavioral
Architect

Gates
RTL
100
Yesterday Today Tomorrow

ECEN 468 Lecture 1 6


ESL (Electronic System Level) Design

! Design complexity growth


! Pressure of time-to-market, or design turn-around time
! Traditionally, system/architecture design is done by a few
experts according to ideas and experiences in their minds
! The ad hoc approach is not scalable with the design complexity

ECEN 468 Lecture 1 7


Examples

! A company spent weeks of time to design and verify a function


on a chip. Later, it was found this function was not used by the
software.
! Poor architecture level decisions made a company to over-
design a chip. The chip satisfied customers needs, but its design
and verification unnecessarily wasted resources and time.

ECEN 468 Lecture 1 8


Overview of SystemC

User Libraries SystemC Verification Library Other IP

Predefined Primitive Channels: Mutexs, FIFOs, & Signals


SystemC

Channels &
Threads & Methods Data types:
Interfaces
Simulation Logic,
Kernel Integers,
Events, Sensitivity Modules & Fixed Point
& Notifications Hierarchy

C++ STL

ECEN 468 Lecture 1 9


C++ Class

! Concept abstraction
! Information encapsulation
o Member data
o Member function
! Constructor/destructor
! Inheritance
! Polymorphism

ECEN 468 Lecture 1 10


An Example of C++

class iMeter{ void iMeter::setV(double v){


double value; value = v;
string iName; }
public: double iMeter::getVal(){
iMeter(const string& nm); return value:
void setV(double val); }
double getVal();
}; int main(){
iMeter m1(tommy);
iMeter::iMeter(const string& m1.setV(6.7);
nm):value(0.0){ cout << m1.getVal();
iName = nm; }
}

ECEN 468 Lecture 1 11


SystemC Example

#include <systemc> int sc_main(int sc_argc,


SC_MODULE(Hello) { char* sc_argv[]){
SC_CTOR(Hello) { Hello iHello(iHello);
SC_THREAD(main_thread);
} sc_start();
void main_thread(void) {
SC_REPORT_INFO(Hi!); return 0;
} }
};

ECEN 468 Lecture 1 12


SystemC Compilation Flow

Systemc
STL

Systemc.h File1.o
File1.h g++ File2.o ld
.exe
File1.cpp
Filen.o

Source files Compiler Object files Linker Executable

ECEN 468 Lecture 1 13


Beyond C++

! Time model
! Hardware data types
! Hierarchy and structure
! Communications management
! Concurrency

ECEN 468 Lecture 1 14


SystemC Simulation
sc_main()

SystemC Simulation Kernel


Elaborate

sc_start() Initialize Evaluate

Advance
time

Cleanup Update

ECEN 468 Lecture 1 15

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