Lect 23
Lect 23
Microstrip T-junction
1 1 1
Yin jB
Z1 Z 2 Z 0
For a lossless network, all the characteristic impedances are
real, and we can assume B = 0. Then Yo = Y1 + Y2 .
The voltage V0 at the junction is the same for line 1 and line
2, and the power in the lines is
P1 = V02Y1/2 and P2 = V02Y2/2
P2 Y2 Z1
so the power division ratio r is r
P1 Y1 Z 2
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Substituting Y2 = rY1 we have Yo = Y1(1+r), so Z1 = Zo(1+r)
1+r
and Z2 = Zo r
Such a divider
can be realized
by connecting
three Zo An equal-split three-port
transmission resistive power divider.
lines to a star
circuit consisting
The impedance looking into the resistor
of three resistors
followed by the output line, is
R = Zo/3.
Z0 4Z0
Z Z0
3 3
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The input impedance of the divider is
Z0 2Z0
Z in Z0 matched
3 3
Since the network is symmetric from all three ports, the
output ports are also matched.
Output Power
V1
The output voltage from port 2 and 3 are, V2 V3
2
Thus, S21 = S31 = S23 = 1/2, which indicates 6 dB below the
input power level. We have
0 1 1 1
[S ] 1 0 1 Port 2 and 3 are
1 P2 P3 Pin
2 not isolated. 4
1 1 0
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The Wilkinson Power Divider
Motivation: to solve the problem of output isolation
The Wilkinson power divider is a three-port that has all ports
matched with isolation between the two output ports.
The
impedance
looking into
port 2 is
2
Z
Z in
e x 0
Bisection of the equivalent circuit for
2 even mode excitation.
Quarter-wave
transformer For a matched port 2, we have Z 2
so that V2e V and Z ine 1
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Setting up x coordinate as shown in the figure. Looking
toward the left from port 1, the transmission line voltage can
be written as
V ( x ) V ( e j x e j x )
Then, V2e V ( / 4) jV (1 ) V
1
V1 V (0) V (1 ) jV
e
1
2 2
We have therefore, V1 jV 2
e
2 2
The
impedance
looking into
port 2 is
1
Z in ( 2 ) 2 1
2
Summary:
S11 0
symmetric
S 22 S33 0
V1e V1o
S12 S 21 e
V2 V2o
j/ 2
S13 S31 j / 2
S 23 S32 0 ELEC4630, Shu Yang, HKUST 12
When the Wilkinson power divider is driven at port 1 and the
outputs are matched, no power is dissipated in the resistor.
Thus the divider is lossless when the outputs are matched;
only reflected power from ports 2 or 3 is dissipated in the
resistor. Since S23 = S32 = 0, ports 2 and 3 are isolated.