XTR

XTR115
116

XTR
115
XTR116

SBOS124A JANUARY 2000 REVISED NOVEMBER 2003

4-20mA CURRENT LOOP TRANSMITTERS

FEATURES APPLICATIONS
LOW QUIESCENT CURRENT: 200A 2-WIRE, 4-20mA CURRENT LOOP
5V REGULATOR FOR EXTERNAL CIRCUITS TRANSMITTER
VREF FOR SENSOR EXCITATION: SMART TRANSMITTER
XTR115: 2.5V INDUSTRIAL PROCESS CONTROL
XTR116: 4.096V TEST SYSTEMS
LOW SPAN ERROR: 0.05% COMPATIBLE WITH HART MODEM
LOW NONLINEARITY ERROR: 0.003% CURRENT AMPLIFIER
WIDE LOOP SUPPLY RANGE: 7.5V to 36V VOLTAGE-TO-CURRENT AMPLIFIER
SO-8 PACKAGE

DESCRIPTION used for offsetting or to excite transducers. A current

return pin (IRET) senses any current used in external
The XTR115 and XTR116 are precision current out- circuitry to assure an accurate control of the output
put converters designed to transmit analog 4-to-20mA current.
signals over an industry standard current loop. They
The XTR115 is a fundamental building block of
provide accurate current scaling and output current
smart sensors using 4-to-20mA current transmission.
limit functions.
The XTR115 and XTR116 are specified for opera-
The on-chip voltage regulator (5V) can be used to
tion over the extended industrial temperature range,
power external circuitry. A precision on-chip VREF
40C to +85C.
(2.5V for XTR115 and 4.096V for XTR116) can be

XTR115
XTR116
VREG +5V V+
+5V
8 Regulator 7

XTR115: 2.5V VREF Voltage

XTR116: 4.096V 1 Reference

VLOOP
B
RIN
IIN 6
2 RL
+ A1

VIN E
5
RLIM
3
IRET 100 VIN
R1 R2 IO =
2.475k 25 RIN

4
I = 100 IIN

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date. Copyright 2000-2003, Texas Instruments Incorporated
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.

www.ti.com
SPECIFICATIONS
At TA = +25C, V+ = 24V, RIN = 20k, and TIP29C external transistor, unless otherwise noted.

XTR115U XTR115UA
XTR116U XTR116UA

PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS

OUTPUT
Output Current Equation IO IO = IIN 100
Output Current, Linear Range 0.25 25 mA
Over-Scale Limit ILIM 32 mA
Under-Scale Limit IMIN IREG = 0, IREF = 0 0.2 0.25 mA
SPAN
Span (Current Gain) S 100 A/A
Error (1) IIN = 250A to 25mA 0.05 0.2 0.4 %
vs Temperature TA = 40C to +85C 3 20 ppm/C
Nonlinearity IIN = 250A to 25mA 0.003 0.01 0.02 %
INPUT
Offset Voltage (Op Amp) VOS IIN = 40A 100 250 500 V
vs Temperature TA = 40C to +85C 0.7 3 6 V/C
vs Supply Voltage, V+ V+ = 7.5V to 36V 0.1 2 V/V
Bias Current IB 35 nA
vs Temperature 150 pA/C
Noise: 0.1Hz to 10Hz en 0.6 Vp-p
DYNAMIC RESPONSE
Small Signal Bandwidth CLOOP = 0, RL = 0 380 kHz
Slew Rate 3.2 mA/s
VREF(2)
XTR115 2.5 V
XTR116 4.096 V
Voltage Accuracy IREF = 0 0.05 0.25 0.5 %
vs Temperature TA = 40C to +85C 20 35 75 ppm/C
vs Supply Voltage, V+ V+ = 7.5V to 36V 1 10 ppm/V
vs Load IREF = 0mA to 2.5mA 100 ppm/mA
Noise: 0.1Hz to 10Hz 10 Vp-p
Short-Circuit Current 16 mA
VREG(2)
Voltage 5 V
Voltage Accuracy IREG = 0 0.05 0.1 V
vs Temperature TA = 40C to +85C 0.1 mV/C
vs Supply Voltage, V+ V+ = 7.5V to 36V 1 mV/V
vs Output Current See Typical Curves
Short-Circuit Current 12 mA
POWER SUPPLY V+
Specified +24 V
Voltage Range +7.5 +36 V
Quiescent Current 200 250 A
Over Temperature, 40C to +85C 240 300 A
TEMPERATURE RANGE
Specification 40 +85 C
Operating 55 +125 C
Storage 55 +125 C
Thermal Resistance JA 150 C/W

Specifications the same as XTR115U and XTR116U.

NOTES: (1) Does not include initial error or TCR of RIN. (2) Voltage measured with respect to IRET pin.

2
XTR115, XTR116
www.ti.com SBOS124A
PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS(1)
Top View SO-8 Power Supply, V+ (referenced to IO pin) .......................................... 40V
Input Voltage (referenced to IRET pin) ........................................ 0V to V+
Output Current Limit ............................................................... Continuous
VREG, Short-Circuit .................................................................. Continuous
VREF, Short-Circuit .................................................................. Continuous
VREF 1 8 VREG
Operating Temperature ................................................ 55C to +125C
IIN 2 7 V+ Storage Temperature Range ....................................... 55C to +125C
Lead Temperature (soldering, 10s) .............................................. +300C
IRET 3 6 B (Base) Junction Temperature ................................................................... +165C

IO 4 5 E (Emitter) NOTE: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.

ELECTROSTATIC
PACKAGE/ORDERING INFORMATION DISCHARGE SENSITIVITY
For the most current package and ordering information, see
This integrated circuit can be damaged by ESD. Texas Instru-
the Package Option Addendum located at the end of this
ments recommends that all integrated circuits be handled with
data sheet.
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.

XTR115, XTR116 3
SBOS124A www.ti.com
TYPICAL PERFORMANCE CURVES
At TA = +25C, V+ = 24V, RIN = 20k, and TIP29C external transistor, unless otherwise noted.

CURRENT GAIN vs FREQUENCY QUIESCENT CURRENT vs TEMPERATURE

260

40
240

Quiescent Current (A)

(V+) = 36V
220
Gain (dB)

30 COUT = 0
RL = 0
(V+) = 24V
200
COUT = 10nF
20
RL = 250 (V+) = 7.5V
180

10 160
10k 100k 1M 75 50 25 0 25 50 75 100 125
Frequency (Hz) Temperature (C)

REFERENCE VOLTAGE vs TEMPERATURE OVER-SCALE CURRENT vs TEMPERATURE

0.1 34
With External Transistor
33
Over-Scale Current (mA)
Reference Voltage (%)

0
32
V+ = 36V
0.1 31
V+ = 7.5V
30
0.2 V+ = 24V

29

0.3 28
75 50 25 0 25 50 75 100 125 75 50 25 0 25 50 75 100 125
Temperature (C) Temperature (C)

VREG VOLTAGE vs VREG CURRENT

5.5
+125C

55C
VREG Voltage (V)

+25C 55C
5.0
+25C

Sinking Sourcing
Current Current +125C

4.5
1 0 1 2 3 4
IREG Current (mA)

4
XTR115, XTR116
www.ti.com SBOS124A
APPLICATIONS INFORMATION and upward. Full-scale inputs greater than 0.5V are recom-
mend to minimize the effect of offset voltage and drift of A1.
The XTR115 and XTR116 are identical devices except for
the reference voltage output, pin 1. This voltage is available
EXTERNAL TRANSISTOR
for external circuitry and is not used internally. Further
discussions that apply to both devices will refer to the The external transistor, Q1, conducts the majority of the full-
XTR115/6. scale output current. Power dissipation in this transistor can
approach 0.8W with high loop voltage (40V) and 20mA
Figure 1 shows basic circuit connections with representative
output current. The XTR115/6 is designed to use an external
simplified input circuitry. The XTR115/6 is a two-wire
transistor to avoid on-chip thermal-induced errors. Heat
current transmitter. Its input signal (pin 2) controls the output
produced by Q1 will still cause ambient temperature changes
current. A portion of this current flows into the V+ power
that can affect the XTR115/6. To minimize these effects,
supply, pin 7. The remaining current flows in Q1. External
locate Q1 away from sensitive analog circuitry, including
input circuitry connected to the XTR115/6 can be powered
XTR115/6. Mount Q1 so that heat is conducted to the
from VREG or VREF. Current drawn from these terminals
outside of the transducer housing.
must be returned to IRET, pin 3. This IRET pin is a local
ground for input circuitry driving the XTR115/6. The XTR115/6 is designed to use virtually any NPN transis-
tor with sufficient voltage, current and power rating. Case
The XTR115/6 is a current-input device with a gain of 100. style and thermal mounting considerations often influence
A current flowing into pin 2 produces IO = 100 IIN. The the choice for any given application. Several possible choices
input voltage at the IIN pin is zero (referred to the IRET pin). are listed in Figure 1. A MOSFET transistor will not improve
A voltage input is created with an external input resistor, as the accuracy of the XTR115/6 and is not recommended.
shown. Common full-scale input voltages range from 1V

XTR115
XTR116
IREG IO
5V VREG +5V V+
XTR115: 2.5V 8 Regulator 7
XTR116: 4.096V
IREF
VREF(1) Voltage
1 Reference

VLOOP
RIN B
20k IIN Q1 10nF
Input VIN IIN 6
Circuitry 2
A1 RL

E
5
3 RLIM

IRET
All return current R1 R2
from IREG and IREF 2.475k 25
IO
4
For IO = 4mA to 20mA I = 100 IIN
IIN = 40A to 200A
With RIN = 20k NOTE: (1) See also Figure 5.
VIN = 0.8V to 4V Possible choices for Q1 (see text).

TYPE PACKAGE

2N4922 TO-225
TIP29C TO-220
TIP31B TO-220

FIGURE 1. Basic Circuit Connections.

XTR115, XTR116 5
SBOS124A www.ti.com
MINIMUM-SCALE CURRENT MAXIMUM OUTPUT CURRENT
The quiescent current of the XTR115/6 (typically 200A) The XTR115/6 provides accurate, linear output up to 25mA.
is the lower limit of its output current. Zero input current Internal circuitry limits the output current to approximately
(IIN = 0) will produce an IO equal to the quiescent current. 32mA to protect the transmitter and loop power/measure-
Output current will not begin to increase until IIN > IQ /100. ment circuitry.
Current drawn from VREF or VREG will add to this minimum It is possible to extend the output current range of the
output current. This means that more than 3.7mA is avail- XTR115/6 by connecting an external resistor from pin 3 to
able to power external circuitry while still allowing the pin 5, to change the current limit value. Since all output
output current to go below 4mA. current must flow through internal resistors, it is possible to
damage with excessive current. Output currents greater than
OFFSETTING THE INPUT 45mA may cause permanent damage.
A low scale of 4mA is produced by creating a 40A input
current. This can be created with the proper value resistor
from VREF (Figure 2), or by generating offset in the input
drive circuitry. VREG XTR115
XTR116

VREF

RIN
VO
D/A
XTR115

VREG

VREG XTR115
2.5V VREF XTR116
Voltage
40A Reference VREF

R0 Digital IO IIN

62.5k Control D/A
Optical
IIN Isolation IRET

A1
0 to 160A XTR115
5V VREG
XTR116

Filter RIN
Digital PWM

IRET
R1 Control
C Out
2.475k
Optical
Isolation
IRET

FIGURE 2. Creating Low-Scale Offset. FIGURE 3. Digital Control Methods.

6
XTR115, XTR116
www.ti.com SBOS124A
REVERSE-VOLTAGE PROTECTION Most surge protection zener diodes have a diode character-
The XTR115/6 low compliance voltage rating (7.5V) per- istic in the forward direction that will conduct excessive
mits the use of various voltage protection methods without current, possibly damaging receiving-side circuitry if the
compromising operating range. Figure 4 shows a diode loop connections are reversed. If a surge protection diode is
bridge circuit which allows normal operation even when the used, a series diode or diode bridge should be used for
voltage connection lines are reversed. The bridge causes a protection against reversed connections.
two diode drop (approximately 1.4V) loss in loop supply
voltage. This results in a compliance voltage of approxi- RADIO FREQUENCY INTERFERENCE
mately 9Vsatisfactory for most applications. A diode can The long wire lengths of current loops invite radio frequency
be inserted in series with the loop supply voltage and the V+ interference. RF can be rectified by the input circuitry of the
pin to protect against reverse output connection lines with XTR115/6 or preceding circuitry. This generally appears as
only a 0.7V loss in loop supply voltage. an unstable output current that varies with the position of
loop supply or input wiring.
OVER-VOLTAGE SURGE PROTECTION Interference may also enter at the input terminals. For
Remote connections to current transmitters can sometimes be integrated transmitter assemblies with short connection to
subjected to voltage surges. It is prudent to limit the maximum the sensor, the interference more likely comes from the
surge voltage applied to the XTR115/6 to as low as practical. current loop connections.
Various zener diode and surge clamping diodes are specially
designed for this purpose. Select a clamp diode with as low a
voltage rating as possible for best protection. For example, a
36V protection diode will assure proper transmitter operation
at normal loop voltages, yet will provide an appropriate level
of protection against voltage surges. Characterization tests on
several production lots showed no damage with loop supply
voltages up to 65V.

8 V+ Maximum VPS must be

VREG 7 less than minimum
1 voltage rating of zener
VREF
diode.

RIN
2 XTR115 6 0.01F
IIN B Q1 1N4148
XTR116 D1(1) Diodes

VIN E
5 RL VPS
3
IRET IO
4 The diode bridge causes
a 1.4V loss in loop supply
voltage.

NOTE: (1) Zener Diode 36V: 1N4753A or Motorola

P6KE39A. Use lower voltage zener diodes with loop
power supply voltages less than 30V for increased
protection. See Over-Voltage Surge Protection.

FIGURE 4. Reverse Voltage Operation and Over-Voltage Surge Protection.

XTR115, XTR116 7
SBOS124A www.ti.com
 If capacitive loading must be placed on the VREF pin, one of the compensation schemes shown below must be used to ensure stable operation.
Values of capacitance must remain within the given ranges.

XTR115
RISO(1) XTR116
10 IO
VREG +5V V+
8 Regulator 7
ILOAD CHF + CLF
(0-2.5mA) (10pF to 0.5F) (2.2F to 22F)
VREF Voltage
1 Reference

VLOOP
OR
B
IIN 6
2 RL
A1

E
+ CLF(1) 5
(2.2F to 22F) RLIM
3
ILOAD CHF
(10pF to 0.5F) IRET
(0-2.5mA) R1 R2 100 VIN
RCOMP(1) 2.475k 25 IO =
50 RIN
4
I = 100 IIN

NOTE: (1) Required compensation components.

FIGURE 5. Stable Operation with Capacitive Load on VREF.

8
XTR115, XTR116
www.ti.com SBOS124A
 PACKAGE OPTION ADDENDUM

www.ti.com 25-Oct-2016

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

XTR115U ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR

& no Sb/Br) 115U
XTR115U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
XTR115U/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
XTR115UA ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
A
XTR115UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
A
XTR115UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
A
XTR115UG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 115U
XTR116U ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
XTR116U/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
XTR116U/2K5G4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
XTR116UA ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A
XTR116UA/2K5 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A
XTR116UA/2K5E4 ACTIVE SOIC D 8 2500 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A
XTR116UAE4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR
& no Sb/Br) 116U
A

Addendum-Page 1
 PACKAGE OPTION ADDENDUM

www.ti.com 25-Oct-2016

Orderable Device Status Package Type Package Pins Package Eco Plan Lead/Ball Finish MSL Peak Temp Op Temp (C) Device Marking Samples
(1) Drawing Qty (2) (6) (3) (4/5)

XTR116UG4 ACTIVE SOIC D 8 75 Green (RoHS CU NIPDAU Level-3-260C-168 HR XTR

& no Sb/Br) 116U

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2013

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
XTR115U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR115UA/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
XTR116U/2K5 SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1

Pack Materials-Page 1
 PACKAGE MATERIALS INFORMATION

www.ti.com 24-Jul-2013

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
XTR115U/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR115UA/2K5 SOIC D 8 2500 367.0 367.0 35.0
XTR116U/2K5 SOIC D 8 2500 367.0 367.0 35.0

Pack Materials-Page 2
 IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as components) are sold subject to TIs terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TIs terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TIs goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or enhanced plastic are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.

Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright 2016, Texas Instruments Incorporated