Multiple Slice Turbo Codes

David Gnaedig
Supervisors:
Emmanuel Boutillon
Michel Jezequel
22/03/2004 Workshop Edmonton 1
 Outline
General description
Tail-biting code
Construction of a Slice Turbo Code
Hardware implementation
Performance results
Conclusion

22/03/2004 Workshop Edmonton 2

 Introduction
Convolutional turbo-codes advantages:
simple encoding
scalability : rate, frame size
very good performance close to Shannon limit
Drawbacks:
Lack of parallelism in the decoding algorithm:
MAP-based algorithms are sequential
high latency
low throughput

22/03/2004 Workshop Edmonton 3

 Introduction
Original idea from V. Gaudet and G. Gulak
Analog implementation requires trellis of small length
Frame is cut into sub-blocks: small length trellis
Several trellises decoded in parallel
High parallelism but worse performance
But applicable to digital decoder
Improvements :
trellis termination with tail-biting codes
Interleaver structure to allow parallelism in both
dimensions
Equations and parameters to have good performance
Good performance, no degradation under the parallelism
constraint
22/03/2004 Workshop Edmonton 4
 General description
Parallel concatenation in 2 dimensions:
In each direction, the frame is split into P 2 sub-blocs of
M symboles (N = M . P)
Interleaver of size N
Constituent code: duo-binary convolutional systematic
recursive code (8 state or 16 states)
Interleaver and memory organization allow decoding
parallelism

Encoder C1

Encoder C2

22/03/2004 Workshop Edmonton 5

 Tail-biting code
C. Berrou, C. Douillard, M. Jzquel, " Multiple parallel concatenation of circular recursive
systematic codes ", Annales des Tlcommunications, tome 54, n3-4, pp 166-172, 1999.

Circular Recursive Systematic Convolutional code

(CRSC): resolve trellis termination
starting state = ending state : S0=SN-1
no loss with trellis termination
Encoding process :
from initial state Si=0, first encoding of the whole frame
from the final state Sf, determine circular state Sc
from state Sc, second encoding of the whole frame
generate coded bits while second encoding process

22/03/2004 Workshop Edmonton 6

 Construction of a Slice Turbo Code
A basic example
Interleaver structure
Evaluation of the interleaver properties
Interleaver construction

22/03/2004 Workshop Edmonton 7

 A basic example
4 slices in each dimension in 4 memory
banks: clubs, spades, hearts, diamonds
First dimension: memory bank = slice
Interleaver:
address 1 - rotation 1
address 3 - rotation 2
address 5 - rotation 3 =>No memory conflict
address 2 - rotation 4
address 4 - rotation 5

Second dimension: encode 4 sets separately

22/03/2004 Workshop Edmonton 8

 Interleaver structure
P

MEM MEM MEM MEM Frame of size N

M 0 1 k P-1

P slices of size M
stored in P memory
t t t t
banks
P SISO decoders
s
t: temporal index
0.M+t 1.M+t s.M+t (P-1).M+t
s: spatial index
DEC
0
DEC
1
DEC
j
DEC
P-1

Natural order: Permuted order:

temporal: identity temporal: function of t
spatial: identity spatial: function of t and s

22/03/2004 Workshop Edmonton 9

 Evaluation of the interleaver properties
Objective of the interleaver:
Irregular dispersion: randomness of the code
Low weight sequence / high weight sequence
Construction criteria:
Correlation properties: influences the convergence of
the iterative decoding
Avoid short cycles (primary and secondary cycles)
Minimum distance: asymptotic performance
Return To Zero sequences
(locked) error patterns
error impulse method
Joint optimization of the temporal and spatial
permutation
22/03/2004 Workshop Edmonton 10
 Correlation property
Correlation of the extrinsic information influences
performance of iterative decoding
Objective : maximize cycle length
Primary cycle : one interleaving
Secondary cycle : one interleaving / deinterleaving

d = 4+5 = 9 d = 4 + 6 = 10 d = 1+1+1+1 = 4

22/03/2004 Workshop Edmonton 11

 RTZ sequences
Return to Zero sequence (RTZ) :

( A, B ) = 2. A + B A

1 3 13 3+1 = 4
201 2+3=5 3 1
2003 3+ 2 = 5
30002 3+ 4 = 7 0
100002 2+5=7 0
2 1
3000001 3+5 = 8 0
0 10000001 2+6=8 2
20000002 2+6=8 0
30000003 4+4=8
22/03/2004 Workshop Edmonton 12
 Errors patterns

Primary error pattern:

201
w = 10
100002

Secondary error pattern:

13 201
w = 13
201 13

22/03/2004 Workshop Edmonton 13

 Error impulse method
C. Berrou, S. Vaton, " Computing the Minimum Distances of Linear Codes by the Error
Impulse Method", ISIT 2002, Lausanne, Switzerland, July 2002.

Error impulse of amplitude Ai on the all-zero

codeword x0 forA each information bit.
i

Impulse distance : dimp = max( Ai , x = x0 )

Maximal error impulse that the decoder can correct
Minimal distance:minimum of the impulse
distance d = min (d (k )) min
k
imp

Periodicity of the code: puncturing, interleaver

22/03/2004 Workshop Edmonton 14
 Interleaver construction
P

MEM MEM MEM MEM

M 0 1 k
P-1

t t t t

0.M+t 1.M+t s.M+t (P-1).M+t

DEC
0
DEC
1
DEC
j
DEC
P-1

22/03/2004 Workshop Edmonton 15

 Interleaver construction

Temporal permutation: t (t ) = .t + (t mod 4) mod M

et M relatively primes
chosen to maximize length of primary error pattern
chosen to maximize minimum distance

s (t , s ) = S ( ) + s mod P
Spatial permutation: rotation = t mod P
P-periodic function
S is a bijection chosen with the maximum of irregularity to
improve convergence of the code

22/03/2004 Workshop Edmonton 16

 Hardware implementation
Memory organization
Decoder implementation
Complexity evaluation

22/03/2004 Workshop Edmonton 17

 Memory organization
Permutation equations:
Temporal permutation : addition
Spatial permutation : circular shift
Easy to implement P

Memory organization: MEM MEM

MEM MEM
M 0 1 k P-1

P memory banks : intrinsic

and extrinsic information P

for each symbol

M 0 1 P-1
Concatenation into a single
memory
22/03/2004 Workshop Edmonton 18
 Decoder implementation
Pipeline implementation:
Iteration #1

demod
INTRINSIC

hard decision
output SISO 1
INTR
EXT 1 SISO 2 1 INTR
EXT 2
INTR
EXT 2

I iterations

Parallel implementation:
t SISO 1
INTRINSIC BUFFER

EXTRINSIC 1 / 2

demod
t SISO 2
INTRINSIC

output s hard decision

t SISO Q

22/03/2004 Workshop Edmonton 19

 Complexity evaluation
Complexity formula :
TD = (1 + c I M ) Mem (S 2 BIQ ) + c I 2 S SISO + 2 E Mem 4 e
N

2
N : number of information symbols Quantification:
S : number of channel symbols BIQ : number of bits for channel output
I: number of iterations Be : number of bits for extrinsic info.

c: clock reuse factor

S: symbol reuse factor
M: input memory reuse factor
E: extrinsic memory reuse factor

Complexity comparison
22/03/2004 Workshop Edmonton 20
 Performance comparison

22/03/2004 Workshop Edmonton 21

 1
N=432
N = 432 R = 1/2 It = 8

BER QPSK not coded

BER M48 R9
0.1
FER M48 R9
BER TC1000
0.01
FER TC1000

0.001

0.0001
BER-FER

1e-05

1e-06

1e-07

1e-08

1e-09

22/03/2004 0 Workshop
1 Edmonton
2 3 4 5 6 7 8 9 22 10

Eb/N0
 QPSK - N = 22800 bits - 8 it. Log-MAP

1
BER QPSK not coded
BER R=1/2
0.1
FER R=1/2
BER R=2/3
0.01 FER R=2/3
BER R=3/4
FER R=3/4
Bit/Fram e Error R ate

0.001
BER R=5/6
FER R=5/6
0.0001

1e-05

1e-06

1e-07

1e-08
0 1 2 3 4 5
22/03/2004 Workshop Edmonton 23
Eb/N0
 Conclusion
Main results :
High degree of parallelism
No performance degradation
Properties of the coding scheme
Interleaver is easy to implement in hardware thanks to
closed-form equations
Interleaver is split into two levels : spatial and
temporal permutation
Good convergence (spatial permutation), good
minimum distance (temporal permutation).
22/03/2004 Workshop Edmonton 24