UNIT-V - Special Active Filters 2 Marks Questions:: Que 6.15, Sol. in Notes, End Sem Question 2016
UNIT-V - Special Active Filters 2 Marks Questions:: Que 6.15, Sol. in Notes, End Sem Question 2016
2 Marks Questions:
7 Marks:
1. Draw the Sallen and Key circuit and its transfer function. Also explain its design case 1,2 & 3.
2. It is required to design an LPF, only one op-amp is available and 0.1F capacitors are available.
Design a filter to meet following specifications: (Que 6.15, sol. in notes, End Sem Question 2016)
(a). The response is to be Butterworth.
(b). Find maximum value of order.
(c). The half power frequency is to be2000 rad/sec.
(d). In addition to filtering action, we wish a low frequency gain of 14 dB.
3. Define Bode Sensitivity. Find the sensitivity of Sallen and Key Circuit.
4. Draw the circuit diagram for Delyiannis Friends circuit and derive the expression for design
parameter.
5. Consider the Sallen Key low pass circuit with following choice made for the design of fixed
elements: K=2, R1C1= R2C2=1 & C1=1. Determine design equation which express the value of R1,
R2 & C2 in terms of o and Q.
8. For a 5th order Butterworth Response. Determine the pole locations& also calculate the value of
Qfor the poles. (Solution given in notes).
10. The following specifications are given for a chebyshev low pass filter:
p=1 rad/sec, s=2.33rad/sec, max=0.5dB & min=22dB. Design a filter. (Solution given in notes)
11. Design a band pass filter having following attenuation characteristics: min=30dB, max=0.5dB. the
response should be chebyshev in pass band i.e. from 500 to 1000 rad/sec. Make use of 0.1F
capacitors only. (Solution given in notes)
UNIT 2: MULTIVIBRATORS
2 Marks:
1. What are the uses of commutating capacitors. What are the other names for commutating
capacitors.
2. What are collector catching diodes.
3. Define Bistable, Astable & Monostable multivibrators.
4. What do you mean by transition time, settling time and resolution time.
5. Define stable and quasi stable states.
7 Marks:
6. Explain Emitter-Coupled monostable multivibrator and derive an expression for gate width.
7. Explain collector-Coupled monostable multivibrator and derive an expression for gate width.
8. Explain Emitter-Coupled Astable multivibrator and derive an expression for gate width.
9. Explain collector-Coupled Astable multivibrator and derive an expression for gate width.
10. The fixed bias binary shown in figure uses n-p-n silicon transistors with VCE(sat)=0.5 V,
VBE(sat)=1 V, ICBO=10 nA at 25C and zero base to emitter voltage at cut-off. The circuit
parameters are VCC = VBB = 6 V, RC= 1.2 K, R1 = 4.7 K, R2= 27 K. Find
(a). hFE(min) and stable state voltages and currents.
(b). If the reverse saturation current doubles for every 10C rise in temperature, what is the
maximum temperature at which the circuit can operate properly with one device remaining
OFF.
11.
11. Silicon n-p-n transistors with hFE(min)=40 are available. Design an astable multivibrator to generate
a square wave of 1 kHz frequency with a duty cycle of 25%.
12. Silicon n-p-n transistors with hFE(min)=20 are available. If VCC=VBB=10V, Design Bistable
multivibrator.