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DLD Lab 2

This document describes a lab experiment on implementing and verifying NAND and NOR gate operations using integrated circuits. The objectives are to use a 74LS00 IC to implement a 2-input NAND gate and a 74LS02 IC to implement a 2-input NOR gate. The procedure involves connecting the ICs in a breadboard and observing the output for different input combinations using LED indicators. Questions are included to review the universal properties of NAND and NOR gates and their implementation using ICs.

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گيدوڙو ماڇي
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196 views

DLD Lab 2

This document describes a lab experiment on implementing and verifying NAND and NOR gate operations using integrated circuits. The objectives are to use a 74LS00 IC to implement a 2-input NAND gate and a 74LS02 IC to implement a 2-input NOR gate. The procedure involves connecting the ICs in a breadboard and observing the output for different input combinations using LED indicators. Questions are included to review the universal properties of NAND and NOR gates and their implementation using ICs.

Uploaded by

گيدوڙو ماڇي
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© © All Rights Reserved
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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LAB EXPERIMENT NO # 02

Name: Date: _________________________

Score: Signature of Instructor

NAND & NOR GATES


OBJECTIVE: Upon successful completion of this experiment, the student will be able:
To implement and verify NAND & NOR gate operations using,
74LS00 IC, 74LS02 IC
Module KL-33001
EQUIPMENT:
Training kit IDL-800
KL-31001 Digital Logic Lab
Module KL-33001
COMPONENTS:
74LS00 IC (NAND gate)
74LS02 IC (NOR gate)
Connecting Wires, Hard Wires
2.1 NAND gate:
The NAND and NOR gates are popular logic because they can be used as universal gates, that is,
they can be used to construct an AND gate, an OR gate, an INVERTER, or any combination of
these functions. The logic symbols for NAND gate is shown in fig 2.1 (a & b). It consists of
AND symbol with inverter symbol added to output. The operation of NAND gate is same as the
AND gate except that its output is inverted. NAND gates can also have two or more than two
inputs and a single output.

Fig 2.1: (a) Distinctive symbol of NAND gate (b) Standard NAND gate symbol

NAND gate produces a LOW output only when all the inputs are HIGH. When any of the inputs
is LOW, the output will be HIGH.
74LS00 2-Input NAND gate IC:
In order to implement the NAND gate operation using IC, the TTL 74LS00 2-input NAND gate
IC can be used. This IC has 14 pin Dual Inline Package (DIP) configuration as shown in fig 2.2.
The power supply connections are made to pin 7 and 14. Pin 1 is identified by a small indented
circle next to it or by a notch cut out between pin 1 and 14.

Fig 2.2: 74LS00 2-input NAND gate IC pin configuration


LAB MANUAL
DIGITAL LOGIC DESIGN

2.2 NOR gate:


The operation of the NOR gate is same as that of the OR gate except that its output is inverted.
You can think of a NOR gate as an OR gate with an inverter at its output. The logic symbol for
NOR gate is shown in fig 2.3 (a & b). NOR gates can also have two or more than two inputs and
a single output.

Fig 2.3: (a) Distinctive symbol of 2-input NOR gate; (b) Standard 2-input NOR gate symbol

The NOR gate produces a low output, When any one of input is high and produces a high output,
when all inputs are low.
74LS02 2-input NOR gate IC:
In order to implement the NOR gate operation using IC, the TTL 74LS02 2-input NOR gate IC
can be used. This IC has 14 pin Dual Inline Package (DIP) configuration as shown in fig 2.4. The
power supply connections are made to pin 7 and 14. Pin 1 is identified by a small indented circle
next to it or by a notch cut out between pin 1 and 14.

Fig 2.4: 74LS02 2-input NOR gate IC pin configuration

OBSERVATION TABLES:
INPUTS OUTPUTS
A B NAND NOR

PROCEDURE:
Using ICs:
In order to implement the NAND & NOR operations with the help of ICs, take the
74LS00,
74LS02 ICs.
Pin Assignments for the ICs have been shown in fig 2.2 & 2.4 respectively.
Take 74LS00 IC and insert it in the breadboard present on the IDL-800 training kit.
Department of Electrical Engineering SUKKUR IBA
Summer 2014
LAB MANUAL
DIGITAL LOGIC DESIGN

Connect its pin 14 to +5V and pin 7 to ground.


Use first gate (any one can be taken) from IC by connecting input pin 1 and 2 to switches
and output pin 3 to LED and observe the NAND gate operation.
Repeat the procedure for NOR operation.
Using Module KL-33001(block d):
1) NAND gate:
U1c of Module KL-33001 block d will be used in this section.
Connect inputs A1, A2 to Data switch SW0, SW1 TTL level and output F1 to logic
indicator L1
(LED). Follow the input sequence and record outputs.

STATE INPUTS OUTPUT


A2 A1 F1
0
1
2
3

2) NOR gate:
U2a of Module KL-33001 block d will be used in this section.
Connect inputs A3, A4 to Data switch SW0, SW1 TTL level and output F2 to logic
indicator L1
(LED). Follow the input sequence and record outputs.
STATE INPUTS OUTPUT
A4 A3 F2
0
1
2
3

REVIEW QUESTIONS:
1. Why NAND & NOR gates are called Universal gates?
______________________________________________________________________________
______________________________________________________________________________
______________________________________________________________________________
2. What input will produce a high (1) at the output of a NAND gate?
______________________________________________________________________________
______________________________________________________________________________
3. What is the minimum no: of inputs that can be applied to an NAND & NOR gates?
______________________________________________________________________________
______________________________________________________________________________
4. How many NAND gates are designed in IC 74LS00?
______________________________________________________________________________
Department of Electrical Engineering SUKKUR IBA
Summer 2014
LAB MANUAL
DIGITAL LOGIC DESIGN

______________________________________________________________________________
___
HAND IN:
Clean your equipment/ materials before you leave.
Keep all the equipment and material to their proper storage area.
Submit your answers to questions, together with your data, calculations and results before
the next laboratory.

Department of Electrical Engineering SUKKUR IBA


Summer 2014

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