Final Exam Semiconductor Devices (ELCT503) Time allowed : Three hours

Faculty of Information
Engineering & Technology (IET)

Electronics Engineering Dept.

Semiconductor Devices: ELCT 503

Final Exam (Fall 2014)

Course Instructor: Dr. Hassan Mostafa

Bar Code

Instructions:
1. Answer all questions.
2. The exam consists of x questions in x pages including this page.
3. A cheat sheet is attached at end of this booklet.
4. The exam allowed time is Three hours.
5. Electronic calculators are allowed.
6. Clearly show all steps used in your solutions.
7. This is a closed book exam.

Please, do not write anything on this page

 Final Exam Semiconductor Devices (ELCT503) Time allowed : Three hours

Cheat Sheet
Intrinsic Si: Carriers Transport:
Vbi
e
2

N D xn N A x p
2 2

1 1 3
F (E) mn vth2 kT
e ( E EF )/kT 1 2 2 kT N D N A
Vbi ln
vn n E e ni 2
n f(E)N(E)dE
EC v p pE 2 N A N D
xd Vbi
N(E)
4
( 2me )3 / 2(E Ec )1/ 2 J J n J p e nn p p E e ND N A
h3
e nn p p xd xn x p

4 dn pn with forward bias V=Va:

N(E) ( 2mh )3 / 2(Ev E)1/ 2 J n eDn
h3 dx 2 N A N D
xd Vbi V
dp e ND N A
J p eDp
n p ni f(E)N(E)dE dx
Cj
e N A N D




2N A N D Vbi V
EC
dn xd w
(EC EF )/kT J n en nE eDn
n NC e dx
D p ni2 Dn ni2 qVa
3/ 2
dp J t e exp 1
2 mn kT J p e p pE eDp L p N d Ln N a kT
N C 12
h
2
dx
Ln Dn n L p D p p
p NV e (EF EV )/kT Dn D p kT
VT
n p e qV
2 mh kT
3/ 2 I d J t A I sd exp a 1
NV 2 Quasi Fermi Level: kT
h
2

Reverse bias pn junction:

Ei EFp
Extrinsic Si: p p0 p ni exp
kT D p ni2 Dn ni2
n ni exp (E F Ei )/kT I (Va ) qA I sd
L p N d Ln N a
E Ei
p ni exp (Ei EF )/kT n n0 n ni exp Fn
kT Diffusion capacitance:
Mass Action Law:
Continuity equation: Ae 2 L p pn 0 eV
pn n 2 Cd exp a
n 1 Jn kT kT
Gn Rn
i

Charge neutrality: t e x
n N A p N D p 1 Jp
G p R p
dt e x
pn junction:
N A x p N D xn
 Final Exam Semiconductor Devices (ELCT503) Time allowed : Three hours

Diode DC model: Transistor in Saturation region Constants:

Exponential model: (VBE >= 0.7V) and (VBC >= 0.4V) KT = 0.026 eV
at T=300OK
I D2 VCE =0.2V
VD 2 VD1 nVT * ln( )
I D1 ICsat = forced IB
q = 1.6 *10-19 C
IE = IC + IB = (forced+1) IB
0 = 8.85*10-12 F m-1
Diode small signal model: BJT small signal:
For Si:
nV I
rd T gm C Eg = 1.12 eV
ID VT
NC = 2.84*1019 cm-3
V V
BJT Physics: r T T NV = 3.08*1019 cm-3
IB IC gm
I pE I pE 1 Si = 11.7
|V |
IE I pE I nE D N W ro A Sio2 = 3.9
1 n B B IC
D p N EW E s = 4.05 V
V V
I pC I BB W
2 re T T
T 1 1 B 2 IE IC gm
I pE I pE 2Lp
MOSFET Physics:
I pC 2kT N A
0
IE S inv 2 B ln
e ni
0 S kT ln N A /ni
2
W
Base _ Transit _ Time : D B wm 2
2Dp e2 N A
Diffusion_ length : L p D p p
2e0 S N A 2 B

2 Vth VFB 2 B
Lp Cox
Diffusion_ life _ time : p
Dp
Qox
VFB ms
BJT DC Models: Cox
Transistor OFF
MOSFET DC models:
(VBE < 0.7V) and (VBC < 0.4V)
VGS < Vtn OFF ID=0
IB = 0 IC = 0 IE = 0
VGS >= Vtn ON
Transistor in Active region
VDS < (VGS Vtn) (Triode)
(VBE >= 0.7V) and (VBC < 0.4V)
ID = n Cox (W/L) [(VGS - Vtn) VDS VDS2/2]
VCE >=0.3V
VDS << (VGS Vtn) (Linear)
IC = IS exp (VBE/VT)
IC = IB = IE ID = n Cox (W/L) [(VGS - Vtn) VDS]
IE = IC + IB = (+1) IB RON = VDS/ID = 1/[n Cox (W/L) (VGS - Vtn) ]
= / (1- ) and >> 1 VDS >= (VGS Vtn) (Saturation)
= / (+1) and <= 1 ID =0.5* n Cox (W/L) (VGS - Vtn)2