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FACT001: Basic PIC16/17 Oscillator Design

MicrochipOscillatorBasicDesignPIC16-17

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0% found this document useful (0 votes)
78 views

FACT001: Basic PIC16/17 Oscillator Design

MicrochipOscillatorBasicDesignPIC16-17

Uploaded by

jace112
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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M FACT001

Basic PIC16/17 Oscillator Design


FIGURE 1: TYPICAL PIERCE PARALLEL
Author: Dan Matthews RESONANT OSCILLATOR
Microchip Technology Inc. CIRCUIT

Gain of inverter/amplifier is
based on selected Clock mode.
The oscillator circuit is one of the most overlooked Clock Modes:
areas of microprocessor circuit design. Components LP - lowest gain
are usually selected based on the manufacturers XT - higher gain
tables. If the circuit starts up and works, fine, no other HS - highest gain
thought need be given to it, right? Wrong. Many condi- RF
OSC1 OSC2
tions can negatively affect the performance of your
design. Higher temperatures and lower supply voltages Crystal Rs
can lower the loop gain in the oscillator circuit, causing
poor, slow, or no start-up. Colder temperatures and
higher supply voltages can increase the loop gain of C1 C2
the oscillator circuit, causing the crystal to be over-
driven, and potentially damaged; or the circuit can be
forced to another harmonic and throw off the timing, or
cease functioning altogether. It is also possible to Purpose of Components and Clock
waste power through the improper selection of compo- Modes
nents or Clock modes.
A good place to begin is with the purpose of each exter-
Most of the time, using the values given in the manu- nal component. Because this is a loop circuit, a change
facturers data book tables will work fine. However, in one component can change the affect of other com-
most manufacturers processors run in a limited voltage ponents in the circuit. Therefore, a strict definition of
range and across a limited frequency, so table values purpose is a simplification for clarity only.
can be given for C1 and C2 with little concern for the
The crystal has its lowest impedance near the desired
designers environment. Microchip parts, however, can
frequency. This is placed in the path between the out-
be asked to run with clocks from 0 to 25 MHz, supply
put and the input of the inverting amplifier. This permits
voltages from 2.0 VDC to 6.25 VDC, and temperatures
feedback, and therefore, oscillation, which occurs at
from -40C to +125C, depending on the part and ver-
the desired resonant frequency.
sion ordered. This must also be done with crystals of
varying quality and manufacture. These factors create The diagrams shown below illustrate an equivalent
many chances for exceptions to the values given in the circuit for a crystal (Figure 2), and the impedance/
data book. reactance versus frequency of the crystal (Figure 3).
Cc represents the case capacitance across the termi-
Function of the Oscillator Circuit nals of the crystal. R, Cp, and Lp are known as the
motional arm of the crystal. In Parallel Resonant mode
The circuit (Figure 1) is a typical Pierce parallel (Anti-resonance), the crystal will look inductive to the
resonant oscillator circuit, as used with the Microchip circuit. The impedance will reach its peak at fa. The
PIC16/17 family of devices. The output of an inverting load capacity should be selected to operate the crystal
amplifier is fed back to its input creating an "unstable" at a stable point on the fs-fa reactive curve (as close to
loop. When the inverter output is high and fed back to fs as possible).
the input, output goes low, reversing the process. Sta-
ble oscillation is achieved when the circuit components
attached achieve this feedback with "unity gain" only at Note: Even parallel resonant crystals have a
the desired frequency. series resonant frequency fs.

2002 Microchip Technology Inc. DS00838A-page 1


FACT001
FIGURE 2: EQUIVALENT CRYSTAL Clock mode is the programmable gain of the inverting
CIRCUIT amplifier. The Lower Frequency modes have lower
gain, the gain increases for Higher Frequency modes.
For instance, in the PIC16CXXX family, the Clock mode
R Cp Lp
gain from lowest to highest is LP (lowest gain), XT
(middle), and HS (highest gain).

Selection of Components
Cc There are several factors that go into the selection and
arrangement of these external components. Some of
these are amplifier gain, desired frequency and the res-
FIGURE 3: IMPEDANCE/REACTANCE VS. onant frequency(s) of the crystal, temperature of oper-
ation, supply voltage and its range, start-up time,
CRYSTAL FREQUENCY
stability, crystal life, power consumption, simplification
Area of usual Anti-resonance of the circuit and use of standard components (as few
+ parallel resonance Fe as possible). To say that there are a lot of factors, and
that there are trade-offs with each, is an understate-
ment.
Series
Impedance

Resonance fs Determining Best Values for Clock Mode,


0
C1, C2 and Rs
f f
The best method for selecting components is a little
knowledge and a lot of trial, measurement and testing.

f Crystals are usually selected by their parallel resonant


frequency only, however, other parameters may be
important to your design, such as temperature or fre-
C1 of Figure 1 is a "phase adjusting" capacitor. It also quency tolerance. Application Note 588 (DS00588) is
contributes slightly to start-up time and is part of the an excellent reference if you would like to know more
load capacitance for a parallel resonant circuit. Phase about crystal operation and their ordering information.
is affected, since C1 is at the clock input pin and The Microchip devices utilize a parallel oscillator circuit,
charged through the impedance of the crystal. which requires that a parallel resonant crystal be
C2 is a "gain adjusting" capacitor. Selected for best selected. The load capacitance is usually specified in
sinusoidal output voltage, peak to peak. It is also part the 20 pF to 32 pF range. The crystal will oscillate clos-
of the load capacitance for a parallel resonant circuit. est to the desired frequency when this load capaci-
Load capacitance for a parallel resonant circuit can be tance is used. It is necessary sometimes to juggle
calculated by: these values a bit, as I will describe later, in order to
achieve other benefits.
C1 x C2
+ Cstray Clock mode is primarily chosen by using the table
C1 + C2
found in the Microchip data book based on frequency.
and should be selected per the data supplied by the Clock modes (except RC) are simply gain selections:
crystal manufacturer. lower gain for lower frequencies and higher gain for
higher frequencies. It is possible to select a higher or
Cstray in the above equation can be pin capacitance
lower gain, if desired, based on the specific needs of
and board/trace related capacitance. This is often seen
the oscillator circuit. In circuits where low power con-
in the ballpark of 5-15 pF. If the Microchip data book
sumption is critical, a Lower Gain Clock mode can help.
shows 15 pF capacitors for C1 and C2, and your board
The trade-offs are that lower gain can increase start-up
and device have 12.5 pF Cstray, then the resulting load
time and it is difficult to get the needed loop gain at
capacitance in pF is [(15 * 15)/(15 + 15)] + 12.5 = 20 pF.
higher frequencies if a Lower Gain Clock mode is cho-
If the crystal manufacturer suggests a load capacitance
sen. Higher Gain Clock modes are normally chosen for
of 20 pF, then voila, youre there. If you decide to
higher frequencies and improved start-up time. The
increase C2 to 33 pF (see "Selecting Best Values..."
trade-offs for higher gain are increased power con-
and "Start-up"), the resulting load capacitance is still
sumption and the potential to design an unstable cir-
22.8 pF. In most cases, deviations greater than this will
cuit, or overdrive the crystal, especially at low
not "pull" the resulting resonant frequency appreciably.
frequencies.
Rs is a series resistor that is selected to prevent over-
driving the crystal. It is often not needed if gain (Clock
mode), C1 and C2 are selected properly.

DS00838A-page 2 2002 Microchip Technology Inc.


FACT001
It is possible for a crystal to oscillate in a higher over- Rs is selected if, after all other devices are selected to
tone frequency if the loop gain of the oscillator circuit is satisfaction, the crystal is still being overdriven. This
greater than one at that frequency. Depending on can be determined by looking at the OSCOUT pin,
whether they are mechanical or electrical, overtones which is the driven pin, with an oscilloscope. Connect-
can come at 2X, 3X and odd multiples of the resonant ing the probe to the OSCIN pin will load the pin too
frequency. Overdriving the crystal can cause break much and negatively affect performance. Remember
down or frequency drift (usually drifts up) over time. that a scope probe adds its own capacitance to the cir-
This can be handled through proper selection of C1, C2 cuit, so this may have to be accounted for in your
and Rs. design (i.e., if the circuit worked best with a C2 of 20 pF
Again, the mode listed in the data book for the desired and scope probe was 10 pF, a 30 pF capacitor may
frequency is the obvious starting point, until you have actually be called for). The output signal should not be
some special reason to deviate from it. While Clock clipping or squashed. Overdriving the crystal can also
mode can affect power consumption somewhat (higher lead to the circuit jumping to a higher harmonic.
gain/higher consumption), it is the frequency that the The OSCOUT signal should be a nice clean sine wave
processor is running at that has by far the greatest that easily spans the input minimum and maximum of
impact on power consumption. Some designers have the clock input pin (4.25V to 5.0V, peak to peak for a
made the mistake of trying to run a part at high frequen- 5.0V VDD is usually good). An easy way to set this is to
cies, say 8 MHz, while using the LP (Low Power) Clock again test the circuit at the minimum temperature and
mode. Then, they wonder why the processor doesnt maximum VDD that the design will be expected to per-
start-up sometimes. Running outside the recom- form in, then look at the output. This should be the max-
mended range for the Clock mode should be avoided imum amplitude of the clock output. If there is clipping,
unless you understand the ramifications. or the sine wave is squashing near VDD and VSS at the
C1 and C2 should also be initially selected based on top and bottom, and increasing load capacitors will risk
the load capacitance, as suggested by the crystal man- too much current through the crystal or push the value
ufacturer, and the tables supplied in the Microchip data too far from the manufacturers load specification, then
book. The values given in the Microchip data book can add a trimpot between the output pin and C2 and adjust
only be used as a starting point, since the manufacturer it until the sine wave is clean. Keeping it fairly close to
of the crystal, supply voltage and other factors already maximum amplitude at this low temperature and high
VDD combination will assure that this is the maximum
mentioned, may cause your circuit to differ from the one
used in the factory characterization process. amplitude the crystal will see and prevent overdriving.
An Rs of the closest standard value can now be
Ideally, the lowest capacitance is chosen (within the inserted in place of the trimpot. If Rs is too high, per-
range of the recommended crystal load, preferably) haps more than 5 kW, the input will be too isolated from
that will oscillate at the highest temperature and lowest the output, making the clock more susceptible to noise.
VDD that the circuit will be expected to perform under. If you find a value this high is needed to prevent over-
High temperature and low VDD both have a limiting driving the crystal, try increasing C2 to compensate.
affect on the loop gain, such that if the circuit functions Try to get a combination where Rs is around 1K or less,
at these extremes, the designer can be more assured and load capacitance is not too far from the 20 pF or 32
of proper operation at other temperatures and supply pF manufacturer specification.
voltages. Another method for improving start-up is to
use a value of C2 greater than C1. This causes a Start-up
greater phase shift across the crystal at power-up,
which speeds oscillator start-up. The most difficult time for the oscillator to start-up is
waking up from SLEEP. This is because the load
Besides loading the crystal for proper frequency
capacitors have partially charged to some quiescent
response, these capacitors can also have the affect of
value and phase differential at wake-up is minimal.
lowering loop gain if their value is increased. C2 can be
Thus, more time is required for stable oscillation.
selected to affect the overall gain of the circuit. A higher
Remember also that low voltage, high temperatures
C2 can lower the gain if the crystal is being over driven.
and Lower Frequency Clock modes also impose limita-
(See also discussion on Rs.) C values that are too high
tions on loop gain, which in turn affects start-up. The
can store and dump too much current through the crys-
worst possible case is a low frequency design (with its
tal, so C1 and C2 should not become excessively large.
Low Gain Clock mode), in a quiet environment (like a
Unfortunately, measuring the wattage through a crystal
battery operated device), operating outside the noisy
is tricky business, but if you do not stray too far from the
RF area of the city (or in a shielded box), with a low bat-
suggested values, you should not have to be
tery, on a hot day, waking up from SLEEP.
concerned with this.

2002 Microchip Technology Inc. DS00838A-page 3


FACT001
There is an old designers tip, though I have not proven The Final Check
it for myself, that a cheap Rs resistor, such as a carbon
film or carbon composition resistor, can actually help Remember, check that the output sine wave is not clip-
start oscillation. An oscillator circuit depends on some ping in the highest gain environment of highest VDD and
stray noise to start-up. Usually, the power-up process lowest temperature. Also, make sure that the sine out-
will provide this, but if the processor is put to SLEEP, put amplitude is great enough, in the lowest gain envi-
the oscillator will have to start-up on wake-up without ronment of lowest VDD and highest temperature, to
the power-up ramp (although some noise is created cover the logic input requirements of the clock, as listed
internally by the wake-up logic). Cheap carbon resis- in the device data sheet; 4.25V, peak to peak, is usually
tors generate some amount of white noise, which when fine. Then, at the highest temperature with the lowest
placed in the crystal oscillator path, can assist start-up. VDD it will have to run at, running from a quiet battery if
possible and in as quiet an environment as your board
Remember that C2 can be increased over C1 to will see (RF and electrically speaking), test the part to
increase phase shift and help start-up, especially at make sure it wakes up from SLEEP. If all this checks out
lower frequencies. Another possibility is to select a and your capacitance values are low enough, within
Higher Gain Clock mode. For instance, if start-up is a range to prevent unnecessary power consumption, then
concern for a device running at a frequency that would you should have a clean trouble-free oscillator design.
normally be the LP mode range, XT mode can be
selected. Usually, this is a last resort since the other A Note on External Clocks
suggestions already mentioned have been proven to
work and using a Higher Gain mode introduces If the PIC16/17 internal oscillator is not being used, and
increased potential for overdriving the crystal. The the device will be driven from an external clock, be sure
higher gain creates a faster higher drive start-up edge to set the Clock mode to something other than RC
that can help reduce start-up time. C2 may have to be mode (RC mode will fight with the injected input). Ide-
increased, and/or an Rs added to prevent overdriving ally, you would select the mode that corresponds to the
the crystal. frequency injected. This is of less importance here
since the clock is only driving its internal logic and not
It is also possible for a circuit with too much gain to not
a crystal loop circuit. It may be possible to select a
start-up. This usually happens when using a low fre-
Clock mode lower than would be needed by an oscilla-
quency crystal, like 32 kHz, since at high frequencies,
tor circuit, thereby saving some of the power that would
the high gain is dissipated more easily by the load
be used to exercise the inverting amplifier. Make sure
capacitance. Because of great customer demand for a
the OSCOUT signal amplitude covers the needed logic
fast start-up processor, even at low frequencies, Micro-
thresholds of the device.
chip has increased the gain of the LP mode for newer
devices. This may require higher capacitance values or For really power stingy applications, with high speed
an Rs. For instance, for the PIC16C71, the capacitance external clocks approaching 20 MHz, the device will
values of 15 pF on each pin, as suggested by the data draw less power if the clock is injected at the OSCOUT
book for 32 kHz, is not always sufficient. Increasing the pin. This can only be done with devices where the inter-
values to 22 pF or 33 pF for C1 and 33 pF or 47 pF for nal logic is driven from OSCOUT. A diagram of the
C2 usually fixes this. Again, if you desire that the circuit clock circuitry is provided in the data book for each
oscillate at the resonant frequency to be as accurate as device. If the frequency is high enough, the internal
possible, you may be better served by adding an Rs to capacitance and impedances will serve to isolate the
the circuit, as needed, and keep the capacitor values internal inverter output from the signal, enough so that
closer to the load capacitance suggested by the crystal it will not challenge the injected signal. The internal
manufacturer. Refer to the Rs section of this article for feedback resistor is weak enough to allow the inverter
details on determining the Rs value. to find a quiescent point. Since the inverter is not being
exercised, less power is drawn. Again, this is operating
outside the normal design criteria, so you should be
extremely thorough in testing and proving your design
before calling it complete.

DS00838A-page 4 2002 Microchip Technology Inc.


Note the following details of the code protection feature on PICmicro MCUs.

The PICmicro family meets the specifications contained in the Microchip Data Sheet.
Microchip believes that its family of PICmicro microcontrollers is one of the most secure products of its kind on the market today,
when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowl-
edge, require using the PICmicro microcontroller in a manner outside the operating specifications contained in the data sheet.
The person doing so may be engaged in theft of intellectual property.
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as unbreakable.
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of
our product.
If you have any further questions about this matter, please contact the local sales office nearest to you.

Information contained in this publication regarding device Trademarks


applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to The Microchip name and logo, the Microchip logo, FilterLab,
ensure that your application meets with your specifications. KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER,
No representation or warranty is given and no liability is PICSTART, PRO MATE, SEEVAL and The Embedded Control
assumed by Microchip Technology Incorporated with respect Solutions Company are registered trademarks of Microchip Tech-
to the accuracy or use of such information, or infringement of nology Incorporated in the U.S.A. and other countries.
patents or other intellectual property rights arising from such
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
use or otherwise. Use of Microchips products as critical com-
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
ponents in life support systems is not authorized except with
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
express written approval by Microchip. No licenses are con-
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
veyed, implicitly or otherwise, under any intellectual property
and Total Endurance are trademarks of Microchip Technology
rights.
Incorporated in the U.S.A.

Serialized Quick Term Programming (SQTP) is a service mark


of Microchip Technology Incorporated in the U.S.A.

All other trademarks mentioned herein are property of their


respective companies.

2002, Microchip Technology Incorporated, Printed in the


U.S.A., All Rights Reserved.

Printed on recycled paper.

Microchip received QS-9000 quality system


certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999. The
Companys quality system processes and
procedures are QS-9000 compliant for its
PICmicro 8-bit MCUs, KEELOQ code hopping
devices, Serial EEPROMs and microperipheral
products. In addition, Microchips quality
system for the design and manufacture of
development systems is ISO 9001 certified.

2002 Microchip Technology Inc. DS00838A - page 5


M
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DS00838A-page 6 2002 Microchip Technology Inc.

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