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ELE629 Assignment#1

This lab assignment involves designing and simulating common source amplifiers with different load types: 1) An ideal current source load. The student will calculate the theoretical maximum gain, and choose values for the bias voltage (VBIAS) and transistor width (W) for maximum gain. They will simulate the design and tweak the values of VBIAS and W if needed. 2) A resistor load. The student will determine the maximum theoretical gain and values for the load resistance (R), VBIAS, and W. They will simulate the design and compare the theoretical and simulated results. 3) A diode-connected PMOS load. The student will repeat the process of calculating the theoretical maximum

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124 views

ELE629 Assignment#1

This lab assignment involves designing and simulating common source amplifiers with different load types: 1) An ideal current source load. The student will calculate the theoretical maximum gain, and choose values for the bias voltage (VBIAS) and transistor width (W) for maximum gain. They will simulate the design and tweak the values of VBIAS and W if needed. 2) A resistor load. The student will determine the maximum theoretical gain and values for the load resistance (R), VBIAS, and W. They will simulate the design and compare the theoretical and simulated results. 3) A diode-connected PMOS load. The student will repeat the process of calculating the theoretical maximum

Uploaded by

dean07
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOC, PDF, TXT or read online on Scribd
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LAB Assignment #1

ELE629

In this lab, you will design and simulate common source amplifiers having
different
types of loads. A comparison of hand calculations to actual simulation results
will be done.
The types of loads used will be
1) Ideal Current Source
2) Resistor
3) Diode Connected PMOS
An NMOS transistor will be used as the amplification device for all loads.

Figure 1

1) Start Mentor Design Architect and create a new project for Lab 2 and a
new cell for the first circuit. Start by drawing the schematic shown in Figure
1. There are two DC sources at the input of the amplifier. One is to bias the
circuit to the desired operating point. You will choose the value of VBIAS. The
other DC source will be used as the small signal input to the transistor.
We will sweep the voltage of this source, vgs. The load for part 1 will be an
ideal current
source. Also, names have been given to the nodes Vin and Vout, so we can
refer to them in this lab.

1(a) If Id=100uA and Vdsat .2 V, calculate the maximum theoretical gain


using hand
calculations. Determine W (the width of the transistor) and VBIAS (bias
voltage) for
maximum gain.

1(b) Enter these values into your schematic. Save your design and go to the
Analog
Environment. Initialize the value of the variable vgs to 0. This is done so that
when the DC operating point of the amplifier is found, only VBIAS will be
present at the gate of the
transistor. Set up a DC analysis to linearly sweep vgs from 0 to 10 uV. Also,
check the
checkbox to save the DC operating point. Run the simulation. To examine the
DC operating point of the transistor, click on Results > DC Operating Point.
Then click on the NMOS transistor in the schematic. A new window showing
the DC operating point of the transistor should open. Examine the values of
vgs, vds, vdsat, vth, etc. and make sure that they are appropriate for the
design. The simulation values will often be quite different from hand
calculations, so you have to “tweak” the design. Modify W and VBIAS to
satisfy the design constraints in simulation. Note any of these changes.

2) Now, replace the current source load with a resistor. Use an ideal resistor.
Your schematic should now look like Figure. 2. Determine the maximum gain
for this configuration and the corresponding values of R (resistance), VBIAS,
and W (Width). Remember, the transistor must be in saturation, with Vdsat= .
2 V and Vds= Vdsat + 200mV. Again, do the same DC analysis that was done
in Part 1. Change the design parameters after simulation if need be. Print out
a copy of the DC operating point of the transistor. Find the gain, print the
small signal input and output signals, and compare theoretical results to
simulated results.

Figure 2

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