PROFET® BTS650P

Smart Highside High Current Power Switch

Features Product Summary
• Overload protection
Overvoltage protection Vbb(AZ) 62 V
• Current limitation
• Short circuit protection Output clamp VON(CL) 42 V
• Overtemperature protection Operating voltage Vbb(on) 5.0 ... 34 V
• Overvoltage protection (including load dump) On-state resistance RON 6.0 mΩ
• Clamp of negative voltage at output
• Fast deenergizing of inductive loads 1) Load current (ISO) IL(ISO) 70 A
• Low ohmic inverse current operation Short circuit current limitation IL(SC) 130 A
• Reverse battery protection Current sense ratio IL : IIS 14 000
• Diagnostic feedback with load current sense
• Open load detection via current sense
• Loss of Vbb protection2) TO-220AB/7
• Electrostatic discharge (ESD) protection

Application
• Power switch with current sense diagnostic
feedback for 12 V and 24 V DC grounded loads
• Most suitable for loads with high inrush current
like lamps and motors; all types of resistive and 7 7
inductive loads
• Replaces electromechanical relays, fuses and 1 1
discrete circuits Standard SMD
General Description
N channel vertical power FET with charge pump, current controlled input and diagnostic feedback with load
current sense, integrated in Smart SIPMOS chip on chip technology. Fully protected by embedded protection
functions.

4 & Tab
+ V bb
R bb
Voltage Overvoltage Current Gate
source protection limit protection

OUT 1,2,6,7
Limit for
Voltage Charge pump unclamped IL
sensor ind. loads
Level shifter Current
Rectifier Output Sense
3 IN Voltage Load
ESD Logic detection

I IN
Temperature
sensor

I IS 
IS PROFET
Load GND
5
VIN
R
V IS IS

Logic GND

1
) With additional external diode.
2)
Additional external diode required for energized inductive loads (see page 9).
Semiconductor Group Page 1 of 16 1998-Nov.-2
 BTS650P

Pin Symbol Function

1 OUT O Output to the load. The pins 1,2,6 and 7 must be shorted with each other
3
especially in high current applications! )
2 OUT O Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)
3 IN I Input, activates the power switch in case of short to ground

4 Vbb Positive power supply voltage, the tab is electrically connected to this pin.
+
In high current applications the tab should be used for the Vbb connection
4
instead of this pin ).

5 IS S Diagnostic feedback providing a sense current proportional to the load

current; zero current on failure (see Truth Table on page 7)

6 OUT O Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)

7 OUT O Output to the load. The pins 1,2,6 and 7 must be shorted with each other
especially in high current applications!3)

Maximum Ratings at Tj = 25 °C unless otherwise specified

Parameter Symbol Values Unit

Supply voltage (overvoltage protection see page 4) Vbb 42 V
Supply voltage for short circuit protection, Vbb 34 V
Tj,start =-40 ...+150°C: (see diagram on page 10)
Load current (short circuit current, see page 5) IL self-limited A
Load dump protection VLoadDump = VA + Vs, VA = 13.5 V
RI5) = 2 Ω, RL = 0.54 Ω, td = 200 ms, VLoad dump6) 75 V
IN, IS = open or grounded
Operating temperature range Tj -40 ...+150 °C
Storage temperature range Tstg -55 ...+150
Power dissipation (DC), TC ≤ 25 °C Ptot 170 W
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const., EAS 1.5 J
IL = 20 A, ZL = 7.5 mH, 0 Ω, see diagrams on page 10
Electrostatic discharge capability (ESD) VESD 4 kV
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 kΩ
Current through input pin (DC) IIN +15 , -250 mA
Current through current sense status pin (DC) IIS +15 , -250
see internal circuit diagrams on page 7 and 8

3)
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current
capability and decrease the current sense accuracy
4)
Otherwise add up to 0.7 mΩ (depending on used length of the pin) to the RON if the pin is used instead of
the tab.
5)
RI = internal resistance of the load dump test pulse generator.
6)
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group Page 2 1998-Nov.-2
 BTS650P

Thermal Characteristics
Parameter and Conditions Symbol Values Unit
min typ max
chip - case: RthJC )
7
Thermal resistance -- -- 0.75 K/W
junction - ambient (free air): RthJA -- 60 --
SMD version, device on PCB8): 33

Electrical Characteristics
Parameter and Conditions Symbol Values Unit
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified min typ max

Load Switching Capabilities and Characteristics

On-state resistance (Tab to pins 1,2,6,7, see
measurement circuit page 7) IL = 20 A, Tj = 25 °C: RON -- 4.4 6.0 mΩ
VIN = 0, IL = 20 A, Tj = 150 °C: 7.9 10.5
IL = 90 A, Tj = 150 °C: -- 10.7
9)
Vbb = 6V , IL = 20 A, Tj = 150 °C: RON(Static) -- 10 17
Nominal load current10) (Tab to pins 1,2,6,7) IL(ISO) 55 70 -- A
ISO 10483-1/6.7: VON = 0.5 V, Tc = 85 °C 11)
Nominal load current10), device on PCB8))
TA = 85 °C, Tj ≤ 150 °C VON ≤ 0.5 V, IL(NOM) 13.6 17 -- A
Maximum load current in resistive range
(Tab to pins 1,2,6,7) VON = 1.8 V, Tc = 25 °C: IL(Max) 250 -- --
see diagram on page 13 VON = 1.8 V, Tc = 150 °C: 150 -- -- A
µs
12)
Turn-on time IIN to 90% VOUT: ton 100 -- 420
Turn-off time IIN to 10% VOUT: toff 30 -- 110
RL = 1 Ω , Tj =-40...+150°C
Slew rate on 12) (10 to 30% VOUT ) dV/dton -- 0.7 -- V/µs
RL = 1 Ω , TJ = 25 °C
Slew rate off 12) (70 to 40% VOUT ) -dV/dtoff -- 1.1 -- V/µs
RL = 1 Ω , TJ = 25 °C

7)
Thermal resistance RthCH case to heatsink (about 0.5 ... 0.9 K/W with silicone paste) not included!
8 )
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air.
9)
Decrease of Vbb below 10 V causes slowly a dynamic increase of RON to a higher value of RON(Static). As
long as VbIN > VbIN(u) max, RON increase is less than 10 % per second for TJ < 85 °C.
10)
Not tested, specified by design.
11)
TJ is about 105°C under these conditions.
12)
See timing diagram on page 14.
Semiconductor Group Page 3 1998-Nov.-2
 BTS650P

Inverse Load Current Operation

On-state resistance (Pins 1,2,6,7 to pin 4)
VbIN = 12 V, IL = - 20 A Tj = 25 °C: RON(inv) -- 4.4 6.0 mΩ
see diagram on page 10 Tj = 150 °C: 7.9 10.5
Nominal inverse load current (Pins 1,2,6,7 to Tab) IL(inv) 55 70 -- A
VON = -0.5 V, Tc = 85 °C11
Drain-source diode voltage (Vout > Vbb) -VON -- 0.6 -- V
IL = - 20 A, IIN = 0, Tj = +150°C

Operating Parameters
Operating voltage (VIN = 0) 9, 13) Vbb(on) 5.0 -- 34 V
Undervoltage shutdown 14) VbIN(u) 1.5 3.0 4.5 V
Undervoltage start of charge pump
see diagram page 15 VbIN(ucp) 3.0 4.5 6.0 V
Overvoltage protection15) Tj =-40°C: VbIN(Z) 60 -- -- V
Ibb = 15 mA Tj = 25...+150°C: 62 66 --
Standby current Tj =-40...+25°C: Ibb(off) -- 15 25 µA
IIN = 0 Tj = 150°C: -- 25 50

13) If the device is turned on before a V -decrease, the operating voltage range is extended down to VbIN(u).
bb
For all voltages 0 ... 34 V the device is fully protected against overtemperature and short circuit.
14)
VbIN = Vbb - VIN see diagram on page 7. When VbIN increases from less than VbIN(u) up to VbIN(ucp) = 5 V
(typ.) the charge pump is not active and VOUT ≈Vbb - 3 V.
15)
See also VON(CL) in circuit diagram on page 9.

Semiconductor Group Page 4 1998-Nov.-2

 BTS650P
Parameter and Conditions Symbol Values Unit
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified min typ max
Protection Functions
Short circuit current limit (Tab to pins 1,2,6,7)
VON = 12 V, time until shutdown max. 350 µs Tc =-40°C: IL(SC) -- 110 -- A
Tc =25°C: IL(SC) -- 130 180
Tc =+150°C: IL(SC) 65 115 --
Short circuit shutdown delay after input current
positive slope, VON > VON(SC) td(SC) 80 -- 350 µs
min. value valid only if input "off-signal" time exceeds 30 µs
Output clamp 16) IL= 40 mA: -VOUT(CL) 14 16.5 20 V
(inductive load switch off)
see diagram Ind. and overvolt. output clamp page 8
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL) (e.g. overvoltage) VON(CL) 39 42 47 V
IL= 40 mA
Short circuit shutdown detection voltage
(pin 4 to pins 1,2,6,7) VON(SC) -- 6 -- V
Thermal overload trip temperature Tjt 150 -- -- °C
Thermal hysteresis ∆Tjt -- 10 -- K

Reverse Battery
Reverse battery voltage )
17
-Vbb -- -- 32 V
On-state resistance (Pins 1,2,6,7 to pin 4) Tj = 25 °C: RON(rev) -- 5.4 7.0 mΩ
Vbb = -12V, VIN = 0, IL = - 20 A, RIS = 1 kΩ Tj = 150 °C: 8.9 12.3
Integrated resistor in Vbb line Rbb -- 120 -- Ω

16) This output clamp can be "switched off" by using an additional diode at the IS-Pin (see page 8). If the diode
is used, VOUT is clamped to Vbb- VON(CL) at inductive load switch off.
17)
The reverse load current through the intrinsic drain-source diode has to be limited by the connected load
(as it is done with all polarity symmetric loads). Note that under off-conditions (I IN = I IS = 0) the power
transistor is not activated. This results in raised power dissipation due to the higher voltage drop across the
intrinsic drain-source diode. The temperature protection is not active during reverse current operation!
Increasing reverse battery voltage capability is simply possible as described on page 9.

Semiconductor Group Page 5 1998-Nov.-2

 BTS650P
Parameter and Conditions Symbol Values Unit
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified min typ max

Diagnostic Characteristics
Current sense ratio, IL = 90 A,Tj =-40°C: kILIS 12 500 14 200 16 000
static on-condition, Tj =25°C: 12 500 13 700 16 000
kILIS = IL : IIS18, Tj =150°C: 11 500 13 000 14 500
VON < 1.5 V ), IL = 20 A,Tj =-40°C: 12 500 14 500 17 500
VIS <VOUT - 5V, Tj =25°C: 12 000 14 000 16 500
VbIN > 4.0 V Tj =150°C: 11 500 13 400 15 000
see diagram on page 12 IL = 10 A,Tj =-40°C: 12 500 15 000 19 000
Tj =25°C: 11 500 14 300 17 500
Tj =150°C: 11 500 13 500 15 500
IL = 4 A,Tj =-40°C: 11 000 18 000 28 500
Tj =25°C: 11 000 15 400 22 000
Tj =150°C: 11 200 14 000 19 000
IIS=0 by IIN =0 (e.g. during deenergizing of inductive loads):
Sense current saturation IIS,lim 6.5 -- -- mA
Current sense leakage current IIN = 0: IIS(LL) -- -- 0.5 µA
VIN = 0, IL ≤ 0: IIS(LH) -- 2 --
Current sense overvoltage protection Tj =-40°C: VbIS(Z) 60 -- -- V
Ibb = 15 mA Tj = 25...+150°C: 62 66 --
Current sense settling time 19)
ts(IS) -- -- 500 µs

Input
Input and operating current (see diagram page 13) IIN(on) -- 0.8 1.5 mA
IN grounded (VIN = 0)
Input current for turn-off20) IIN(off) -- -- 80 µA

18)
If VON is higher, the sense current is no longer proportional to the load current due to sense current
saturation, see IIS,lim .
19)
Not tested, specified by design.
20)
We recommend the resistance between IN and GND to be less than 0.5 kΩ for turn-on and more than
500kΩ for turn-off. Consider that when the device is switched off (IIN = 0) the voltage between IN and GND
reaches almost Vbb.

Semiconductor Group Page 6 1998-Nov.-2

 BTS650P

Truth Table
Input Output Current Remark
current Sense
level level IIS
Normal L L 0
operation H H nominal =IL / kilis, up to IIS=IIS,lim
Very high up to VON=VON(Fold back)
H H IIS, lim
load current IIS no longer proportional to IL
Current- VON > VON(Fold back)
H H 0
limitation if VON>VON(SC), shutdown will occure
Short circuit to L L 0
GND H L 0
Over- L L 0
temperature H L 0
Short circuit to L H 0
<nominal )
21
Vbb H H
22
Open load L Z ) 0
H H 0
Negative output L L 0
voltage clamp
Inverse load L H 0
current H H 0
L = "Low" Level
H = "High" Level
Overtemperature reset by cooling: Tj < Tjt (see diagram on page 15)
Short circuit to GND: Shutdown remains latched until next reset via input (see diagram on page 14)

Terms
RON measurement layout
I bb
4
VbIN
VON
l ≤
Vbb 5.5mm
IL

V IN OUT
bb 3 PROFET 1,2,6,7

RIN
IS Vbb force
V 5 I IS Out Force Sense
IN VOUT contacts
VbIS contacts
I IN
DS (both out
pins parallel)
VIS R IS
Typical RON for SMD version is about 0.2 mΩ less
than straight leads due to l ≈ 2 mm
Two or more devices can easily be connected in
parallel to increase load current capability.

21 ) Low ohmic short to Vbb may reduce the output current IL and can thus be detected via the sense current IIS.
22 ) Power Transistor "OFF", potential defined by external impedance.

Semiconductor Group Page 7 1998-Nov.-2

 BTS650P
Input circuit (ESD protection) Current sense status output
V bb
Vbb
R bb
V
Z,IS
R bb ZD
V ZD
Z,IN
V bIN IS
IN
I IS
VIS
I
IN R
IS

VZ,IS = 66 V (typ.), RIS = 1 kΩ nominal (or 1 kΩ /n, if n

V IN devices are connected in parallel). IS = IL/kilis can be
driven only by the internal circuit as long as Vout - VIS >
When the device is switched off (IIN = 0) the voltage 5 V. If you want measure load currents up to IL(M), RIS
between IN and GND reaches almost Vbb. Use a Vbb - 5 V
should be less than .
mechanical switch, a bipolar or MOS transistor with IL(M) / Kilis
appropriate breakdown voltage as driver. Note: For large values of RIS the voltage VIS can
VZ,IN = 66 V (typ). reach almost Vbb. See also overvoltage protection.
If you don't use the current sense output in your
application, you can leave it open.
Short circuit detection
Fault Condition: VON > VON(SC) (6 V typ.) and t> td(SC)
(80 ...350 µs). Inductive and overvoltage output clamp
+ Vbb

+ Vbb VZ1

VON
VON

VZG OUT
OUT
Short circuit PROFET
Logic
unit detection IS
VOUT
DS

VON is clamped to VON(Cl) = 42 V typ. At inductive load

switch-off without DS, VOUT is clamped to VOUT(CL) =
-19 V typ. via VZG. With DS, VOUT is clamped to Vbb -
VON(CL) via VZ1. Using DS gives faster deenergizing of
the inductive load, but higher peak power dissipation in
the PROFET.

Semiconductor Group Page 8 1998-Nov.-2

 BTS650P
Overvoltage protection of logic part Vbb disconnect with energized inductive
+ Vbb load
Provide a current path with load current capability by
V V R bb using a diode, a Z-diode, or a varistor. (VZL < 72 V or
Z,IN Z,IS
VZb < 30 V if RIN=0). For higher clamp voltages
R IN
IN currents at IN and IS have to be limited to 250 mA.
Logic
V OUT Version a:

IS PROFET
V
bb V
bb
R IS RV V Z,VIS
IN PROFET OUT
Signal GND

Rbb = 120 Ω typ., VZ,IN = VZ,IS = 66 V typ., RIS = 1 kΩ IS

nominal. Note that when overvoltage exceeds 71 V typ.
a voltage above 5V can occur between IS and GND, if
RV, VZ,VIS are not used. V ZL

Reverse battery protection

Version b:
- Vbb
Rbb

V Vbb
IN
bb

OUT IN PROFET OUT

Power
RIN Logic Transistor
IS
IS
DS
RL V Zb

D RIS RV

Signal GND Power GND

Note that there is no reverse battery protection when
using a diode without additional Z-diode VZL, VZb.
RV ≥ 1 kΩ, RIS = 1 kΩ nominal. Add RIN for reverse
Version c: Sometimes a neccessary voltage clamp is
battery protection in applications with Vbb above
given by non inductive loads RL connected to the
1 1 1
16 V17); recommended value: + + = same switch and eliminates the need of clamping
RIN RIS RV
circuit:
0.1A 1 0.1A
if DS is not used (or = if DS
|Vbb| - 12V RIN |Vbb| - 12V
is used).
To minimize power dissipation at reverse battery V Vbb
bb RL
operation, the summarized current into the IN and IS
pin should be about 120mA. The current can be IN OUT
PROFET
provided by using a small signal diode D in parallel to
the input switch, by using a MOSFET input switch or
by proper adjusting the current through RIS and RV. IS

Semiconductor Group Page 9 1998-Nov.-2

 BTS650P
Inverse load current operation Maximum allowable load inductance for
a single switch off
L = f (IL ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω
Vbb
V bb L [µH]
- IL
+ IN PROFET OUT
1000000

-
IS V OUT +

IIS 100000
V IN
-
V IS R IS
10000

The device is specified for inverse load current

operation (VOUT > Vbb > 0V). The current sense 1000
feature is not available during this kind of operation (IIS
= 0). With IIN = 0 (e.g. input open) only the intrinsic
drain source diode is conducting resulting in consi- 100
derably increased power dissipation. If the device is
switched on (VIN = 0), this power dissipation is
decreased to the much lower value RON(INV) * I2 10
(specifications see page 4).
Note: Temperature protection during inverse load
current operation is not possible!
1
Inductive load switch-off energy 1A 10 A 100 A 1000 A
dissipation IL [A]
E bb

E AS Externally adjustable current limit

ELoad
V
bb
If the device is conducting, the sense current can be
i L(t) used to reduce the short circuit current and allow
V bb
OUT
higher lead inductance (see diagram above). The
IN PROFET
device will be turned off, if the threshold voltage of T2
EL is reached by IS*RIS . After a delay time defined by
IS L
RV*CV T1 will be reset. The device is turned on again,
I
IN
ZL { RL ER
the short circuit current is defined by IL(SC) and the
RIS
device is shut down after td(SC) with latch function.

Vbb
Energy stored in load inductance: V bb
2
EL = 1/2·L·I L
IN PROFET OUT
While demagnetizing load inductance, the energy
dissipated in PROFET is
IS
RV
EAS= Ebb + EL - ER= ∫ VON(CL)·iL(t) dt, Rload

with an approximate solution for RL > 0 Ω: IN

T1 CV
Signal T2 R IS
IL· L IL·RL Signal
Power
EAS= (V + |VOUT(CL)|) ln (1+ |V
2·RL bb
) GND
OUT(CL)|
GND

Semiconductor Group Page 10 1998-Nov.-2

 BTS650P
Options Overview
Type BTS 550P 555
650P
Overtemperature protection with hysteresis X X
Tj >150 °C, latch function23) X
Tj >150 °C, with auto-restart on cooling X
Short circuit to GND protection
switches off when VON>6 V typ. X X
(when first turned on after approx. 180 µs)
Overvoltage shutdown - -
Output negative voltage transient limit
to Vbb - VON(CL) X X
24
to VOUT = -19 V typ X ) X24)

23) Latch except when V -V

bb OUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT
≠ 0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 5). No latch
between turn on and td(SC).
24)
Can be "switched off" by using a diode DS (see page 8) or leaving open the current sense output.
Semiconductor Group Page 11 1998-Nov.-2
 BTS650P
Characteristics
Current sense versus load current: Current sense ratio:
IIS = f(IL), TJ= -40 ... +150 °C IIS = f(IL), TJ= 25 °C
IIS [mA] kILIS

7 22000

6 20000

5
max 18000
4 max
16000
3
min typ
14000
2
min
1 12000

0 10000
0 20 40 60 80 0 20 40 60 80

IL [A] IL [A]

Current sense ratio: Current sense ratio:

KILIS = f(IL),TJ = -40°C KILIS = f(IL),TJ = 150°C
kilis kilis

30000 22000
28000
20000
26000
24000
18000
22000
20000 16000 max
18000 max
14000 typ
16000 typ
14000 min
min 12000
12000
10000 10000
0 20 40 60 80 0 20 40 60 80

IL [A] IL [A]

Semiconductor Group Page 12 1998-Nov.-2

 BTS650P
Typ. current limitation characteristic Typ. input current
IL = f (VON, Tj ) IIN = f (VbIN), VbIN = Vbb - VIN
IIN [mA]
IL [A]

450 1.6

400 1.4

350
1.2
300 VON > VON(S C) only for t < td(S C)
(otherwis e immediate s hutdown) 1
250

200 0.8
T J = 25°C
150 0.6

100
0.4
50 T J = -40°C T J = 150°C
0.2
0
0 VON(F B) 5 10 15 20
0
0 20 40 60 80
VON [V]
In case of VON > VON(SC) (typ. 6 V) the device will be
switched off by internal short circuit detection. VbIN [V]
Typ. on-state resistance
RON = f (Vbb, Tj ); IL = 20 A; VIN = 0
RON [mOhm]

14
static
12 dynamic

10

8 Tj = 150°C
85°C
6
25°C
4
-40°C

0
0 5 10 15 40
Vbb [V]

Semiconductor Group Page 13 1998-Nov.-2

 BTS650P
Timing diagrams
Figure 2b: Switching an inductive load:
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IIN
IIN

VOUT dV/dtoff
90% VOUT
t on

dV/dton
t off
10%

IL tslc(IS) t slc(IS) IL

Load 1 Load 2
IIS
IIS t
tson(IS) t
t soff(IS)

The sense signal is not valid during a settling time

after turn-on/off and after change of load current. Figure 3a: Short circuit:
shut down by short circuit detection, reset by IIN = 0.

Figure 2a: Switching motors and lamps: IIN

IIN

IL

IL(SCp)

VOUT td(SC)

IIL
IIS
VOUT>>0
VOUT=0
t
IIS
t
Shut down remains latched until next reset via input.
Sense current saturation can occur at very high
inrush currents (see IIS,lim on page 6).

Semiconductor Group Page 14 1998-Nov.-2

 BTS650P
Figure 4a: Overtemperature
Reset if Tj<Tjt

IIN

IIS

VOUT Auto Restart

Tj

Figure 6a: Undervoltage restart of charge pump,

overvoltage clamp

VOUT

VIN = 0

VON(CL)
6 dynamic, short
Undervoltage
not below
VbIN(u)
4

2 IIN = 0
V ON(CL)
0
0 VbIN(u) VbIN(ucp)

Semiconductor Group Page 15 1998-Nov.-2

 BTS650P
Published by Siemens AG, Bereich Halbleiter Vetrieb, Werbung,
Package and Ordering Code Balanstraße 73, D-81541 München
All dimensions in mm  Siemens AG 1998. All Rights Reserved
Attention please!
Standard TO-220AB/7 Ordering code As far as patents or other rights of third parties are concerned, liability
is only assumed for components, not for applications, processes and
BTS650P Q67060-S6308-A2 circuits implemented within components or assemblies. The
information describes a type of component and shall not be
considered as warranted characteristics. Terms of delivery and rights
to change design reserved. For questions on technology, delivery and
prices please contact the Semiconductor Group Offices in Germany
or the Siemens Companies and Representatives worldwide (see
address list). Due to technical requirements components may contain
dangerous substances. For information on the types in question
please contact your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC manufacturer.
Packing: Please use the recycling operators known to you. We can
also help you - get in touch with your nearest sales office. By
agreement we will take packing material back, if it is sorted. You must
bear the costs of transport. For packing material that is returned to us
unsorted or which we are not obliged to accept, we shall have to
invoice you for any costs incurred.
Components used in life-support devices or systems must be
25
expressly authorised for such purpose! Critical components ) of
the Semiconductor Group of Siemens AG, may only be used in life
26
supporting devices or systems ) with the express written approval of
the Semiconductor Group of Siemens AG.

SMD TO 220AB/7, Opt. E3180 Ordering code

BTS650P E3180A T&R: Q67060-S6308-A4

Footprint:
10.8

9.4 16.15

4.6
0.47
0.8
8.42
25)
A critical component is a component used in a life-support
device or system whose failure can reasonably be expected to
cause the failure of that life-support device or system, or to affect
its safety or effectiveness of that device or system.
26)
Life support devices or systems are intended (a) to be implanted
in the human body or (b) support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonably to assume
that the health of the user or other persons may be endangered.

Semiconductor Group Page 16 1998-Nov.-2

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