IET Renewable Power Generation

Research Article

Differential current-based fault protection with ISSN 1752-1416

Received on 14th June 2016
Revised 23rd December 2016
adaptive threshold for multiple PV-based DC Accepted on 8th February 2017
E-First on 11th April 2017
microgrid doi: 10.1049/iet-rpg.2016.0577
www.ietdl.org

Snehamoy Dhar1, Pradipta Kishore Dash2

1Electricaland Electronics, Siksha O Anusandhan University, Bhubaneswar, India
2Multidisciplinary
Research Cell, Siksha O Anusandhan University, Bhubaneswar, India
E-mail: [email protected]

Abstract: A new differential current-based fast fault detection and accurate fault distance calculation is proposed for
photovoltaic (PV)-based DC microgrid. A multiterminal direct current (MTDC) distribution network is studied as an adequate
solution for present low-voltage utility grid scenario, where local distributed generators (DGs) are incorporated primarily by
power electronics based DC–DC converters, DC–AC voltage-source converters (VSCs). PV and diesel generator (as auxiliary
source) are considered for cascaded common DC bus, and AC utility bus integration is achieved by VSC unit for the proposed
MTDC network. DC microgrid protection is quite significant research focus due to the absence of well-defined standards. Pole-
to-pole, pole-to-ground, PV-side DC series and ground arc faults are basically considered as DC distribution network hazards. A
discrete model differential current solution is considered to detect, classify and locate the faults by modified cumulative sum
average approach. A comprehensive case study is presented with different DC loadings, to deliberate effectiveness of the
proposed protection scheme in terms of percentage error and trip time (Ts). The result verification is conducted in MATLAB
environment as well as TMS320C6713 digital signal processor-based test bench with the proposed multiple DGs based DC
microgrid.

1 Introduction performance data acquisition tools [8]. Reflected wave-based

detection and identification are studied. Inaccuracy of these
Challenges associated with DC microgrid protection are due to lack methods is found due to short-distance DC cables. Active
of well-defined protection standards [1]. AC breakers are cost impedance estimation-based fault protection is proposed for marine
effective as compared with fast-acting DC switches [2]. The DC networks [9]. A probe power unit (PPU)-based non-iterative
primary focus associated with DC distribution protection is fast fault location is proposed for low-voltage DC microgrid [10]. This
detection of fault occurrence and disconnection of power converter method uses an extra equipment to measure the DC fault location.
units [voltage-source converter (VSCs), DC–DC converters, AC– Line differential current-based fault estimation is listed [11], where
DC rectifiers etc.] to provide protection from high-fault current iterative solution with complex pole calculation of line current is
surge. Most possible faults to the DC systems are: pole-to-pole proposed. A new differential current-based fast detection and
(PP) and pole-to-ground (PG) faults. Fault path between positive accurate fault location is proposed in this paper. The fault detection
and negative lines are responsible for PP fault, whereas fault path thresholds for various fault resistance are volatile in nature when
between positive/negative line to ground is the cause of PG faults primary distributed generators (DGs) are renewable, and thus
[3]. Though PP faults are most general protection hazard condition, minimum and maximum permissible fault resistance detection
PG faults are complex to determine. However, while connecting threshold is calculated adaptively using piecewise cubic hermite
with photovoltaic (PV) system, there is a contingency of DC arc polynomial (PCHP) interpolation [12]. Differential current-based
fault [3]. PV configurations are more prone to DC arc faults, while solutions are mainly considered for fault detection and relaying
they are constructed in both series, and parallel manner (i.e. operation in the existing literature. Fault distance calculation by
modules, panels and arrays) for a larger system [4]. A PV system means of line impedance calculation is included as a separate
higher than 80 V (rated) penetrating local/utility network is solution in the literature. These calculations are performed through
suggested to incorporate arc fault circuit interrupter (AFCI) device numerical solutions (i.e. travelling-wave theory, wavelet transform,
as protection measure, according to the Article 690.11 of National principal component analysis etc.) using voltage and current
Electrical Code (NEC), 2011 [5]. Earth capacitance measurement expressions during faults. A fast and simple fault detection as well
and time-domain reflectometry are considered for location as distance measurement scheme is presented in this paper, where
identification of PV arc faults [6]. Series, intra-string parallel, non-iterative calculation is focused to ensure fast computation.
cross-string and arcing ground faults (GFs) are introduced as Furthermore, the proposed fault detection scheme is effectively
possible crisis for any PV configuration [6]. To design fault designed to detect PV arc faults (series, ground) for PV-based DGs.
protection scheme, Underwriters Laboratory (UL) 1699B, Non-iterative fault detection and fault distance calculation for PV-
‘Photovoltaic DC Arc Fault Circuit Protection’, standard technical based DC microgrids are the key features of the proposed
panel are followed. In this paper, DC series and ground arc faults differential current-based protection scheme.
[7] are emphasised. These types of faults occurred during high- After a brief introduction to the motivation and recent trends of
resistive arc-gap path or no proper grounding of PV arrays. These DC microgrid protection in Section 1, utility grid interactive
types of faults are complex to identify because of their low-surge multiterminal direct current (MTDC) distribution network is
fault current. discussed in Section 2. Sections 3 and 4 provide the fault detection
Owing to the presence of power electronics converter controls and location methods, respectively, while several fault case studies
fast fault detection and location estimation is facing difficulties, with or without DC loads are considered in Section 5. Concluding
especially for DC microgrid applications. The accuracy of remarks are given in Section 6.
travelling-wave-based fault detection, proposed for DC network is
dependent on accurate detection time calculation and requires high-

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Fig. 1  Schematic representation of multiple DGs based DC microgrid integrated with utility (AC) bus

2 Multiple PV-based utility interactive DC

microgrid
Table 1 Proposed network parameters with generation unit
An MTDC network incorporated with multiple-shunt-connected
PV-based DC bus parameters PV systems (PV with DC–DC converters), diesel generator (with
PV system power rated 4 × 100 kW (individual) = 400 kW AC–DC rectifier unit), various DC loads and AC utility interfacing
(kW) VSC unit is proposed for present microgrid configuration as shown
DC converter (buck 4 × 108 kW ( + 8% IEC 6210); 470 V (DC) in Fig. 1. VSC is integrated with high-frequency pulse-width
type) rated modulation (i.e. 10 kHz) switching with grid phase locked loop
DC bus rated 500 V; Rdc→121 mΩ/km; Ldc→0.97 mH/km; (PLL) control. Thus, an intermittent fault tolerance is exhibited by
Cdc→12.1→nF/km; Rground→0.5 Ω the VSC unit by limiting current surges during DC bus faults.
Similar high-frequency duty cycle (d) calculation of DC–DC units
VSC parameters
contributes to their intermittent fault tolerance. The parameters
voltage converter operational frequency→ 60 Hz; 400 kW, considered for the proposed utility integrated MTDC system are
parameters 260 V (AC) to step-up. DC-link mentioned in Table 1.
capacitor→100 μF DC cables are generally resistive in nature during steady-state
VSC PLL control switching frequency→5 kHz; proportional power flow solution. However, during sudden fault at any DC
(second order) (Kp) gains 7, 9.8; integral (Ki) gains 32, 20 cable a transient nature of cable is expressed in terms of series
line parameters line voltage(L–L)→25 kV (AC) after step-up; inductive reactance (xL) and shunt capacitive reactance (x). This
R1, X1 (2.5 km)→0.074 Ω, 2.61 mH; R2, X2 shunt capacitive reactance (x) is important during PG fault
(3.2 km)→0.0947 Ω, 3.34 mH; R3, X3 (2 km) calculation, especially during high reactance path of DC arc fault.
→0.0592 Ω, 2.08 mH The DC cable parameters considered for present discussion (Fig. 2)
Load parameters are shown in Table 2. This multiple DGs based DC distribution
network is designed with proper unit protection by fast-acting DC
DC lamp load PL,dc→50 kW; 450 V
semiconductor-based switches. The differential current
DC motor load PL2,dc→20 kW, 450 V characteristic is explained for DC cables in Section 3.
PV (DER1) local load PL1→100 kW; QL1→5 kVAR
(load 1) 3 Proposed differential current-based fault
grid-side non-linear PL2,0→275 kW; QL2,0→25 kVAR detection
load (load 2)
diesel generator (DG2) Vdg2,rated→480 V; DG rated revolution 750  A DC network with fast-response DC switches at both sides of unit
parameters protection zone and AC circuit breakers at AC side of DGs (i.e. for
rpm
diesel generator-based DG and AC coupling VSC) is implemented
DG2 governor control K1,dg2→1.85; K1,dg2→2.6; K1,dg2→0.85 as shown in Fig. 2. The protection switching will be based on
gains measured differential current during fault and present fault

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Fig. 2  DC cable parameters
(a) Detailed unit protection zones based schematic representation of the proposed multi-PV DC microgrid, (b) Different types of arc fault configuration for PV system

detection threshold. To understand the scheme, first a detailed In Fig. 3a, Vdc1(t)→input side DC voltage, Idc1(t)→input DC
mathematical derivation of differential current for a DC cable unit current, Vdc2(t)→output/load side DC voltage and Idc2(t)→output/
is presented below. load side DC current. R1, L1, R2, L2 are the series equivalent
Single DC cable (π model based) is implemented for the resistance, inductance of the cable where C1 and Rf are the shunt
proposed network and shown in Fig. 2. The cable parameters are
capacitance (coupling point) and fault resistance, respectively. Rf is
mentioned in Table 2. Points F1 and F2 are considered for fault
location (protection zone) to validate the proposed scheme, where considered negligible for PP fault calculation; however, for PG it is
non-detection of external fault is evidenced at point Fext. Validation countable to calculate accurate fault location. Now from Fig. 3, it is
possible to apply Kirchhoff's voltage law to obtain the following
of external fault non-detection is discussed in Section 5. For
relationship:
present consideration if F1 is the fault location and the DC cable
equivalent circuit representation will be as shown in Fig. 3a.

780 IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790
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Table 2 DC cable parameters for the proposed utility I dc1(k + 1) − I dc1(k)
interactive MTDC network R1I dc1(kΔt) + L1
Δt
Component Data Parameters (4)
x
Resistive Inductive Capacitive + I dc3(k + 1) + I dc3(k) Δt = V dc1(kΔt)
C
rectifier cable 1.4 kms 0.125 Ω/km 0.34 mH/km 0.5 µF/km
(diesel generator) where x is the coefficient of differential current in terms of shunt
PV cables 1.8 kms, 0.641 Ω/km 0.34 mH/km 0.1 µF/km capacitance, fault resistance and instantaneous reactance and Δt
1.1 kms, represents the sampling time interval. This transient reactance
0.9 kms, coefficient (x) is important while considering DC arc faults. The
1.4 kms DC cables are resistive one and from the resistive nature the fault
DC load cables 3 kms 0.641 Ω/km 0.34 mH/km 0.1 µF/km distance can be calculated by Moore–Penrose pseudo-inverse
where the fault detection is accomplished by a modified cumulative
sum (CuSum) method.
dI dc1
V dc1 − I dc1R1 − L1
dt
−
1
C ∫ i dt = 0
c (1) 3.1 DC arc fault model for PV system
A DC arc series fault meta-model [13] is achieved for the proposed
Here, ic is instantaneous current across shunt capacitor. As shunt PV system 1, as in Fig. 2b, by including Mayr reactance (xmayr)
capacitor is combined with fault resistance in a parallel manner a and corona reactance (xcor). The arc reactance (xarc = xmayr + xcor)
current division scheme is considered for expressing (1) in terms of path is having two parallel current diodes with low threshold
differential current [Idc3(t)] current (Is). Is represents the transition between the corona and arc
discharge and it may vary as: −Is,nom≤Is≤Is,nom, according to arc
dI dc1 Rf
V dc1 − I dc1R1 − L1
dt
−
C R f + xc ∫I dc3 dt =0 potential (Varc) polarity. Varc is considered in series with current
diodes and obtained from Ayrton model
(2)
dI dc1
or V dc1 − I dc1R1 − L1
dt
−
x
C ∫I dc3 dt =0
V arc =
Pnom
+ V nom (5)
I arc
In the above expression, xc is the instantaneous reactance
(during fault transient) of shunt capacitor, C1. This reactance does Here, Pnom and Vnom are cooling power and arc potential
not have any impact during normal operation where Idc3(t) = Idc1(t) constant. The DC arc path is depicted in Fig. 3d. The potential
−Idc2(t), is negligible. The expression in (2) is in continuous state difference at fault point F1 is obtained from DC arc path, as
transition form. If considered sample time interval is Δt, then
V dc3 = I arc × xarc − V arc (6)
Vdc1(t) in (2) can be approximated by using a piecewise function as

1 The arc fault reactance (xarc) is calculated as

V dc1 k ⋅ Δt = V k ⋅ Δt + V dc1 k ⋅ Δt + Δt ≅ V dc1 t (3)
2 dc1
xarc(k) = xcor(k) + xmayr(k)
where kΔt ≤ t < (k + 1)Δt and k = 1, 2, 3, … positive integers. xarc(k − 1) Pin
∫
(7)
Here, Vdc1(kΔt) is a rectangular wave which is obtained from = xcor(k) + 1−
Θ Pnom
sampling and polygonal holding of Vdc1(t). Now, by replacing all
continuous state parameters in discrete representation with a where Θ is the arc time constant (delay) and Pin is the supplied
similar approximation, (2) can be rewritten as in (4). The sampling
power to arc path. The energy (Warc) stored in arc path during fault
frequency is considered as 2 kHz, and the kth sample instance is
expressed the second-order differential system as is obtained as

∂W arc
= Pin − Pnom (8)
∂t

Fig. 3  Equivalent circuit representation of

(a) DC cable unit zone, (b) During PP fault, (c) During PG fault, (d) During DC arc fault

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Fig. 4  Proposed fault detection by modified CuSum for PP fault
(a) Input side (Idc1) current, (b) Input side voltage (Vdc1), (c) Differential current (Idc3), (d) High index of CuSum during PP fault

Now, the conventional DC cable fault path (PP and PG fault) than sliding sample size m). In the proposed detection scheme
consideration in (2) is represented with arc fault as separate sliding window is proposed as in Figs. 4c, 5a and b.
During PP fault the DC cable differential current flows through
dI dc1(t) the Rf low resistance path as capacitive reactance (x) is higher
V dc1(t) + R1I dc1(t) + L1
dt (9) during this transient as shown in Fig. 3b. Thus, current Idc3(t)
+x2I dc3(t) − sign(V arc) × ∥ V arc ∥ displays a DC positive transient when voltage Vdc1(t) shows a dip
in nature, as in Figs. 4b and c. During PG fault path the ground
where x2 = [xc /(xc + xarc)] is the arc path reactance. Again by resistance makes Rf path more resistive and hence capacitive
discharge takes place through ground resistance (Rg) and Rf as
considering piecewise approximation [as in (3)] to convert
continuous time-frame to discrete form as shown in Fig. 3c. Thus, Vdc1(t) depicts a swell in nature when
Idc1(t) shows negative polarity transient, as in Fig. 5a. For PV-side
I dc1(k) − I dc1(k − 1) DC arc fault (ground), the fault differential current is as shown in
R1 × I dc1 kΔt + L1 + x2 × I dc3 kΔt Fig. 5b. The series arc is similar to ground arc, where fault path has
Δt (10)
high arc potential instead of high resistance. Thus, the detection
= V dc1 kΔt − ∥ V arc kΔt ∥ × sign V arc kΔt threshold of CuSum index is quite low to distinguish these types of
faults, as in Fig. 5d. The series, ground arc faults are due to failure
Now (4) and (10) are two obtained discrete differential of intended continuity of DC cable; moreover, parallel arc faults
solutions considered for the proposed protection scheme and resulted through unintentional current path between two PV
selection among these is a decision function of CuSum [14] systems (i.e. arrays or modules). DC parallel arc fault energy can
threshold. The fault detection based on modified CuSum is be very high, where series, ground arc fault current can be
presented in Section 3.2. negligible to distinguish. The proposed technique is able to detect
ground arc (Section 5.3), series arc (Section 5.5), where parallel arc
3.2 Modified CuSum average-based fault classification (considered to show the protection limit in the proposed arc
detection) should be operated by AFCI device or method in [15].
During fault condition the cable voltage and current change The modified CuSum-based fault detection for DC network unit
significantly. For an effective fault detection scheme these changes protection is proposed as in (11)
should get identified online with minimum detection samples/time.
CuSum-based average calculation can be achievable by: (a) CuSum(k) = CuSum(k − 1) + I dc3 k − I dc3 k − ηN s (11)
sample-by-sample approach: in this approach differential current
(Idc3) samples (k) are compared with the previous sample (k−1) where k is the sample instant, η is the positive integer value
value to throw a higher index during sudden changes. Index higher (generally considered as unity), Ns is number of samples
than detection threshold will count as CuSum detection time (Cd);
considered for each window chunk. Now, the CuSum detection
(b) window-by-window concept: for the proposed DC microgrid, a time (Cd) is calculated from threshold crossover by high index of
chunk of samples (i.e. n number sample in a chunk) is considered
CuSum as in (12)
as window for CuSum-based fault detection. Now, the kth sample
of the lth window and the kth sample of (l + 1)th window is if CuSum(k) > CuSum_thrshld
compared and if for consecutive three comparisons it throws higher
index than detection threshold then a trip signal will follow to fast trip_flag == 1; (12)
DC switches, to disconnect both sides of that unit protection zone, Cd = CuSum(k) − CuSum( j) × T t
as in Fig. 2. The sliding of window can be through overlapped
sliding (where window sample size n is higher than sliding sample Here, the kth instant the index crosses detection threshold, j is the
size m) or separate sliding (where window sample size n is lesser sample instance when CuSum index becomes >0, Tt is the sampling

782 IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790
© The Institution of Engineering and Technology 2017
Fig. 5  Proposed fault detection by modified CuSum for PG and DC arc GFs
(a) Differential current (Idc3) for PP fault, (b) Differential current (Idc3) for ground arc fault, (c) High index of CuSum during PG fault, (d) CuSum index during ground arc fault

time interval. So finally, trip time (Ts) is: Ts = Cd + DC switching if y1 == + ve

delay [16]. if y2 > 340& y2 < 2800
The proposed modified CuSum-based fault detection scheme is
incorporated with selectivity between internal (within DC Dscn_flg == 1;
protection zone, Fig. 2a) and external faults. As DC measurement else ify2 > 750 & y2 < 1490
units are considered at both ends of the proposed protection zone,
the CuSum index for differential current (Idc3) response will be Dscn_ f lg == 2; end (14)
higher than the CuSum index for average current (Idc,avg) response else ify2 > 15&y2 < 140
for internal faults. For external faults, the relationship between Idc3 Dscn_ f lg == 3; end
and Idc,avg will be vice versa. This effectiveness in selectivity for end
the proposed CuSum is discussed further in Section 5. The average
current is calculated as end

I dc1(kΔt) + I dc2(kΔt) The decision flag (Dscn_flg) is 1 for PP fault, 2 for PG and 3
I dc, avg kΔt = (13) for PV-side DC arc fault (PV cable). The threshold values are
2
estimated for full PV irradiation level (1000 W/m2). The fast-
response DC switch trips while index value reaches detection
CuSum index for average current (Idc,avg) can be calculated
threshold.
with a similar approach as in (11). To achieve effective protection through fast DC switching
For DC arc, due to high-resistive path (ground) and arc opening and reclosing with minimum potential error (i.e.
potential (series) as in Fig. 3d, the differential fault current shows synchronisation problem), an effective communication measure is
very low detection peak as shown in Figs. 5b and 11a. During PV required. The proposed unit protection requires measured DC
series arc fault transient instance, if arc potential is higher than the voltage (Vdc1, Vdc2) and current (Idc1, Idc2) samples from both sides
Vdc1, the flow of Idc3 might get reverse path, which will lead to
of protection zone to be communicated to the protective relay.
complexity in fault detection. The CuSum index during this fault is Owing to lack of standard, to support futuristic fast relaying
significantly less and thus easy to design in fault classification operation (international electrochemical commission (IEC)-61850),
algorithm. Moreover, to implement CuSum detection in a open standard with plug and play integration approach is needed to
computational platform, power amplifier is needed to reduce the be considered. Here, the DC switching delay is considered where
actual fault current magnitude to a very low-level suitable for communication delay is neglected. For the proposed system, 2000
electronic instrumentation. Thus, based on only fault current samples are collected each second from all measured quantities.
magnitude, series arc fault detection might become erroneous. According to IEC-61850 standard (up to 64,000 bits/s), this
Thus to avoid this, the fault classification is done by binary tree sampling rate with minimum of 16 bit channel will be sufficiently
(BT) classifier by investigating polarity of fault current (y1) and fast for the proposed protection. This work will incorporate with
CuSum threshold (y2) as shown in (14) detailed communication standard study in future scope.

3.3 Adaptive detection threshold calculation

During utility grid-connected mode of steady-state operation is
directly compensated the AC/DC local loads. However, during
faults, the threshold limits (i.e. maximum and minimum) are varied
according to the PV penetration level. Initial PV (rated)
contribution will remain for standard test condition (1000 W/m2,

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Fig. 6  Adaptive threshold calculation for utility interactive DC microgrid protection
(a) Threshold variation during PP faults, (b) Threshold variation during PG faults, (c) Threshold detection during PP faults, (d) Threshold detection during PG faults

Table 3 CuSum detection threshold variation during PP faults

G1 G2 G3 G4 Idc, amp CuSum index (maximum) CuSum index (minimum)
100 100 100 100 316 2150 260
175 200 225 250 320.95 2200 265
250 275 300 325 324 2325 275
350 375 400 425 330.6 2400 285
400 450 500 525 335 2450 290
475 545 590 600 339 2480 295
560 640 680 700 348 2500 300
600 750 800 850 350 2550 325
775 850 900 950 355 2650 335
900 950 1000 875 358.5 2700 338
1000 1000 1000 1000 364 2800 340

Table 4 CuSum detection threshold variation during PG faults

G1 G2 G3 G4 Idc, amp CuSum index (maximum) CuSum index (minimum)
100 100 100 100 129 1600 750
175 200 225 250 130.5 1610 754
250 275 300 325 131 1620 760
350 375 400 425 132 1650 765
400 450 500 525 132.85 1590 770
475 545 590 600 133 1580 730
560 640 680 700 133.5 1550 725
600 750 800 850 133.8 1570 715
775 850 900 950 138.5 1500 710
850 950 900 950 140 1498 708
1000 1000 1000 1000 142.5 1490 705

25°C) and inconsistency of solar irradiation throughout the day maximum and minimum thresholds are drawn for both faults, as
will contribute to the maximum and minimum detection thresholds shown in Figs. 6a and b, respectively. Fault resistance (Rf) is
(i.e. differential over current during faults, Idc3). As the direct subjected to a change of 0.5–2 Ω for PP and PG faults where the
reflection of PV generation variation can be noted from common arc fault reactance (xarc) deviation is considered 5–30 Ω, calculated
DC bus current (Idc), it is considered for determining the threshold according to arc energy [(7) and (8)].
limit in an adaptive manner, for the proposed multiple PV-based To calculate detection threshold dynamically during variation in
system. In Tables 3 and 4, the threshold changes are recorded for solar irradiation, a PCHP interpolation scheme is adopted. PV
PP and PG faults, respectively, when PV irradiation is altered from generation variation is reflected through Idc and by varying PV
maximum (1000 W/m2) to minimum (100 W/m2). Similar study is irradiation for four parallel PV systems, in Fig. 2, the maximum
conducted for PV-side DC arc faults. From Tables 3 and 4, and minimum threshold values are obtained from PCHP

784 IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790
© The Institution of Engineering and Technology 2017
interpolation [12] technique, where two 11th-order (as in Table 3) cable parameters vector is ZDCЄR3×1 and input DC voltage vector
system of linear equation are expressed for CuSum detection is VDCЄRn×1. Thus, (16) and (17) can be represented as
threshold as functions of DC current (Idc). In a cubic hermite
interpolation each piece is expanded as third degree polynomial in IDC × ZDC = V DC (18)
hermite form, where resulting spline is continuous with first
derivative and can be expressed for given interval (zk, zk+1) as in
To obtain ZDC from the above (18), a Moore–Penrose pseudo-
(15) +
inverse, [I DC] is implemented as
F z = h00 m Fz, k + h10 m zk + 1 − zk tk
(15) ZDC = V DC IDC
+
(19)
+h01 m Fz, k + 1 + h11 m zk + 1 − zk tk + 1
The available data samples are assumed to be M and n number
where m = ((z − zk)/zk + 1 − zk); moreover, h is the hermite basis
of samples, used for each set (chunk) of this incremental learning
functions; tk is the starting tangent and tk+1 is the ending tangent. of unknown cable parameters. Minimum learning sequence with
Thus, the polynomial coefficients are obtained as a simultaneous adaptive updating of ZDC is effective for accurate calculation of
solution from the system of polynomial equations. +
fault location. For Moore–Penrose approach, pseudo-inverse [I DC ]
For the proposed scheme, dynamically calculated threshold
parameters are depicted in Figs. 6c and d. The proposed adaptive is calculated from given n number of data chunk as
detection of CuSum index is estimated accurately by the piecewise −1
cubic hermite polynomial (PCHP) algorithm. After effective
+
I DC(n) = I TDC(n) τI + I DC(n) × I TDC(n) = I TDC(n) × M (20)
detection of DC faults for the proposed network, the distance of
fault occurrence is also estimated from same differential current- where IT is the conjugate transpose of IDC, I is the identity matrix
based protection scheme as discussed in Section 4. and τ is the coefficient with small value. This approach will
calculate the actual value of line resistance during fault (R1). Initial
4 New fast fault distance estimation chunk might have some noisy data and calculation error might be
As shown in Fig. 2, the differential current measured from both more. To reduce this error, adaptive ZDC is obtained from
sides of the fault point (F1) is used to obtain fault distance through simultaneous chunks of another n samples from total M number of
a non-iterative adaptive Moore–Penrose pseudo-inverse solution. samples. The calculated R1 is obtained effectively within 2–5
The differential equations expressed in (4) and (10) are considered simultaneous chunks for the proposed DC microgrid-based fault
for the fault location in the proposed DC microgrid. For PP and PG distance calculation. For this chunk-by-chunk approach, pseudo-
faults (4) and for PV-side arc fault and (10) are used for distance inverse M is calculated for the kth chunk as
calculation, based on decision flag (Dscn_flg). The differential
current-based second-order system in (4) derived from DC cable M(k + 1) = M(k) − M(k)I TDC(k + 1) I + IDC(k + 1)
equivalent resistor-inductor-capacitor (RLC) network in Section 3 −1
(21)
can be rewritten as matrix formation in terms of n number of × M(k)I TDC(k + 1) IDC(k + 1)M(k)
measured samples [i.e. Vdc1(kΔt), Vdc2(kΔt), Idc1(kΔt) and
Idc2(kΔt)] Now, the unknown cable parameters are updated adaptively as
described in (22)
I dc1(k) I dc1(k) − I dc1(k − 1) I dc3(k) + I dc1(k + 1)
ZDC(k + 1) = ZDC(k) + M(k + 1)I TDC(k + 1)
I dc1(k + 1) I dc1(k + 1) − I dc1(k) I dc3(k + 1) + I dc1(k + 2) (22)
× V DC(k + 1) − IDC(k + 1)ZDC(k)
⋮ ⋮ ⋮
I dc1(n) I dc1(n) − I dc1(n − 1) I dc3(n) + I dc1(n + 1) where k is the number of chunks. Now, fault distance is calculated
R1Δt (16) from measured R1 and unit resistance of cable (Rcable/km). As in
V dc1(kΔt)
L1 Fig. 3, it is clear that the DC cable fault path is parallel to shunt
V dc1 (k + 1)Δt cable capacitance (C1) which provides transient snubber reactive
Δt =
⋮ path. This reactance will be minimum during PP fault, but during
x PG fault the reactance approach could give the cable distance
C1Δt V dc 1
(nΔt)
resistance (R1) value erroneously. In result discussion section,
Tables 5 and 6 provide similar conclusion. Fig. 7 represents the
For PV arc fault, (10) can be expressed similarly with n number fault detection parameters by the proposed method, where Fig. 7a
of sample values shows the trip time (Ts) and actual fault duration, Figs. 7b–d depict
the various parameters considered within trip time to calculate
I dc1(k) I dc1(k) − I dc1(k − 1) I dc3(k) R1Δt distance.
I dc1(k + 1) I dc1(k + 1) − I dc1(k) I dc3(k + 1) L1 Normally, high-frequency switching is adopted for converter
application, where different nodes of it can generate high-
⋮ ⋮ ⋮ Δt
amplitude switching noise (i.e. few hundred kHz to few MHz) [10,
I dc1(n) I dc1(n) − I dc1(n − 1) I dc3(n) x2Δt 17]. This high range of noise can contribute to a false detection,
(17) sympathetic tripping etc. for conventional fault detection;
V dc1(kΔt) − V arc(kΔt) × sign V arc(kΔt) especially, during low-fault current magnitudes (DC arc faults).
V dc1 (k + 1)Δt − V arc((k + 1)Δt) × sign V arc((k + 1)Δt) The proposed detection method is performed successfully during
= the effect of this noise, and is discussed in Section 5.5.2. However,
⋮ the effect is visible for distance calculation error, which is
V dc1(nΔt) − V arc(nΔt) × sign V arc(nΔt) increased for the proposed technique during noisy channel
operation. The solution to it is increased number of samples (M),
From the above expression, Moore–Penrose pseudo-inverse which leads to a higher Ts value. This problem will be focused in
scheme is implemented to estimate unknown R1 and L1 values. For future scope of this paper.
this consideration, input current matrix is IDCЄRn×3, unknown

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Table 5 Percentage error in fault location calculation for PP validate the proposed protection scheme. Detection of DC series
fault arc fault and effectiveness of circuit breakers during noise are
Fault distance, kms Fault resistance, Ω presented in Section 5.5.
0.5 1 1.5 2
ε, % ε, % ε, % ε, % 5.1 Case 1: PP fault analysis for DC motor load
0.5 0.320 1.081 3.206 5.980 DC motor load is highly preferable during PV-based pumping
0.75 0.326 1.702 3.387 4.388 system applications. This DC load is effective for rural/ suburban
1 0.201 0.635 1.646 3.238 DC distribution network and hence considered for this case study
1.25 0.198 0.725 1.640 2.825 as mentioned in Table 1. The motor load cable distance is
1.5 0.310 0.601 1.486 2.706
considered as 3 km, where fault location F2 is varied from 0.5 to 3 
km, to check the effectiveness of the proposed scheme. The fault
1.75 0.091 0.864 1.363 2.363
resistance (Rf) is considered to be varied from 0.5 to 2 Ω for
2 0.090 0.732 1.360 2.360
present focus. The fault is created at instance t = 1 to 1.5 s.
2.25 0.086 0.642 1.286 2.219 Various parametric variations are given in Fig. 8. The trip time
2.5 0.076 0.555 1.238 2.140 is obtained as 65 ms, as evidenced the fastness of the proposed
2.75 0.064 0.418 1.224 1.923 protection irrespective of loading condition. As in Fig. 8b, the PP
3 0.262 0.360 1.182 1.826 fault occurred inside the protection zone and thus CuSum(Idc3) > 
CuSum(Idc,avg) for this internal fault. Selectivity of the proposed
CuSum is evidenced in Figs. 8c and d, for external PP fault at point
Table 6 Percentage error in fault location calculation for PG Fext, Fig. 2a, where CuSum (Idc3) < CuSum (Idc,avg). The proposed
fault detection scheme successfully segregates the protection zones.
Fault distance, kms Fault resistance, Ω
0.5 1 1.5 2.0 5.2 Case 2: PG fault analysis for DC lamp load
ε, % ε, % ε, % ε, %
The considered lamp load parameters are mentioned in Table 1,
0.5 0.486 1.181 3.306 6.242 where DC cable connecting the load to common DC bus is
1 0.401 0.835 2.424 5.380 mentioned in Table 2. At time t = 1 to 1.5 s, PG fault is subjected at
1.5 0.368 0.748 2.210 4.862 F1 for DC lighting load. The variation of fault resistance, Rf and
2 0.321 0.736 1.894 4.121 distance (i.e. 0.5–2 Ω and 0.5–3 km, respectively) is considered for
2.5 0.312 0.595 1.468 3.452 this case and the result verification is depicted in Fig. 9. From
3 0.284 0.410 1.210 2.424 Fig. 9a the trip time is obtained as 48 ms. Similar selectivity study
of CuSum index is shown in Figs. 9b–d where for internal PG fault
CuSum(Idc3) > CuSum(Idc,avg), but for external fault at point Fext,
CuSum(Idc3) < CuSum(Idc,avg). The proposed protection is effective
5 Result analysis
from error detection.
To evaluate the effectiveness of the proposed unit protection
scheme by reducing the fault trip time (Ts) and improving accuracy, 5.3 Case 3: DC ground arc fault for PV system
a multiple DGs based AC utility integrated low-voltage DC
distribution network with different DC loads (Table 1: DC lamp DC ground arc faults are very difficult to measure due to their low
load, DC motor load) is simulated in MATLAB environment. detection threshold. The series and ground arc are almost similar
Various possible fault conditions (case 1: PP; case 2: PG and case due to low-fault current level through high-resistive (ground), high
3: DC ground arc fault) are implemented in Section 5.1−5.3 to arc potential (series) paths. DC arc reactance (xarc) is considered as

Fig. 7  Differential current-based fault distance measurement

(a) Actual fault duration and fault duration to calculate distance, (b) Fault current considered for distance measurement for DC lamp load, (c) Fault current considered for distance
measurement for DC motor load, (d) DC voltage (Vdc) during fault

786 IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790
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Fig. 8  Effective fault protection during PP fault to the DC motor load
(a) Trip time (Ts) of DC switches with fault current (Idc3), (b) CuSum index for Idc3 and Idc,avg for internal fault, (c) Differential current (Idc3) and CuSum of Idc3 for external
fault, (d) CuSum(Idc3) < CuSum (Idc,avg) for external fault

Fig. 9  Variation of DC network parameters during PG fault for DC lighting load

(a) Trip time (Ts) of DC switches with fault current (Idc3), (b) CuSum index for Idc3 and Idc,avg for internal fault, (c) Differential current (Idc3) and average current (Idc,avg) for
external fault, (d) CuSum(Idc3) < CuSum (Idc,avg) for external fault

20 Ω where arc potential is considered 10% of Vdc1 during fault. fault error variation is recorded similarly for the proposed
DC current and various voltage parameters are shown in Fig. 10. protection measure. The range of error variation for PG is high as
The trip time is obtained as 96 ms and is shown in Fig. 10a. compared with PP fault. The calculated percentage of error is less
For DC ground arc, the proposed protection is effective as for as compared with existing PPU [10] method.
external arc fault at point Fext, CuSum(Idc3) < CuSum(Idc,avg) The percentage of error is calculated as given in (23)
which avoids false detection.
dcal − dact
%ε = × 100 (23)
5.4 Comparative analysis dact

The proposed fault protection scheme is effective in terms of where dcal is calculated distance and dact is actual fault distance.
accurate fault distance calculation as shown in Tables 5 and 6.
Table 5 shows error variation for PP fault where error is high for
short-distance faults and increased Rf values. In Table 6, for PG

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© The Institution of Engineering and Technology 2017
Fig. 10  Variation of DC network parameters during DC ground arc fault for PV1 system
(a) Trip time (Ts) of DC switches with fault current (Idc3), (b) Input DC voltage (Vdc1) to the load, (c) Differential current (Idc3) and average current (Idc,avg) for external fault, (d)
CuSum(Idc3) < CuSum (Idc,avg) for external fault

5.5 Hardware validation at TMS320 C6713 digital signal works comfortably. In the proposed scheme, the series arc is
processor (DSP) platform detected by CuSum-based amplified detection peak and local
circuit breakers, to avoid AFCI burden.
A test bench simulation is achieved for the proposed DC microgrid
protection scheme, through efficient 32 bit DSP, TMS320C6713
[18]. The proposed CuSum-based detection and Moore–Penrose 5.5.2 Circuit breaker operation and converter noise: GFCIs
pseudo-inverse fault distance solution is obtained as a function on are able to detect very small leakage current (mA) within 200 ms
TMS320 DSP Starter Kit with the help of embedded MATLAB trip [5] and considered for DC arc fault detection by NEC.
coder. The test bench system is proposed for validation of the fault According to underwriters laboratories (UL) 1699B (article 690 of
detection scheme for DC series arc faults; and influence of noisy NEC), AFCI devices are mandatory for implementation of any PV
converter channel. system. Asea Brown Boveri (ABB) circuit breakers (S800PV-S)
for direct current applications, are well suited for DC microgrid (< 
1 kV) operations and hence considered for the proposed detection
5.5.1 Series arc for PV system: DC arc faults are treacherous scheme validation. A 1 km PP fault with fault resistance 0.5 Ω is
phenomena for DC cables, due to the high stored energy and the subjected for the proposed DSP test bench at t = 1 s to 1.45 s, as in
temperature rise (i.e. fire hazard) at arc point. Standard circuit Fig. 12a. The circuit breaker tripped successfully within 100 ms;
breakers, GF circuit breakers are generally failure to detect this moreover, the semiconductor switching off transient shows a small
event due to impedance limited, below threshold fault current level. reverse recovery characteristic, as shown in Fig. 12b. A reclosing
DC arcing is a spark across air or another dielectric, and PV event is subjected after fault clearance with a restricting current
systems are prone to this event due to various series, parallel [20] for <40 ms. The recommended standards (Indian standards
configured modules, arrays in a small distanced area. With a (IS)/IEC 60947-2, 2003) are followed [21] by S800PV-S for
broken connection, leaving two adjacent cables in a junction box, commercial circuit breaker operation in the distribution level
between modules and within modules are possible sources for networks. The detailed characteristic of S800PV-S circuit breaker
series arc. Two different voltage cable points within a module or is presented in [22]. From the tripping characteristic the delay time
array, especially with compromised parallel cable insulation is (total switch-off time) for this DC switch is found to be <2.5 ms for
potential source of parallel arc. Limited fault current is produced 1.2 kV DC link. For a trip time range within 100 ms (i.e. the
by series arc due to the load with which it is in series, while proposed scheme) this switching delay is included as mentioned in
parallel arc can absorb high current, as much as the source is Section 3.2. For capacitor-based protection [23], the maximum
capable to supply. Disorganised array, module operations, failure of discharging time of capacitor current is recorded in microsecond
bypass diode etc. may cause due to these arc faults. range, which is negligible for this scheme.
For the proposed detection scheme, series arc faults are well High-frequency converter switching introduces noise to the
distinguished by the proposed CuSum calculation as shown in system operation (discussed in Section 4) and may cause false
Fig. 11b. Though the fault current level (Idc3) is very minimum detection, sympathetic tripping etc. The range of such noise varies
with fault resistance of 25 Ω (Fig. 11a) for a series arc at t = 0.75 s from few hundred kHz to few MHz, and thus 30−60 dB noise is
to 1.5 s, BT detection scheme detects the fault due to significant subjected to the DSP-based test bench validation as shown in
CuSum index. However, for parallel arc, the high current flow trip Fig. 12c. In this figure, fault current with noise (30 dB) is obtained
the backup breaker (conventional, AFCI) before the proposed fault from DC converter output, and subjected to the proposed detection
detection scheme. The details of AFCI interfacing and its effect for scheme. The effective detection and circuit breaker tripping is
PV-based converter operation are discussed in [5]. Detection of DC validated in Fig. 12d, where 60 dB noise is subjected. The noise
series arc (i.e. low-fault current detection peak, more heating) by distortion and false trip of circuit breakers are well described in the
AFCI is disadvantageous due to challenges related to literature. Fast disconnection in DC lines can be achieved by fuses
electromechanical air gap, calibration control, and requirement of and mechanical switches. The slow response is the main drawback
constant replacement of electrode. To overcome these, extra of these methods. To cope with this problem, the semiconductor
apparatus and methods are to be needed [19]. However, for DC circuit breaker has been paid attention [24]. Furthermore, the noise
parallel arc (i.e. high-fault current overshoot in a short span) AFCI generated during circuit breaker switch cut-off can be suppressed
788 IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790
© The Institution of Engineering and Technology 2017
Fig. 11  Different DC arc faults characteristic at PV arrays
(a) Differential fault current (Idc3), (b) CuSum index with Idc3 for series arc, (c) Voltage deviation (Vdc) during series arc, (d) Differential fault current (Idc3) for parallel arc fault
scenario

Fig. 12  Performance of the proposed scheme during PP fault with fast DC switching
(a) Actual differential current (Idc3), (b) Differential current (Idc3) trip with restricting current at reclosing, (c) Differential current with permissible noise input (30 dB), (d) Effective
circuit breaker trip during noisy (60 dB) differential current

apparently by applying bypass capacitor [25], to avoid Moore–Penrose pseudo-inverse techniques. This protection scheme
malfunction. The proposed circuit breaker trips effectively for is proposed for a multiple PV-based MTDC low-voltage
30−60 dB noise (maximum allowable range). distribution network connected with utility. As various high-
frequency power electronics converters of the DGs are connected
6 Conclusion to the common DC bus, fast fault detection is essential for
protecting the power electronic converters. The proposed
A new differential current-based fault detection and distance protection scheme is subjected to different faults such as PP, PG
calculation scheme is proposed in this paper based on CuSum and
IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790 789
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790 IET Renew. Power Gener., 2017, Vol. 11 Iss. 6, pp. 778-790
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