Esc201: Introducton To Electronics: Sinusoidal Steady State Analysis
Esc201: Introducton To Electronics: Sinusoidal Steady State Analysis
1
Recap
Canonical Form x(t ) xm cos(t )
Phase difference is usually considered between -180 to 180o
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Average Power Vrms
Vrms
Vm Vm2
pavg pavg
R 2 2R
Im 1 2
I rms pavg Im R
2 2
Phasor
v(t ) Vm cos(t ) Vm
2
Recap Complex Impedances
Inductor
VL I L Z L Z L j L
3
Resistor R
v(t)
v(t)
j20 50
Z L j L
VS 245 V 5
Example-5 contd.
50+j20
Zeq
VS 245 V
245 245
I 0.03723.2 A
50 j 20 53.8521.8
6
j20 50
VS 245 V
50
VR 2 45 V
50 j 20
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Capacitor
v(t ) VM cos(t )
dvc
ic C
dt
VC VM I C CVM 90
In a capacitor, current leads voltage by 900 8
Capacitor
VC VM
I C CVM 90
I C C90 VM
I C jCVC
1 1
VC I C ZC ZC j
jC C
9
10
Example-6
11
12
A
13
V
VS 10030
I 0.707 15
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Example-7
15
V
V
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Currents Z RC 50 j 50
A
A
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Example-8
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19
Example-9
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21
Example-10
22
23
25
Superposition Theorem is also applicable for independent
sinusoidal sources
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27
Example-11
28
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Power dissipation in RLC Circuits
For Resistance T
v (t ) 2 1 v(t ) 2
0 R dt
R
p pavg
R T
v(t) 2
Vrms
pavg
R
Vm
Vrms
2
pavg I rms
2
R
Im
I rms
2 30
L
v(t)
pavg 0
31
C
v(t)
pavg 0
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General Rule v(t ) VmCos(t )
i(t ) I mCos(t )
T
1
p
T v(t ) i(t )dt
0
0.1
I Rrms 0.071
Where is this power dissipated? 2
L Power
v(t)
Meter
pavg 0
Rwire
L Power
v(t)
Meter
Power is dissipated and
somebody has to pay for it.
Rwire 36