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High-Temperature Operation of Normally Off-Mode AlGaN/GaN Heterostructure Field-Effect

Transistors with p-GaN Gate

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2011 Jpn. J. Appl. Phys. 50 01AD03

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Japanese Journal of Applied Physics 50 (2011) 01AD03 REGULAR PAPER
DOI: 10.1143/JJAP.50.01AD03

High-Temperature Operation of Normally Off-Mode AlGaN/GaN Heterostructure

Field-Effect Transistors with p-GaN Gate
Takayuki Sugiyama1 , Hiroshi Amano1 , Daisuke Iida2 , Motoaki Iwaya2 , Satoshi Kamiyama2 , and Isamu Akasaki2
1
Graduate School of Engineering, Nagoya University, Nagoya 464-8603, Japan
2
Faculty of Science and Technology, Meijo University, Nagoya 468-8502, Japan
Received April 30, 2010; accepted August 20, 2010; published online January 20, 2011

We demonstrated the high-temperature operation of normally off-mode heterostructure field-effect transistors (HFETs) with a p-GaN gate. The
HFETs with a p-GaN gate were operated in the normally off mode at 350  C. The temperature dependence of their performance was compared
with the results of simulation. # 2011 The Japan Society of Applied Physics

1. Introduction
AlGaN/GaN heterostructure field-effect transistors (HFETs)
are promising for application to high-efficiency power-
switching devices because of their high breakdown electric
field and the high-density and high-mobility two-dimen-
sional electron gas (2DEG) at the interface between AlGaN
and GaN. The normally off-mode operation of high-power
devices is necessary to realize a fail-safe system. However,
most reported AlGaN/GaN HFETs are operated in the
normally on mode. Normally off-mode AlGaN/GaN HFETs
with a p-type gate were previously reported by us and also
by Uemoto et al.1–4) In these structures, it is easy to precisely
control the threshold voltage reproducibly because a gate
p–n junction is grown in an organometallic vapor-phase
epitaxy (OMVPE) reactor at one growth. The high-
temperature operation of high-power switching devices is
also expected because the band gap energy of GaN is larger
than that of Si; therefore, GaN-based devices are stable
compared with Si-based devices at high temperatures. Si- Fig. 1. (Color online) Schematic view of AlGaN/GaN HFETs with p-GaN
gate.
based devices could not be operated above 200
C; thus,
a large heat radiator system is necessary for high-power
switching devices because of their large self-heating value.
A simple cooling radiator system and high-efficiency 10%) and O2 was used as the etching gas. O2 is used to
devices are expected using GaN-based FETs. In this study, improve the selectivity of the etching rates of p-GaN and
we characterized the performance of the HFETs with a AlGaN.7) The flow rates of Ar+Cl2 and O2 were 19 and
p-GaN gate at high temperatures and simulated their 1 sccm, respectively. After the etching, the sample was
characteristics with self-heating and mobility models in the treated with hydrofluoric acid. The gate metal used for the
device simulator ATLAS (Silvaco). ATLAS solves the ohmic contact to p-GaN was Ni/Au, while Ti/Al/Ti/Au
Poisson equation, current continuity equation, and equation was used as the source–drain ohmic contact. The gate length
of heat conduction using a finite element method. The details (LG ), gate width (WG ), and the distance between the drain
of ATLAS and material parameters are shown in refs. 5 and and the source (LDS ) were 2, 100, and 8 m, respectively.
6. We clarified the mechanism of the temperature de- The gate metal was placed at the center of the source and
pendence of the performance of normally off-mode AlGaN/ drain electrodes. A SiNx thin film of 5 nm thickness was
GaN HFETs with a p-GaN gate. deposited by magnetron spattering. Finally, sapphire was
thinned to improve the thermal conduction. The total
2. Experimental Procedure thickness of the sample was 100 m. The sample was placed
Figure 1 shows the device structure. The devices were on a heating stage, and its characteristics were measured
grown by OMVPE on a sapphire (0001) substrate. After in the temperature range from room temperature (RT) to
depositing a low-temperature-deposited buffer layer, an 350
C. Characteristics of HFETs with p-GaN were simu-
unintentionally doped GaN layer (2 m), an unintentionally lated using ATLAS. Figure 2 shows the details of the device
doped Al0:3 Ga0:7 N layer (10 nm), and a Mg-doped p-GaN structure for simulation. The residual donor concentrations
layer (60 nm) with a Mg concentration of 3  1019 cm3 of u-AlGaN and u-GaN were assumed to be 1016 and
were grown. After the growth, the wafer was removed from 1013 cm3 respectively, which were deduced from the C–V
the reactor and annealed at 650
C for 5 min in air to activate profiles of the undoped AlGaN and GaN. In the simulation,
Mg. Next, the sample was etched for mesa isolation by Cl2 - deep acceptor levels with the concentration of 1015 cm3
based reactive ion etching (RIE). The p-type gate was were also introduced in u-GaN to suppress drain current
formed by the RIE of the p-GaN. A mixture of Ar+Cl2 (Cl2 : leakage. The contact resistances of the source, drain, and
01AD03-1 # 2011 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 50 (2011) 01AD03 T. Sugiyama et al.

RT 150°C 300°C
0.3

0.2

IDS [A/mm]
0.1

0.0
0 5 10 15
VDS [V]

Fig. 3. Experimentally obtained FET characteristics with VGS ¼ 0{4 V.

RT 150°C 300°C
0.3
Fig. 2. (Color online) Schematic view of simulated AlGaN/GaN HFET with
p-GaN gate.

IDS [A/mm]
0.2

gate electrodes were also assumed to be 105 , 105 , and

104 cm2 , respectively, which were experimentally esti-
0.1
mated using a transmission line model. A Farahmand
Modified Caughey Thomas (FMCT) carrier mobility model
was used for device simulation.5) The device characteristics
were simulated from RT (27
C) to 300
C with the self- 0.0
0 5 10 15
heating effect. VDS [V]
3. Results
Fig. 4. Simulation results of FETs characteristics with VGS ¼ 0{4 V.
Figures 3 and 4 show the static FET characteristics obtained
by experiment and simulation, respectively, at RT, 150
C,
and 300
C. The gate–source bias is varied from 0 to +4 V
with an interval of 1 V. The drain current (IDS ) decreased µ FMCT
IDS MAX Experimental results
with increasing temperature. At a high drain-source bias µ pop
(VDS ), IDS is reduced by self-heating. The experimentally IDS MAX Simulation results
obtained results are in good agreement with the simulation 300 1500
results. However, the VDS (V) at IDS ¼ 0 (A/mm) shifts
from zero to a higher value with increasing VGS . The isolated
IDS MAX [mA/mm]

µ [cm /V s]

mesa etch and overlaid gate metal on AlGaN barrier acts 200 1000
as gate leakage pass of the real HFETs; therefore, the gate
2

currents flow toward the drain, resulting in a negative IDS at

VDS ¼ 0 V. The gate metal overlaid by mask misalignment 100 500
on AlGaN is shown in Fig. 1. The experimentally obtained
IDS values are lower than the simulation results obtained at
RT , and resistance is higher, because 2DEG sheet resistance
0 0
in experimental devices is higher than that in the simulation 0 100 200 300 400
model. The high sheet resistance was caused by etching
Stage Temp. [°C]
damage and overetching of the AlGaN barrier in experi-
mental HFETs with a p-GaN gate. Figure 5 shows the
Fig. 5. Temperature dependences of IDS,MAX , FMCT , and pop .
experimentally obtained and simulation results for the
temperature dependence of maximum drain current
(IDS,MAX ) for HFETs with a p-GaN gate and the 2DEG
mobility estimated using the FMCT (FMCT ) carrier mobility scattering are minor.8) It should also be noted that the
model. IDS,MAX and FMCT decrease with increasing temperature dependence of the 2DEG sheet carrier density is
temperature. The electron mobility of the 2DEG at the weak. Therefore, the decrease in IDS,MAX with increasing
AlGaN/GaN interface is mainly limited by polar optical temperature and the temperature dependence of FET char-
phonon scattering (pop ) above RT and the other effects of acteristics are induced by polar optical phonon scattering.
01AD03-2 # 2011 The Japan Society of Applied Physics
Jpn. J. Appl. Phys. 50 (2011) 01AD03 T. Sugiyama et al.

RT 150°C 300°C 2.0

0.020

1.5
0.015
VDS=5V

Vth [V]
1.0

0.010
0.5

0.005
0.0
0 100 200 300 400
0.000 Stage Temp.[°C]
0.0 0.5 1.0 1.5 2.0
VGS[V] Fig. 8. Temperature dependence of Vth in experiment.

Fig. 6. Experimentally obtained IDS –VGS characteristics at Vth .

dependence of the performance of normally off-mode
HFETs with a p-GaN gate. It should be emphasized that
the HFETs can be operated in the normally off mode
RT 150°C 300°C
above 300
C. The temperature dependence was simulated
0.020
by TCAD and found to be in good agreement with the
experimental results. Therefore, we can conclude that the
0.015 decrease in drain current with increasing temperature is
VDS=5V induced by polar optical phonon scattering. The experimen-
tally obtained and simulation results show that the Vth of
0.010
the HFETs with a p-GaN gate decreases with increasing
temperature. However, the Vth shift of the HFETs with a
0.005 p-GaN gate is as small as 0:1 V/100
C.

Acknowledgements
0.000 This work was supported by the New Energy and Industrial
0.0 0.5 1.0 1.5 2.0
Technology Development Organization Project, Nanotech-
VGS [V]
nology and Materials Technology, ‘‘Development of Nitride-
Based Semiconductor Single Crystal Substrate and Epitaxial
Fig. 7. Simulation results of IDS –VGS characteristics at Vth .
Growth Technology’’, and the second-stage Knowledge
Cluster Initiative, Tokai Region Nanotechnology Manufac-
turing Cluster in Japan.
Figures 6 and 7 show the experimental and simulation
results of IDS –VGS characteristics. Both experimentally
obtained and simulation results show that the threshold
voltage (Vth ) decreases with increasing temperature. We 1) N. Tsuyukuchi, K. Nagamatsu, Y. Hirose, M. Iwaya, S. Kamiyama, H.
Amano, and I. Akasaki: Jpn. J. Appl. Phys. 45 (2006) L319.
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Wg " Akasaki: Jpn. J. Appl. Phys. 45 (2006) 1048.
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2Lg d I. Akasaki: Jpn. J. Appl. Phys. 46 (2007) 115.
4) Y. Uemoto, M. Hikita, H. Ueno, H. Matsuo, H. Ishida, M. Yanagihara, T.
Figure 8 shows the experimental temperature dependence Ueda, T. Tanaka, and D. Ueda: IEEE Trans. Electron Devices 54 (2007)
of Vth . The Vth of GaN-based HFETs slightly decreases with 3393.
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01AD03-3 # 2011 The Japan Society of Applied Physics