Laying the Groundwork

1 The Big Picture

The Information Layer

2 Binary Val ues and Number Systems
3 Data Representation

e
4 Gates and Circuits
5 Computing Components

The Programming Layer

6 Low-Level Programming Languages and Pseudocode
7 Problem Solving and Algorithms
8 Abstract Data Types and Subprograms
9 Object-Oriented Design and High- Level Programming Languages

The Operating Systems Layer

10 Operating Systems
11 File Systems and Directories

The Applications Layer

12 Information Systems
13 Artificial Intelligence
14 Simulation, Graphics, Gaming, and Other Applications

The Communications Layer

15 Networks
16 The World Wide Web
17 Computer Security

In Conclusion
18 Limitations of Computing
 GATES AND
CIRCUITS
Computers are electronic devices; the most fundamental hardware ele-
ments of a computer control the flow of electricity. In a very primitive
sense, we use technology to harness the power of a lightning bolt, bend-
ing it to our will so that we can perform calculations and make decisions.
This chapter dances the fine line between computer science and electrical
engineering, examining the most basic hardware elements in a computer.
In Chapter 2, we looked at number systems in general and at the
binary number system in particular. As we saw in Chapter 3, the binary
number system is of special interest because it is used to represent data in a
computer. In this chapter, we explore how computers use electrical signals
to represent and manipulate those binary values.

After studying this chapter, you should be able t o:

• identify the basic gates and describe the behavior of each.

• describe how gates are implemented using transistors.
• combine basic gates into circuits.
• describe the behavior of a gate or circuit using Boolean expressions, truth tables,
and logic diagrams.
• compare and contrast a half adder and a full adder.
• describe how a multiplexer works.
• explain how an S-R latch operates.
• describe the characteristics of the four generations of integrated circuits.

93
 ~~-vc·~,..-.- ,.,.~ H • '" ,....,. ~~ ~. ~ ~,.....,.. ,,,.- ~....- ~,. ... :-: '"";~~ ~"V;' .,.. • ,. " .,,..

•
94
Chapte1 Gates and Circuits

Gate A device Computers and Electricity

that performs a
basic operation on Any give n e lectron ic sig na l has a le vel of voltage. As we m entio ned in the
electrical signals, last chapte r, we distinguish betwee n the two values of interest (binary 0
accepting one or and I) by the voltage level of a signal. ln genera l, a voltage level in the
more input signals range of 0 to 2 volts is considered "low" and is interpreted as a bin a ry 0. A
and producing a
sig nal in th e 2- to 5-vo lt ra nge is considered "hi gh" and is interp re ted as
single output signal
a binary I. Signa ls in a computer are constra ined co be w ithin o ne range
Circuit A combination or the othe r.
of interacting A gate is a device that performs a ba sic o pe rati o n on electri cal signals.
gates designed to
It accepts one o r more in put sign als and produces a single output signal.
accomplish a specific
Severa l types of ga tes exist; we exa mine th e six most fundamenta l types
logical function
in this chapter. Each type o f gate pe rforms a pa rticula r logica l function.
Boolean algebra Gates are combined in to circuits to perfo rm more complicated tasks.
A mathematical For example, circuits ca n be designed to perform arithmetic and to score
notation for
values. In a circuit, th e ompur value of on e gate ofte n serves as the input
expressing two-
valued logical
va lue for one o r more o th e r gates. The fl ow of e lectricity throug h a circuit
functions is controlled by th e ca re full y designed logic of the interact ing ga tes.
Th ree diffe rent, but equally powerfu l, notational m ethods are used to
Logic diagram describe the behav ior of ga tes and circui ts:
A graphical
representation of Boo lea n expressions
a circuit; each type Log ic dia grams
of gate has its own Tru th tab les
symbol
We examine al l three types of representation during o ur d iscussion of
Truth table A table gates and ci rcuits.
showing all possible The English math ematician George Boole invented a form of algebra
input values and the in which va ri ables and fun ctions take on on ly one of two poss ible va lues
associated output
(0 and 1 ). Th is algebra is appropria tely ca lled Boolean al gebra. Exp ressions
values
in this a lgebraic nota tion are an e lega nt and powe rfu l way LO de mon-
stra te th e activity of e lectrica l circuits. Specific operations a nd prope rties
in Boolean algebra allow us to defi ne and manipulate circuit logic using
a m athematical notation. Boolean expressions will come up again in our
discussions of the progra mming laye r in Chapters 6 th ro ugh 9.
A logic diag ram is a g rap h ica l re presen ta tion of a circuit. Each type
o f ga te is represented by a specific graphi ca l symbol. By connecting
those symbols in va rious ways, we can visually re prese nt the logic of an
entire circu it.
A truth table defines the function of a gate by listing all possible input
combinatio ns that th e ga te co uld en counter, a lo ng wit h corresponding
o utput. We can design m o re complex truth tab les with suffi cien t rows and
columns to show how entire circuits pe rform for any set of input va lues.
 95
4. 1 Computers and Electricity

George Boole 1

Boolean a lgebra is named fo r its inventor, geom e try) on which the

English ma thema tician George Boole, born in fi eld of sym bolic logic is
1815. His father, a tradesm an, began teaching builr. Boole drew on the
him m ath e matics at an early age. But Boole symbols and ope rations
was in itia ll y more inte rested in classica l li ter- of algebra in creati ng
at ure, languages, a nd re ligio n-interes ts he his syste m of logic. He
maintain ed throughou t his life. By th e time associated the value
he was 20, he had taught him self French, l with th e uni ve rsa l set (th e set representing
Ge rm an, a nd Ita lian. He was well versed in everything in th e uni verse) a nd th e va lue 0
the writings of Aristotle, Spinoza, Cicero, and wit h the empty set, a nd restri cted his system
Da nte, a nd wrote severa l ph ilosop hical papers to these quanti ties. He then de fined operations
himself. that are a na logous to subtraction, additio n, and
At 16 he took a positio n as a teaching as- mu ltiplicatio n.
sistant in a priva te sch ool to help su pport his In 1854, Boo le published An In vestigation of
fam il y. His wo rk there plus a second teaching the Laws of Thought; on Which Are Founded the
job left him little time to stu d y. A few yea rs Mathematical Theories of Logic and Probabilities.
late r, he opened a school and began to learn This book described theorems built o n his ax i-
hi gh er math ematics o n his own . In spite of o m s o f logic a nd extended th e a lgebra to show
his lack of fo rmal tra in ing, his fi rst scho la rl y how probabilities could be com puted in a log-
paper was publi shed in the Cambridge Mathe- ical system. Five years la te r, Boole published
matical Journal when h e was ju st 24. In 1849, Treatise on Differential Equations, followed by
h e was appointed professor of math e m atics at Treatise on the Calculus of Finite Differences. Th e
Queen 's Co llege in Co rk, Ire land. He became latter is o ne of the corn erstones of n u m eri-
cha ir of mathematics and spent the rest of his cal analys is, w hich deals with the accu racy of
ca reer th e re. Boole went o n to publis h more computations.
than 50 pape rs a nd several major works be - Boole received liule recog nition and few
fo re he d ied in 1864, at the peak of his ca reer. honors for his work. Given the importance of
Boole's The Ma1he111atical Analysis of Logic Boolean a lgebra in modern technology, it is
was pu bli shed in 1847. It wou ld eventu all y ha rd to belie ve th a t his syste m of logic was no t
fo rm th e ba sis fo r the deve lo pme n t o f digita l taken seriously u nti l the early twe ntie th ce ntu -
computers. In the book. Boole set forth the ry. George Boole was truly one of the founders
formal ax ioms of logic (much like the ax io m s of of compu ter science.
 r;y,.··~.· '• "'1• '·"· '~ ""f T" -

96
Chapter Gates and Circuits

-
Nanoscience and
nanotechnology are the
study and application of
extremely small things:
., Gates
The gates in a compute r are sometim es rderred to as logic gates because
each performs just one logical fun ction. That is, each gate accepts o n e or
mo re input va lues and produces a single ou tput va lue . Because we are
d ea ling w ith binary in fo rmati o n, each input a nd output va lue is e it h e r 0,
• There are 25,400,000 co rresponding to a low-voltage signal, o r I , correspo ndi ng to a high-voltage
nanometers in an inch. signa l. The type of gate a nd the input va lues de te rmin e the o utput va lue.
• A sheet of newspaper Let's exa mine the processing o f th e follow ing six types of gates. We
is about 100,000 th e n sh ow how they ca n be combined into circu its to perform arithme ti c
nanometers thick. opera ti ons.
• If a marble were NOT
a nanometer,
AND
one meter would be
OR
the size of the Earth. 2
XOR
NAND
NOR
In this book we have colo rized th e logic diag ram symbols for each gate to
he lp you keep track o f the va rious types . When we exa mine full ci rcuits
with many gates, th e colors w ill h elp yo u distinguish among th em. In the
rea l worl d, h owever, logic diag rams are typica ll y black a nd white, a nd the
gates are dis tin guis h ed only by their shape.

NOT Gate
A NOT gate accepts o n e input value and produces one output va lu e.
shows a NOT gate represented in three ways: as a Boolean ex -
pression, as its logical d iag ram sy mbol, and thro u gh a t ruth ta ble. In each
representation, the variable A rep rese nts the input signa l, w h ich is either
0 or I. The variable X represe nts the o utput sig n al, w h ose va lu e (0 or 1)
is de termined by th e val u e of A.
By definition, if the input value for a NOT ga te is 0, the o ut put va lu e
is l; if th e in put value is I , the o utput is 0. A NOT gate is so metimes
refe rred to as a n inverter because it in verts th e input va lu e.

Boolean Expression Logic Diagram Symbol Truth Table

X = A'

FIGURE 4.1 Representations of a NOT gate

 4.2 Gates

In Boolea n expressions, the NOT ope ration is represented by the ·

ma rk afte r th e val ue be ing n egated . Sometim es th is o peratio n is shown as
a h orizon ta l bar over the va lu e being nega ted. In the Boolean expression
in Figure 4. 1, X is ass igned the va lue d etermined by applyi ng the NOT
o pera tion to input va lu e A. In such an assignment srate111ent, the variable o n
the left of th e eq ual sig n takes o n the va lue of th e expressio n on th e right-
hand side . Assign me nt state mems are discussed furth er in Chapter 6.
The logic diagram symbol for a NOT ga te is a tri angle with a small
circle (ca lled a n inversion bubble) o n th e e nd. Th e input and output a re
sh own as lines flowi ng in to and out of t he ga te. Sometimes t hese lines are
labeled, though not a lways.
The truth tab le in Figu re 4. 1 shows all possible input va lues for a
NOT ga te as well as th e corresponding o u tp ut va lu es. Because th ere is
o nl y o ne input signal to a NOT ga te, and that sig na l ca n be o nly a 0 o r a l ,
there arc o nl y two possibilities for the colu mn labeled A in the truth
ta ble. Th e col umn labe led X shows the out put o f th e gate, w hi ch is th e
in ve rse o f th e inp ut. No te that of t he th ree represe nta ti on s, o n ly th e tru th
table actually defines t he beh av ior of the ga te for a ll situations.
Th ese th ree notations arc j ust d iffercm ways o f rep rese nting the same
th in g. For exa mpl e, the result o f th e Boolean expressio n
O'
is a lwa ys I , and the resu lt of the Boolean expressio n
I'

is a lways 0. This behavio r is consistent wi th the va lues sh own in th e

truth table.

AND Gate
d epicts an AND ga te . Unli ke a NOT gate, wh ich accepts one
in pu t signa l, an AND gate accepts two input s ign a ls. The val ues o f
both input s ignals determ in e wha t th e output signa l w ill be. If th e two

Boolean Expression Logic Diagram Symbol Truth Table

r-"\
A B
,___
x
x A • B
A
----i -
X -
0 0 0
s--L-..1 0 1 0
1 0 0
- 1 1 1

FIGURE 4 .2 Representations of an A ND gate

98
Chapter 4 Gates and Circuits

inpu t va lues for a n AND gate are both 1, the o utput is l ; o th erwise, the
ou tpu t is 0.
Th e AND ope ra ti on in Boolea n algebra is exp ressed using a sin gle dot
( · ). Som e tim es a n asterisk (*) is used to represem th is ope rator. Often the
o p erator itse lf is ass um ed . For exa mple, A·B is often wri tten AB.
Beca use there a rc two inputs and two possible va lues [or eac h in put,
fo ur possible combinations of I and O can be provided as inpu t to a n A D
ga te. Th erefo re, four situ at ions ca n occur when the AND operator is used
in a Boolean expression:
0 · 0 eq u a ls 0
O· I equa lsO
l · 0 eq ua ls 0
l · l equals l
Li kewise, the truth tab le showin g the beh avior o f th e AND gate has fou r
rows, sh owing a ll fo ur possible input combinations. Th e o utput column
o f the truth ta ble is co n sistent w ith resu lts o f rhese Boolea n expressions.

OR Gate
shows an OR gate. Li ke the AND gate, the OR ga te has two inpu ts.
If both input values a re 0, the ou tpu t value is O; otherw ise, the o utput is 1.
The Boolea n a lgebra OR ope ra tion is exp ressed using a p lus sig n (+).
The OR gate ha s two in p u ts, each of wh ic h ca n be one of two val u es.
Thus, as w ith a n AND gate, the re a re fo ur input combinations and there-
fo re fo ur rows in the truth table.

XOR Gate
The XOR, o r exclusive OR, ga te is shown in . An XOR ga te p ro-
d u ce s a 0 if its two inputs are the sa m e, a n d a l oth e rw ise. Note th e
d iffe rence be tween the XOR ga te and th e O R gate; t h ey differ in only o n e

Boolea n Expression Logic Diagram Symbol Truth Table

A X
A 8 x
x A+ B -i - 0 0 0
e;-L/ 0 1 1
1 0 1
1 1 1

FIGURE 4 .3 Representations of an OR gate

 99
4.2 Gates

Boolean Expression Logic Diagram Symbol Truth Table

A B x
~
x A EEl B
x 0 0 0
B 0 1 1
1 0 1
1 1 0

FIGURE 4.4 Representations of an XOR gate

input situation. When both input signals are 1, the OR gate produces a 1
and the XOR produces a 0.
Sometimes the regular OR gate is referred to as the inclusive OR,
beca use it produces a 1 if either or both of its input s is a l. Th e XOR pro-
duces a 1 on ly if its inputs are mixed (one I and one 0). Think of t he XOR
gate as saying, "When I say or, r mean one or the oth er, not both.N
The Boo lean algebra symbol E9 is sometimes used to express the XOR
opera tion. In addi ti on, the XOR opera tion ca n be expressed usi ng th e
o t her o perators; we leave t hat as an exercise.
No te that the logic di agram symbol for the XOR gate is just li ke the
symbol for an OR gate except that it has a n extra curved line connecting
its input signals.

NANO and NOR Gates

The NAND ga te is sh own in t::I;1 and t h e NOR gate is show n in
. Each accepts two input values. The NAND and NOR gates are
essen tia ll y the opposites of the AND and OR gates, respectively. That is,
the ou tput of a NAND gate is the same as if you took the o utpu t of a n
A D gate and put it through an inverter (a NOT gate).

Boolean Expression Logic Diagram Symbol Truth Table

A B x
x (A • B)' 0 0 1
-
0 1 1
1 0 1
1 1 0

FIGURE 4.5 Representations of a NANO gate

 100
Chapte1 Gates and Circuits

Boolean Expression Logic Diagram Symbol Truth Table

A 8 x
x (A + B)' 0 0 1
0 1 0
1 0 0
1 1 0

FIGURE 4.6 Representations of a NOR gate

No specific symbols are used to express the NAND and NOR opera-
tions in Boolean algebra. Instead, we rely on their definitions to express
?
The tenth strand the concepts. That is, th e Boolean algebra expression for NAND is th e
n egation of an AND operation. Likewise, the Boolean a lgebra expression
Computing Curricula for NOR is the negation of an OR operation.
1991, a report by
The logic diagram symbols fo r the NAND and NOR gates are the same
a joint task force of
the Association for
as those for the AND and OR ga tes except that the NAND and NOR
Computing Machinery sym bo ls use an inve rsion bubble (to ind icate the negation) . Compare the
(ACM) and the output col umns fo r the truth tab les for the AND and NANO ga tes. They
Institute of Electrical are opposites, when you look at them row by row. The same is true for
and Electronics the OR and NOR gates.
Engineers (IEEE), gave
recommendations for
the design of bachelor's Review of Gate Processing
degree curricula in
computer science.
We've looked at six specific types of gates. It may seem to be a difficu lt
Although the report task to keep them straight and remember how they a ll work-but that
had a section entitled probably depe nds on how you think abou t it. We definitely don't encour-
"Social and Professional age you to try to memori ze tr uth tables. The processing of these ga tes can
Context," which stated be described briefly in ge neral terms. If you think of them in that way,
that students need
you can produce the appropriate truth table any time you need it.
"to understand the
basic cultural, social, Let's review the processing of each ga te. Some of these descriptions
legal, and ethical issues are stated in terms o f which input values cause the gate to prod uce a I as
inherent in computing," output; in any othe r case, th e gate produces a 0.
the study of ethics
A NOT ga te inverts its sing le in put va lu e.
was not one of the
nine subject areas, or An AND gate produces I if both input va lues a re l.
strands. By 2001, social An OR ga te produces I if one or the other or both inp ut values
and professional issues are 1.
was included as a topic An XOR gate produces I if one or the other (but no t both) input
area in computing
values arc l.
education and called
the tenth strand.
ANAND gate prod uces the opposite results of an AND gate.
A NOR gate produces th e opposite resu lts of an OR ga te .
 101
4.3 Constructing Gates

Boolean Expression Logic Diag ram Symbol Truth Table

A B c x
x 0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1

FIGURE 4.7 Representations of a three-input AND gate

With these genera l processing r ules in mind, all that's left is to re membe r
the Bool ean ope rators and the logic dia g ram symb o ls. Keep in mind th at
several logic diagram sy mbols are va riarion s on other logic d iag ram sym-
bo ls. Also, remember t ha t th e colo rin g of the ga tes in this book is m eant
lO help yo u to keep track or the various ga te types; traditionall y, they are
sim ply black-a nd- w hite d iagrams.

Gates with More Inputs

Gates ca n be designed to accept three or more in put va lues. A three- input
AND ga te, for example, p roduces an ou tpu t o f I on ly if all input va lues
are J. A three-inpu t OR gate produces a n outp ut o r 1 if any in put va lu e
is I. These defi nitions are consistent w ith the two- in put ve rsions or these
gates. shows an AND gate w ith three input signals.
There are 2 3, or 8, possible input comb inat io ns fo r a gate with three
in pu ts. Reca ll from Chapter 3 th at there are 2" combin atio n s of l and 0 for
n distin ct input va lues. This n u mbe r d etermines how many rows appear
in the truth table.
For th e logic diagram symbol, we simp ly add a third input sig nal to
the original sym bo l. For a Boolea n expression, we repeat the AND opera-
tion to represent the third va lue .

Constructing Gates
Before we examine how ga tes are co nnected to fo rm circui ts, le t's exam-
ine, at an even more basic level, how a gate is cons tructed to control th e
flow of e lectricity.
 102
Chapte1 Gates and Circuits

Transistor A device Transistors

that acts either as
A gate uses one or mo re transis tors to esta blis h how the input values map
a wire or a resistor,
depending on the to the o utput va lue. A transistor is a device that acts, depending on the
voltage level of an voltage level of the input signa l, either as a wire that conducts e lectricity
input signal o r as a res istor that blocks the now of electricity. A transistor has no mov-
ing parts, yet it acts li ke a switch . l t is made of a semiconductor mate rial.
Semiconductor
which is neither a particu larly good conductor of electricity (un like cop-
Material such as
silicon that is neither pe r) nor a pa rticul arly good insu la to r (un like ru bber) . Us ua lly silicon is
a good conductor nor used to create transisto rs.
a good insulator In Ch ap ter 1. we mentioned tha t the invention of tra nsistors, which
occurred in 1947 at Bell Labs, changed the face of technology, ushering
in the second gene ra tio n o f computer ha rd ware. Before the adve nt of
trans istors, digital circuits used vacuum tubes, which diss ipated a great
deal of hear and often fa iled, requiring replacement. Transistors are much
smaller than vacuum tu bes and requ ire less en ergy to operate. They can
switch states in a few nanoseconds. Com puting, as we know it today, is
large ly due to the invention of the trans istor.
Before tacklin g the details of tra nsistors, let's d iscuss some basic princi-
ples of electricity. An e lectrical signal has a source, such as a battery o r an
o utlet in your wall. If th e electrica l signa l is grounded, it is a llowed to flow
th rough a n a lternative ro ut e to the gro un d (li terally), where it can do no
ha rm . A g rounded e lectrica l signa l is p ulled dow n, or reduced, to 0 vo lts.
A tra nsistor has three term ina ls: a source, a base, a nd an emiuer. The
emitter is typically connected to a grou nd wi re, as shown in . . For
compu ters, th e so urce prod uces a high voltage value, approximately 5 vo lts.
The base value regu lates a gate that determ ines whethe r the conneCLion
between the source and ground is made. If the source signa l is grounded,
it is pulled down to 0 volts. If the base does not ground the source signal. it
stays high.
An output li ne is usua lly connected to the source line. If the source
signal is pu lled to the ground by the trans istor, th e o utput signa l is low,
Source represemi ng a binary 0. If the source signal remains high, so does the
Output o utput signa l, representing a bina ry I .
The tra nsistor is either on, producing a high -output signa l, or off.
Base - - producing a low ou tpu t signa l. Th is o utput is determined by the base elec-
trical signal. If the base signal is hig h (close to a +5 voltage). the sou rce
signal is grounded, w hich turns th e transistor off. If the base signal is low
Ground (close to a 0 voltage), the so urce signal stays high, a nd the transisto r is o n.
FIGURE 4.8 The con nections of
Now let's see how a transisto r is used to create various types of gates.
a transistor l t turns out that, because of the way a transistor wo rks, the easiest gates
~~ • ' •••• ~ ...... ' •• Lf : ... _· !,;~- ... ~~:·~-~...--~,. ,.....-~7~.,.·"('"---,.-.;-, .....·~~-,.~.,, ....~-- -· ....-::·· •

~ ..... ~ -'' .~~ . .

~
'
. . . ~
'
.,';'"
103
4.3 Constructing Gates

NOT gate NANO gate NOR gate

Source

Source Source

. - - - - - - - - - -Vout
Vin - -
Emitter
Emitter Emitter
-
Ground Ground Ground
Emitter

Ground
-

FIGURE 4 .9 Constructing gates using transistors

to crea te are th e NOT, NAND, and NOR ga tes. ~ sh ows how th ese
gates can be constructed using tra n sisto rs.
The diagra m for the NOT gate is essentially t he same as our o rigi n al
tra nsisto r diagram. It ta kes o nl y o ne transistor to create a NOT gate. The
sign al \J'. 11 re presents the input signal to th e NOT gaLe. If it is hig h, th e so urce
is ground ed and th e ou tput sign al V0 111 is low. If V; 11 is lo w, th e source is not
gro und ed a nd V0111 is high . Thu s th e inpu t signal is inverted, whic h is exactl y
what a NOT ga te does.
The NAND ga te req uires two transistors. The input sig nals v, and V2
represe nt t he input to th e NAND gate. If both input sign a ls are high, the
so urce is gro unded a nd the output V01 11 is low. If eit her input signal is lo w,
h oweve r, on e tra nsistor o r t h e ot h er keeps th e so urce signa l from be ing
gro und ed and the o u tput is h ig h . Therefore, if v, or V2 or both ca rry a low
signal (binary 0 ), th e o utput is a 1. This is con siste nt w ith th e processing
of a NAND ga te.
The construction o f a NOR gate also requ ires t wo tra nsistors . On ce
agai n, v, and V2 represent the in put to th e ga te. This time, h oweve r, the
transisto rs are not connected in series. The so urce connects to each tra nsis-
tor se parate ly. If either t ransistor al lows th e so urce signal to be ground ed,
th e o utput is 0. The refo re, the ou tp ut is high (b in ary 1) o n ly wh e n both
v, a nd V2 a re low (bina ry 0) , wh ich is wh a t we want fo r a NOR gate.
An AND gate produces outp ut that is exactly opposite of th e NANO
o utput o f a ga te. Therefo re, to con stru ct an AND ga te, we simpl y pass
the output o f a NANO gate t hrough a n in verte r (a NOT gate). That's w h y
 104
Chapte Gates and Circuits

AND ga tes a re more complicated to con stru ct than NAND gates: They
require three transistors, two fo r the NAND and one for the NOT. The
same reaso n ing can be applied to underst:and the relation ship between
NO R and OR ga tes .

.4 Circuits
Now that we know how individua l gates work a nd how they are con-
Combinational circu it
structed, let's examine how we combine gates to form circuits. Circuits
A circuit whose
output is solely can be classified into two genera l categories. In a combinational circuit,
determined by its th e input values expli citl y de term ine the o utput. In a sequential circuit,
input values th e output is a function of t he input values as well a s th e existing state
of the circu it. Thus sequential circuits usua ll y in volve the sto rage o f infor-
Sequential circu it A
circuit whose output
mation. Most o f th e circuits we examine in this cha pter are com binational
is a function of its circu its, although we briefl y mention sequentia l m e m o ry circuits.
input values and the As with gates, we can describe t h e ope rations of entire circu its us ing
current state of the three notations: Boolean expression s, logic d iagrams, and truth tab les.
circuit These notations are dif[erent, but equally powerfu l, representation
techn iques.

Combinational Circuits
Gates are com bined into circuits by using th e ou tput of one gate as th e
input for a nother gate. For example, consider the following logic diagram
of a circuit:

The outpu t of the two AND gates is used as the input to the OR gate. The
input value A is used as input to both AND gates. The dot indicates that
two lines are co nn ected . If the intersection o f two crossing lines d oes not
have a dot, you shou ld thi nk of on e as "jumping over" the o th e r without
affectin g each other.
What does this logic diag ra m m ea n? We ll , le t's work backwa rd ro see
what it takes to get a particular res ult. For the final output X to be 1, either
D must be I or E mu st be 1. For D to be J , A and B must both be 1.
 105
4.4 Circuits

For E Lo be l , both A and C musL be l. Both E and D ma y be l , buL that

isn 't necessa ry. Exam ine this circu it diagram ca refu ll y; make sure tha 1 this
reaso ning is consistent w ith your understanding of the types of gates used.
Now let's represe nt the processing of 1his entire circ uit usin g a truth
ta ble:

A B C D E X

0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0

0 0 0 0 0
0 0

0 0

Because there are three inputs to this circuit, e ight rows are required to
describe a ll possible input combina tions. Intermedia te columns sh ow the
intermedia te va lues (D and E) in the circuit.
Fina lly, let's express this same circu it using Boolean algebra. A circuit
is a collection of interaci ing ga tes, so a Boolea n ex pression to represent
a circuit is a combina tion o f the appropriate Boolean operations. We just
have to put the operations together in th e proper form to crea te a val id
Boolea n a lgebra exp ression. ln this circu it, th e re are two AND exp res-
sions. The output of each AND o peration is input to the OR opera tion.
Thus this circuit is re prese nted by the following Boolea n expression (in
which t he AND operator is assumed):
(AB+ AC)
When we write truth tables, it is often beucr to label columns using t hese
kinds of Boolean expressions rather than a rbitrary variables su ch as D, E,
and X. That makes it clear w h a t ead1 column represents. In fact, we ca n
use Boolea n ex pressio n s to label our logic diag rams as we ll, el iminating
the need for inte rmed iate variables altogether.
Now lei 's go th e o t her way: Le t's take a Boolean expression and draw
the co rrespondin g logic diagram and truth table . Consider the following
Boo lea n exp ression:
A(B + C)
 106
Chapter 4 Gates and Circuits

In this ex p ression , th e OR operation is a pplied to inpu t va lu es Band C.

The result of thar opera ti on is used as input, alo n g with A, to an AND
opera tio n, producing the fi nal result. Th e correspondin g circu it d iag ra m is:

:~
~
A(B+C)

B +C

On ce aga in, we co mple te ou r se ri es of representa tio ns by expressin g

this circuit as a truth ta ble. As in the previous exa m p le, there are three
in put va lu es, so there are e ight rows in t h e tru th ta ble:

A B C B+C A(B + C)

0 0 0 0 0

0 0 0

0 0 0

0 0

0 0 0 0

Pick a row from this t ruth table a nd fo llow th e Jogic of th e circu it diag ram
to ma ke sure th e fina l res ults are consistent. Try it wi th a few rows to get
comfortable w ith the process o r tracing t he logic of a circuit.
Now compare th e final resu lt column in this truth tab le to the tru th
table fo r the previous exa mple. They are identica l. We h ave just de m o n -
Circuit equivalence strat ed circuit equivalence. That is, bo th circuits produce exactly the sa me
The same output for o utpu t for eacb in put va lu e combina ti o n.
each corresponding In fact, th is situation demo nstra tes an importan t property of Boolea n
input-value a lgebra ca lled the distributive law:
com bination for
two circuits A(B + C) = AB + AC
 107
4.4 Circuits

That's the beauty o r Boolean a lgebra: IL a llows LIS LO apply p rova-

ble mathema ti cal princip les to design logica l circ ui ts. The foll owing chart
sh ows a few of th e properties of Boolea n a lgeb ra:

PROPERTY AND OR

Commutative AB= BA A+B=B+A

Associative (AB) C = A (BC) (A + Bl + C =A + (B + C)

Distributive A (B + C) =(AB) + (AC) A + (BC) =(A + B) (A + Cl
Identity A1 =A A+O=A

Complement A(A') = 0 A+ (A')= 1

De Morgan's law (AB)' =A' OR B' (A+ B)' = A'B'

These prope rti es are consiste nt with o u r unde rsta nd ing of ga te p rocess - ?
ing as well as with t he t ruth ta b le a nd logi c dia g ram representations. For De Morgan's Law, named
for Augustus De Morgan
instance. th e commuta tive pro pe rty, in p lain En g lish, says th at th e order
of th e input signals doesn't rnauer, which is true. (Ve rify it using the truth
De Morgan, a
tables o f indiv idua l gates.) The complemem p ropeny says that if we put contemporary of
a sign a l a nd its inverse th rough an AND ga te, we are gu aranteed to ge t 0, George Boole, was
but if we put a signal and its inverse through an OR ga te, we are gua ra m eed the first professor of
co ge t 1. mathematics at the
Th e re is one ve ry famo us-a nd useful-th eore m in Boolea n a lgebra University of London
in 1828, where he
ca lled De Morgan's /a1v. This law states that th e NOT operato r applied to
continued to teach for
the AND o f two variab les is equa l to the NOT applied to each o f th e two 30 years. He wrote
variables wit h an OR between. That is, inverting the o utput of a n AND elementary texts on
gate is eq uiva lent to inverting the indi vid u a l signals fi rst and then passing arithmetic, algebra,
them through an OR gate: trigonometry, and
calculus as well as
(AB)'= A' ORB' papers on the possibility
of establishing a
The seco nd pan of t h e law states that th e NOT operator applied to t h e OR
logical calculus and
o f two variables is equa l LO th e NOT app li ed to each o f th e two va ri a bles the fundamental
w ith an AND between. Expressed in circuit te rms, this means th at invert- problem of expressing
ing the outpu t of an OR ga te is equiva lem to inverting borh signa ls first thought by means of
and then passing them th rough an AND ga te: symbols. De Morgan
did not discover the
(A+ B) ' = A'B' law bearing his name,
but he is credited with
De Morgan's law a n d ot h er Boolean a lgeb ra prope rti es provide a forma l
formally stating it as it
mechan ism for defining, m a nag ing, and eva lu a tin g logical circuit designs. is known today. 3
 108
Chapter 4. Gates and Circuits

Adder An electronic Adders

circuit that performs
Perhaps the most basic o peration a computer can perform is to ad d two
an addition operation
on binary values numbers together. At th e digital logic level, this addition is perCormed in
binary. Chapter 2 discusses this process in de pth. These types of addition
Half adder A circuit operations are carried out by special circui ts called, appropriately, adders.
that computes the Like addition in any base, the result of adding two binary digits could
sum of two bits
potentiall y produce a cany value. Recall that 1 + l = l 0 in base 2. A circuit
and produces the
appropriate carry bit tha t computes th e sum of two bits and produces the correct carry bit is
called a half adder.
Let's consider a ll possibilities when adding two bin ary digits A and B:
If both A and Ba re 0, the sum is 0 and the carry is 0. If A is O and B is 1,
the sum is 1 a nd the carry is 0. If A is l and B is 0, th e sum is l and the
carry is 0 . If both A and Ba re l , th e sum is 0 a nd th e ca rry is l. This yields
the follo w ing truth table :

A B Sum Carry

0 0 0 0

0 0

0 0

In this case, we are actually looki ng for two outpu t res ults, the sum a nd
the carry. As a consequence, o ur circuit has two o u tput li n es .
If yo u compare the sum and carry columns to the o ucput of th e va r-
iou s ga tes, yo u see that the sum corresponds to th e XOR ga te and th e
carry corresponds to the AND gate . Thus the fo llowing ci rcuit diagram
re presents a half adder:

Tes t this diagram by assig ning va rio us combinations of input values

and de terminin g the two o utput va lues produ ced. Do th e resu lts follow
th e rules of binary arithmetic? Th ey sho uld. Now compa re yo ur resu lts to
th e correspond ing truth table . Th ey should ma tch the res u lts there as well.
 4.4 Circuits

What abou t th e Boolean expression for this circuit? Because the

circui t produces two d isti nct o ucput va lues, we represent it using two
Boolean expressio ns:
sum= A EBB
carry= AB
Note tha t a half adder does not take into acco unt a possible ca rry Full adder A circuit
va lue into th e calculat io n (carry- in). That is, a half adde r is fine fo r add ing that computes the
two single dig its, but it ca nnot be used as is tO compute the sum of two sum of two bits,
binary va lues w ith m ultiple digits each . A circuit ca lled a fu ll adder takes taking an input carry
th e carry- in va lue into acco unt. bit into account

We ca n use two ha lf adders to ma ke a full adde r. How? Well, the input

to the sum must be th e carry- in and th e su m from adding the two inp ut
values. That is, we add the sum from t he half adde r to th e carry-in . Both
of these additio ns have a carry-out. Could bot h of these carry-outs be l ,
yielding yet a no the r carry? Fortunately, no. Look at th e truth table fo r the
half adder. There is no case where the sum and the carry are both I.
:i· shows th e logic di agram a n d the truth table [o r the fu ll
adder. This circuit has three inputs: t he o riginal two digits (A and B) a nd
t h e ca rry-in val ue. Thus th e t ruth table ha s e ight rows. We leave th e
correspo nding Boolean ex pressio n as an exercise .
To add two 8-bit values, we can dupl ica te a ful l-adder circuit eigh t
tim es. The carry-o u t from o ne place val ue is used as the ca rry- in to t he
next-highes t place va lue. The va lue of th e carry- in for the rightmost bit
positio n is assum ed co be zero, and the carry-out o f the leftmost bit p osi-
tion is d isca rd ed (po te ntia ll y creating an o verflow e rror).
There are va ri o us ways ro improve on the des ign o f these adde r
circu its, but we d o no t explore them in any m o re deta il in this text.

Truth Table
Logic Diagram A B Carry-in Sum Carry-out

Carry-in 0 0 0 0 0
0 0 0
A Sum 0 0 0
0 0
B
0 0 0
0 0
Carry-out 0 0

FIGURE 4.10 A full adder

 110
Chapter • Gates and Circuits

Multiplexer A circuit Multiplexers

that uses a few input
A multiplexer (often referred LO as a mux ) is a gene ral circuit t hat p rodu ces
control signals to
determine w hich of
a sin gle o utput signa l. This ou tp u t is equ al to one of several input signa ls
several input data to th e circuit. The mu ltiplexer selects wh ich in pu t sig na l to use as a n out-
lines is routed to its put signal ba sed on the va lue represented by a fe w m o re input signa ls,
output ca lled select signals o r select control lines.
Let's lo ok at an example to clarify how a m ul tiplexer w orks.
shows a block diag ram o f a m u x. The control lin es SO, S 1, and S2 de te r-
mine w hi ch o f eigh t o ther input lines (DO throu gh D7) a re routed to th e
o utput (F ).
W hile developing his The va lues of t he t hree co ntrol lines, ra ken together, a re inte rpreted
first program, in about as a binary numbe r, wh ich de termines w hich input lin e to route to th e
1949, Maurice Wilkes output. Reca ll from Cha pte r 2 that three bina ry digits ca n represe nt
said, "The realization eight differe nt values: 000, 001 , 010, 01 L 100, 10 1. 11 0 , and 111 . These
came over me with
val ues, which simpl y count in bina ry from 0 to 7, correspond to o ur o ut-
full force that a good
part of the remainder put val ues DO throu gh D7. Thus, if SO, S I , and S2 a re all 0, the inpu t line
of my life was going DO w ould be the o utput from the mux . If SO is 1, SJ is 0, and S2 is L th e n
to be spent in finding D5 wo uld be o utpu t from th e mu x.
the errors in my ow n The fo llowing tru th table sh o ws how the input co ntrol lines d ete r-
programs. " 4
mi ne th e o utp u t for this multiplexe r:
The block d iag ra m in Fig ure 4. 11 hides a fairly complicated circuit
that ca rries out the logic of a m ulti plexe r. Such a circuit cou ld be show n
using eigh t t h ree -i n p ut AND ga tes and o ne e ight-input OR ga te. W e won 't
get into t he details o f thi s circuit in this boo k.

SO 51 52 F
I

0 0 0 DO

0 0 D1

0 0 D2

0 D3

Sor-
0 0 D4
DO D1 D2 D3 D4 DS D6 D7
0 D5 I I I I I
0 D6
S1 F
D7 S2

FIGURE 4.11 A block diagram of a multiplexer with three select control lines
 111
4.5 Circuits as M emory

A multiple xer can be designed with vario u s numbers of inpuL lines

and co rresponding co 11Lro l lin es. ln general, the b ina ry va lu es on /1 input
co nt rol lines a re used Lo dete rmine w hi ch of 2" o th e r data lines are
selected for o uLput.
A circuit called a demultiplexer (demux) pe rforms the o pposite oper-
atio n. Thal is, it La kes a sin gle inp ut a nd ro ut es iL to one or 2" o utputs,
dependin g on Lhe va lues of th e n control lines.

5 Circuits as Memory
Digital ci rc u its play a no Lh er impo na n t role: They ca n store in fo rm a tio n.
These circu its form a seq u ential circ uit, because the output o f the circu it
also se rves as input Lo the circuit. That is, th e existing state o f th e circuit
is u sed in pan to determ ine th e n exL sta te .
Many types o f m emory ci rcuits h ave b een designed. We exa mine
only one ty p e in th is book: the S-R latch. An S-R latch stores a sing le
binary digit ( 1 or 0). An S-R latch circuit cou ld be designed using a va riety
of ga tes. One such circuit, u sin g NAND ga tes, is piCLured in
The d esig n of this circuit guarantees th a t th e two o utputs X and Y a re
a lwa ys comple m e 11Ls of each other. That is, when X is 0 , Y is 1, and vice
versa . The va lue of X at any point in time is considered to be the current
sta le of t h e circu it. Th e refo re, if X is 1, th e circu it is storing a I; if X is 0,
the circ uit is storing a 0 .
Reca ll tha L a NAND gate prod u ces an ou tput of 1 u nless bo th o f iLs
inpu t val u es a re l. Each gate in this circuit has one ex te rn al in pu t (Sor
R) a nd on e in put coming from the o utp ut o f the ot h er ga te. Suppose the
curre nt sta te of Lh e circu it is storing a 1 (that is, X is I ), and su ppose both
S an d R are l. Then Y remains 0 a nd X re mains 1. Now suppose th at the
circu it is c urre nt ly storing a 0 (X is 0) and t hat R a nd S a re aga in 1. The n
Y remains l and X rema in s 0. No matter w hi ch va lu e is curre11Lly being
stored, if bo Lh in p u Lva lu es Sand R a re 1, th e circui t keeps its existi ng sla te.
This explana tion demonstrates that the S-R la tc h maintains its va lue
as long as Sa nd Ra re I . But h ow does a va lue get sLO red in Lhe first p lace?

~:
We set the S-R la tch to 1 by m o mentaril y setting S to 0 w hil e keeping R al
1. If S is 0, X becomes 1. As lo n g as Sis re turn ed to 1 immed ia tel y, Lhe S-R
latch re mains in a sla te of l . We set the latch t0 0 by m o m entarily seLtin g
R to 0 w hile keeping Sal I . If R is 0, Y b ecom es 0, and th us X becomes 0.
As lo ng as R is im med iately reset to 1, t h e circuit state re m ains 0.
By carefull y con troll ing th e va lu es of Sand R, th e circu it ca n be made R
to sto re e ithe r va lu e. By sca li n g this idea Lo large r circui ts, we ca n design FIGURE 4.12 An 5-R
m e mory devices with larger capacities. latch
 112 j
Chapte1 4: Gates and Circuits

Integrated ci rcuit 4 Integrated Circuits

(chip) A piece of
silicon on which An integrated circuit (a lso called a chip) is a piece of silicon on which mul-
multiple gates have tiple ga tes have been embedded. Th ese silicon pieces a re m o unted on a
been embedded p lastic or cera mic package with pins alo ng the edges that can be solde red
o nto circuit boards or inserted into appropriate sockets. Each pin connecrs
to the input or output of a ga te, or to power or g round.
Integ ra ted circuits (IC) are classified by the number of ga tes conta in ed
in them . These classificatio ns also re fl ect the histori cal development of IC
tech nology:

Abbreviation Name Number of Gates

SSI Small-scale integration 1 to 10

M SI Medium-scale integration 10 to 100

LSI Large-scale integration 100 to 100,000

VLSI Very-large-scale integration more than 100,000

An SSI chip has a few inde pendent gates, such as th e on e sh own in

. This chip has 14 pins: e ig ht for inp uts lO gates, fou r for out-
put of the gates, o ne fo r gro und, and one for power. Simi la r chips ca n be
made w ith different gates.
How can a chip have m o re than I 00,000 ga tes on it? That wo uld
imply th e n eed for 300,000 pin s! The ke y is th at the ga tes on a VLSI chi p
a re n o t independen t, as they a re in sm a ll -sca le integratio n . VLSI chips

14 13 12 11 10 9 8

-·' ~]-@l:j I-- ...__/

Ground

2 3 4 5 6 7
FIGURE 4.13 An SSI chip containing independent NANO gates
 113
4. 7 CPU Chips

em bed ci rcuits with a hig h ga te-to-pin ratio. Tha t is. many ga tes a re com - ~
What is computer
bin ed to create complex ci rcu its t hat require o nly a few input a nd output
ethics?
values. Multiplexers a re an example of this type of circuit.
Be careful-the term
computer ethics is
CPU Chips ambiguous. The use of
the term in the tenth
Th e m ost important in teg ra ted circull 111 a n y compute r is th e cemral
strand of computer
processing unit (CPU). The processing of a CPU is d iscussed in th e n ext science curricula refers
chapter. but it is impo rta nt to recog nize at this poi m rha t th e CPU is, in to a code of ethics that
one sense. m e rely a n ad va nced circuit with input a nd ou tput lin es. computer professionals
Each CPU chi p co ntains a large numbe r of pins th rough which esse n- can apply w ithin
their own profession.
tiall y all co mmunication in a comp uter sys tem occurs. This communica-
Computer ethics also
tio n connects th e CPU to memory and I/O devices. w hich are th e mselves. refers to determinations
a t fundame ntal leve ls, advan ced circuits. made by contemporary
The explana ti o n of CPU processing and its imeraction with o th er philosophers to cases
devices takes us to anoth er level o f computer processi ng, so metim es re- that involve computers

ferred to as co111po11e11t architecture. Alt ho ugh it is still prima rily focused or computer networks.

o n hardware, computer componen t architecture applies the principle o f

abs traction ye t again, a ll owing us to tempora ril y ig nore the d etai ls of the
ga tes and circuit s discussed in this chapter and bringing us ever closer to
a comp le te und ers ta nd ing o f computer processing.

SUMMARY

In this chapte r we discussed how a compu ter o perates at its lowest level
b y co nt ro lling the flow of elect ri cit y. Because we a re d ealing w ith digita l
compu ters that use binary informatio n. we concern ou rselves w it h only
two voltage ra nges, which we interpret as binary I o r 0. The fl ow o f elec-
tri cit y is guid ed by electroni c dev ices called gates. which perform basic
logica l ope rati o ns such as NOT, AND, a nd OR. A gat e is created by using
one or mo re transistors, an in ve ntio n that revol u tionized computing.
Gates ca n be combined imo ci rcuits. in w h ich th e o utpu t of one gate
se rves as an inp ut lO an o th e r gate. By d esigning th ese circuits ca refull y,
we ca n create devices th a t perfo rm more complex tasks such as ad d ing.
multiplex in g, and storing da ta. Collectio ns of gates, o r co111plete circuits. a re
often embedd ed into a single imegra ted circuit. or chip, which leads to th e
con cept o f a cen tra l proce sing unit (CPU).
114
Chapter · Gates and Circuits

Codes of Ethics5

There are two major orga nizations in com- to be h onest and realisti c in stating claims
puting: th e Association of Compu ting Ma- or estimates based on availa ble da ta;
chinery and th e In stitute of Electrical and to reject bribery in all its form s;
Electronics Engineers. The IEEE represents to improve th e und erstanding of technology,
the hard wa re side a nd the ACM represents its appropriate appl ication, and potential
the software side. However. in m a ny u ni- consequences;
ve rsities, this d istin ction is blurred. We are to maintain and improve our technica l
presenting both codes or ethics so you can competence and to un dertake techno log-
compa re a nd contrast them . ica l tasks for others only if qualified by
training or experience, or afte r full disclo-
IEEE Code of Ethics
We, th e m embe rs of th e IEEE, in recogni- sure of pertinent limitations;
ti on of th e impo rta nce o r our techno logies to seek, accept, and offer h o n est cr iticism
in affecting th e quality of life through- of technical work, to ack nowledge and
out the wo rld, and in a ccepting a perso nal correct errors, and to credi t properl y th e
contributions of o thers;
obligation to o ur profession, its m embers
to treat fa irly a ll pe rsons rega rdless of such
and the communities we serve, do hereby
factors as ra ce, re ligion, gende r, disa bility,
commit ourselves to the hig hest eth ica l a nd
professio na l condu ct and agree: age, or nationa l origin;
to avoid inju ring others. th eir prope rty,
to accept responsibility in m aking deci- reputation, o r emplo ym em by false o r
sion s consistent w ith the safety, health, m a li cious actio n;
and welfare of the public, and to d isclose to assist colleag ues and co-worke rs in their
promptly factors that m ig ht endanger the professio na l development and to support
public or th e en vironment; them in following this code of eth ics.
to avoid rea l or pe rceived conflicts of inter-
est wh enever possible, and to disclose them
to affected pa rties w hen the y do exist;
 ·~ •, • • "• , ' • , ', .. ,'.-:.:• ~ 1 ,' ~ _.,..., .. ••·• <'~vJr•.~1'}"7~'<"~·~~,...,,,_ __,.,-yy., r• "IF""'

' ••• ~;·~·.

· . - -.. f. ,-~:-:~· ..-: : ... ', -~-. .·; ·, -

115
Ethical Issues: Codes of Ethics

ETHICAL ISSUES · . ·
Codes of Ethics, continued

ACM Code of Ethics (abridged)

Ra t he r th an copy t hem, we show the fl yer that th e ACM produces.

THE CODE represents ACM's commitment to promoting

the highest professional and ethical standards, and makes
it incumbent on all ACM Members to:
Contribute to society and human Honor property rights including
well-being. copyrights and patent.
Avoid harm to others. Give proper credit for intellectual
Be honest and trustworthy. property.
Be fair and take action not to Respect the privacy of others.
discriminate. Honor confidentiality.

And as computing professionals, every ACM Member is

also expected to:
Strive to achieve the highest Give comprehensive and thorough
quality, effectiveness and dignity in evaluations of computer systems
both the process and products of and their impacts, including
professional work. analysis of possible risks.
Acquire and maintain professional Honor contracts, agreements, and
competence. assigned responsibilities.
Know and respect existing laws Improve public understanding of
pertaining to professional work. compu ting and its consequences.
Accept and provide appropriate Access computing and
professional review. communication resources only
when authorized to do so.
116
Chapte1 Gates and Ci rcuits

Add er Integra ted circuit (also chip)

Boolea n algebra Logic diagram
Circuit M ul tiplexe r
Circuit equiva lence Semicon d u ctor
Com bi natio n a l circ uiL Seq ue ntial circ uit
Full adder Transistor
Gate Tru t h tab le
Half adder

For Exercises 1- 17, mark th e answers true 10. A ga te can be design ed to accept
or fa lse as fo llows: more than two in puts.
A. True l l. A t ra nsistor is m ade o f
B. Fa lse sem iconductor ma terial.
l . Logic diagrams a n d Lruth tables a re 12 . Inve rting the o utpu t o f an AND
equally powe rful in expressi ng th e ga te is eq ui va lent LO in ve rt ing th e
processing o f gates a n d ci rcui ts . ind ivid u a l sign a ls first, th e n passing
2. Boolean expressions a re more powerfu l them th rough an OR ga te .
th an logic diagra ms in expressi ng the 13. Th e su m o f two binary d igits
processing o r ga tes and circuits. (ignoring t he carry) is ex pressed by
3. A NOT gate accepts two inputs. an AND gare.
4. The outp u t va lue or a n AND gate is I 14. A full ad de r ta kes th e ca rry- in va lue
when both inpu ts are 1. inLo acco u nt.
5. The AND a nd OR gates prod u ce 15. A m ul tiplexe r add s all of the bits on
opposite resu lts for t he same input. its input lines to produce its ou tpu t.
6. The output va lue of an OR ga te is I 16. Integra ted circui rs a re classified by t he
when both inpurs are 1. number o r gates con tai n ed in th em.
7. The output of an OR gate is 0 when 17. A CPU is a n integrated circuit.
one inpu t is 0 a n d o n e inpu t is I .
For Exe rcises 18-29, match th e gate w ith
8. The output val u e of a n XOR ga te is 0
th e descri p ti o n or th e opera ti o n or th e
unl ess bo th in p u ts are 1.
d iagra m .
9. The NOR ga te produces the opposite
A. AND
results o f t h e XOR gate.
B. NAND
 117

C. XOR 32. What are the three no ta tio na l

D. OR me thods fo r describing the behavior
E. NOR of gates and circuits?
F. NOT 33. Cha racterize the nota tions asked for
18 . Inve rts its input. in Exercise 32.
19. Produ ces a 1 o nly if all its inputs are 34 . How ma ny inpu t signa ls ca n a ga te
1 a nd a 0 othe rwise. receive, a nd how many o ut put
20. Produces a 0 o nl y if all its inputs are signals can a ga te produce?
0 a nd a I othe rwise. 35 . Name six types of ga tes.
2 1. Produ ces a O o nly if its in puts are the 36. Give the three representations of
sa me and a 1 othe rwise . a NOT gate and say in words what
22 . Produces a 0 if all its inputs are 1 and NOT mean s.
a 1 o therwise. 37. Give the three represen ta tions of
23 . Produces a l if all its inpu ts are 0 and an AND ga te a nd say in wo rds what
a O otherwise. AND mea ns.

24.
_
A _[>o__X 38. Give the three re presentatio ns of an
OR gate and say in words wha t OR
mean s.

-:---L__)~---x
39 . Give the three representations of
25 .
a n XOR gate and say in words what
XO R means.
A x
26 . 40 . Give the th ree representatio ns of a
B NAND gate and say in wo rds what
NAND means.
27 . ~B
c-J-
x 4 1. Give the three representations of
a NOR gate and say in words wha t
_A_ _~r- X NOR mea ns.
28 . 0>-----
42. Com pare and contrast the AND ga te
B
and the NAND gate.
A 43. Give the Boolea n expression
29 . O>-----
X
B fo r a three-inp ut AND ga te, and
Exercises 30-73 are sho rt-answer or design the n show its behavior w ith a truth
qu estion s. ta ble .
30 . How is voltage level used to
A
distinguish be twee n binary digits? B--~
x
3 1. Distinguish betwee n a gate and a
c
circuit.
118
Chapte1 Gates and Circuits

44. Give the Boolean expression for a 57. Draw a circu it d iagram correspon ding
three-input OR gate. and then show to the fol lowing Boolean expression:
its behavior w ith a truth table. A'B + (B + C)'
58. Draw a circuit diagram corresponding
A
B--~ LO the fo llowing Boo lea n expression:
(AB)' + (CD)'
c
59. Show the be h avior o f the following
45. What is used in a gate to establish circuit with a truth table:
how the input values map to the A
ou tput value?
How does a transistor behave? B
46.
47.
48.
Of what is a transistor made?
What happens when an electri c
D-
signal is grounded?
49. What are the three terminals in 60. Sh ow the be h avior of the following
a transistor, and how d o th ey circuit with a t ruth table:
operate? A
50. How many trans istors does it take for
each of these gates?
a. NOT B
b. AND
c. NOR 6 l. Show the behavior of the following
d. OR ci rcuit with a t ruth table:
e. XOR
51. Draw a transisto r diagram fo r an
AND gate. Explain the processing.
52. Draw a transistor diagram for an OR
gate. Explain th e processing.
53. How ca n ga tes be co mbin ed in to 62. Sh ow th e behavior of the fol lowing
circui ts? circu it wit h a tr uth table:
54. What are the two general categories
A
of circuits, and how do t hey differ?

~-
55. Draw a circuit diagram corresponding B
to th e followin g Boolean expression:
(A+ B)(B + C) C > - + - - - - -L /
56. Draw a circuit diag ram co rrespond ing c
LO the following Boolean expression:
(AB+ C)D
 119
Thought Questions

6 3. What is ci rcuit equivale nce? c. The d esign fo r an S-R la tch sho wn

64. Name six p ropenies of Boolean in Figure 4 . 12 g uaramees w ha t
a lgebra and explain what each about the ou1puts X and Y?
means. 69. What is an integrated ci rcuit or chip?
65. Differe ntia te betwee n a half adde r 70 . De fine th e abbrevia ti o ns SSI, M SC
and a full adder. LSJ , and VLSI.
66. What is th e Boolea n expressio n for a 7 1. In th e chip shown in Fig ure 4.1 3,
full adder? what are t he pins used fo r?
67. What is a m ultiplexe r? 72. Draw a circuit using two full adders
68 . a. Circuits used for memory arc th a t adds two two-bit bina ry va lu es .
w hat type o f circuits? Show its corresponding truth tab le.
b. How m an y digits does an S- R 73. How ca n the XOR operat io n be
latch store? exp ressed using ot he r operato rs?

I. Throughout this chapter we ha ve used 4. Have yo u ever sent ema il to

Boolean ex pressions, truth tables, and som eone, only to regret it
logic d iagrams to describe th e sa m e im media tely? Do you fi nd th a t yo u
behavior. Is th e rel ationship among would say so m e th ing in email th at
these notatio nal m e1hods clear to you? yo u wou ld never say in pe rson?
Which do you rind the most intuitive? Conside r th e following premise:
Which do yo u find th e least intuitive? "Email has lowered the civility of
2. Many siLUa tions can be descri bed personal discou rse." Do yo u agree o r
by the ideas in th is cha pter- for disagree?
exa mple, th e o peratio n of a si ngle 5. If a pe rson sends ema il fro m a school
ligh t switch or a light that ha s two computer or a business computer,
switches. Ca n you th in k o f o ther sho uld that m essage be considered
everyda y occurrences that can be private? Does the inst iw1io n or person
descri bed by the n otatio nal m e th od s tha1 owns the compu ter from w hi ch
presented in this cha pter? emai l is sent ha ve a righ t 10 inspect
3. How do th e two sets o f codes of the m essage?
ethics differ? How are they simila r?