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X = ..................................................................................... Table 1.8 A B X 0 0 NAND gate 2 0 1 (IC 7400) 1 0 1

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61 views25 pages

Iklan Pemandu - UPK

X = ..................................................................................... Table 1.8 A B X 0 0 NAND gate 2 0 1 (IC 7400) 1 0 1

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Ah Long

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Laboratory Manual

DIGITAL SYSTEM 1

ECE351

Editors

Nur Athiqah Harron

Faridah Abd Razak
TABLE OF CONTENTS

Experiment 1 : LOGIC GATES & BINARY ARITHMETIC……………………………….1

Result Sheet Experiment 1………………………………………………………………………....9
Experiment 2 : ENCODER & DECODER CIRCUIT……………………………………14
Result Sheet Experiment 2………………………………………………………………………..19
Appendix A………………………………………………………………………………….............22
Rubric………………………………………………………………………………………………..23

i
FACULTY OF ELECTRICAL ENGINEERING

UNIVERSITI TEKNOLOGI MARA

DIGITAL SYSTEM 1 LABORATORY

(ECE351)

EXPERIMENT 1

LOGIC GATES AND BINARY ARITHMETIC

OBJECTIVES
1. To be familiar with TTL IC physically and understand them according to data sheet.
2. To understand the function of each TTL IC and combination of them.
3. To produce the Truth Table and Boolean expression of each logic circuit.
4. To know and construct Binary Arithmetic and comparator circuits using logic gates.

LIST OF REQUIREMENTS
Equipment
1. Digital Logic Trainer

Components
1. IC TTL : 7400 (NAND), 7408 (AND), 7404 (INVERTER), 7402 (NOR),
7432 (OR) & 7486 (XOR)

1
THEORY

Logic gate is an elementary building block of a digital circuit. Most logic gates have two
inputs and one output. At any given moment, every terminal is in one of the two binary
conditions low (0) or high (1), represented by different voltage levels. In most log ic gates, the
low state is approximately zero volts (0 V), while the high state is approximately five volts
positive (+5 V).

There are seven basic logic gates: AND, OR, XOR, NOT, NAND, NOR, and XNOR. These
gates can be combined with each other to produce other type of application and function,
such as half-adder, full-adder, comparators, flip flops etc.

Truth Table
Truth table is a table that describes the behaviour of a logic gate. It lists the value of the
output for every possible combination of the inputs and can be used to simplify the number
of logic gates and level of nesting in an electronic circuit.

Boolean Expression
Boolean algebra (or Boolean logic) is a logical calculus of truth values. A Boolean
expression is an expression that results in a Boolean value, that is, TRUE (1 bit) or FALSE
(0 bit). Thus, circuits can be described by expressions containing variables. Furthermore,
every possible input-output behaviour in a digital circuit can be modelled by a suitable
Boolean expression.

Binary Arithmetic
All arithmetic operations can be implemented using adders formed from the basic logic
gates. For a large number of digits we use medium-scale-integrated (MSI) circuits, which
actually have several adders within a single integrated package.

Adders are very important in many types of digital systems in which numerical data are
processed. An understanding of their basic operation is fundamental to a through grasp of
digital systems concepts.

2
1. Half-Adder
Recall the basic rules for binary addition:
0+0=0
0+1=1
1+0=1
1 + 1 = 0 carrying 1

These operations are performed by a logic circuit called a half-adder. The half-adder accepts
two binary digits on its inputs and produces two binary digits on its outputs, a S (sum) bit and
a Co (carry) bit, as shown by the logic symbol in Figure 1.1.

Table 1.1

Figure 1.1: Half-adder and truth table

2. Full-Adder
The full-adder accepts three inputs and generates a sum output and a carry output. So the
basic difference between a full-adder and a half-adder is that the full-adder accepts an
additional input, which allows it to handle input carries. A logic symbol for a full-adder is
shown in Figure 1.2.

Comparator
The basic function of a comparator is to compare the magnitudes of two binary quantities to
determine the relationship of those quantities. It determines if a binary number is greater
than, less than or equal to another binary number.

3
Table 1.2

Figure 1.2: Full-adder and truth table

PROCEDURE

PART A: Logic Gates Circuit

1. Construct the circuit as shown in Figure 1.3 – 1.11. Refer to the Appendix A and the
data sheet for pin allocation.
2. Power ON the trainer and observe the LEDs indicator.
3. Fill in Table 1.3 – 1.11 in the result sheet with 0s and 1s to match the LEDs indications
in the right side of the table. If the LED is ON, the logic is ‘1’ and if the LED is OFF, logic
is ‘0’.
4. Write the Boolean Expression for each output.

LOGIC GATES CIRCUIT

NOT gate
(IC 7404)

Figure 1.3

4
OR gate
(IC 7432)

Figure 1.4

NOR gate
(IC 7402)
Figure1.5

AND gate
(IC 7408)
Figure 1.6

NAND gate 1
(IC 7400)
Figure 1.7

NAND gate 2
(IC 7400)

Figure 1.8

XOR gate
(IC 7486)
Figure 1.9

5
Combination
Gates 1

Figure 1.10

Combination
Gates 2

Figure 1.11

PART B: Half-Adder
1. Construct the circuit as shown in Figure 1.12 (Refer data sheet given on Appendix A).
2. Configure switch A and B according to data in result sheet Table 1.12.
3. Fill in the Table 1.12 in result sheet with 0s and 1s to match the output
(LEDs indications). If the LED is ON, the logic is ‘1’ and if the LED is OFF, logic is ‘0’.
4. Write the Boolean Expression for each output.

Figure 1.12: Half-Adder

6
PART C: Full-Adder
1. Construct the circuit as shown in Figure 1.13.
2. Configure switch A ,B and Cin according to data in result sheet Table 1.13.
3. Fill in the Table 1.13 in result sheet with 0s and 1s to match the output
(LEDs indications). If the LED is ON, the logic is ‘1’ and if the LED is OFF, logic is ‘0’.
4. Write the Boolean Expression for output S and C 0.

Figure 1.13: Full-Adder

PART D: Comparator Circuits

1 bit comparator
1. Set up the circuit as shown in Figure 1.14 using XOR, AND and NOT gate.
2. Assign your A<B and A>B logic gates accordingly.
3. Complete Table 1.14 in the result sheet.

Figure 1.14: 1 bit Comparator

7
QUESTIONS/DISCUSSION
1. A full-adder can be implemented using half-adder and OR gate. Draw the circuit using 2
block diagram symbols of half-adder and an OR gate given in Figure 2.5.
2. From Figure 1.10, explain how you were able to determine the circuit as a comparator.

CONCLUSION
In your conclusion, comment on the results obtained and the problems encountered.

REFERENCES

Ali, M.Y., Mokhtar, N.F., Hamzah, I.H., Yusuf, R., Saad, N.H., Omar, N. (2007). Laboratory
Manual: KEU 171 Electrical Engineering Laboratory 2, Logic Gates. Faculty of
Electrical Engineering, Universiti Teknologi MARA Pulau Pinang.

Tocci, R.J., Wildmer, N.S., Moss, G.L. (2007). Digital Systems: Principles and Applications.
New Jersey, USA: Pearson Prentice Hall.

8
RESULT SHEET
EXPERIMENT 1: LOGIC GATES
NAME:
GROUP: STUDENT ID: /50
PART A: Logic Gates Circuit