REGISTERS -

Introduction to Registers
Shift Registers
Lecture 1

Dronacharya Group of Institutions

Introduction: Registers
 An n-bit register has a group of n flip-flops and some
logic gates and is capable of storing n bits of
information.
 The flip-flops store the information while the gates
control when and how new information is transferred
into the register.
 Some functions of register:
 retrieve data from register
 store/load new data into register (serial or parallel)
 shift the data within register (left or right)
Simple Registers
 No external gates.
 Example: A 4-bit register. A new 4-bit data is loaded
every clock cycle.
A3 A2 A1 A0

Q Q Q Q
D D D D
CP

I3 I2 I1 I0
Registers With Parallel Load
 Instead of loading the register at every clock pulse,
we may want to control when to load.
 Loading a register: transfer new information into the
register. Requires a load control input.
 Parallel loading: all bits are loaded simultaneously.
Registers With Parallel Load
Load'.A0 + Load. I0
Load
D Q A0
I0

D Q A1
I1

D Q A2
I2

D Q A3
I3

CLK
CLEAR
Using Registers to implement
Sequential Circuits
 A sequential circuit may consist of a register
(memory) and a combinational circuit.
Next-state value

Register Combin-
Clock ational
circuit
Inputs Outputs

 The external inputs and present states of the register

determine the next states of the register and the
external outputs, through the combinational circuit.
 The combinational circuit may be implemented by
any of the methods covered in MSI components and
Programmable Logic Devices.
Using Registers to implement
Sequential Circuits
 Example 1:
A1+ = S m(4,6) = A1.x'
A2+ = S m(1,2,5,6) = A2.x' + A2'.x = A2  x
y = S m(3,7) = A2.x

Present Next
state Input State Output
A1 A2 x A1+ A2+ y
0 0 0 0 0 0 A1.x' A
0 0 1 0 1 0 1

0 1 0 0 1 0 A2x A2
0 1 1 0 0 1
1 0 0 1 0 0
x y
1 0 1 0 1 0
1 1 0 1 1 0
1 1 1 0 0 1
Using Registers to implement
Sequential Circuits
 Example 2: Repeat example 1, but use a ROM.

Address Outputs
1 2 3 1 2 3
0 0 0 0 0 0
0 0 1 0 1 0
0 1 0 0 1 0 A1
0 1 1 0 0 1 A2 8x3
1 0 0 1 0 0 ROM
1 0 1 0 1 0 x y
1 1 0 1 1 0
1 1 1 0 0 1

ROM truth table

Shift Registers

 Another function of a register, besides storage, is to

provide for data movements.
 Each stage (flip-flop) in a shift register represents
one bit of storage, and the shifting capability of a
register permits the movement of data from stage to
stage within the register, or into or out of the register
upon application of clock pulses.
Shift Registers
 Basic data movement in shift registers (four bits are
used for illustration).

Data in Data out Data out Data in

(a) Serial in/shift right/serial out (b) Serial in/shift left/serial out

Data in Data in
Data in

Data out
Data out
(c) Parallel in/serial out (d) Serial in/parallel out
Data out
(e) Parallel in /
parallel out

(f) Rotate right (g) Rotate left

Serial In/Serial Out Shift Registers
 Accepts data serially – one bit at a time – and also
produces output serially.

Serial data Q0 Q1 Q2 Q3 Serial data

D Q D Q D Q D Q
input output
C C C C

CLK
Serial In/Serial Out Shift Registers
 Application: Serial transfer of data from one register
to another.

SI SO SI SO
Shift register A Shift register B

Clock CP
Shift control

Clock

Shift Wordtime
control

CP
T1 T2 T3 T4
Serial In/Serial Out Shift Registers
 Serial-transfer example.

Timing Pulse Shift register A Shift register B Serial output of B

Initial value 1 0 1 1 0 0 1 0 0
After T1 1 1 0 1 1 0 0 1 1
After T2 1 1 1 0 1 1 0 0 0
After T3 0 1 1 1 0 1 1 0 0
After T4 1 0 1 1 1 0 1 1 1
Serial In/Parallel Out Shift Registers
 Accepts data serially.
 Outputs of all stages are available simultaneously.
Data input D Q D Q D Q D Q
C C C C

CLK

Q0 Q1 Q2 Q3

Data input D SRG 4

CLK C Logic symbol

Q0 Q1 Q2 Q3
Parallel In/Serial Out Shift Registers
 Bits are entered simultaneously, but output is serial.
Data input

D0 D1 D2 D3
SHIFT/LOAD

Serial
D Q D Q D Q D Q data
Q0 Q1 Q2 Q3 out
C C C C

CLK
SHIFT.Q0 + SHIFT'.D1
Parallel In/Serial Out Shift Registers
 Bits are entered simultaneously, but output is serial.

Data in

D0 D1 D2 D3

SHIFT/LOAD SRG 4
Serial data out
CLK C

Logic symbol
Parallel In/Parallel Out Shift Registers
 Simultaneous input and output of all data bits.
Parallel data inputs

D0 D1 D2 D3

D Q D Q D Q D Q
C C C C

CLK

Q0 Q1 Q2 Q3

Parallel data outputs

Bidirectional Shift Registers
 Data can be shifted either left or right, using a control
line RIGHT/LEFT (or simply RIGHT) to indicate the
direction.

RIGHT/LEFT

Serial
data in

RIGHT.Q0 + D Q D Q D Q D Q Q3
RIGHT'.Q2 Q1 Q2
C C C C

Q0
CLK
Bidirectional Shift Registers
 4-bit bidirectional shift register with parallel load.
Parallel outputs

A4 A3 A2 A1

Q Q Q Q
Clear
D D D D

CLK

s1 4x1 4x1 4x1 4x1

s0 MUX MUX MUX MUX
3 2 1 0 3 2 1 0 3 2 1 0 3 2 1 0

Serial
input for Serial
shift-right input for
I4 I3 I2 I1 shift-left
Parallel inputs
Bidirectional Shift Registers
 4-bit bidirectional shift register with parallel load.

Mode Control
s1 s0 Register Operation
0 0 No change
0 1 Shift right
1 0 Shift left
1 1 Parallel load
An Application – Serial Addition
 Most operations in digital computers are done in
parallel. Serial operations are slower but require less
equipment.
 A serial adder is shown below. A  A + B.
SI
Shift-right SO
Shift-register A x S
CP y FA
z C
SI
External input SO
Shift-register B
Q D

Clear
An Application – Serial Addition
 A = 0100; B = 0111. A + B = 1011 is stored in A
after 4 clock pulses.
Initial: A: 0 1 0 0 Q: 0
B: 0 1 1 1

Step 1: 0 + 1 + 0 A: 1 0 1 0 Q: 0
S = 1, C = 0 B: x 0 1 1

Step 2: 0 + 1 + 0 A: 1 1 0 1 Q: 0
S = 1, C = 0 B: x x 0 1

Step 3: 1 + 1 + 0 A: 0 1 1 0 Q: 1
S = 0, C = 1 B: x x x 0

Step 4: 0 + 0 + 1 A: 1 0 1 1 Q: 0
S = 1, C = 0 B: x x x x