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Transmission Line Multiple Fault Detection and Indication To Electricity Board

Transmission Line Multiple Fault Detection

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100% found this document useful (1 vote)
1K views

Transmission Line Multiple Fault Detection and Indication To Electricity Board

Transmission Line Multiple Fault Detection

Uploaded by

Crisp
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
You are on page 1/ 74

TRANSMISSION LINE MULTIPLE FAULT

DETECTION AND INDICATION TO


ELECTRICITY BOARD

CONTENTS

CHAPTER No TITLE
1 ABSTRACT
2 INTRODUCTION
HARDWARE
3 BLOCK DIAGRAM
4 BLOCK DIAGRAM DESCRIPTION
4.1 ABOUT PIC MICROCONTROLER
4.2 LIQUID CRYSTAL DISPLAY
4.3 ZIGBEE
4.4 CURRENT TRANSFORMER
4.5 VOLTAGE TRANSFORMER
5 OVERALL CIRCUIT DIAGRAM
6 OVERALL CIRCUIT DIAGRAM DESCRIPTION
6.1 POWER SUPPLY CIRCUIT
6.2 MICROCONTROLLER CIRCUIT
6.3 VOLTAGE MESUREMENT
6.4 ULTRASONIC SENSOR CIRCUIT
6.5 CURRENT MEASUREMENT

7 PCB DESIGN
7.1 INTRODUCTION
7.2 SOFTWARE

1
7.3 MANUFACTURING
7.4 PANELISATION
7.5 PLATING
7.6 ETCHING
7.7 SOLDER MASK
7.8 HOT AIR LEVELING
SOFTWARE
8 SOFTWARE TOOLS
8.1 KEILC COMPILER
8.2 SIMULATOR
9 ADVANTAGES
10 APPLICATIONS
11 CONCLUSION
12 REFERENCES

2
1. ABSTRACT

3
2. INTRODUCTION

Present industry is increasingly shifting towards automation. Two principle


components of today’s industrial automations are programmable controllers and robots.
In order to aid the tedious work and to serve the mankind, today there is a general
tendency to develop an intelligent operation.

The proposed system “TRANSMISSION LINE MULTIPLE FAULT DETECTION


AND INDICATION TO ELECTRICITY BOARD ” is designed and developed to
accomplish the various tasks in an adverse environment of an industry. The intelligent
machine is loaded with several units such as Voltage Measurement, Current
Measurement, microcontroller, relay and driver circuit which synchronously work with
the help of a start-of-the-art Atmel microcontroller. This Loan watcher system is an owe
to the technical advancement. This prototype system can be applied effectively and
efficiently in an expanded dimension to fit for the requirement of industrial, research and
commercial applications.

Microcontroller is the heart of the device which handles all the sub devices
connected across it. We have used as Atmel microcontroller. It has flash type
reprogrammable memory. It has some peripheral devices to play this project perform. It
also provides sufficient power to inbuilt peripheral devices. We need not give individually
to all devices. The peripheral devices also activates as low power operation mode.
These are the advantages are appear here.

4
3. BLOCK DIAGRAM

5
6
4. BLOCK DIAGRAM DESCRIPTION

4. 1 PIC MICROCONTROLLER

INTRODUCTION TO PIC MICROCONTROLLER

2.1 CONCEPTS OF MICROCONTROLLER :


Microcontroller is a general
purpose device, which integrates a number of the components of a
microprocessor system on to single chip. It has inbuilt CPU, memory and
peripherals to make it as a mini computer. A microcontroller combines on to the
same microchip:

 The CPU core


 Memory(both ROM and RAM)
 Some parallel digital i/o

Microcontrollers will combine other devices such as:


 A timer module to allow the microcontroller to perform tasks for certain
time periods.
 A serial i/o port to allow data to flow between the controller and other
devices such as a PIC or another microcontroller.
 An ADC to allow the microcontroller to accept analogue input data for
processing.

Microcontrollers are :
 Smaller in size

7
 Consumes less power
 Inexpensive

Micro controller is a stand alone unit ,which can perform functions


on its own without any requirement for additional hardware like i/o ports and
external memory.
The heart of the microcontroller is the CPU core. In the past, this has traditionally
been based on a 8-bit microprocessor unit. For example Motorola uses a basic
6800 microprocessor core in their 6805/6808 microcontroller devices.
In the recent years, microcontrollers have been
developed around specifically designed CPU cores, for example the microchip PIC
range of microcontrollers.

2.2 INTRODUCTION TO PIC :


The microcontroller that has been used for this
project is from PIC series. PIC microcontroller is the first RISC based
microcontroller fabricated in CMOS (complimentary metal oxide semiconductor)
that uses separate bus for instruction and data allowing simultaneous access of
program and data memory.
The main advantage of CMOS and RISC
combination is low power consumption resulting in a very small chip size with a
small pin count. The main advantage of CMOS is that it has immunity to noise
than other fabrication techniques.

PIC (16F877) :
Various microcontrollers offer different kinds of
memories. EEPROM, EPROM, FLASH etc. are some of the memories of which

8
FLASH is the most recently developed. Technology that is used in pic16F877 is
flash technology, so that data is retained even when the power is switched off.
Easy Programming and Erasing are other features of PIC 16F877.

PIC START PLUS PROGRAMMER :


The PIC start plus development system from
microchip technology provides the product development engineer with a highly
flexible low cost microcontroller design tool set for all microchip PIC micro
devices. The picstart plus development system includes PIC start plus development
programmer and mplab ide.
The PIC start plus programmer gives the product developer
ability to program user software in to any of the supported microcontrollers. The
PIC start plus software running under mplab provides for full interactive control
over the programmer.

2.3 SPECIAL FEATURES OF PIC MICROCONTROLLER :

CORE FEATURES :
• High-performance RISC CPU
• Only 35 single word instructions to learn
• All single cycle instructions except for program branches which are two cycle
• Operating speed: DC - 20 MHz clock input
DC - 200 ns instruction cycle
• Up to 8K x 14 words of Flash Program Memory,
Up to 368 x 8 bytes of Data Memory (RAM)
Up to 256 x 8 bytes of EEPROM data memory
• Pin out compatible to the PIC16C73/74/76/77
• Interrupt capability (up to 14 internal/external

9
• Eight level deep hardware stack
• Direct, indirect, and relative addressing modes
• Power-on Reset (POR)
• Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
• Watchdog Timer (WDT) with its own on-chip RC Oscillator for reliable
operation
• Programmable code-protection
• Power saving SLEEP mode
• Selectable oscillator options
• Low-power, high-speed CMOS EPROM/EEPROM technology
• Fully static design
• In-Circuit Serial Programming (ICSP) via two pins
• Only single 5V source needed for programming capability
• In-Circuit Debugging via two pins
• Processor read/write access to program memory
• Wide operating voltage range: 2.5V to 5.5V
• High Sink/Source Current: 25 mA
• Commercial and Industrial temperature ranges
• Low-power consumption:
< 2mA typical @ 5V, 4 MHz
20mA typical @ 3V, 32 kHz
< 1mA typical standby current

PERIPHERAL FEATURES :
• Timer0: 8-bit timer/counter with 8-bit prescaler
• Timer1: 16-bit timer/counter with prescaler, can be incremented during sleep
via external crystal/clock

10
• Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
• Two Capture, Compare, PWM modules
Capture is 16-bit, max resolution is 12.5 ns,
Compare is 16-bit, max resolution is 200 ns,
PWM max. resolution is 10-bit
• 10-bit multi-channel Analog-to-Digital converter
• Synchronous Serial Port (SSP) with SPI. (Master Mode) and I2C.
(Master/Slave)
• Universal Synchronous Asynchronous Receiver Transmitter (USART/SCI) with
9- bit address detection.
• Brown-out detection circuitry for Brown-out Reset (BOR)

2.4 ARCHITECTURE OF PIC 16F877 :


The complete architecture of PIC
16F877 is shown in the fig 2.1. Table 2.1 gives details about the specifications of
PIC 16F877. Fig 2.2 shows the complete pin diagram of the IC PIC 16F877.

FIG 2.1 ARCHITECTURE OF PIC 16F877

11
12
TABLE 2.1 SPECIFICATIONS

DATA DATA
DEVICE PROGRAM FLASH
MEMORY EEPROM
PIC
8K 368 Bytes 256 Bytes
16F877

FIG 2.2 PIN DIAGRAM OF PIC 16F877

13
TABLE 2.2 PIN OUT DESCRIPTION

14
Legend: I = input O = output I/O = input/output P = power
— = Not used TTL = TTL input ST = Schmitt Trigger input
Note
1. This buffer is a Schmitt Trigger input when configured as an external interrupt
2. This buffer is a Schmitt Trigger input when used in serial programming mode.
3. This buffer is a Schmitt Trigger input when configured as general purpose I/O
and a TTL

15
input when used in the Parallel Slave Port mode (for interfacing to a
microprocessor bus).
4. This buffer is a Schmitt Trigger input when configured in RC oscillator mode
and a
CMOS input otherwise.

Legend: I = input O = output I/O = input/output P = power


— = Not used TTL = TTL input ST = Schmitt Trigger input
Note :

16
1. This buffer is a Schmitt Trigger input when configured as an external interrupt.
2. This buffer is a Schmitt Trigger input when used in serial programming mode.
3. This buffer is a Schmitt Trigger input when configured as general purpose I/O
and a TTL
input when used in the Parallel Slave Port mode (for interfacing to a
microprocessor bus).
4. This buffer is a Schmitt Trigger input when configured in RC oscillator mode
and a
CMOS input otherwise.

2.5 I/O PORTS :


Some pins for these I/O ports are multiplexed with an alternate
function for the peripheral features on the device. In general, when a peripheral is
enabled, that pin may not be used as a general purpose I/O pin.
Additional Information on I/O ports may be found in the IC
micro™ Mid-Range Reference Manual,

PORTA AND THE TRISA REGISTER :


PORTA is a 6-bit wide bi-directional port. The corresponding
data direction register is TRISA. Setting a TRISA bit (=1) will make the
corresponding PORTA pin an input, i.e., put the corresponding output driver in a
Hi-impedance mode. Clearing a TRISA bit (=0) will make the corresponding
PORTA pin an output, i.e., put the contents of the output latch on the selected pin.
Reading the PORTA register reads the status of the
pins whereas writing to it will write to the port latch. All write operations are read-
modify-write operations. Therefore a write to a port implies that the port pins are
read; this value is modified, and then written to the port data latch. Pin RA4 is

17
multiplexed with the Timer0 module clock input to become the RA4/T0CKI pin.
The RA4/T0CKI pin is a Schmitt Trigger input and an open drain output. All other
RA port pins have TTL input levels and full CMOS output drivers. Other PORTA
pins are multiplexed with analog inputs and analog VREF input. The operation of
each pin is selected by clearing/setting the control bits in the ADCON1 register
(A/D Control Register1).
The TRISA register controls the direction of the RA pins, even when they
are being used as analog inputs. The user must ensure the bits in the TRISA
register are maintained set when using them as analog inputs.

TABLE 2.3 PORT A FUNCTION

Legend: TTL = TTL input, ST = Schmitt Trigger input

TABLE 2.4 SUMMARY OF REGISTERS ASSOCIATED WITH PORTA

18
Legend: x = unknown, u = unchanged, - = unimplemented locations
read as '0'. Shaded cells are not used by PORTA.

PORTB AND TRISB REGISTER :

PORTB is an 8-bit wide bi-directional port.


The corresponding data direction register is TRISB. Setting a TRISB bit (=1) will
make the corresponding PORTB pin an input, i.e., put the corresponding output
driver in a hi-impedance mode. Clearing a TRISB bit (=0) will make the
corresponding PORTB pin an output, i.e., put the contents of the output latch on
the selected pin. Three pins of PORTB are multiplexed with the Low Voltage
Programming function; RB3/PGM, RB6/PGC and RB7/PGD. The alternate
functions of these pins are described in the Special Features Section. Each of the
PORTB pins has a weak internal pull-up. A single control bit can turn on all the
pull-ups.
This is performed by clearing bit RBPU
(OPTION_REG<7>). The weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are disabled on a Power-on Reset.

Four of PORT B’s pins, RB7:RB4, have an interrupt on


change feature. Only pins configured as inputs can cause this interrupt to occur
(i.e. any RB7:RB4 pin configured as an output is excluded from the interrupt on
change comparison). The input pins (of RB7:RB4) are compared with the old value
latched on the last read of PORTB. The “mismatch” outputs of RB7:RB4 are
OR’ed together to generate the RB Port Change Interrupt with flag bit RBIF
(INTCON<0>). This interrupt can wake the device from SLEEP. The user, in the
interrupt service routine, can clear the interrupt in the following manner:

19
a) Any read or write of PORTB. This will end the mismatch condition.
b) Clear flag bit RBIF. A mismatch condition will continue to set flag
bit RBIF. Reading PORTB will end the mismatch condition, and allow flag bit
RBIF to be cleared. The interrupt on change feature is recommended for wake-up
on key depression operation and operations where PORTB is only used for the
interrupt on change feature. Polling of PORTB is not recommended while using the
interrupt on change feature. This interrupt on mismatch feature, together with
software configurable pull-ups on these four pins, allow easy interface to a keypad
and make it possible for wake-up on key depression

TABLE 2.5 PORT B FUNCTIONS

20
TABLE 2.6 SUMMARY OF REGISTERS ASSOCIATED WITH PORTB

PORTC AND THE TRISC REGISTER :


PORTC is an 8-bit wide bi-directional port.
The corresponding data direction register is TRISC. Setting a TRISC bit (=1) will
make the corresponding PORTC pin an input, i.e., put the corresponding output
driver in a hi-impedance mode. Clearing a TRISC bit (=0) will make the
corresponding PORTC pin an output, i.e., put the contents of the output latch on

21
the selected pin. PORTC is multiplexed with several peripheral functions. PORTC
pins have Schmitt Trigger input buffers.

When the I2C module is enabled, the


PORTC (3:4) pins can be configured with normal I2C levels or with SMBUS
levels by using the CKE bit (SSPSTAT <6>). When enabling peripheral functions,
care should be taken in defining TRIS bits for each PORTC pin. Some peripherals
override the TRIS bit to make a pin an output, while other peripherals override the
TRIS bit to make a pin an input. Since the TRIS bit override is in effect while the
peripheral is enabled, read-modify write instructions (BSF, BCF, XORWF) with
TRISC as destination should be avoided. The user should refer to the
corresponding peripheral section for the correct TRIS bit settings.

TABLE 2.7 PORTC FUNCTIONS

TABLE 2.8 SUMMARY OF REGISTERS ASSOCIATED WITH PORTC

22
PORTD AND TRISD REGISTERS :
This section is not applicable to the 28-pin
devices. PORTD is an 8-bit port with Schmitt Trigger input buffers. Each pin is
individually configurable as an input or output. PORTD can be configured as an 8-
bit wide microprocessor Port (parallel slave port) by setting control bit PSPMODE
(TRISE<4>). In this mode, the input buffers are TTL.

TABLE 2.9 PORTD FUNCTIONS

TABLE 2.10 SUMMARY OF REGISTERS ASSOCIATED WITH PORTD

23
PORTE AND TRISE REGISTER :
PORTE has three pins RE0/RD/AN5,
RE1/WR/AN6 and RE2/CS/AN7, which are individually configurable as inputs or
outputs. These pins have Schmitt Trigger input buffers.
The PORTE pins become control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is set. In this mode, the user
must make sure that the TRISE<2:0> bits are set (pins are configured as digital
inputs). Ensure ADCON1 is configured for digital I/O. In this mode the input
buffers are TTL.
PORTE pins are multiplexed with analog inputs.
When selected as an analog input, these pins will read as '0's. TRISE controls the
direction of the RE pins, even when they are being used as analog inputs. The user
must make sure to keep the pins configured as inputs when using them as analog
inputs.

TABLE 2.11 PORTE FUNCTIONS

24
TABLE 2.12 SUMMARY OF REGISTERS ASSOCIATED WITH PORTE

2.6 MEMORY ORGANISATION :


There are three memory blocks in each of
the PIC16F877 MUC’s. The program memory and Data Memory have separate
buses so that concurrent access can occur.

PROGRAM MEMORY ORGANISATION :


The PIC16f877 devices have a 13-bit
program counter capable of addressing 8K *14 words of FLASH program memory.

25
Accessing a location above the physically implemented address will cause a
wraparound.
The RESET vector is at 0000h and the interrupt vector is at 0004h.

DATA MEMORY ORGANISTION :


The data memory is partitioned into multiple
banks which contain the General Purpose Registers and the special functions
Registers. Bits RP1 (STATUS<6) and RP0 (STATUS<5>) are the bank selected bits.
RP1:RP0 Banks
00 0
01 1
10 2
11 3

Each bank extends up to 7Fh (1238 bytes).


The lower locations of each bank are reserved for the Special Function Registers.
Above the Special Function Registers are General Purpose Registers, implemented
as static RAM. All implemented banks contain special function registers. Some
frequently used special function registers from one bank may be mirrored in
another bank for code reduction and quicker access.

PIC16F877 REGISTER FILE MAP

26
27
GENERAL PURPOSE REGISTER FILE :
The register file can be accessed either
directly or indirectly through the File Selected Register (FSR). There are some
Special Function Registers used by the CPU and peripheral modules for controlling
the desired operation of the device. These registers are implemented as static
RAM. The Special Function Registers can be classified into two sets; core (CPU)
and peripheral. Those registers associated with the core functions.

2.7 INSTRUCTION SET SUMMARY :


Each PIC 16f877 instruction is a 14-bit
word, divided into an OPCODE which specifies the instruction type and one or
more operand which further specify the operation of the instruction. The
PIC16F877 instruction set summary in Table 2.13 lists byte-oriented, bit-
oriented, and literal and control operations. It shows the opcode Field
descriptions.

TABLE 2.13 OPCODE FIELD DESCRIPTIONS

28
For byte-oriented instructions, ‘f’
represents a file register designator and ’d’ represents a destination designator. The
file register designator specifies which file register is to be used by the instruction.
The destination designator specified where the result of the operation is to be
placed. If ‘d’ is zero, the result is placed in the w register. If ‘d’ is one, the result is
placed in the file register specified in the instruction.

For bit-oriented instructions, ‘b’ represents


a bit field designator which selects the number of the bit affected by the operation,
which ‘f’ represents the address of the file in which the bits is located. For literal
and control operations, ‘k’ represents an eight or eleven bit constant or literal
value.

29
The instruction set is highly orthogonal and is grouped into three basic
categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
All instructions are executed within one
single instruction cycle, unless a conditional test is true or the program counter is
changed as a result of an instruction. In this case, the execution takes two
instruction cycles with the second cycle executed as a NOP. One instruction cycle
consists of four oscillator periods. Thus, for an oscillator frequency of 4 MHz, the
normal instruction execution time is 1 ms. If a conditional test is true or the
program counter is changed as a result of an instruction, then the instruction
execution time is 2 ms.

TABLE 2.14 16F877 INSTRUCTION SET

30
31
GENERAL FORMAT FOR INSTRUCTIONS :

32
4.2 LIQUID CRYSTAL DISPLAY (LCD)

Liquid crystal displays (LCD’s) have materials, which combine the properties of
both liquids and crystals. Rather than having a melting point, they have a temperature
range within which the molecules are almost as mobile as they would be in a liquid, but
are grouped together in an ordered form similar to a crystal.

An LCD consists of two glass panels, with the liquid crystal material sand witched
in between them. The inner surface of the glass plates are coated with transparent
electrodes which define the character, symbols or patterns to be displayed polymeric
layers are present in between the electrodes and the liquid crystal, which makes the
liquid crystal molecules to maintain a defined orientation angle.

One each polarizes are pasted outside the two glass panels. These polarizes
would rotate the light rays passing through them to a definite angle, in a particular
direction. When the LCD is in the off state, light rays are rotated by the two polarizes
and the liquid crystal, such that the light rays come out of the LCD without any
orientation, and hence the LCD appears transparent.

When sufficient voltage is applied to the electrodes, the liquid crystal molecules
would be aligned in a specific direction. The light rays passing through the LCD would
be rotated by the polarizes, which would result in activating / highlighting the desired
characters. The LCD’s are lightweight with only a few millimeters thickness. Since the
LCD’s consume less power, they are compatible with low power electronic circuits, and
can be powered for long durations.

The LCD does not generate light and so light is needed to read the display. By
using backlighting, reading is possible in the dark. The LCD’s have long life and a wide
operating temperature range. Changing the display size or the layout size is relatively
simple which makes the LCD’s more customers friendly.

33
The LCDs used exclusively in watches, calculators and measuring instruments
are the simple seven-segment displays, having a limited amount of numeric data. The
recent advances in technology have resulted in better legibility, more information
displaying capability and a wider temperature range. These have resulted in the LCDs
being extensively used in telecommunications and entertainment electronics. The LCDs
have even started replacing the cathode ray tubes (CRTs) used for the display of text
and graphics, and also in small TV applications.

Crystalonics dot–matrix (alphanumeric) liquid crystal displays are available in


TN, STN types, with or without backlight. The use of C-MOS LCD controller and driver
ICs result in low power consumption. These modules can be interfaced with a 4-bit or 8-
bit microprocessor /Micro controller.

 The built-in controller IC has the following features:


 Correspond to high speed MPU interface (2MHz)
 80 x 8 bit display RAM (80 Characters max)
 9,920-bit character generator ROM for a total of 240 character fonts. 208 character
fonts (5 x 8 dots) 32 character fonts (5 x 10 dots)
 64 x 8 bit character generator RAM 8 character generator RAM 8 character fonts (5
x 8 dots) 4 characters fonts (5 x 10 dots)
 Programmable duty cycles
 1/8 – for one line of 5 x 8 dots with cursor
 1/11 – for one line of 5 x 10 dots with cursor
 1/16 – for one line of 5 x 8 dots with cursor
 Wide range of instruction functions display clear, cursor home, display on/off, cursor
on/off, display character blink, cursor shift, display shift.
 Automatic reset circuit, which initializes the controller / driver ICs after power on.

34
4.3 ZIGBEE

ZIGBEE:

The mission of the ZigBee Working Group is to bring about the existence of a
broad range of interoperable consumer devices by establishing open industry
specifications for unlicensed, untethered peripheral, control and entertainment
devices requiring the lowest cost and lowest power consumption communications
between compliant devices anywhere in and around the home.

The ZigBee specification is a combination of HomeRF Lite and the 802.15.4


specification. The spec operates in the 2.4GHz (ISM) radio band - the same band
as 802.11b standard, Bluetooth, microwaves and some other devices. It is capable
of connecting 255 devices per network. The specification supports data
transmission rates of up to 250 Kbps at a range of up to 30 meters. ZigBee's
technology is slower than 802.11b (11 Mbps) and Bluetooth (1 Mbps) but it
consumes significantly less power.

ZigBee/ General Characteristics:


1 Dual PHY (2.4GHz and 868/915 MHz)
2 Data rates of 250 kbps (@2.4 GHz), 40 kbps (@ 915 MHz), and 20 kbps
(@868 MHz)
3 Optimized for low duty-cycle applications (<0.1%)
4 CSMA-CA channel access Yields high throughput and low latency for low
duty cycle devices like sensors and controls
5 Low power (battery life multi-month to years)
6 Multiple topologies: star, peer-to-peer, mesh

35
7 Addressing space of up to:
- 18,450,000,000,000,000,000 devices (64 bit IEEE address)
- 65,535 networks
8 Optional guaranteed time slot for applications requiring low latency
9 Fully hand-shaked protocol for transfer reliability
10 Range: 50m typical (5-500m based on environment)

ZigBee - Typical Traffic Types Addressed


1 Periodic data
2 Application defined rate (e.g., sensors)
3 Intermittent data
4 Application/external stimulus defined rate (e.g., light switch)
5 Repetitive low latency data

ZigBee is an established set of specifications for wireless personal area networking


(WPAN), i.e. digital radio connections between computers and related devices.

WPAN Low Rate or ZigBee provides specifications for devices that have low data
rates, consume very low power and are thus characterized by long battery life.
ZigBee makes possible completely networked homes where all devices are able to
communicate and be controlled by a single unit.

There are three different ZigBee device types that operate on these layers in any
self-organizing application network. These devices have 64-bit IEEE addresses,
with option to enable shorter addresses to reduce packet size, and work in either of
two addressing modes – star and peer-to-peer.

36
1. The ZigBee coordinator node: There is one, and only one, ZigBee coordinator
in each network to act as the router to other networks, and can be likened to the
root of a (network) tree. It is designed to store information about the network.

2. The full function device FFD: The FFD is an intermediary router transmitting
data from other devices. It needs lesser memory than the ZigBee coordinator node,
and entails lesser manufacturing costs. It can operate in all topologies and can act
as a coordinator.
3. The reduced function device RFD: This device is just capable of talking in the
network; it cannot relay data from other devices. Requiring even less memory, (no
flash, very little ROM and RAM), an RFD will thus be cheaper than an FFD. This
device talks only to a network coordinator and can be implemented very simply in
star topology.

ZigBee/ addresses three typical traffic types. MAC can accommodate all the types.

37
1. Data is periodic. The application dictates the rate, and the sensor activates
checks for data and deactivates.
2. Data is intermittent. The application, or other stimulus, determines the rate, as in
the case of say smoke detectors. The device needs to connect to the network only
when communication is necessitated. This type enables optimum saving on energy.
3. Data is repetitive, and the rate is fixed a priori. Depending on allotted time slots,
called GTS (guaranteed time slot), devices operate for fixed durations.
ZigBee employs either of two modes, beacon or non-beacon to enable the to-and-
fro data traffic. Beacon mode is used when the coordinator runs on batteries and
thus offers maximum power savings, whereas the non-beacon mode finds favour
when the coordinator is mains-powered.
In the beacon mode, a device watches out for the coordinator's beacon that gets
transmitted at periodically, locks on and looks for messages addressed to it. If
message transmission is complete, the coordinator dictates a schedule for the next
beacon so that the device ‘goes to sleep'; in fact, the coordinator itself switches to
sleep mode.
While using the beacon mode, all the devices in a mesh network know when to
communicate with each other. In this mode, necessarily, the timing circuits have to
be quite accurate, or wake up sooner to be sure not to miss the beacon. This in turn
means an increase in power consumption by the coordinator's receiver, entailing an
optimal increase in costs.

38
Figure 1: Beacon Network Communication [ZigBee: 'Wireless Control That
Simply Works']

The non-beacon mode will be included in a system where devices are ‘asleep'
nearly always, as in smoke detectors and burglar alarms. The devices wake up and
confirm their continued presence in the network at random intervals.

On detection of activity, the sensors ‘spring to attention', as it were, and transmit to


the ever-waiting coordinator's receiver (since it is mains-powered). However, there
is the remotest of chances that a sensor finds the channel busy, in which case the
receiver unfortunately would ‘miss a call'.

39
Figure 2: Non-Beacon Network Communication [ZigBee: 'Wireless Control That
Simply Works']

The functions of the Coordinator, which usually remains in the receptive


mode, encompass network set-up, beacon transmission, node management, storage
of node information and message routing between nodes.
The network node, however, is meant to save energy (and so ‘sleeps' for
long periods) and its functions include searching for network availability, data
transfer, checks for pending data and queries for data from the coordinator.

Figure 1: ZigBee Network Model [ZigBee: 'Wireless Control That Simply Works']

40
For the sake of simplicity without jeopardizing robustness, this particular IEEE
standard defines a quartet frame structure and a super-frame structure used
optionally only by the coordinator.
The four frame structures are
1 Beacon frame for transmission of beacons
2 Data frame for all data transfers
3 Acknowledgement frame for successful frame receipt confirmations
4 MAC command frame
These frame structures and the coordinator's super-frame structure play critical
roles in security of data and integrity in transmission.

All protocol layers contribute headers and footers to the frame structure, such that
the total overheads for each data packet range are from 15 octets (for short
addresses) to 31 octets (for 64-bit addresses).
The coordinator lays down the format for the super-frame for sending beacons after
every 15.38 ms or/and multiples thereof, up to 252s. This interval is determined a
priori and the coordinator thus enables sixteen time slots of identical width
between beacons so that channel access is contention-less. Within each time slot,
access is contention-based. Nonetheless, the coordinator provides as many as seven
GTS (guaranteed time slots) for every beacon interval to ensure better quality.

The ZigBee Alliance targets applications "across consumer, commercial, industrial


and government markets worldwide".

41
Unwired applications are highly sought after in many networks that are
characterized by numerous nodes consuming minimum power and enjoying long
battery lives.

ZigBee technology is designed to best suit these applications, for the reason that it
enables reduced costs of development, very fast market adoption, and rapid ROI.

Airbee Wireless Inc has tied up with Radio crafts AS to deliver "out-of-the-box"
ZigBee-ready solutions; the former supplying the software and the latter making
the module platforms. With even light controls and thermostat producers joining
the ZigBee Alliance, the list is growing healthily and includes big OEM names like
HP, Philips, Motorola and Intel.

With ZigBee designed to enable two-way communications, not only will the
consumer be able to monitor and keep track of domestic utilities usage, but also
feed it to a computer system for data analysis.

A recent analyst report issued by West Technology Research Solutions estimates


that by the year 2008, "annual shipments for ZigBee chipsets into the home
automation segment alone will exceed 339 million units," and will show up in
"light switches, fire and smoke detectors, thermostats, appliances in the kitchen,
video and audio remote controls, landscaping, and security systems."

Futurists are sure to hold ZigBee up and say, "See, I told you so". The ZigBee
Alliance is nearly 200 strong and growing, with more OEM's signing up. This
means that more and more products and even later, all devices and their controls
will be based on this standard. Since Wireless personal Area Networking applies

42
not only to household devices, but also to individualized office automation
applications, ZigBee is here to stay. It is more than likely the basis of future home-
networking solutions.

43
4.3 CURRENT TRANSFORMER

This transformer is designed to monitor the supply current. The supply current
that has to monitor is step down by the current transformer. The step down current is
converted by the voltage with the help of shunt resistor. Then the converted voltage is
rectified by the precision rectifier. The precision rectifier is a configuration obtained with
an operational amplifier in order to have a circuit behaving like an ideal diode or rectifier.

4.4 SHUNT RESITER

A shunt can also be used to measure current. In this case a resistor of accurately-
known resistance, the shunt, is placed in series so that all the current to be measured
will flow through it. Since the resistance is known, by measuring the voltage drop across
it, one can calculate the current flowing.

In order not to disrupt the circuit, the resistance of the shunt is normally very small.
Shunts are rated by maximum current and voltage drop at that current, for example, a
500 A/50 mV shunt would have a maximum allowable current of 500 amps and at that
current the voltage drop would be 50 millivolts. By convention, most shunts are
designed to drop 50 mV when operating at their full rated current and most "ammeters"
are actually designed as voltmeters that reach full-scale deflection at 50 mV.

If the current being measured is also at a high voltage potential this voltage will be
present in the enclosure containing the reading instrument. Sometimes, the shunt is
inserted in the return leg (low voltage side) to avoid this problem. Another solution is to
use a Hall Effect (non-contact) current sensor instead of a shunt.

44
POTENTIAL TRANSFORMER

Voltage transformers (VT) or potential transformers (PT) are another type of


instrument transformer, used for metering and protection in high-voltage circuits.
They are designed to present negligible load to the supply being measured and to
have a precise voltage ratio to accurately step down high voltages so that metering
and protective relay equipment can be operated at a lower potential. Typically the
secondary of a voltage transformer is rated for 69 V or 120 V at rated primary
voltage, to match the input ratings of protection relays.

The transformer winding high-voltage connection points are typically labeled as


H1, H2 (sometimes H0 if it is internally grounded) and X 1, X2 and sometimes an X3
tap may be present. Sometimes a second isolated winding (Y 1, Y2, Y3) may also be
available on the same voltage transformer. The high side (primary) may be
connected phase to ground or phase to phase. The low side (secondary) is usually
phase to ground.

45
The terminal identifications (H1, X1, Y1, etc.) are often referred to as polarity. This
applies to current transformers as well. At any instant terminals with the same
suffix numeral have the same polarity and phase. Correct identification of
terminals and wiring is essential for proper operation of metering and protection
relays.

Some meters operate directly on the secondary service voltages at or below 600 V.
VTs are typically used for higher voltages (for example, 765 kV for power
transmission) , or where isolation is desired between the meter and the measured
circuit.

46
GPS ANTENNA

We're interested in designing, building, and testing a GPS antenna that would be
implemented on the body or inside of a vehicle. This antenna would be different than
others on the market in that it would not only utilize the L1 frequency (1575.42 MHz),
but also the L5 frequency (1176.45 MHz) to be introduced in the future. Our goal is to
also make it interoperable with the European counterpart to GPS, Galileo which uses
1164–1214 MHz and 1563–1591 MHz bands. In addition, we intend to gather the
specifications for the LNA that would be needed for our specific antenna based on its
gain, impedance, and other characteristics. If time allows, we intend to design and
simulate the LNA using Agilent's Advanced Design System software package at the end
as well.

Benefits:
 Antenna could be used presently because it would be utilizing the
presently available L1 frequency
 L5 frequency will allow compatibility with the modernized GPS system in
the future
 Be interoperable with the Galileo system so receiver would be capable of
working with that system once it’s fully online and functional
 Receiver would need only one antenna for both L1 and L5 frequencies

Features:
 Ability to receive both the presently available L1 frequency and the L5
frequency to be introduced in the future
 Interoperability with the Galileo system would allow receiver manufacturer
to utilize this antenna

47
5. OVERALL CIRCUIT DIAGRAM

48
6. OVERALL CIRCUIT DIAGRAM DESCRIPTION

6.1 POWER SUPPLY DESCRIPTION

Block diagram

The ac voltage, typically 220V rms, is connected to a transformer, which steps


that ac voltage down to the level of the desired dc output. A diode rectifier then provides
a full-wave rectified voltage that is initially filtered by a simple capacitor filter to produce
a dc voltage. This resulting dc voltage usually has some ripple or ac voltage variation.
A regulator circuit removes the ripples and also remains the same dc value even
if the input dc voltage varies, or the load connected to the output dc voltage changes.
This voltage regulation is usually obtained using one of the popular voltage regulator IC
units.

TRANSFORMER RECTIFIER FILTER IC REGULATOR LOAD

Block diagram (Power supply)

49
Working principle

Transformer

The transformer will step down the power supply voltage (0-230V) to (0-6V) level. Then
the secondary of the potential transformer will be connected to the precision rectifier,
which is constructed with the help of op–amp. The advantages of using precision
rectifier are it will give peak voltage output as DC; rest of the circuits will give only RMS
output.

Bridge rectifier

When four diodes are connected as shown in figure, the circuit is called as bridge
rectifier. The input to the circuit is applied to the diagonally opposite corners of the
network, and the output is taken from the remaining two corners.

Let us assume that the transformer is working properly and there is a positive
potential, at point A and a negative potential at point B. the positive potential at point A
will forward bias D3 and reverse bias D4.

The negative potential at point B will forward bias D1 and reverse D2. At this time
D3 and D1 are forward biased and will allow current flow to pass through them; D4 and
D2 are reverse biased and will block current flow.

The path for current flow is from point B through D1, up through RL, through D3,
through the secondary of the transformer back to point B. this path is indicated by the
solid arrows. Waveforms (1) and (2) can be observed across D1 and D3.

50
One-half cycle later the polarity across the secondary of the transformer reverse,
forward biasing D2 and D4 and reverse biasing D1 and D3. Current flow will now be
from point A through D4, up through RL, through D2, through the secondary of T1, and
back to point A. This path is indicated by the broken arrows. Waveforms (3) and (4) can
be observed across D2 and D4. The current flow through RL is always in the same
direction. In flowing through RL this current develops a voltage corresponding to that
shown waveform (5). Since current flows through the load (RL) during both half cycles
of the applied voltage, this bridge rectifier is a full-wave rectifier.

One advantage of a bridge rectifier over a conventional full-wave rectifier is that


with a given transformer the bridge rectifier produces a voltage output that is nearly
twice that of the conventional full-wave circuit.

This may be shown by assigning values to some of the components shown in


views A and B. assume that the same transformer is used in both circuits. The peak
voltage developed between points X and y is 1000 volts in both circuits. In the
conventional full-wave circuit shown—in view A, the peak voltage from the center tap to
either X or Y is 500 volts. Since only one diode can conduct at any instant, the
maximum voltage that can be rectified at any instant is 500 volts.

The maximum voltage that appears across the load resistor is nearly-but never
exceeds-500 v0lts, as result of the small voltage drop across the diode. In the bridge
rectifier shown in view B, the maximum voltage that can be rectified is the full secondary
voltage, which is 1000 volts. Therefore, the peak output voltage across the load resistor
is nearly 1000 volts. With both circuits using the same transformer, the bridge rectifier
circuit produces a higher output voltage than the conventional full-wave rectifier circuit.

51
IC voltage regulators

Voltage regulators comprise a class of widely used ICs. Regulator IC units


contain the circuitry for reference source, comparator amplifier, control device, and
overload protection all in a single IC. IC units provide regulation of either a fixed positive
voltage, a fixed negative voltage, or an adjustably set voltage. The regulators can be
selected for operation with load currents from hundreds of milli amperes to tens of
amperes, corresponding to power ratings from milli watts to tens of watts.

Circuit diagram (Power supply)

A fixed three-terminal voltage regulator has an unregulated dc input voltage, Vi,


applied to one input terminal, a regulated dc output voltage, Vo, from a second terminal,
with the third terminal connected to ground.

52
The series 78 regulators provide fixed positive regulated voltages from 5 to 24
volts. Similarly, the series 79 regulators provide fixed negative regulated voltages from 5
to 24 volts.
 For ICs, microcontroller, LCD --------- 5 volts
 For alarm circuit, op-amp, relay circuits ---------- 12 volts

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6.2 PIC MICROCONTROLLER CIRCUIT

54
PORTB AND TRISB REGISTER :

PORTB is an 8-bit wide bi-directional


port. The corresponding data direction register is TRISB. Setting a TRISB
bit (=1) will make the corresponding PORTB pin an input, i.e., put the
corresponding output driver in a hi-impedance mode. Clearing a TRISB bit
(=0) will make the corresponding PORTB pin an output, i.e., put the
contents of the output latch on the selected pin. Three pins of PORTB are
multiplexed with the Low Voltage Programming function; RB3/PGM,
RB6/PGC and RB7/PGD. The alternate functions of these pins are described
in the Special Features Section. Each of the PORTB pins has a weak internal
pull-up. A single control bit can turn on all the pull-ups.
This is performed by clearing bit RBPU
(OPTION_REG<7>). The weak pull-up is automatically turned off when the
port pin is configured as an output. The pull-ups are disabled on a Power-on
Reset.

Four of PORT B’s pins, RB7:RB4, have an


interrupt on change feature. Only pins configured as inputs can cause this
interrupt to occur (i.e. any RB7:RB4 pin configured as an output is excluded
from the interrupt on change comparison). The input pins (of RB7:RB4) are
compared with the old value latched on the last read of PORTB. The
“mismatch” outputs of RB7:RB4 are OR’ed together to generate the RB Port
Change Interrupt with flag bit RBIF (INTCON<0>). This interrupt can wake
the device from SLEEP. The user, in the interrupt service routine, can clear
the interrupt in the following manner:

55
a) Any read or write of PORTB. This will end the mismatch
condition.
b) Clear flag bit RBIF. A mismatch condition will continue to
set flag bit RBIF. Reading PORTB will end the mismatch condition, and
allow flag bit RBIF to be cleared. The interrupt on change feature is
recommended for wake-up on key depression operation and operations
where PORTB is only used for the interrupt on change feature. Polling of
PORTB is not recommended while using the interrupt on change feature.
This interrupt on mismatch feature, together with software configurable pull-
ups on these four pins, allow easy interface to a keypad and make it possible
for wake-up on key depression

56
.

57
6.3 VOLAGE MEASUREMENT

This circuit is designed to monitor the supply voltage. The supply voltage that has to
monitor is step down by the potential transformer. Usually we are using the 0-6v potential
transformer. The step down voltage is rectified by the precision rectifier. The precision rectifier is
a configuration obtained with an operational amplifier in order to have a circuit behaving like an
ideal diode or rectifier.
The full wave rectifier is the combination of half wave precision rectifer and summing
amplifier. When the input voltage is negative, there is a negative voltage on the diode, too, so it
works like an open circuit, there is no current in the load and the output voltage is zero. When the

58
input is positive, it is amplified by the operational amplifier and it turns the diode on. There is
current in the load and, because of the feedback, the output voltage is equal to the input.
In this case, when the input is greater than zero, D2 is ON and D1 is OFF, so the output
is zero. When the input is less than zero, D2 is OFF and D1 is ON, and the output is like the
input with an amplification of − R2 / R1. The full-wave rectifier depends on the fact that both the
half-wave rectifier and the summing amplifier are precision circuits. It operates by producing an
inverted half-wave-rectified signal and then adding that signal at double amplitude to the original
signal in the summing amplifier. The result is a reversal of the selected polarity of the input
signal.
Then the output of the rectified voltage is adjusted to 0-5v with the help of variable resistor
VR1. Then given to ripples are filtered by the C1 capacitor. After the filtration the corresponding
DC voltage is given to ADC or other related circuit.

59
6.5 CURRENT CIRCUIT

This circuit is designed to monitor the supply current. The supply current that has to
monitor is step down by the current transformer. The step down current is converted by the
voltage with the help of shunt resistor. Then the converted voltage is rectified by the precision
rectifier. The precision rectifier is a configuration obtained with an operational amplifier in order
to have a circuit behaving like an ideal diode or rectifier.
The full wave rectifier is the combination of half wave precision rectifer and summing
amplifier. When the input voltage is negative, there is a negative voltage on the diode, too, so it
works like an open circuit, there is no current in the load and the output voltage is zero. When the
input is positive, it is amplified by the operational amplifier and it turns the diode on. There is
current in the load and, because of the feedback, the output voltage is equal to the input.

60
In this case, when the input is greater than zero, D2 is ON and D1 is OFF, so the output is
zero. When the input is less than zero, D2 is OFF and D1 is ON, and the output is like the input
with an amplification of − R2 / R1. The full-wave rectifier depends on the fact that both the half-
wave rectifier and the summing amplifier are precision circuits. It operates by producing an
inverted half-wave-rectified signal and then adding that signal at double amplitude to the original
signal in the summing amplifier. The result is a reversal of the selected polarity of the input
signal.
Then the output of the rectified voltage is adjusted to 0-5v with the help of variable
resistor VR1. Then given to ripples are filtered by the C1 capacitor. After the filtration the
corresponding DC voltage is given to ADC or other related circuit.

61
Ultra-Sonic sensor circuit explanation

This project started after I looked at the Polaroid Ultrasonic Ranging module. It has a number of
disadvantages for use in small robots etc.

1. The maximum range of 10.7 metre is far more than is normally required, and as a result
2. The current consumption, at 2.5 Amps during the sonic burst is truly horrendous.
3. The 150mA quiescent current is also far too high.
4. The minimum range of 26cm is useless. 1-2cm is more like it.
5. The module is quite large to fit into small systems, and
6. It’s EXPENSIVE.

The was designed to be just as easy to use as the Polaroid sonar, requiring a short trigger pulse
and providing an echo pulse. Your controller only has to time the length of this pulse to find the
range. The connections to the sensor are shown below:

The sensor Timing diagram is shown below. You only need to supply a short 10uS pulse to the
trigger input to start the ranging. The sensor will send out an 8 cycle burst of ultrasound at 40khz
and raise its echo line high. It then listens for an echo, and as soon as it detects one it lowers the

62
echo line again. The echo line is therefore a pulse whose width is proportional to the distance to
the object. By timing the pulse it is possible to calculate the range in inches/centimeters or
anything else. If nothing is detected then the sensor will lower its echo line anyway after about
36mS.

63
The circuit is designed to be low cost. It uses a PIC12C508 to perform the control functions and
standard 40khz piezo transducers. The drive to the transmitting transducer could be simplest
driven directly from the PIC. The 5v drive can give a useful range for large objects, but can be
problematic detecting smaller objects. The transducer can handle 20v of drive, so I decided to get
up close to this level. A MAX232 IC, usually used for RS232 communication makes and ideal
driver, providing about 16v of drive.

The receiver is a classic two stage op-amp circuit. The input capacitor C8 blocks some residual
DC which always seems to be present. Each gain stage is set to 24 for a total gain of 576-ish.
This is close the 25 maximum gain available using the LM1458. The gain bandwidth product for
the LM1458 is 1Mhz. The maximum gain at 40khz is 1000000/40000 = 25. The output of the
amplifier is fed into an LM311 comparator. A small amount of positive feedback provides some
hysterisis to give a clean stable output.

The problem of getting operation down to 1-2cm is that the receiver will pick up direct coupling
from the transmitter, which is right next to it. To make matters worse the piezo transducer is a
mechanical object that keeps resonating some time after the drive has been removed. Up to 1mS
depending on when you decide it has stopped. It is much harder to tell the difference between
this direct coupled ringing and a returning echo, which is why many designs, including the
Polaroid module, simply blank out this period. Looking at the returning echo on an oscilloscope

64
shows that it is much larger in magnitude at close quarters than the cross-coupled signal. I
therefore adjust the detection threshold during this time so that only the echo is detectable. The
100n capacitor C10 is charged to about –6v during the burst. This discharges quite quickly
through the 10k resistor R6 to restore sensitivity for more distant echo’s.

A convenient negative voltage for the op-amp and comparator is generated by the MAX232.
Unfortunately, this also generates quite a bit of high frequency noise. I therefore shut it down
whilst listening for the echo. The 10uF capacitor C9 holds the negative rail just long enough to
do this.

In operation, the processor waits for an active low trigger pulse to come in. It then generates just
eight cycles of 40khz. The echo line is then raised to signal the host processor to start timing.
The raising of the echo line also shuts of the MAX232. After a while – no more than 10-12mS
normally, the returning echo will be detected and the PIC will lower the echo line. The width of
this pulse represents the flight time of the sonic burst. If no echo is detected then it will
automatically time out after about 30mS (Its two times the WDT period of the PIC). Because the
MAX232 is shut down during echo detection, you must wait at least 10mS between
measurement cycles for the +/- 10v to recharge.

Performance of this design is, I think, quite good. It will reliably measure down to 3cm and will
continue detecting down to 1cm or less but after 2-3cm the pulse width doesn’t get any smaller.

Maximum range is a little over 3m. As and example of the sensitivity of this design, it will detect
a 1inch thick plastic broom handle at 2.4m.
Average current consumption is reasonable at less than 50mA and typically about 30mA.

Calculating the Distance


The sensor provides an echo pulse proportional to distance. If the width of the pulse is measured
in uS, then dividing by 58 will give you the distance in cm, or dividing by 148 will give the
distance in inches. uS/58=cm or uS/148=inches.

65
7. PCB DESIGN

Design and Fabrication of Printed circuit boards

7.1 INTRODUCTION:

Printed circuit boards, or PCBs, form the core of electronic equipment domestic
and industrial. Some of the areas where PCBs are intensively used are computers,
process control, telecommunications and instrumentation.

7.2 MANUFATCURING:

The manufacturing process consists of two methods; print and etch, and print,
plate and etch. The single sided PCBs are usually made using the print and etch
method. The double sided plate through – hole (PTH) boards are made by the print
plate and etch method.

The production of multi layer boards uses both the methods. The inner layers are
printed and etch while the outer layers are produced by print, plate and etch after
pressing the inner layers.

7.3 SOFTWARE:

The software used in our project to obtain the schematic layout is MICROSIM.

66
7.4 PANELISATION:

Here the schematic transformed in to the working positive/negative films. The circuit
is repeated conveniently to accommodate economically as many circuits as possible
in a panel, which can be operated in every sequence of subsequent steps in the
PCB process. This is called penalization. For the PTH boards, the next operation is
drilling.

7.5 DRILLING:

PCB drilling is a state of the art operation. Very small holes are drilled with high
speed CNC drilling machines, giving a wall finish with less or no smear or epoxy,
required for void free through hole plating.

7.6 PLATING:

The heart of the PCB manufacturing process. The holes drilled in the board are
treated both mechanically and chemically before depositing the copper by the electro
less copper platting process.

7.7 ETCHING:
Once a multiplayer board is drilled and electro less copper deposited, the image
available in the form of a film is transferred on to the out side by photo printing using a
dry film printing process. The boards are then electrolytic plated on to the circuit pattern
with copper and tin. The tin-plated deposit serves an etch resist when copper in the
unwanted area is removed by the conveyor’s spray etching machines with chemical
etch ants. The etching machines are attached to an automatic dosing equipment, which
analyses and controls etch ants concentrations

67
7.8 SOLDERMASK:

Since a PCB design may call for very close spacing between conductors, a
solder mask has to be applied on the both sides of the circuitry to avoid the bridging of
conductors. The solder mask ink is applied by screening. The ink is dried, exposed to
UV, developed in a mild alkaline solution and finally cured by both UV and thermal
energy.

HOT AIR LEVELLING:

After applying the solder mask, the circuit pads are soldered using the hot air
leveling process. The bare bodies fluxed and dipped in to a molten solder bath. While
removing the board from the solder bath, hot air is blown on both sides of the board
through air knives in the machines, leaving the board soldered and leveled. This is one
of the common finishes given to the boards. Thus the double sided plated through
whole printed circuit board is manufactured and is now ready for the components to be
soldered.

68
8 SOFTWARE TOOLS
8.1 MPLAB

MPLAB IDE is an integrated development environment that provides


development engineers with the flexibility to develop and debug firmware for various
Microchip devices

MPLAB IDE is a Windows-based Integrated Development Environment for the


Microchip Technology Incorporated PICmicrocontroller (MCU) and dsPIC digital signal
controller (DSC) families. In the MPLAB IDE, you can:

 Create source code using the built-in editor.


 Assemble, compile and link source code using various language tools. An
assembler, linker and librarian come with MPLAB IDE. C compilers are available
from Microchip and other third party vendors.

 Debug the executable logic by watching program flow with a simulator, such as
MPLAB SIM, or in real time with an emulator, such as MPLAB ICE. Third party
emulators that work with MPLAB IDE are also available.

 Make timing measurements.

 View variables in Watch windows.

 Program firmware into devices with programmers such as PICSTART Plus or


PRO MATE II.

 Find quick answers to questions from the MPLAB IDE on-line Help.

69
8.2 MPLAB SIMULATOR

MPLAB SIM is a discrete-event simulator for the PIC microcontroller (MCU) families. It
is integrated into MPLAB IDE integrated development environment. The MPLAB SIM
debugging tool is designed to model operation of Microchip Technology's PIC
microcontrollers to assist users in debugging software for these devices

8.3 IC PROG

The PRO MATE II is a Microchip microcontroller device programmer. Through


interchangeable programming socket modules, PRO MATE II enables you to quickly
and easily program the entire line of Microchip PICmicro microcontroller devices and
many of the Microchip memory parts.

PRO MATE II may be used with MPLAB IDE running under supported Windows OS's
(see Read me for PRO MATE II.txt for support list), with the command-line controller
PROCMD or as a stand-alone programmer

8.4 COMPILER-HIGH TECH C

A program written in the high level language called C; which will be converted into
PICmicro MCU machine code by a compiler. Machine code is suitable for use by a
PICmicro MCU or Microchip development system product like MPLAB IDE.

70
8.5 PIC START PLUS PROGRAMMER:

The PIC start plus development system from microchip technology provides
the product development engineer with a highly flexible low cost microcontroller design
tool set for all microchip PIC micro devices. The pic start plus development system
includes PIC start plus development programmer and MPLAB IDE.

The PIC start plus programmer gives the product developer ability to program
user software in to any of the supported microcontrollers. The PIC start plus software
running under MPLAB provides for full interactive control over the programmer.

71
10. ADVANTAGES

 Reduce in manpower
 Reliable
 Easy to implement

11. APPLICATIONS

This project is useful in electricity board


Its used in long distance transmission line

72
12. CONCLUSION

The progress in science & technology is a non-stop process. New things and
new technology are being invented. As the technology grows day by day, we can
imagine about the future in which thing we may occupy every place.

The proposed system based on PIC microcontroller [micro chip] is found to be


more compact, user friendly and less complex, which can readily be used in order to
perform. Several tedious and repetitive tasks. Though it is designed keeping in mind
about the need for industry, it can extended for other purposes such as commercial &
research applications. Due to the probability of high technology (PIC microcontroller)
used this “TRANSMISSION LINE MULTIPLE FAULT DETECTION AND INDICATION
TO ELECTRICITY BOARD” is fully software controlled with less hardware circuit. The
feature makes this system is the base for future systems.

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14. REFERENCES

MILL MAN J and HAWKIES C.C. “INTEGRATED


ELECTRONICS” MCGRAW HILL, 1972

ROY CHOUDHURY D, SHAIL JAIN, “ LINEAR INTEGRATED


CIRCUIT”, New Age International Publishers, New Delhi,2000

“THE 8051 MICROCONTROLLER AND EMBEDDED SYSTEM”


by Mohammad Ali Mazidi.

WEBSITES:

http://www.atmel.com/

http://www.microchip.com/

www.8052.com

http://www.beyondlogic.org

http://www.ctv.es/pckits/home.html

http://www.aimglobal.org/

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