This document provides an overview of the course "Digital System Design". The course aims to teach students how to design digital systems using ASM charts and sequential circuit design methods. It covers 5 units: design of digital systems using ASM charts; sequential circuit design using CPLDs and FPGAs; fault modeling and testing; test pattern generation for combinational circuits; and test pattern generation and fault diagnosis for sequential circuits. Evaluation methods include path sensitization, Boolean difference, and Kohavi algorithms.
This document provides an overview of the course "Digital System Design". The course aims to teach students how to design digital systems using ASM charts and sequential circuit design methods. It covers 5 units: design of digital systems using ASM charts; sequential circuit design using CPLDs and FPGAs; fault modeling and testing; test pattern generation for combinational circuits; and test pattern generation and fault diagnosis for sequential circuits. Evaluation methods include path sensitization, Boolean difference, and Kohavi algorithms.
3 0 0 3 Course Outcomes: At the end of the course the student will be able to CO 1 Design digital Systems by ASM Charts CO 2 Design Sequential Circuits using different Methods CO 3 Illustrate Various Fault Models and generate Test Vectors by various Test Generation Methods CO 4 Generate Test Vectors by various Test Generation Methods CO 5 Describe Fault Diagnosis in Sequential Circuits UNIT – I (10 Lectures) DESIGN OF DIGITAL SYSTEMS: ASM charts, ASM Chart for Binary Multiplier, Dice Game, control sequence method, Reduction of state tables, state assignments. UNIT – II (10 Lectures) SEQUENTIAL CIRCUIT DESIGN Introduction to CPLD,FPGA, sequential circuit design using CPLD, FPGAs, design of Iterative circuits, design of sequential circuits using ROMs and PLAs,. UNIT–III (10 Lectures) FAULT MODELING Need for testing, Introduction to DFT, Random testing ,Direct Testing, PRBS Generator for 4 Bit, Fault classes and models – Stuck at faults, bridging faults, transition and intermittent faults.
G V P College of Engineering (Autonomous) 2015
126 ECE
UNIT-IV (10 Lectures)
TEST PATTERN GENERATION Fault diagnosis of Combinational circuits by conventional methods – Path Sensitization technique, Boolean difference method, Kohavi algorithm D – algorithm UNIT – V (10 Lectures) TEST PATTERN GENERTAION AND FAULT DIAGNOSIS IN SEQUENTIAL CIRCUITS PODEM, transition count testing, Signature analysis and testing for bridging faults, State identification and fault detection experiment, Machine identification, Design of fault detection experiment. TEXT BOOKS: 1. Z. Kohavi – “Switching & finite Automata Theory” (TMH) Third Edition, 2010. 2. N.N. Biswas – “Logic Design Theory” (PHI),1993. 3. Nolman Balabanian, Bradley Calson – “Digital Logic Design Principles” – Wiley Student Edition 2004. REFERENCE BOOKS: 1. M. Abramovici, M. A. Breues, A. D. Friedman – “Digital System Testing and Testable Design”, Wiley, Reprint Edition, 1994. 2. Charles H. Roth Jr. – “Fundamentals of Logic Design”, Sixth Edition, 2010 . 3. Frederick. J. Hill & Peterson – “Computer Aided Logic Design” – Wiley Fourth Edition, 1993.