Low Loss Coupling Using Silicon Grating Couplers
Low Loss Coupling Using Silicon Grating Couplers
Allan Zhang
April 2019
1 Introduction
The inherent limitation of the electronic circuits has gradually revealed itself as the expo-
nential growth rate of the computational capacity afforded by VLSI chips as predicted by
Moore’s Law comes to a halt. Capacitance and inductance fundamentally limits the speed of
electrons, which in turn limits the bandwidth and latency of electronic circuits. Also Ohm’s
aw dictates that as transistor and interconnect density increases, the amount of heat to be
dissipated also increases, to the point where cooling by air is no longer possible. As one of
the promising solutions to the drawbacks of electronic circuits, people have devised methods
to utilize light as information carrier instead. Using photons to carry information is indeed
revolutionary since photons travel many orders of magnitude faster than electrons 108 m/s
compared to 105 –106 m/s [1], and incurs minimal energy loss in transparent media. More
importantly, optical channels do not suffer from EM radiation, ie: wave interference. This
allows multiple pathways to coexist within the same optical component, eg: multi-mode op-
tical fibers, significantly increasing the bandwidth of data transfers. Fiber optics and silicon
photonics have thus emerged as new fields of study having the potential to augment or even
replace conventional electronics. Fiber optics study the application of optical fibers, long
glass fibers consisting of a higher index core and lower index cladding materials. Light is
confined within the core by means of total internal reflection and thereby transmits along
the core. Conventional fiber optics have enabled the long-range, low-latency communications
worldwide. However, in recent years sub-meter range computer communication via optical
link has been possible, allowing for much faster data transfers as required by the increase
in computational capacity. Now research is underway to further shrink the dimension of
optical channels, ie: nanometer scale so that optical pathways between distinct chips and
even between individual components within a chip are possible. This is enabled by the field
of silicon nanophotonics. Silicon makes a great candidate for the manipulation of light due
to its nonlinear optical properties, eg: the Kerr effect, wave mixing, etc., allowing light to
interact with light. Silicon also has high reflective index, granting it its waveguiding prop-
erties. Moreover, silicon has already been conveniently used as the substrate for integrated
circuits. Thus, existing nanofabrication technologies for ICs can also be used to fabricate
silicon photonic devices. As of now , silicon photonic devices that have been or are being
developed include the high speed Ge-on-Si photodetectors [1], low loss waveguides [2], ulta-
high Q optical resonators [3], AND and NAND logic [4], and electro-optical modulators [5],
and Si Raman Lasers[6]. In December 2015 the first microprocessor with optical I/O was
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demonstrated implementing the ”zero-change” CMOS technology [7]. The future for optical
circuits enabled by silicon photonics is indeed promising. Former Intel senior advisor Pat
Gelsinger is quoted as saying that ”Today, optics is a niche technology. Tomorrow, it’s the
mainstream of every chip that we build.” [8]
Figure 1: Size comparison between free space mode and waveguide mode
The direct consequence of this size mismatch is the low efficiency of the system. Assume
the core diameter of silicon waveguide is 200 nm, then
Ewaveguide
Percentage of energy lost = 1 −
Ef iber
Areawaveguide
=1−
Areaf iber
Radiuswaveguide 2
=1−( )
Radiusf iber
200nm 2
=1−( )
10400nm
= 99.96%
2
That is, only 0.04% of energy is transmitted into the waveguide, resulting in an unacceptable
amount of energy lost. Moreover, the difference in NA (numerical aperture) contributes to
the poor efficiency. Lastly, due to the substantial energy loss, when light is coupled out
from waveguide mode back into fiber mode, the signal strength would be so low that signal
recognition would be impossible.
This issue would not have concerned us if we could manage to generate on-chip optical
signals. In fact silicon is already being used as light sources in devices such as Si Raman Laser,
Brillouin Laser and hybrid silicon lasers. [10] However, the technology of such devices are far
from mature. The challenge of generating photons from silicon lies in the fact photon emission
is much more difficult since silicon’s indirect band gap requires not only that the absorbed
photon satisfies the energy gap but also that the the absorbed photon and emitted photon
match the phase difference. Therefore, in many cases coupling between fiber/waveguide
mode is still common and very much relevant.
Figure 2: SEM image of a lensed fiber with nanoimprinted lens out of high refractive index
material
the electron beam lithography, allow us extremely precise control over the shape, aperture
size, and focal power of the lensed fiber. It is shown that with precise alignment and correct
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selection of focal length, the fiber-to-fibber loss, that is, the total loss from the input fiber,
in through the waveguide and out to the output fiber, can be as low as 20db. This number
is still far from satisfactory.
Figure 3: Beam profile comparison before and after focusing. Focal spot diameter is 810 nm
@ 1/e2 for 660 nm wavelength.
Other methods that have been proposed include the multi-dielectric structures [12] which
utilizes a stepwise parabolic graded index profile combined with a horizontal taper that
confine light in both forwards and backwards directions, and the inverted lateral taper [13]
with a polymer overlay that was able to achieve 1db loss. Although such solutions are
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(a) Schematic of the inverse taper coupler
extremely efficient, they have limited application due to various pre-existing conditions that
need to be satisfied before the methods can be applied. The multi-dielectric method applies
only to high-refractive-index-contrast systems while the inverse taper method requires that
it must be implemented and on the edge of the chip. Moreover, such methods often greatly
increases high production complexity, such as chip cleaving and facet polishing. The extra
manufacturing requirements prevents such setups from mass production.
2d sin θ = nλ
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The following illustration is a simplified version of the diffraction grating coupler setup. The
input light from free space mode (fiber mode) is incident on the gratings at an angle. Then
the extra-planar input light is coupled into planar light and propagates to the waveguide.
Similarly, waveguide mode may couple out into fiber mode through another grating coupler.
Figure 6: Illustration of grating coupling between optical fibers and an SOI sample
In the illustration, the silicon photonic waveguide consists of silicon on top of a layer of
silica (silicon dioxide). The is also true for most standard SOI (silicon on insulator) silicon
strip waveguides.[17] On a real chip, the input fiber would be the free space light source
and the output fiber the free space detector. The space in the illustration between the two
grating couplers would normally consist of two taper devices to focus light and other photonic
devices found on a chip.
Km = Ku − mK (1)
, where m ∈ Z is the diffracted order number, Ku is the wave vector of the undiffracted
incident wave, that is, Ku = K0 , and Km is the wave vector of the mth diffracted wave.
The equation that relates the wave vector of the diffracted to the incident wave in a
periodic structure is called the FPBC (Floquet periodic boundary conditions). Floquet
waves is the set of all resulting diffracted waves from a periodic structure as dictated by the
FPBC. [14] It is important to note that despite the fact that the Floquet waves is an infinite
set of waves corresponding to an infinite number of integer diffraction orders m, there exists
only a limited number of such Floquet waves that is physically possible. To see this, let
us decompose the wave vectors in equation 1 to heir respective in-plane x̂ and out-of-plane
vector ẑ components, namely
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Figure 7: Geometry of two dimensional surface relief grating
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Figure 8: Step-by-step illustration of grating coupler fabrication. Photo credit: see reference
[11]
silicon-on-silica substrate. Negative photoresist is chosen since it more time and energy
efficient to expose only the grating patterns compared to their complement. Now in step 3
electron beam lithography expose the PR to develop the desired waveguide patterns on the
PR. Then in the step 4 the patterns are transferred to the silicon layer by means of reactive
ion etch (RIE). Next, in step 5 developer solution is applied to the PR coating to remove
it. In step 6, we again coat the waveguide with negative PR and similar to step 3 in step 7
we apply secondary electron beam lithography to develop patterns for the gratings on PR.
Next, in step 8 the patterns are RIE etched onto the silicon layer. After removing the PR
coating in step 9, we complete the fabrication process for the diffraction gratings coupler on
top of the waveguide.
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References
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