PRESENT: An Ultra-Lightweight Block Cipher
PRESENT: An Ultra-Lightweight Block Cipher
Abstract. With the establishment of the AES the need for new block
ciphers has been greatly diminished; for almost all block cipher appli-
cations the AES is an excellent and preferred choice. However, despite
recent implementation advances, the AES is not suitable for extremely
constrained environments such as RFID tags and sensor networks. In
this paper we describe an ultra-lightweight block cipher, present. Both
security and hardware efficiency have been equally important during the
design of the cipher and at 1570 GE, the hardware requirements for
present are competitive with today’s leading compact stream ciphers.
1 Introduction
One defining trend of this century’s IT landscape will be the extensive deploy-
ment of tiny computing devices. Not only will these devices feature routinely in
consumer items, but they will form an integral part of a pervasive — and unseen
— communication infrastructure. It is already recognized that such deployments
bring a range of very particular security risks. Yet at the same time the cryp-
tographic solutions, and particularly the cryptographic primitives, we have at
hand are unsatisfactory for extremely resource-constrained environments.
In this paper we propose a new hardware-optimized block cipher that has
been carefully designed with area and power constraints uppermost in our mind.
Yet, at the same time, we have tried to avoid a compromise in security. In
achieving this we have looked back at the pioneering work embodied in the
DES [34] and complemented this with features from the AES finalist candidate
Serpent [4] which demonstrated excellent performance in hardware.
At this point it would be reasonable to ask why we might want to design a
new block cipher. After all, it has become an “accepted” fact that stream ciphers
are, potentially, more compact. Indeed, renewed efforts to understand the design
of compact stream ciphers are underway with the eSTREAM [15] project and
several promising proposals offer appealing performance profiles. But we note a
couple of reasons why we might want to consider a compact block cipher. First,
a block cipher is a versatile primitive and by running a block cipher in counter
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mode (say) we get a stream cipher. But second, and perhaps more importantly,
the art of block cipher design seems to be a little better understood than that
of stream ciphers. For instance, while there is a rich theory under-pinning the
use of linear feedback shift registers [29] it is not easy to combine these building
blocks to give a secure proposal. We suspect that a carefully designed block
cipher could be a less risky undertaking than a newly designed stream cipher.
Thus, we feel that a block cipher that requires similar hardware resources as a
compact stream cipher could be of considerable interest.
It is important to realise that in developing a new block cipher, particularly
one with aggressive performance characteristics, we are not just looking for inno-
vative implementation. Rather, the design and implementation of the cipher go
hand-in-hand and this has revealed several fundamental limits and inherent con-
tradictions. For instance, a given security level places lower bounds on the block
length and key length. Just processing a 64-bit state with an 80-bit key places
fundamental lower limits on the amount of space we require. We also observe
that hardware implementation — particularly compact hardware implementa-
tion — favours repetition. Even minor variations can have an unfortunate effect
on the space required for an implementation. Yet, at the same time, the cryptan-
alyst also favours repetition and seeks mathematical structures that propagate
easily across many rounds. How much simple, repetitive structure can we include
without compromising its security?
In this paper we describe the compact block cipher4 present. After a brief
survey of the existing literature, the rest of the paper is organised in a stan-
dard way. present is described in Section 3 with the design decisions described
in Section 4. The security analysis follows in Section 5 along with a detailed
performance analysis in Section 6. We close the paper with our conclusions.
2 Existing Work
While there is a growing body of work on low-cost cryptography, the number of
papers dealing with ultra-lightweight ciphers is surprisingly limited. Since our
focus is on algorithm design we won’t refer to work on low-cost communication
and authentication protocols. Some of the most extensive work on compact im-
plementation is currently taking place within the eSTREAM project. As part of
that initiative, new stream ciphers suitable for efficient hardware implementation
have been proposed. While this work is ongoing, some promising candidates are
emerging [7, 19]. While the trade-offs are complex, implementation papers [18]
suggest that around 1300-2600 gate equivalents (GE) would be required for the
more compact ciphers within the eSTREAM project.
With regards to block ciphers it is well-known that DES was designed with
hardware efficiency in mind. Given the very limited state of semiconductor cir-
cuits in the early 1970s, it is not surprising that DES possesses very competitive
implementation properties. Work on DES reveals an implementaton of around
4
The name reflects its similarity to Serpent and the goal of fitting everywhere; the
very nature of ubiquitous computing.
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plaintext key register
?
addRoundKey
generateRoundKeys() ? ?
sBoxLayer
for i = 1 to 31 do update
pLayer
addRoundKey(state,Ki )
..? ..?
sBoxLayer(state) . .
pLayer(state) ? ?
end for sBoxLayer
update
addRoundKey(state,K32 ) pLayer
?
addRoundKey
?
ciphertext
3000 GE [42] while a serialized implementation can be realized with around 2300
GE [37]. The key length of DES limits its usefulness in many applications and
makes proposals such as DESXL (2168 GE) of some considerable interest [37].
For modern block ciphers, the landmark paper of [16] gives a very thorough
analysis of a low-cost implementation of the AES [35]. However, the resources
required for this cipher are around 3600 GE, which is an indirect consequence
of the fact that Rijndael was designed for software efficiency on 8- and 32-
bit processors. Implementation requirements for the Tiny Encryption Algorithm
tea [43, 44] are not known, but a crude estimate is that tea needs at least 2100
GE and xtea needs5 at least 2000 GE. Four dedicated proposals for low-cost
implementation are mCrypton [30], hight [22], sea [41], and cgen [40], though
the latter is not primarily intended as a block cipher. mCrypton has a precise
hardware assessment and requires 2949 GE, hight requires around 3000 GE
while sea with parameters comparable to present requires around 2280 GE.
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Each of the 31 rounds consists of an xor operation to introduce a round
key Ki for 1 ≤ i ≤ 32, where K32 is used for post-whitening, a linear bitwise
permutation and a non-linear substitution layer. The non-linear layer uses a
single 4-bit S-box S which is applied 16 times in parallel in each round. The
cipher is described in pseudo-code in Figure 1, and each stage is now specified
in turn. The design rationale are given in Section 4 and throughout we number
bits from zero with bit zero on the right of a block or word.
bj → bj ⊕ κij .
sBoxlayer. The S-box used in present is a 4-bit to 4-bit S-box S : F42 → F42 .
The action of this box in hexadecimal notation is given by the following table.
x 0 1 2 3 4 5 6 7 8 9 A B C D E F
S[x] C 5 6 B 9 0 A D 3 E F 8 4 7 1 2
For sBoxLayer the current state b63 . . . b0 is considered as sixteen 4-bit words
w15 . . . w0 where wi = b4∗i+3 ||b4∗i+2 ||b4∗i+1 ||b4∗i for 0 ≤ i ≤ 15 and the output
nibble S[wi ] provides the updated state values in the obvious way.
pLayer. The bit permutation used in present is given by the following table.
Bit i of state is moved to bit position P (i).
i 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
P (i) 0 16 32 48 1 17 33 49 2 18 34 50 3 19 35 51
i 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
P (i) 4 20 36 52 5 21 37 53 6 22 38 54 7 23 39 55
i 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47
P (i) 8 24 40 56 9 25 41 57 10 26 42 58 11 27 43 59
i 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63
P (i) 12 28 44 60 13 29 45 61 14 30 46 62 15 31 47 63
The key schedule. present can take keys of either 80 or 128 bits. However
we focus on the version with 80-bit keys. The user-supplied key is stored in a
key register K and represented as k79 k78 . . . k0 . At round i the 64-bit round key
Ki = κ63 κ62 . . . κ0 consists of the 64 leftmost bits of the current contents of
register K. Thus at round i we have that:
After extracting the round key Ki , the key register K = k79 k78 . . . k0 is updated
as follows.
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c Springer-Verlag Berlin Heidelberg 2007
ki
S S S S S S S S S S S S S S S S
ki+1
S S S S S S S S S S S S S S S S
Thus, the key register is rotated by 61 bit positions to the left, the left-most
four bits are passed through the present S-box, and the round_counter value
i is exclusive-ored with bits k19 k18 k17 k16 k15 of K with the least significant bit of
round_counter on the right. The key schedule for 128-bit keys is presented in
an appendix.
Besides security and efficient implementation, the main goal when designing
present was simplicity. It is therefore not surprising that similar designs have
been considered in other contexts [21] and can even be used as a tutorial for
students [20]. In this section we justify the decisions we took during the design of
present. First, however, we describe the anticipated application requirements.
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– Applications will only require moderate security levels. Consequently, 80-
bit security will be adequate. Note that this is also the position taken for
hardware profile stream ciphers submitted to eSTREAM [15].
– Applications are unlikely to require the encryption of large amounts of data.
Implementations might therefore be optimised for performance or for space
without too much practical impact.
– In some applications it is possible that the key will be fixed at the time of
device manufacture. In such cases there would be no need to re-key a device
(which would incidentally rule out a range of key manipulation attacks).
– After security, the physical space required for an implementation will be the
primary consideration. This is closely followed by peak and average power
consumption, with the timing requirements being a third important metric.
– In applications that demand the most efficient use of space, the block cipher
will often only be implemented as encryption-only. In this way it can be used
within challenge-response authentication protocols and, with some careful
state management, it could be used for both encryption and decryption of
communications to and from the device by using the counter mode [36].
When choosing the mixing layer, our focus on hardware efficiency demands a
linear layer that can be implemented with a minimum number of processing
elements, i.e. transistors. This leads us directly to bit permutations. Given our
focus on simplicity, we have chosen a regular bit-permutation and this helps to
make a clear security analysis (see Section 5).
6
Appendix II gives an option for 128-bit keys but we do not expect it to be used.
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4.3 The S-box.
We use a single 4-bit to 4-bit S-box S : F42 → F42 in present. This is a direct
consequence of our pursuit of hardware efficiency, with the implementation of
such an S-box typically being much more compact than that of an 8-bit S-box.
Since we use a bit permutation for the linear diffusion layer, AES-like diffusion
techniques [12] are not an option for present. Therefore we place some addi-
tional conditions on the S-boxes to improve the so-called avalanche of change.
More precisely, the S-box for present fullfils the following conditions, where we
denote the Fourier coefficient of S by
X
SbW (a) = (−1)hb,S(x)i+ha,xi.
x∈F42
1. For any fixed non-zero input difference ∆I ∈ F42 and any fixed non-zero
output difference ∆O ∈ F42 we require
2. For any fixed non-zero input difference ∆I ∈ F42 and any fixed output differ-
ence ∆O ∈ F42 such that wt(∆I ) = wt(∆O ) = 1 we have
3. For all non-zero a ∈ F42 and all non-zero b ∈ F4 it holds that |SbW (a)| ≤ 8.
4. For all a ∈ F42 and all non-zero b ∈ F4 such that wt(a) = wt(b) = 1 it holds
that SbW (a) = ±4.
As will become clear in Section 5, these conditions will ensure that present
is resistant to differential and linear attacks. Using a classification of all 4-bit
S-boxes that fulfill the above conditions [27] we chose an S-box that is particular
well-suited to efficient hardware implementation.
5 Security Analysis
Differential [3] and linear [32] cryptanalysis are among the most powerful tech-
niques available to the cryptanalyst. In order to gauge the resistance of present
to differential and linear cryptanalysis we provide a lower bound to the number
of so-called active S-boxes involved in a differential (or linear) characteristic.
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Fig. 3. The grouping of S-boxes in present for the purposes of cryptanalysis. The
input numbers indicate the S-box origin from the preceeding round and the output
numbers indicate the destination S-box in the following round.
∆ = 0000000000000011
→0000000000030003
→ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 = ∆.
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A more complicated characteristic holds with probability 2−21 over five rounds.
∆ = 0000000000007070
→ 000000000000000A
→ 0001000000000000
→ 0000000010001000
→ 0000000000880088
→ 0 0 3 3 0 0 0 0 0 0 3 3 0 0 3 3.
While the probability of this second characteristic is very close to the bound
of 2−20 , it is non-iterative and of little practical value. Instead we have exper-
imentally confirmed the probability of the two-round iterative differential. In
experiments over 100 independent sub-keys using 223 chosen plaintext pairs, the
observed probability was as predicted. This seems to suggest that for this par-
ticular characteristic there is no accompanying significant differential. However,
determining the extent of any differential effect is a complex and time-consuming
task even though our preliminary analysis has been encouraging.
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truncated extension holds with probability one.
∆ = 0000000000000011
→ 0 0 0 0 0 0 0 0 0 0 0 3 0 0 0 3 [ iterate the two-round characteristic ]
..
→ .
→0000000000000011
→000?000?000?0003
→ δ0 δ1 δ2 δ3 δ4 δ5 δ6 δ7 δ8 δ9 δ10 δ11 δ12 δ13 δ14 δ15 where all δi ∈ {0, 1}.
Even when used to reduce the length of the differential characteristics already
identified, the data requirements still remain excessive.
Structural attacks such as integral attacks [25] and bottleneck attacks [17] are well-
suited to the analysis of AES-like ciphers [12, 13, 38]. Such ciphers have strong
word-like structures, where the words are typically bytes. However the design of
present is almost exclusively bitwise, and while the permutation operation is
somewhat regular, the development and propagation of word-wise structures are
disrupted by the bitwise operations used in the cipher.
Algebraic attacks have had better success when applied to stream ciphers than
block ciphers. Nevertheless, the simple structure of present means that they
merit serious study. The present S-box is described by 21 quadratic equations
in the eight input/output-bit variables over GF (2). This is not surprising since
it is well-known that any four bit S-box can be described by at least 21 such
equations. The entire cipher can then described by e = n×21 quadratic equations
in v = n × 8 variables, where n is the number of S-boxes in the encryption
algorithm and the key schedule. For present we have n = (31 × 16) + 31 thus
the entire system consists of 11, 067 quadratic equations in 4, 216 variables.
The general problem of solving a system of multivariate quadratic equations
is NP-hard. However the systems derived for block ciphers are very sparse since
they are composed of n small systems connected by simple linear layers. Never-
theless, it is unclear whether this fact can be exploited in a so-called algebraic
attack. Some specialised techniques such as XL [10] and XSL [11] have been pro-
posed, though flaws in both techniques have been discovered [8, 14]. Instead the
only practical results on the algebraic cryptanalysis of block ciphers have been
obtained by applying the Buchberger and F4 algorithms within Magma [31].
Simulations on small-scale versions of the AES showed that for all but the very
smallest SP-networks one quickly encounters difficulties in both time and mem-
ory complexity [9]. The same applies to present.
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Fig. 4. The datapath of an area-optimized version of present-80.
6 Hardware performance
We implemented present-80 in VHDL and synthesized it for the Virtual Sil-
icon (VST) standard cell library based on the UMC L180 0.18µ 1P6M Logic
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process. We used Mentor Graphics Modelsim SE PLUS 5.8c for simulation and
Synopsys Design Compiler version Y-2006.06 for synthesis and power simula-
tion. The foundry typical values (of 1.8 Volt for the core voltage and 25◦ C for the
temperature) were used and the suggested wireload model was applied for the
power simulation. Note that this is suitable for designs around 10,000 GE so the
power results will be pessimistic for significantly smaller designs. Figure 4 shows
the datapath of an area-optimized encryption-only present-80, which performs
one round in one clock cycle i.e. a 64-bit width datapath. Note that during the
design phase of present we use the same S-box 16 times rather than having 16
different S-boxes and this eases a further serialization of the design, i.e. with a
4-bit width datapath. Our implementation requires 32 clock cycles to encrypt a
64-bit plaintext with an 80-bit key, occupies 1570 GE and has a simulated power
consumption of 5µW.
module GE % module GE %
data state 384.39 24.48 KS: key state 480.49 30.61
s-layer 448.45 28.57 KS: S-box 28.03 1.79
p-layer 0 0 KS: Rotation 0 0
counter: state 28.36 1.81 KS: counter-XOR 13.35 0.85
counter: combinatorial 12.35 0.79 key-XOR 170.84 10.88
other 3.67 0.23
sum 1569.93 100
Table 1. Area requirement of present
The bulk of the area is occupied by flip-flops for storing the key and the data
state, followed by the S-layer and the key-XOR. Bit permutations are simple
wiring and will increase the area only when the implementation is taken to
the place&route-step. Note that the main goal of our implementation was a
small footprint in hardware, however, we also synthesized a power-optimized
implementation. For an additional 53 GE we attain a power consumption of
only 3.3µW and present-128 would occupy an estimated area of 1886 GE.
Beside a very small footprint present has a rather high throughput giving
good energy-per-bit. A comparison with other ciphers follows in Table 2.
7 Conclusions
In this paper we have described the new block cipher present. Our goal has
been an ultra-lightweight cipher that offers a level of security commensurate with
a 64-bit block size and an 80-bit key. Intriguingly present has implementation
requirements similar to many compact stream ciphers. As such, we believe it to
be of both theoretical and practical interest. Like all new proposals, we discour-
age the immediate deployment of present but strongly encourage its analysis.
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Key Block Cycles per Throughput at Logic Area
size size block 100KHz (Kbps) process GE rel.
Block ciphers
present-80 80 64 32 200 0.18µm 1570 1
AES-128 [16] 128 128 1032 12.4 0.35µm 3400 2.17
HIGHT [22] 128 64 1 6400 0.25µm 3048 1.65
mCrypton [30] 96 64 13 492.3 0.13µm 2681 1.71
Camellia [1] 128 128 20 640 0.35µm 11350 7.23
DES [37] 56 64 144 44.4 0.18µm 2309 1.47
DESXL [37] 184 64 144 44.4 0.18µm 2168 1.38
Stream ciphers
Trivium [18] 80 1 1 100 0.13µm 2599 1.66
Grain [18] 80 1 1 100 0.13µm 1294 0.82
Table 2. Comparison of lightweight cipher implementations
Acknowledgement
The work presented in this paper was supported in part by the European Com-
mission within the STREP UbiSec&Sens of the EU Framework Programme 6
for Research and Development (www.ist-ubisecsens.org). The views and conclu-
sions contained herein are those of the authors and should not be interpreted as
necessarily representing the official policies or endorsements, either expressed or
implied, of the UbiSec&Sens project or the European Commission.
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c Springer-Verlag Berlin Heidelberg 2007
Appendix I
Test vectors for present with an 80-bit key are shown in hexadecimal notation.
Appendix II
Here we describe a key schedule for a version of present that takes 128-bit
keys. The user-supplied key is stored in a key register K and represented as
k127 k126 . . . k0 . At round i the 64-bit round key Ki = κ63 κ62 . . . κ0 consists of
the 64 leftmost bits of the current contents of register K. Thus at round i we
have that:
Ki = κ63 κ62 . . . κ0 = k127 k126 . . . k64 .
After extracting the round key Ki , the key register K = k127 k126 . . . k0 is updated
as follows.
1. [k127 k126 . . . k1 k0 ] = [k66 k65 . . . k68 k67 ]
2. [k127 k126 k125 k124 ] = S[k127 k126 k125 k124 ]
3. [k123 k122 k121 k120 ] = S[k123 k122 k121 k120 ]
4. [k66 k65 k64 k63 k62 ] = [k66 k65 k64 k63 k62 ] ⊕ round_counter
Thus, the key register is rotated by 61 bit positions to the left, the left-most
eight bits are passed through two present S-boxes, and the round_counter
value i is exclusive-ored with bits k66 k65 k64 k63 k62 of K with the least significant
bit of round_counter on the right.
Appendix III
Theorem 1. Any 5-round differential characteristic of present has a minimum
of 10 active S-boxes.
Proof. Recalling that the rounds are indexed from 1 to 31, consider five consec-
utive rounds of present ranging from i − 2 to i + 2 for i ∈ [3 . . . 29]. Let Dj be
the number of active S-boxes in round j. If Dj ≥ 2, for i − 2 ≤ j ≤ i + 2, then
the theorem trivially holds. So let us suppose that one of the Dj is equal to one.
We can distinguish several cases:
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c Springer-Verlag Berlin Heidelberg 2007
have only a single bit difference in their output. So according to observation
2 we have that Di−2 ≥ 2Di−1 . Conversely, according to observation 3, all
active S-boxes in round i + 1 belong to distinct groups and have only a sin-
gle bit difference in their input. So P
according to observation 4 we have that
i+2
Di+2 ≥ 2Di+1 . Together this gives j=i−2 Dj ≥ 1 + 3 + 2 × 3 = 10.
Case Di−1 = 1. If Di = 1 we can refer to the first case, so let us suppose
that Di ≥ 2. According to observation 3 above, all active S-boxes of round
i belong to distinct groups and have only a single bit difference in their
input. Thus, according to observation 4, Di+1 ≥ 2Di ≥ 4. Further, all active
S-boxes in round i + 1 have only a single bit difference in their input and
they are distributed so that at least two groups of S-boxes contain at least
Pi+2active S-box. This means that Di+2 ≥ 4 and we can conclude that
one
j=i−2 Dj ≥ 1 + 1 + 2 + 4 + 4 = 12.
Case Di+1 = 1. If Di = 1 we can refer to the first case. So let us suppose that
Di ≥ 2. According to observation 1 above, all active S-boxes of round i belong
to the same group and each of these active S-boxes has only a single bit
difference in their output. Thus, according to observation 2, Di−1 ≥ 2Di ≥ 4.
Further, all active S-boxes of round i − 1 have only a single bit difference in
their output, and they are distributed so that at least two groups contain at
Pi+2 two active S-boxes. Thus, we have that Di−2 ≥ 4 and therefore that
least
j=i−2 Dj ≥ 4 + 4 + 2 + 1 + 1 = 12.
Cases Di+2 = 1 or Di−2 = 1. The reasoning for these cases is similar to those
for the second and third cases.
Appendix IV
Proof. Recall that Matsui’s piling-up lemma [32] estimates the bias of a linear
approximation involving n S-boxes to be
Y
n
2n−1 ǫi ,
i=1
where the values ǫi are the individual bias of each (independent) S-box. Accord-
ing to the design principles of present, the bias of all linear approximations is
less than 2−2 while the bias of any single-bit approximation is less than 2−3 . Let
(j)
ǫ4R denote the bias of a linear approximation over 4 rounds involving j active
S-boxes. Now consider the following three cases.
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c Springer-Verlag Berlin Heidelberg 2007
rounds is at most 1/8 and the overall bias for a four round approximation
can be bounded as follows:
(4)
ǫ4R ≤ 23 × (2−3 )2 × (2−2 )2 = 2−7 .
2. Suppose, instead, that there are exactly five active S-boxes over four rounds.
Then by the grouping of S-boxes in Figure 3, the active S-boxes over three
consecutive rounds cannot form the pattern 1-2-1. For this to happen, the
two active S-boxes in the middle round are activated by the same S-box
and must therefore belong to two different groups of S-boxes. But if this
is the case they couldn’t activate only one S-box in the following round.
Consequently the number of active S-boxes is either 2-1-1-1 or 1-1-1-2, so
that
(5)
ǫ4R ≤ 24 × (2−3 ) × (2−2 )4 = 2−7 .
3. Finally, suppose that there are more than five active S-boxes. Thus
(j)
ǫ4R ≤ 2j−1 × (2−2 )j = 2−j−1 ≤ 2−7 for j > 5.
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c Springer-Verlag Berlin Heidelberg 2007