Carrera de Ingeniería Electrónica Arquitectura de Computadores
Carrera de Ingeniería Electrónica Arquitectura de Computadores
VHDL Intro
Agosto 2013
Tek
VHDL Intro
System Representation (Gajski's Y Diagram)
VHDL Intro
How to implement a digital system
• No two applications are identical and every one needs certain amount
of customisation.
• A complex application contains many different tasks and use more than
one customisation methods
VHDL Intro
Efficiency versus Flexibility
VHDL Intro
Cost Comparison of Three Viable Technologies
VHDL Intro
Summary of Technology
VHDL Intro
Development Flow
VHDL Intro
Traditional Programming Language
• Formal documentation
• Input to a simulator
• Input to a synthesiser
VHDL Intro
Modern HDL
• Cover description
– at Gate level and RT level
– in structural view and behavioural view
VHDL Intro
Two HDLs used today
• Revised continuously:
– 1076-1993. Major revision.
– 1076-2000. Add mutual exclusion semantics to the
shared variable feature in VHDL.
– 1076-2002. Syntax, vocabulary and semantics for
describing electronic systems.
– 1076-2008. Address design verification methodologies
that have developed in industry.
VHDL Intro
VHDL
• Current Extensions:
– 1076.1-2007. IEEE Standard VHDL Analog and Mixed-Signal
Extensions. (VHDL-AMS).
– 1076.4-2000. IEEE Standard VITAL (VHDL Initiative Towards
ASIC Libraries) ASIC (Application Specific Integrated Circuit)
Modeling Specification.
– 1076.6-2004. IEEE Standard for VHDL Register Transfer Level
(RTL) Synthesis.