PERIPHERAL

INTERFACING
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R.HARIHARAN AP/ EEE
 8255
Programmable
Peripheral Interface

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To Increase the PORT
Requirement of
8051 or 8085
choose : 8255
R.HARIHARAN AP/ EEE
• Introduction 8255 Programmable
Peripheral Interface :
8255 is a Serial Peripheral Interface(Master Slave
Architecture), Programmable Peripheral Interface
input output port which can control 24 output
signals.
8255 is a 40 pin DIP chip that is used to expand
the ports of microcontrollers.
Three 8 bit ports Port A, Port B and Port C in short
PA, PB & PC.
Can read 24 individual inputs or outputs.
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8255 Pin Diagram:

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• Port A PA0 - PA7 8255A:
8 bit Dual purpose bidirectional I/O Port
can send or receive data from external devices.
• Port B PB0 - PB7 8255B :
Port B is same as Port A.
• Port C PC0 - PC7 8255C : 8 bit Bidirectional I/O port.
Split into 2 parts:
CU 8255, upper bits PC4 - PC7.
CL 8255, lower bits PC0 - PC3.
• 3 Ports can be divided into 2 groups :
Group A ( PORT A & Upper PORT C )
Group B ( PORT B & Lower PORT C )
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R.HARIHARAN AP/ EEE
• 1st Mode  MODE 0 (Basic I/O)
Two 8 – Bit Port & Two – 4 – Bit Port.
Any one port can be Input or Output.
Outputs are latched.
Inputs are not latched.
16 different Input / Output configurations
are possible in this mode.

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R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
• 2nd Mode  MODE 1 (Strobed I/O)
Two Groups (Group A & Group B)
Each Group contain :
one 8 – Bit Data Port (PORT A or PORT B)
one 4-Bit control / status Port. ( PORT C)

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R.HARIHARAN AP/ EEE
• 3rd Mode  MODE 2 (Strobed Bidirectional
Bus I/O)
• Strobe – auxiliary signal used to
synchronize the real data in an electrical
bus, when the components have no
common clock. Indicate the start and end
of a block of data
Used in Group A only.
one 8 – Bit Bidirectional bus Port (PORT A)
one 5-Bit control / status Port. ( PORT C)
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R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
• D0 -D7 Data Pins :
Data port of 8255 can be used to send data or
receive between AT89S51 microcontroller.
• Data Bus Buffer:
Three-state bi-directional 8-bit buffer to interface
the 8255 to the system data bus.
Data is transmitted or received by the buffer upon
execution of input or output instructions.
Control words and Status information are also
transferred through data bus buffer.

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Read/Write and Control Logic
• RD and WR signals refers to reading and writing to
8255A IC with active low signal functionality.
• RD and WR lines of 8255 are connected with RD and
WR signals of 8051 microcontroller
• (CS) Chip Select = 0
Communication between 8255 and CPU.
• (RD) Read = 0
8255 to send the data or status information to CPU on
data bus.
CPU to "read from" the 8255.
• (WR) Write = 0
To write data or controlR.HARIHARAN
words into the 8255.
AP/ EEE
Address Decode Circuitry is
connected to select the device
when it READ

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R.HARIHARAN AP/ EEE
• (A0 and A1) Port Select 0 & Port Select 1:
The input signal, in conjunction with the RD
and WR inputs, control the selection of one of
the three ports or the control word register.

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R.HARIHARAN AP/ EEE
 8259
Programmable
Interrupt Controller

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To reduce the burden
of 8051 or 8085 for
Interrupt Controller
choose : 8259
R.HARIHARAN AP/ EEE
Programmable Interrupt Controller
(8259)
• Over all manager for an interrupt – driven system
environment.
• This handles interrupts along with their priorities.
Properties of 8259:
• Eight Level Priority Controller.
• Can be expanded to 64 Levels.
• Programmable interrupt modes.
• Individual request mask capability.
• Single + 5v supply.
• Accept both Level or Edge Triggered inputs
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R.HARIHARAN AP/ EEE
I/O Cascade Lines(CAS):
CAS0 – CAS1
Chip
• Write Select (CS)
Number of interrupt
• I/O Bi-directional
Select pin in active Data
LOW Bus:
Select pin
•requirement inisactive
more, LOW
multiple
•Read
•RD or WR between µC & 8259
D0-D7
•interrupt
• CS should
Select pin be
in low must
controller
active LOW be
• Enables
Control,Write
•connected Status & Interrupt
operation –
• CS shouldinbea cascade.
low
• TheseVector Information
pinsthe
arestatus
input ofare
forthe
a data
• Release
transferred
master(8259A) through this bus.
and output for a
bus
slave(8259A).
R.HARIHARAN AP/ EEE
SP
IR0 /EN
– IR7( (Interrupt
Address I/O Slave
Lines Program /
(A0):Requests):
Enable
UsedBuffer):
•Interrupt
Asynchronous
ACK
to Inputs.
( INTA):
read command words
•the The
when
Dual pin
CPU is used
there
function
writes atovalid
is and
Pin receive a
theinterrupt
status
this
•CPU input
IC pinrequest
used becomes
wishes in buffertohigh.
to read.the CPU .
mode.
•when To raise
This pinIRenables
used
Connect ininput
the Buffer
thisfrom
8259A
mode
pin low : to A0
to CPU
high.
interrupt –an
used aslines.
address vector
output data
to onto
control data
INT
•bus Pinbyshould
buffer a sequencemaintained
transceivers of high
interrupt
(EN).
•ACK Pinpulses
level goes
until high
ACK
issued whenever
(Edge a
triggered
by CPU.mode: valid
When not used in Buffer
interrupt
Mode) is asserted.
SP =1; Master
•• Just
Thisapin signal is used to
SP=0;high Slave. level on a IR input
interrupt µC.
in (Level triggered mode)R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
 8254
Programmable Interval
Timer

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To set external timer
for 8051 or 8085
choose : 8254

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 8254
Block Diagram

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 16 BIT
COUNTER

16 BIT
COUNTER

16 BIT
COUNTER

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R.HARIHARAN AP/ EEE
D0 – D7: Bi-directional three state
data bus lines, connected to systems
data bus.
Clock Input of Counter 0
Output of Counter 0
Gate Input of Counter 0

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 +5v Supply Connection
Input should be LOW
during WRITE operations
Gate Input of Counter 2
Input should be LOW
Clock Input of counter 2
during READ operations
ClockInput
Gate output of counter
of Counter 1 2
LOW on this input enables
Used
8254totoselect any
respond one
RD &of
Clock Input of counter 1WRthe 3
counters
otherwise both the functions
control
are word register for read
Ignored.
Clock output
write operation. of counter 1
Connected to system address bus
R.HARIHARAN AP/ EEE
 3 states
Bi-Directional
8-Bit
The pin tells buffer
8254 CPU is
reading the counter
Connected to the
The pin tells system
8254 CPUbus
is
writing the counter
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This control words
used to define the
operation of the
Counters
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Counter 0, Counter 1, Counter 2
• Counters Functional Blocks are identical in
operation. Counters are fully independent.
• Control Word Register defines how a
counter operates.

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 Counter has been
programmed to
only one byte
CR Counter Register count CRM or CRL
The count values first are
stored in the Two 8
Register later moved to Counting
CE CRM & CRL Element
OL Output Latch
M MSB &
Two 8- Bit Latch
L 
LSB
OLM & OLL
M MSB & L 
LSB R.HARIHARAN AP/ EEE
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R.HARIHARAN AP/ EEE
Interfacing DAC to 8051

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 8237
DMA CONTROLLER

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DMA – Direct Memory Access
• Data Transfer can be controlled by either
hardware or software
• By using program instructions are used to
transfer data from
memory to I/O Devices &
I/O Devices to memory
• Data Transfer Steps :

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R.HARIHARAN AP/ EEE
Features of 8237A
• 4 Identical channel allow external devices to
directly transfer to / from the system
memory.
• Also allows memory to memory data
transfer
• Each channel has a full 64K address
capability.
• DMA operate with 3 to 5 Mhz.
• Data transfer speed is upto 1.6Mbytes /
second. R.HARIHARAN AP/ EEE
 End Of Process :
Address Bus (A0 - Active
A7) : Low bi-
A0 – A3 Bi – directional
directional signal.
Activated at the
A4 – A7 Uni – directional
In Idle end of DMA
Data BusA0-A3
(DB0 are inputs
- DB7) :
Service
used by CPU to read
Bi – directional system or
Indicate
loadbus.
data peripherals DMA
InThis
Active state they are
Request
is connected to the is granted
Outputs
system 4 Bits
data bus.is for DMA
operation.
A4 – A7 provides address
during DMA service
R.HARIHARAN AP/ EEE
 READYACK
HOLD : used to
: Active
extendHighmemory
signal
read
HOLD and:write
relinquished
req Active
IOR & IOW : Active Low from
Chip
HighSelect
pulses
“control :
of8237
signal the
bi-directional signals.
Active I/OLow
toRequesting Input
devices
MEMR , MEMW system : active bus ” from
In Idle cycle : Input allows CPU
low signal, “control
RESET of the
: Active
control signals used by
communication
MEMR  accesssystem datasignal
high bus ”clears
from
CPU
fromtoaddressed
read & Writebetween
memory
the CPUCPU &
Command,
Control Register. DMA 8237 Request :
location.
ADSTB : demultiplex
Status , Request
In Active cycle : Request Lines is
memory
higher to memory
address and
and Data
Temporary.
AEN disable other system
IOR  data accessactivated
from to
operation
using external
bus during
peripherals DMAlatch
transfer
obtain
MEMW  write data to DMA
IOW  load data service,
to the till the
address memory .
peripherals DACK is active
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R.HARIHARAN AP/ EEE
3 basic Control Logic Blocks :
1. Timing Control Block
2. Program command Control Block
3. Priority Encoder Block

Internal Timing & External

Control signals
Decodes the DMA modes to
select type of DMA
servicing.
Priority between DMA
channels service
requesting
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R.HARIHARAN AP/ EEE
Mode Register:

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DMA Operation:
IDLE CYCLE : No channel requesting
service.
8237A polls DREQ lines for every clock
cycle to determine if any channel
requesting a DMA service.
ACTIVE CYCLE : DMA is active it transfer
data between the peripherals and
memory.
4 Transfer Mode :
1.Single Transfer Mode 2.Block Transfer Mode
3.Demand Transfer Mode 4.Cascade Mode
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R.HARIHARAN AP/ EEE
 8251 (USART)
Universal Synchronous
Asynchronous Receiver
Transmitter

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• 8251 is a USART for serial data
communication.
• 8251 receives parallel data from
microcontroller and transmits serial
data after conversion.
• The device receives serial data
from outside and transmits parallel
data to the microcontroller after
conversion. R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
• 8251 functional configuration is programmed by
software.
• Operation between a between microcontroller and
8251. R.HARIHARAN AP/ EEE
Control Words :
2 types of control word :
1. MODE INSTRUCTION (setting of function)
2. COMMAND (Setting of operation)
MODE INSTRUCTION : Used for setting the
function of the 8251.
Mode instruction “ Wait for Write”, either
internal or external reset.
Writing of a control word after resetting is
recognised as a “ MODE INSTRUCTION”
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MODE INSTRUCTION
Items set by mode instruction are as
follows:
• Synchronous/asynchronous mode
• Stop bit length (asynchronous mode)
• Character length
• Parity bit
• Baud rate factor (asynchronous mode)
• Internal/external synchronization
(synchronous mode)
• Number of synchronous characters
(Synchronous mode)
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R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
COMMAND:
Command is used for setting the operation of
the 8251.
Possible to write a command, whenever
necessary after writing a mode instruction and
sync characters.

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COMMAND:
Items to be set by command are as follows:
• Transmit Enable/Disable
• Receive Enable/Disable
• DTR, RTS Output of data.
• Resetting of error flag.
• Sending to break characters
• Internal resetting
• Hunt mode (synchronous mode)
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R.HARIHARAN AP/ EEE
CS = 0 microcontroller
I/O Terminal
access 8251
C/D
Wont= be
0 data
in is accessed
C/D = 1 Command
“Standby status”or status
word

Reset Status 1
Output Terminal 6 CLK
0 Input
Device Terminal
waits for writing
of0“Input
MODE Terminal
Instruction”
Input Terminal
0 Input Terminal
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 TX Empty: Indicate all data
Transmitting
is been transmitted.Data :
Serial Converted
“SYNC MODE” TXEMPTY =1
sent out
If CPU writes TXEMPTY = 0
Device “Markedge
by leading Status”
of WRafter
resetting,
signal. Transmit is
disabled.
IfTransmitting Ready:
CTS = 1, written data will
Output
Ready
Terminal
to sent
transmit
not been out. data
ItIfwill
CTS =1 “out
sent TXonly
Disabled
after TX
is Output Terminal
status”
enabled.

Output Terminal
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TXC : Clock Input Signal
RXC : Clock Input Signal
data transfer speed of transmitted data.
data transfer speed of received data.
SYN MODE Input Terminal
: baud rate same as frequency
of TXC. Input Terminal
ASYNC MODE : select baud rate same as
frequency of TXC. 1, 1/16, 1/64.

Input Terminal
Contains character to ready to READ.

Input or Output Terminal

Output Terminal
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SYNC MODE :
“High” on this pin
Internal SYNC Mode : SYNC character
areOutput for&MODEM
received SYNC Interface
“Low” on this pin
Output Terminal
External
Input SYNC for
terminal Mode : this isfor
MODEM an input
terminal. Input
controlling Terminal
Transmit Circuit.Interface
Output terminal for MODEM
ASYNC MODE : OUTPUT TERMINAL for
Input
Generated
for MODEM
high
Interface
level O/P by detection of “
controlling Receiver Circuit Interface
Break” if receiver data contains “Low-
Level” Input Terminal
Input or Output Terminal
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R.HARIHARAN AP/ EEE
 8279
Programmable
Keyboard /Display
Interface
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R.HARIHARAN AP/ EEE
A programmable keyboard and display
interfacing chip.
• Scans and encodes up to a 64-key keyboard.
• Controls up to a 16-digit numerical display.
• Keyboard section has a built-in FIFO 8
character buffer.
• The display is controlled from an internal 16x8
RAM that stores the coded display
information.
R.HARIHARAN AP/ EEE
 BD: Output
CLK: Used
that blanks
internally forthe
displays
Control/strob
. is 3
timing. Max
e,MHz.
connected
to
A0 the control
= 0 Selects data
key
A0 = on
1
control/status (1)
the keyboard.
for reads & writes
between
microcontroller
R.HARIHARAN AP/ EEE and 8279.
 Interrupt
request,
Connects
Return to
lines
A3-A0/B3-B0:
becomes
microcontroller1
Shift
are inputs
Outputs
Chip
SL3-SL0:
when
that
select
a key is
for READ
DB7-DB0:
sends &
data to
used
connects
that to sense
enables to
Scan line
pressed,
WRITE
Consists
the .
MSB &
programming
data
of
key
Shift
is key
available.
bidirectionalon
outputs
LSB
, reading
depression scan
the in
keyboard.
pins
both
that
the
nibble
keyboard. of
the keyboard
connect to
display.
keyboard
data bus on
matrix
micro.
and displays.
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R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
 Counter Programmed
with a Count
1 to FFFFH
Each Counter has
Program Control
word to define the
way Counter
operates
There are 6
modes for each
counter: R.HARIHARAN AP/ EEE
• MODE 0 : An Events counter enabled with G.

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R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
 8279
Programmable
Keyboard / Display
Interface

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Features of 8279:
 It is designed by Intel
 It is support 64 contact key matrix with two
more keys “CONTROL” and “SHIFT”
 It provides 3 operating modes
1.Scanned keyboard mode
2.Scanned sensor matrix mode
3.Strobed Input mode.
 It has inbuilt debounce key .

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 It provides 16 byte display RAM to display 16
digits and interfacing 16 digits.
 It provides two output modes:
1.Left entry (Typewriter type).
2.Right entry (Calculator type).
 Simultaneous keyboard and display operation
facility allows to interleave keyboard and display
software.
 The interrupt output of 8279 can be used to tell
CPU that the key press is detected, this
eliminates the need of software polling.
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R.HARIHARAN AP/ EEE
Example to connect
64 contact key matrix

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 Control/strob
e,BD:
connected
Output
CLK: Used
that
to theblanksforthe
control
internally
displays
key on Max
timing. . is 3
MHz.
the keyboard.
A0 = 0 Selects data
A0 = 1
control/status, for
reads & writes
between
microcontroller
and 8279.
R.HARIHARAN AP/ EEE
 Interrupt
RL0-RL7
SL3-SL0:
A3-A0/B3-B0:
request,
Shift
Scan Return lines
Outputsline that
becomes
are inputs1
connects
sends
outputs datato
scan to
Chip
when
used select
ato
key is
Shift
the
both
that key
MSB
the on
enables
pressed,
DB7-DB0:
sense
&
data
key
LSB
keyboard.
Consists
programming
is of
available,
keyboard
depression
nibble of
Connects
indata
the to
bidirectional
,i.e
reading in the
and pinsdisplays.
display.
that
microcontroller
keyboard.
FIFO sensor
keyboard
forconnect
READ
ram
matrix
to
&
data
WRITE . bus on
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micro.
Block Diagram

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 CPU INTERFACE & CONTROL
SECTION:
It consists of
1 1. Data buffers
2. I/O control
2 3. Control and timing registers.
2 4. Timing and control logic.

2 A0 RD WR Interpretation

2
0 1 0 Data from CPU to 8279
0 0 1 Data from 8279 to CPU
1 1 0 Command word from
CPU to 8279
1 0 1 Status word from 8279 to
CPU
R.HARIHARAN AP/ EEE
 Scan Section
 It has two modes, 1.Encoded mode 2.Decoded
mode.
ENCODED MODE:
 It provide binary count from 0000 to 1111 by four
scan lines(SL3-SL0)by active high inputs.
 It is externally decoded to provide 16 scan lines
 Display use all 16 lines to interface 16 digit 7 segment
display.
 But keyboard use only 8 scan lines out of 16 lines.

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ENCODED SCAN:
 In this scan, scan lines (SL2-SL0) are decoded
externally to provide 8 scan lines.
 Additionally it provides 8 return lines.
 So the size of matrix keyboard is 8*8 (i.e Scan *
Return)=64.
 When the key is pressed , it is stored the status
of return lines , Scan lines ,SHIFT and CNTL/STB
keys into FIFO RAM.
 The Scanned keyboard structure is,
DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
CNTL SHIFT SCAN RETURN
R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
DECODED SCAN:
 In this mode ,internal decoder decodes the
least significant bits of scan lines (SC3-SC0).
 That is provide the four combination such as
1110,1101,1011 and 0111.
 So the maximum size of keyboard is 8*4=32.
 The key code is similar to encoded code , only
bit 5 (B5) is always zero.

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R.HARIHARAN AP/ EEE
 Keyboard section
This is consist of,
Return buffers.
Keyboard debounce control.
FIFO / sensor RAM.
FIFO / sensor RAM status
Display section
This is consist of,
1. Display RAM.
2. Display Address registers.
3. Display registers.
R.HARIHARAN AP/ EEE
 Display section
DISPLAY RAM:
 It is a 16*8 RAM.
 Which stores 16 digits display codes.
 It can be accessed by CPU directly.
 In Decoded mode,8279 uses only first four location
of Display RAM.
 In Encoded mode,8279 uses only first eight location
of Display RAM.
 And all 16 location for 16 digits display.

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 Operating modes
• It is two types,
1. Input modes. 2. Display modes.
INPUT MODES:
 It is basically 3 types,
1. Scanned keyboard.
2. Scanned sensor matrix.
3. Strobed mode.
SCANNED KEYBOARD:
Key board can be scanned in two ways.
1.Encoded Scan 2.Decoded Scan.
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R.HARIHARAN AP/ EEE
R.HARIHARAN AP/ EEE
 Display modes:
• It is basically two types,
1. Left entry (Type writer mode).
2. Right entry (Calculator mode).
LEFT ENTRY:
 In this mode , 8279 display characters from left to
right.
 Like a typewriter.
AUTOINCREMENT IN LEFT ENTRY:
 In left entry mode , Autoincrement flag is set after
each operation display RAM address is
incremented.
R.HARIHARAN AP/ EEE
RIGHT ENTRY:
 In this mode , 8279 display
characters from Right to left.
 Like a Calculator.
AUTOINCREMENT IN RIGHT ENTRY:
 In right entry mode , Auto
increment flag is set after each
operation display RAM address is
incremented.
R.HARIHARAN AP/ EEE
 A/D Interfacing of 8051
• Most of the sensors AND transducers such as
temperature, humidity, pressure, are analog.

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• Features of ADC 0808
• 1. Inbuilt 8 analog channels with
multiplexer
• 2. Zero or full scale adjustment is not
required
• 3. 0 to 5V input voltage range with a single
polarity 5V supply
• 4. Output is TTL compatible
• 5. High speed
• 6. Low conversion time (100micro second)
R.HARIHARAN AP/ EEE
• 7. High accuracy
• 8. 8-bit resolution
• 9. Low power consumption (less than 15mW)
• 10. Easy to interface with all microprocessor
• 11. Minimum temperature dependence

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