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Digital Assignment

This document contains instructions for a digital assignment on theory of computation and compiler design. It includes 7 questions asking students to: 1. Provide examples of grammars that are LL(1) but not LR(0) and vice versa, and explain why. 2. Explain shift-reduce and reduce-reduce conflicts in an LR(1) parser. 3. List all conflicts that an LR(0) and SLR parser would encounter for a given grammar Λ. 4. Show that a given language is context-free by providing a context-free grammar. 5. Provide deterministic finite automata and regular expressions for various languages involving items on a conveyor between two

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Divyansh Rai
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109 views

Digital Assignment

This document contains instructions for a digital assignment on theory of computation and compiler design. It includes 7 questions asking students to: 1. Provide examples of grammars that are LL(1) but not LR(0) and vice versa, and explain why. 2. Explain shift-reduce and reduce-reduce conflicts in an LR(1) parser. 3. List all conflicts that an LR(0) and SLR parser would encounter for a given grammar Λ. 4. Show that a given language is context-free by providing a context-free grammar. 5. Provide deterministic finite automata and regular expressions for various languages involving items on a conveyor between two

Uploaded by

Divyansh Rai
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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SCHOOL OF COMPUTING SCIENCES AND ENGINEERING

CSE2002 -Theory of computation and Compiler Design

Digital Assignment

Due Date: 17-SEP-2019 Max Marks: 10

1.Give an example of a grammar that is LL(1) but not LR(0), and explain why.
2.Give an example of a grammar that is LR(0) but not LL(1), and explain why.
3.Explain shift-reduce and reduce-reduce conflicts (i.e. how they manifest themselves in an
LR(1) parser.
4.An LR(0) parser is a special case of LR parsers characterized by a zero token look-ahead.
Reduceactions occur purely based on the tokens that have already been pushed on to the
stack. List all theconflicts that an LR(0) parser for Λ would encounter.
5.An SLR parser is an LR(0) parser with one addition: we perform a reduce action only if the
next tokenis in the Follow set of the nonterminal that the reduction would derive. List all the
conflicts that anSLR parser for Λ would encounter. Also explain what you would do to get the
right-most possiblederivations for Λ using an SLR parser if you had the ability to manually
pick a state transition wherethere is a conflict
6.Show that the language{uawb | u ,w∈ {a,b}∗, with |u| = |w|}is context free by exhibiting a
context free grammar that generates it.
7. In a factory, there is a conveyor connecting two machines M1 and M2.Some items are to be
processed by M1 and then transported to M2. Atmost 3 items can be placed simultaneously on
the conveyor.

(a) Assume that a computer receives symbol b whenever an item is placed on the conveyor
(by machine M1), and symbol c whenever an item is taken from the conveyor (by
machine M2). Consider the language L1 over {b,c}∗of the sequences received by the
computer.(Assume that at the beginning and at the end the conveyor is empty). So, for
instance, all the strings inL1have the same number of b’s and c’s. Strings bc
,bbcbcc,bbbcccare inL1, but any string containing a substring bbbb or bbbcbb is not.
Provide a deterministic finite automaton for L1. Using the equation solving approach
presented at the lectures, construct from the automaton a regular expression forL1. (You
may begin with a common sense construction and then compare both results).
(b) Now assume that each machine can process at most one item at a time. Assume that the
computer receives symbol a whenever an item enters machine M1. Consider the
corresponding language L2 over {a,b,c}∗, assuming that at the beginning and at the end
both the conveyor and the machine is empty. Provide a DFA for L2.
(c) Assume that symbol ld is sent whenever an item leaves M2. Pro-vide a DFA for the
corresponding languageL3over {a,b,c,d}∗.Hint: As in the last case the DFA may be rather
big, do not proceed without finding some regular pattern in its diagram. Be-ginning with a
conveyor of a smaller capacity may be helpful.
(d) Are you able to find out whether your automata are minimal? Hint: Straightforwardly
applying the minimization algorithm prob-ably results in too much work.

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