Scribd
Upload
46 views3 pages

University of Science & Technology, Bannu

The document is a midterm exam from the University of Science & Technology in Bannu, Pakistan for their Digital Logic Design course. The exam contains 4 questions: 1) Design a 2-bit magnitude comparator, 2) Perform addition, subtraction, and conversion between BCD and binary numbers, 3) Determine output waveforms for an XOR and XNOR gate given input waveforms, 4) Minimize logic expressions using Karnaugh maps. The exam is worth a total of 30 marks and allows students 1 hour to complete it.

Uploaded by

Syed Yaqoob Shah
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
46 views3 pages

University of Science & Technology, Bannu

The document is a midterm exam from the University of Science & Technology in Bannu, Pakistan for their Digital Logic Design course. The exam contains 4 questions: 1) Design a 2-bit magnitude comparator, 2) Perform addition, subtraction, and conversion between BCD and binary numbers, 3) Determine output waveforms for an XOR and XNOR gate given input waveforms, 4) Minimize logic expressions using Karnaugh maps. The exam is worth a total of 30 marks and allows students 1 hour to complete it.

Uploaded by

Syed Yaqoob Shah
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 3

University of Science & Technology, Bannu

Bannu Township, Khyber Pakhtunkhwa, Bannu, Pakistan.


Ph # 0928–633825 Fax # 0928—633821 www.ustb.edu.pk

Subject: Digital Logic Design Exam: Mid Term (Fall 2018) Department: Software Engg
Batch: 7th Time Allowed: 1 hour

Solve all questions.

Answer the following questions

Q1. Design a 2-bit Magnitude comparator. [6]

Q2.

I. Add the following BCD Numbers [2+2+3+3]


a. 00010111+00010101 b. 01100111+01010011

II. Perform the following subtraction of the signed numbers

III. Convert the decimal fraction 0.188 to binary

Page 1 of 3
Q3. Determine the output waveforms for the XOR gate and for the XNOR gate, given the input waveforms, D and C,
in the below Figure [6]

Q4. [4+4]

I- Use a Karnaugh map to minimize the following POS expression:

II- Map the following SOP expression on a Karnaugh map:

Page 2 of 3
Page 3 of 3

You might also like