10V

5V

0V
10mHz 30mHz 100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
V(R2:2)
Frequency

20uA

15uA

10uA

5uA

0A
10mHz 30mHz 100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
I(C1) I(C2) I(R1) I(V1)
Frequency

100

50

0
10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
V(R1:1)/ I(R1)
Frequency

Power Electronics Simulation

using PSPICE
By Suman Debnath
The purpose of this book is to provide a guideline how to simulate power electronics circuits which are very useful
in our day to day life. The reader of this book is requested to do practical for verification of the simulation given here
and think innovatively while simulation of any circuit. It is possible to analyze the circuit in different ways. This
manual is useful for simulation of power electronics circuits (high power as well as low power). This lab manual can
be used UG as well as PG scholar. This book is also helpful for doing research in high power electronics and low
power electronics circuits (VLSI Circuit).
‘Power Electronics Simulation using PSPICE’ by Suman Debnath

Dedicated to my parents my father Ramesh Debnath and my mother Manju Debnath.

I would like to thank Prof Bidyut kumar Bhattacharyya for his inspiration, Faculties of Electrical and
Instrumention Engineering for there support and students of instrumentation engineering, NIT Agartala
for showing interest on simulation.

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

Bibliography

Mr. Suman Debnath was born on 20th July, 1986, in Agartala, India. He completed his Madhyamik
from Resharbagan Higher Secondary School, Agartala in 2004. After that he has completed Diploma in
Electrical Engineering from Polytechnic Institute Narsingarh, Tripura in 2007. He received his B.E
degree in 2010 from Dr. B.A.M.U. University and M-Tech Degree in 2012 from NIT Agartala and he is
currently a PhD Scholar at NIT Agartala and working as a Senior Manager at TSECL. He also serve
social work in NGO and serves as a President at Research Scholar Association National Institute of
Technology Agartala (RSA-NITA).He has one Patent (patent application number 798/KOL/2014) and
many International Journal and Conference (published in IEEE Transaction on CPMT, International
Journal of Bioinformatics and Intelligent Control (JBIC), IJASTR, IJEE, IJCA, IJERA, IEEE SCEECS
2012, ICECT 2013 ). He has been awarded in many prestigious awards. Some of these are Dr. B. R.
Ambedkar Memorial Award (2004), POSOCO Power System Award (PPSA-2013). His research interest
includes Power Delivery Network and Optimization.

My effort will get success if you get any help like simulating circuit diagram on PSPICE
environment from this book. Your suggestion to improve this book will be highly appreciated.
Give your feedback by mailing me.

e-mail:-

[email protected] , [email protected]

Contact: +91 9862777539

See in the website given here:- https://www.researchgate.net/profile/Suman_Debnath6/

Facebook link:- click here

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

Topic Covered on this book

1. In Interdisciplinary nature of power electronics 5
2. Applications of power electronics 5
3. What is PSPICE 7
4. types of circuit analyses using PSPICE 7
5. Advantages of using PSPICE and Drawbacks 7
6. Steps to start PSPICE Simulation 8
7. The units of elements 8
8. How to give node name (notation) 10
9. DC Sweep Analysis with example 11
10. Transient Analysis with example 12
11. AC Sweep Analysis with example 15
12. How to find out the Power Delivery Network (PDN) of a Circuit 16
13. How to connect two terminal without wires 18
14. Active Filter Circuit with ideal & Real Op-amp 18
15. How to Start a new project in PSPICE 21
16. How to add library in part search 22
17. Parametric Sweep 22
18. How to check bias point 24
19. Power Electronics Switches 25
20. Analogue Component 25
21. BJT 27
22. Thyristor 28
23. Uncontrolled Half wave rectifier 33
24. Uncontrolled Half wave rectifier with RL Load 36
25. Uncontrolled Half wave rectifier with RC Load 37
26. Uncontrolled Half wave rectifier with RL Load & Freewheeling Diode 39
27. Controlled Half wave rectifier 42
28. Uncontrolled DOUBLE HALF WAVE RECTIFIER 45
29. Duel Rectifier With Diode Bridge And Center Tap Secondary 46
30. HALF WAVE RECTIFIER WITH SERIES RESISTOR 48
31. RECTIFIER WITH ZENER DIODE 49
32. 3 phase rectifier 50
33. Diode Bridge Rectifier 52
34. single phase diode rectifier using novel passive wave shaping method 53
35. single phase diode rectifier circuit with series input resonant filter 54
36. single phase diode rectifier using improved passive wave shaping method 55
37. Full wave Diode Bridge rectifier with and without capacitor 56
38. Fourier Analysis of a Pulse Waveform using PSPICE 59
39. RECTIFIER FOR HIGH VOLTAGES 60
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40. VOLTAGE QUADRUPLING 61

41. How to find out netlist of whole simulation 64
42. Inverter Half Wave 65
43. Full Bridge Inverter 67
44. Pulse-Width-Modulation (PWM) and Filter Characteristics 69
45. Fourier analysis of Pulse-Width-Modulation (PWM) and Filter Characteristics 70
46. Buck Converter basic circuit diagram 72
47. Buck Converter 73
48. Boost Converter 74
49. SIMPLIFIED MODEL OF DC-DC CUK CONVERTER 76
50. SIMPLIFIED MODEL CONVERTER DC-DC BOOST (FLYBACK) 78
51. SIMPLIFIED MODEL OF BUCK-BOOST CONVERTER (FLYBACK) 79
52. Frita’s and Gome’s Buck Converter-Soft switching 82
53. PWM Generation using IC555 84
54. Generation of an AM signal 87
55. Square wave generator using Op-Amp 88
56. Sine wave generator using Op-Amp 90
57. Low power Electronics Application (VLSI) 91
57.1 PSPICE schematic of CMOS inverter 91
57.2 CMOS NAND GATE 94
57.3 Current mirror 96
57.4 Design and build CMOS Transistor Level Utility Amplifiers 100
57.5 Comparator 102
57.6 Design and build CMOS NOR Gate 105

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

1. Interdisciplinary nature of power electronics

Power Electronics has a wide application in almost every engineering discipline. That is
why it is so much important now days. In the figure below interdisciplinary nature of
power electronics has been shown.

Applications of power electronics

Wide range of residential, commercial, and industrial applications, including computers,

transportation, aircraft/aerospace, information processing, telecommunications, and power
utilities

1. Electrical applications of Power Electronics

Power electronics can be used to design ac and dc regulated power supplies for various
electronic equipment, including consumer electronics, instrumentation devices, computers,
aerospace, and uninterruptable power supply (UPS) applications. Power electronics is also used
in the design of distributed power systems, electric heating and lighting control, power factor
correction, and static var compensation.

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Electromechanical applications:
Electromechanical conversion systems are widely used in industrial, residential, and commercial
applications. These applications include ac and dc machine tools, robotic drives, pumps, textile
and paper mills, peripheral drives, rolling mill drives, and induction heating.

Electrochemical applications:
Electrochemical applications include chemical processing, electroplating, welding, metal
refining, production of chemical gases and fluorescent lamp ballasts. Power electronics
applications in residential, commercial, industrial, transportation, utility systems, aerospace and
telecommunication fields.

a. Residential d. Transportation
Refrigeration and freezers Traction Control of electric vehicle
Space heating Electric locomotives
Air conditioning Street Cars, trolley buses
Cooking Subways
Electronics (Personal Computer, Automotive electronics including
Entertainment Equipment) engine control

b. Commercial e. Utility systems

Heating, Ventilation and Air High voltage DC Transmission
Conditioning (HVDC)
Central Refrigeration Static VAR Compensation (SVC)
Lighting Supplemental energy sources (wind,
Computers and office equipment photovoltaic), fuel cell
Uninterruptible power supply (UPS) Energy storage system
Elevators Induced draft fans and boiler, feed
water pumps
c. Industrial
Pumps f. Aerospace
Compressors Space Shuttle power supply systems
Blowers and fans Satellite power system
Machine tools (robots) Aircraft Power System
Arc furnace, induction furnaces
Lighting g. Telecommunication
Industrial Laser Battery Charger
Induction Heating Power Supplies (dc and ups)
Welding

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

2. What is PISPICE ?
SPICE is a powerful general purpose analog and mixed-mode circuit simulator that is used to
verify circuit designs and to predict the circuit behavior. This is of particular importance for
integrated circuits. It was for this reason that SPICE was originally developed at the Electronics
Research Laboratory of the University of California, Berkeley (1975), as its name implies:

Simulation Program for Integrated Circuits Emphasis.

PSpice is a PC version of SPICE (which is currently available from OrCAD Corp. of Cadence
Design Systems, Inc.). A student version (with limited capabilities) comes with various
textbooks. The OrCAD student edition is called PSpice AD Lite. Information about Pspice AD is
available from the OrCAD website: http://www.orcad.com/pspicead.aspx

3. Types of circuit analyses

SPICE can do several types of circuit analyses. Here are the most important ones:

• Non-linear DC analysis: calculates the DC transfer curve.

• Non-linear transient and Fourier analysis: calculates the voltage and current as a function of
time when a large signal is applied; Fourier analysis gives the frequency spectrum.

• Linear AC Analysis: calculates the output as a function of frequency. A bode plot is generated.

• Noise analysis

• Parametric analysis

• Monte Carlo Analysis

4. Advantage and Drawbacks of PSPICE

Drawbacks

• The PSpice Light version has the following limitations: circuits have a maximum of 64
nodes, 10 transistors and 2 operational amplifiers.

• In full version of PSPICE there is no such limitation.

Advantages of using PSPICE

• PSpice allows multiple plots to be viewed simultaneously, such as voltage, power, etc.
Also, specific points, such as a voltage at a certain time, can be selected and marked on
the output plot in PSpice,

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

• PSpice contains libraries full of specific components with manufacturer specifications.

These components are included so the user may obtain realistic simulation results,

• Very simple to represent any electrical circuit, in particular power-electronic circuits and

• A wide library of commercial electric components are available.

• All analyses can be done at different temperatures. The default temperature is 300K.

5. Steps to start PSPICE Simulation

6. The units of elements

The values of elements can be specified using scaling factors (upper or lower case):

T or Tera (= 1E12);

G or Giga (= E9);

MEG or Mega (= E6);

K or Kilo (= E3);

M or Milli (= E-3); U or Micro (= E-6);

N or Nano (= E-9);

P or Pico (= E-12)

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

F of Femto (= E-15)

This specifies same meaning: 225P, 225p, 225pF; 225pFarad; 225E-12; 0.225N

PSPICE A brief primer, University of Pennsylvania Department of Electrical and Systems

Engineering

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7. How to give node name (notation)

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

8. DC Sweep Analysis

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

20V

15V

10V

5V

0V
0V 2V 4V 6V 8V 10V 12V 14V 16V 18V 20V
V(R1:1) V(R2:2)
V_V1

9. Understanding Transient Analysis

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 ‘Power Electronics Simulation using PSPICE’ by Suman Debnath

-0.0mA

-1.0mA

-2.0mA

-3.0mA
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms 55ms 60ms
I(C1)
Time
15V

10V

5V

0V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms 55ms 60ms
V(R2:2)
Time

Another circuit for Understanding Transient Analysis

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6.0V

4.0V

2.0V

0V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms 55ms 60ms
V(R2:2)
Time

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

0A

-0.5mA

-1.0mA
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms 55ms 60ms
I(C1)
Time

10. Understanding AC Sweep Analysis

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100uA

50uA

0A
100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
I(C1)
Frequency

600mV

400mV

200mV

0V
100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
V(R2:2)
Frequency

11. How to find out the Power Delivery Network (PDN) of a Circuit

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

100

50

0
10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz 30KHz 100KHz
V(R1:1)/ I(R1)
Frequency

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12. How to connect two terminals without wires

13. Active Filter Circuit with ideal op-amp.

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

10V

5V

0V
10mHz 30mHz 100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
V(U1:OUT)
Frequency

20uA

15uA

10uA

5uA

0A
10mHz 30mHz 100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
I(C1) I(C2) I(R1) I(V1)
Frequency

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AC Sweep of Filter with Real Op-amp (Filter circuit)

10V

5V

0V
10mHz 30mHz 100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
V(R2:2)
Frequency

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20uA

15uA

10uA

5uA

0A
10mHz 30mHz 100mHz 300mHz 1.0Hz 3.0Hz 10Hz 30Hz 100Hz 300Hz 1.0KHz 3.0KHz 10KHz
I(C2)
Frequency

14. How to start a new project in PSPICE

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

15. How to add library in part search

16. Parametric Sweep

Double click on the value (500 Ohms) of the load resistor R1 to {Rval}. Use curly brackets.

Add the PARAM part to the circuit

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

Double click on the PARAM part. This will open a spreadsheet like window showing the PARAM
definition. You will need to add a new column to this spread sheet. Click on NEW COLUMN and enter
for Property Name, Rlval (without the curly brackets).

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

17. How to check bias point of BJT

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18. Power Electronics Switches

• BJT
• MOSFET
• IGBT
• GTO
• SCR
• TRIAC
• SiTH

My Computer → Local Disc C → Program files →Orcad →Documents → lib_list.pdf

19. Analogue Components

• AF Transistor • Isolation Amplifier
• Average Power Supply Model • Junction Field-Effect Transistor
• Bipolar Transistor • LED Diode
• Bridge Driver • Magnetic Core
• Buffer (Analog) • MCT
• Current Regulator Diode • Metal Oxide Varistor
• Darlington Transistor • Miscellaneous Analog
• Demodulator • Multiplexer (Analog)
• Digital Transistor • Multiplier (Analog)
• Diode • N-Channel Dual Gate MOSFET
• Diodes and Rectifiers • N-Channel MOSFET
• Filter • N-Channel Vertical DMOSFET
• GaAs MESFET • NPN Bipolar Transistor
• Hall-Effect Generators • NPN Bipolar with Schottky-diode
• Inductor • NPN RF Bipolar Transistor
• Instrument Amplifier • NTC Thermistor
• Insulated Gate Bipolar Transistor • Operational Amplifier
• Opto-Isolator • Switch
• P-Channel Vertical DMOSFET • Transformer
• Photo Diode • Transistor Array
• Photo-Detector Model • Transmission Line
• PIN Diode • Varactor Diode
• PNP Bipolar Transistor • Video Amplifier
• PNP Bipolar with Schottky-diode • Video Fader
• Power Amplifier • Voltage Comparator
• Power Bipolar Transistor • Voltage Reference
• Power MOSFET • Voltage Regulator
• Pressure Sensor • Voltage-Variable Capacitance Diode
• Quartz Crystals • Zener Diode
• RF Bipolar Transistor • Bipolar Transistor
• RF Bipolar Transistor • Junction Field-Effect Transistor
• RF MOSFET • Rectifier

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

• RF Transistor • Small-Signal Mosfet

• Schottky Diode • Silicon-Controlled Rectifier

Digital (general, TTL)

• Adder • Programmable Array Logic

• Address Comparator • Pulldown Resistor
• ALU • Pullup Resistor
• Buffer (Digital) • Register
• Capacitive Load • Schmitt Trigger
• Comparator • Shift Register
• Counter • Translator
• Decoder • Bus
• Delay • Expander
• Encoder • Frequency divider
• Flip-Flop • Identity Comparator
• Gate • Look-Ahead Carry Generator
• Gate Array Logic • Line Driver
• Latch • Magnitude Comparator
• Look-Ahead Carry Generator • Multifunction
• Monostable Multivibrator • Multiplier (Digital)
• Multiplexer (Digital) • Multiplexer (Digital)
• Multiport Register • Parity Generator
• Parity Generator • Priority Encoder
• Priority Encoder • PROM
• ADC • Pulse Synchronizer
• DAC • Register
• Data Acquisition • Rate Multiplier
• Miscellaneous Analog • Shift Register
• Switch-Mode Regulator • Tranceiver
• Voltage/Frequency Converter • True/Complement

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20. BJT

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-0.0A

-1.0A

-2.0A

-3.0A
0V 0.1V 0.2V 0.3V 0.4V 0.5V 0.6V 0.7V 0.8V 0.9V 1.0V
I(VCE)
V_VBE

21. Thyristor
Thyristor turn on characteristics

Analysis Type=Time domain (Transient)

Run to time= 4us
Start Saving data after= 0
Maximum Step Size=0.1ns
Component
Pulse Voltage from source.slb library (VPULSE)
DC source from source.slb library (VDC)
2N1595 SCR from eval.slb library
Analog ground from port.slb library (AGND)
Resistors from analog.slb library

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

1.0A

0.5A

0A
0s 0.4us 0.8us 1.2us 1.6us 2.0us 2.4us 2.8us 3.2us 3.6us 4.0us
- I(R1)
Time

Fig. anode current

8.0V

4.0V

0V

-4.0V

-8.0V
0s 0.4us 0.8us 1.2us 1.6us 2.0us 2.4us 2.8us 3.2us 3.6us 4.0us
V(Rg:1)
Time

DC Analysis of SCR

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6.0V

4.0V

2.0V

0V
0V 2V 4V 6V 8V 10V 12V 14V 16V 18V 20V
V(R1:2) V(X1:A,0)
V_V1

Fig. gate voltage

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Thyristor turn on characteristics

Analysis Type=Time domain (Transient)

Run to time= 4us

Start Saving data after= 0

Maximum Step Size=0.1ns

8.0V

6.0V

4.0V

2.0V

0V
0s 0.4us 0.8us 1.2us 1.6us 2.0us 2.4us 2.8us 3.2us 3.6us 4.0us
V(R1:1)
Time

V(R1:1)=Anode Cathode Voltage

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

600mA

400mA

200mA

0A
0s 0.4us 0.8us 1.2us 1.6us 2.0us 2.4us 2.8us 3.2us 3.6us 4.0us
- I(R1)
Time

-I(R)=Anode Current

Design and simulation of power electronic circuits

Power Electronic Circuits can be classified as:

• DC-DC Converters

• AC-DC Converters (Rectifiers)

• DC-AC Converters (Inverters)

• AC-AC Converters

Now design and simulation of each of these circuits will be discussed.

These converters are further divided based on number of phase (single phase, three phase,
poly-phase) and based on conversion type (Half wave, Full wave)

For referring different types of power electronics devices follow the reference[1]

….

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22. Half wave rectifier

Part name

Source=VSIN (VOFF=0,VAMP=220,FREQ=50)

Resistance=R(R=0.001)

Transformer=XFRM_LINEAR (Coupling=0.05,i.e 20:1,(1/20=0.05), if primary is 20 volt

then secondary will be 1 volt)

Diode=D1N4002

Capacitor=C (15mF)

Load resistance RL=R (100)

Choose the 0 ground (GND)

The transformer has a ratio of 20 to 1. The diode is obviously not an ideal diode but will have
a serial resistance RD. At diode ends, voltage reachs twice peak voltage at secondary
winding.The formula to determine the capacitance C1 is given by: C= K * (I / Vr), where C
is uF, K is 4.8 for halfwave rectifiers and 1.8 for double halfwave rectifiers.I is the current
that can deliver power supply in milliamps and Vr is the maximum ripple ammissibile in
output voltage V.Ripple obviously occurs with the resistance load connected.For instance, for
a ripple allowable of 0.5V and a maximum current up to 1500mA, we 'll have C = 4.8 *
1500 / 0.5 V = 14400uF, around 15mF.

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VSin (voltage source)

DIN4002 (diode)

R (Resistance)

GND_SIGNAL/CAPSYM.

100V

50V

0V

-50V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:1)
Time

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‘Power Electronics Simulation using PSPICE’ by Suman Debnath

100V

50V

0V

-50V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:2)
Time

200mA

0A

-200mA

-400mA
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(R1)
Time

150mA

100mA

50mA

0A
0Hz 0.1KHz 0.2KHz 0.3KHz 0.4KHz 0.5KHz 0.6KHz 0.7KHz 0.8KHz 0.9KHz 1.0KHz 1.1KHz 1.2KHz 1.3KHz
I(R1)
Frequency

300mA

200mA

100mA

0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
RMS(I(R1))
Time

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24. Uncontrolled Half wave rectifier with RL Load

VSin (voltage source)

DIN4002 (diode)

R (Resistance)

L ( Inductor)

GND_SIGNAL/CAPSYM

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100V

50V

0V

-50V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:1)
Time

100V

50V

0V

-50V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:2)
Time

25. Uncontrolled Half wave rectifier with RC Load

VSin (voltage source)

DIN4002 (diode)

R (Resistance)

C ( Capacitor)

GND_SIGNAL/CAPSYM

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100V

50V

0V

-50V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:1)
Time

100V

50V

0V

-50V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:2)
Time

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26. Uncontrolled Half wave rectifier with RL Load & Freewheeling Diode

VSin (voltage source)

DIN4002 (diode)

R (Resistance)

L ( Inductor)

GND_SIGNAL/CAPSYM

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100V

50V

0V

-50V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:1)
Time

2.0A

0A

-2.0A

-4.0A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(R1) RMS(I(R1))
Time

VSin (voltage source)

VPULSE (voltage source)

2N1595 (Thyristor)

R (Resistance)

GND_SIGNAL/CAPSYM

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400mA

0A

-400mA

-800mA
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(R1)
Time

100V

50V

0V

-50V

-100V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(X1:A) V(X1:K)
Time

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27. Controlled Half wave rectifier

VSin (voltage source)

VPULSE (voltage source)

2N1595 (Thyristor)

R (Resistance)

GND_SIGNAL/CAPSYM

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80mV

40mV

0V

-40mV
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(X1:K)
Time

VSin (voltage source)

VPULSE (voltage source)

2N1595 (Thyristor)

R (Resistance)

GND_SIGNAL/CAPSYM

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10V

5V

0V

-5V

-10V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(X1:A) V(V2:-)
Time

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28. Uncontrolled Double Half -Wave Rectifier

PARAMETRIC ANALYSIS WITH DOUBLE HALF WAVE RECTIFIER

• Part name

• Source=VSIN (VOFF=0,VAMP=220,FREQ=50)

• Transformer= XFRM_LIN/CT-SEC (LP1_VALUE=40mH, LP2_VALUE=400uH,

LS_VALUE=400uH)

• Diode= D1N4002

• Capacitor=C (100mF)

• Resistor=R (Rpar)

• PARAMETERS= PARAM

• Choose the 0 ground (GND)

In this schematic, with a double half-wave rectifier we have a frequency ripple of 100Hz, that
is a 10ms period. Let's perform a parametric analysis in which we see as output voltage
increases if resistance load increases, and vice versa the ripple decrease for an higher load.
Load ranges from 0.5 to 20 Ohm

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29. DUAL RECTIFIER WITH DIODES BRIDGE AND CENTER TAP SECONDARY

• Part name

• Source=VSIN (VOFF=0,VAMP=220,FREQ=50)

• Transformer= XFRM_LIN/CT-SEC (LP1_VALUE=40MH, LP2_VALUE=2MH,

LS_VALUE=2MH)

• Diode= D1N4002

• Capacitor= C (C1=1800uF, C2=1800uF)

• Choose the 0 ground (GND)

This schematic is similar to the halfwave rectifier with the CENTER TAP of transformer
between the two electrolytic capacitors, the only difference is the diodes bridge that rectifies
both halfwaves.

BRIDGE DIODES RECTIFIER

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• Part name

• Source=VSIN (VOFF=0,VAMP=220,FREQ=50)

• Resistance=R (R1=0.001)

• Transformer= XFRM_LINEAR (Coupling=0.1,i.e 10:1,(1/10=0.1), if primary is 20 volt

then secondary will be 1 volt, L1_VALUE=1000uH, L2_VALUE=10uH)

• Diode= D1N4002

• Capacitor=C (C1=4.7mF)

• Choose the 0 ground (GND)

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This is the classic configuration of bridge diodes rectifier used to rectify all the two
halfwaves. We used a library model transformer in which we set a ratio of 1:10 through
values of the

inductances to primary and secondary windings: L1=1000u and L2=10u.

30. HALF WAVE RECTIFIER WITH SERIES RESISTOR

Part name

• Source=VSIN (VOFF=0,VAMP=220,FREQ=50)

• Diode=MBR1045

• Resistor=R (R1=180, R2=10)

• Capacitor= C (C1=15mF)

• Choose the 0 ground (GND)

In this schematic we have a half-wave rectifier directly connected to 220V.We know that the
load has a voltage of 12V, and being 10 Ohm the resistance value, the resistor absorbs a
current of 1.2 A. Because to the ends of capacitor (which should withstand to voltage
differences over 500V) are 220V, we need a voltage drop of 208V.For this reason we must
set a resistance R1 equal to V / I = 208V / 1.2 A = 180 Ohm.WE HAVE SUPPOSED THAT
POWER DISSIPATION IS COSTANT IN TIME, OTHERWISE LOAD VOLTAGE CAN
CHANGE AND CAN DAMAGE IT.

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31. RECTIFIER WITH ZENER DIODE

• Part name

• Source=VSIN (VOFF=0,VAMP=50,FREQ=50)

• Diode=MBR320

• Zener diode=1N4372

• Resistor=R (R1=1K)

• Capacitor=C (15mF)

• Choose the 0 ground (GND)

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We can use it when the voltage rectified to the ends of the capacitor is too high for load and
we need to decrease it.This is done for circuits that provide to the load up to 100mA. The
Zener diode, which must be inversely biased (cathode positive and anode negative) has a
voltage drop which is typical of that specific Zener. In this case voltage drop is about 3V, but
for other diodes can reach 100V or more. The characteristic of Zener is such that for
variations on the current that flows in it, its voltage drop remains constant. The basic
parameters of a Zener diode are its Zener current Iz, its voltage drop of Zener Vz and of
course the power Wz that it can dissipate and will be given by product Vz * Iz. If we apply to
the Zener diode a reverse voltage greater than Vz, obviously we' ll have place a resistance
equal to (Vin-Vz)/Iz, where Vin is the voltage that we apply.

32. 3-phase rectifier

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1.0A

0.5A

0A

-0.5A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(D1) I(D4)
Time

1.0A

0.5A

0A

-0.5A
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
I(D1) I(D4)
Time

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33. Diode Bridge Rectifier

160V

120V

80V

40V

0V
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms
V(D1:2)
Time

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34. Single phase diode rectifier using novel passive wave shaping method

150V

100V

50V

0V
0s 50ms 100ms 150ms 200ms 250ms 300ms 350ms 400ms 450ms 500ms 550ms 600ms 650ms 700ms 750ms 800ms
V(D1:2)
Time

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35. Single phase diode rectifier circuit with series input resonant filter

120V

80V

40V

0V
0s 1s 2s 3s 4s 5s 6s 7s 8s 9s 10s
V(D1:2)
Time

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36. Single phase diode rectifier using improved passive wave shaping
method

150V

100V

50V

0V
0s 0.4s 0.8s 1.2s 1.6s 2.0s 2.4s 2.8s 3.2s 3.6s 4.0s
V(D1:2)
Time

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37. Full wave Diode Bridge rectifier with & without capacitor
Full wave Diode Bridge rectifier circuit in PSPICE

Full wave Diode Bridge rectifier with capacitor

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20V

10V

0V

-10V

-20V
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms
V(D1:A,D3:A)
Time

Input Voltage waveform

20V

10V

0V

-10V
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms
V(D1:A) V(D3:A)
Time

Positive and Negative half of the input waveform

20V

15V

10V

5V

0V
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms
V(R1:2)
Time

Rectified output waveform of diode bridge rectifier (without capacitor)

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20V

15V

10V

5V

0V
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms
V(R1:2)
Time

Fig: If we connect a Capacitor (c=15mF) across the rectifier output then output waveform becomes
steady

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38. Fourier Analysis of a Pulse Waveform using PSPICE

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39. RECTIFIER FOR HIGH VOLTAGES

Part Name

Source=VSIN (VOFF=0,VAMP=50,FREQ=50)

Resistance=R (R1=390k,R2=390k,R3=390K,

R5=0.001)

Capacitor= C (C1=30nF, C2=30nF,C3=30nF,

C4=4800uF

Transformer=XFRM_LINEAR (L1_VALUE=10uH,

L2_VALUE=160uH, COUPLING=1)

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Ground

Diodes commercially available normally can withstand voltages of order of 3-400 V, if it's
necessary rectifier higher voltages we have to place a number of diodes in series.A typical
schematic is represented above, where the resistance are high value and can share equally
high voltage between diodes absorbing little current. Capacitors serve to reduce possible
noise introduced by diodes.
1.0KV

0.5KV

0V

-0.5KV

-1.0KV
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms
V(C4:+) V(R5:2,0) V(C1:1,0)
Time

40. VOLTAGE QUADRUPLING

To the ends of couple capacitors C2-C3 we get a voltage differential of 40V, with a
maximum current which

will be 1/4 respect maximum current of secondary winding.Let's note that this quadrupling
multiplier is

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obtained as two voltage doubler together: C1 D3 D4 C3 and C4 D2 C2 D1.

* source FOURMULTVOLTAGE

V_V1 N00372 0 AC 220V

+SIN 0 220V 50 0 0 0

D_D1 N00539 N00597 D1N4002

D_D2 N00624 N00539 D1N4002

D_D3 N00512 N00624 D1N4002

X_TX1 N000770 0 N00448 N00624 VoltageQuadrupling_TX1

D_D4 0 N00512 D1N4002

R_R1 N00372 N000770 0.001

C_C1 N00448 N00512 1000u

C_C2 N00597 N00624 1000u

C_C3 N00624 0 1000u

C_C4 N00539 N00448 1000u

.subckt VoltageQuadrupling_TX1 1 2 3 4

K_TX1 L1_TX1 L2_TX1 0.05

L1_TX1 1 2 10uH

L2_TX1 3 4 10uH

.ends VoltageQuadrupling_TX1

VOLTAGE QUADRUPLING

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40V

20V

0V

-20V
0s 20ms 40ms 60ms 80ms 100ms 120ms 140ms 160ms 180ms 200ms
V(C2:+) V(TX1:3,TX1:4)
Time

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41. How to find out netlist of whole simulation

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42. Inverter Half Wave

DC Voltage Source= VDC (200Vdc)

Gate triggering= Vpulse

Resistor=R (R6=1000K, R7=100K,R8=5)

SWITCH= IRF150

Diode= D1N4002

Inductor=L (50mH)

Capacitor=C (C1=0.022uF, C2=0.022uF)

Ground

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200V

100V

0V

-100V

-200V
0s 10us 20us 30us 40us 50us 60us 70us 80us 90us 100us
V(L1:1,R8:2)
Time

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43. Full Bridge Inverter

DC Voltage Source= VDC (200Vdc)

Gate triggering= Vpulse

Resistor=R (R6=1000K, R7=100K,R8=5)

SWITCH= IRF150

Diode= D1N4002

Inductor=L (50mH)

Capacitor=C (C1=0.022uF, C2=0.022uF)

Ground

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6.0V

4.0V

2.0V

0V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(R5:2)
Time

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44. Pulse-Width-Modulation (PWM) and Filter Characteristics

PART NAME

Voltage source= VPULSE (V1=0,V2=10V,

TD=0,TR=0, TF=0,PW=7.5us, PER=10uF)

Inductor=L (L1=5uH)

Capacitor=C(C1=100uF)

Resistor=R (R1=0.5)

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12V

8V

4V

0V
0s 50us 100us 150us 200us 250us 300us 350us 400us 450us 500us
V(V1:+) V(L1:2)
Time

45. Fourier analysis of Pulse-Width-Modulation (PWM) and Filter

Characteristics

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8.0V

6.0V

4.0V

2.0V

0V
0Hz 0.5MHz 1.0MHz 1.5MHz 2.0MHz 2.5MHz 3.0MHz 3.5MHz 4.0MHz 4.5MHz 5.0MHz
V(V1:+) V(L1:2)
Frequency

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46. Buck Converter basic circuit diagram

8.0V

6.0V

4.0V

2.0V

0V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(L1:2)
Time

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47. Buck Converter

PART NAME

Voltage source= Vdc (V1=20)

PWM Source=VPULSE (V1=0,V2=5,TD=0,TR=0.01u,TF=0.01us,PW=0.00001s,

PER=0.0002)

Inductor=L (L1=0.00005H)

Capacitor=C(C1=0.00005F)

Resistor=R (R1=10)

Diode= D1N4002

Switch=IRF150

6.0V

4.0V

2.0V

0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms
V(V2:+)
Time

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300mV

200mV

100mV

0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms
V(L1:2)
Time

48. Boost Converter

PART NAME

Voltage source= Vdc (V1=10)

PWM Source=VPULSE (V1=0,V2=1,TD=0,TR=1ns,TF=1ns,PW=0.5ms, PER=1m)

Inductor=L (L1=10mH)

Capacitor=C(C1=100uF)

Resistor=R (R1=20)

Diode= D1N4002

Switch=S

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25V

20V

15V

10V

5V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(D1:2)
Time

24V

20V

16V

12V

8V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms 55ms 60ms 65ms 70ms 75ms 80ms
V(D1:2)
Time

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49. SIMPLIFIED MODEL OF DC-DC CUK CONVERTER

Part name

Voltage source=VDC (12Vdc)

Inductor=L (L1=10mH,L2=2mH)

Resistor=R (R1=50,R2=0.5, R3=0.5)

Capacitor=C (C1=100u, C2=1m)

Switch=Sbreak

Pulse=VSTIM(Implementation=pulse50k)

Diode=BAT68/SIE

Ground=Choose the 0 ground (GND)

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3.0V

2.0V

1.0V

0V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms 55ms 60ms
V(R3:1)
Time

This converter has the same relationship between input voltage and output voltage of buck-
boost converter, (Vi/Vu = D/(1-D) where D is duty cycle and ranges from 0 to 1 ideally) ,
with the difference that has two inductors and two capacitors.The advantage of this solution
is a ripple in voltage output considerably reduced compared to other types of
converters.When the switch is closed inductor L1 start charging itself, when switch is open
the voltage at the ends of inductor invert itself, because the current can't immediately drop to
zero, (remember costitutive equation of inductor V= L dI/dT, V would be infinite). Current
through inductor L1 decrease and load the capacitor C1.When the switch is closed again C1
discharges through L2 to the load.L2 and C2 act as a low pass filter.

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50. SIMPLIFIED MODEL CONVERTER DC-DC BOOST (FLYBACK)

• VDC (DC voltage source=10Vdc)

• R (Resistance, R1=0.5, R2=10)

• C (Capacitor, C1=500uF)

• BAT68/SIE (Diode)

• VSTIM (Pulse)

• Sbreak (Bias Value Power 92.54uW)

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20

10

-10
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
I(L1) I(C2) V(C2:+) V(R1:2,L1:2)
Time

51. SIMPLIFIED MODEL CONVERTER DC-DC BOOST (FLYBACK)

Capacitors and inductors components are able of storing the energy provided by external
sources. When the switch is closed, energy is stored in inductor, while the diode is reverse
biased and then is off, a growing current flows through inductor L1 from the source. When
switch is open the current in inductor, through diode now directly biased, begins to flow
through capacitor C2 with decreasing intensity to download all its energy in it. In this period,
inductor suddenly reverses its polarity so that the overall voltage at ends of capacitor will be
greater than Vi.

FOR THIS REASON THIS TYPE OF CONVERTER IS NAMED VOLTAGE ELEVATOR.

In the next cycle in which switch is closed again, inductor recharges itself and the capacitor
provides energy to load: CONSIDERING CONVENTION OF THE USER AND THE
GENERATOR, WITH THE MARKER SETS AS IN THE SCHEME, WE NOTE THAT
WHEN INDUCTOR ABSORBS ENERGY THE CAPACITOR PROVIDES ENERGY TO
LOAD, VICE VERSA WHEN L1 PROVIDES ENERGY THE CAPACITOR ABSORB IT.
The FLYBACK term refers to reversing voltage in inductor.

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SIMPLIFIED MODEL OF BUCK-BOOST CONVERTER (FLYBACK)

• VDC (DC voltage source=1Vdc)

• R (Resistance, R1=0.5, R2=100)

• C (Capacitor, C1=200uF)

• BAT68/SIE (Diode)

• VSTIM (Pulse)

• Sbreak (Bias Value Power 92.54uW)

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1.5V

1.0V

0.5V

0V
0s 0.1s 0.2s 0.3s 0.4s 0.5s 0.6s 0.7s 0.8s 0.9s 1.0s
V(R2:1,C1:-)
Time

SIMPLIFIED MODEL OF BUCK-BOOST CONVERTER (FLYBACK)

This type of converter can operate both as a DROP DOWN converter that as a STEP UP
converter respect to

input voltage Vi and output voltage Vu.The relationship between these two voltages is ruled
by the work cycle of switch according to the formula Vi / Vu = D / (1-D), where D is the
duty cycle (D = Ton/(Ton+Toff) = Ton/T). The behaviour of the circuit will be
ambivalent, boost converter (step up) when duty cycle is more than 50% and buck converter
(drop down) where duty cycle is below the 50% (try change pulse width in Edit Pspice
Stimulus to verify).Like boost regulator, when the switch is closed, inductor L1 accumulates
energy.When switch is open this energy through the diode is transferred to the capacitor C1.

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52. Frita’s and Gome’s Buck Converter-Soft switching

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200V

150V

100V

50V

0V
0s 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms
V(R1:2)
Time

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53. PWM Generation using IC555

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20V

10V

0V
V(CARRIER_SIGNAL) V(MODULATING_SIGNAL)
20V

0V

SEL>>
-20V
0s 2ms 4ms 6ms 8ms 10ms 12ms 14ms 16ms 18ms
V(OUTPUT)
Time

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54. Generation of an AM signal

Schematic for the generation of an AM signal

2.0V

1.0V

0V

-1.0V

-2.0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(AM)
Time

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1.0V

0.5V

0V
0Hz 2KHz 4KHz 6KHz 8KHz 10KHz 12KHz 14KHz 16KHz 18KHz 20KHz 22KHz 24KHz 26KHz
V(AM)
Frequency

55. Square wave generator using Op-Amp

Output of the square wave can be controlled by varying R2

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1.0V

0V

SEL>>
-1.0V
V(VIN)
2.0V

0V

-2.0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(VOUT)
Time

Fig.a at R2 = 1k
1.0V

0V

SEL>>
-1.0V
V(VIN)
20V

0V

-20V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(VOUT)
Time

Fig.a at R2 = 10k

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56. Sine wave generator

The value of R3,R4 & C3,C4 should be same respectively

8.0V

4.0V

0V

-4.0V

-8.0V
0s 5ms 10ms 15ms 20ms 25ms 30ms 35ms 40ms 45ms 50ms
V(VOUT)
Time

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57. Low power Electronics Application (VLSI)

57.1 PSPICE schematic of CMOS inverter

In this experiment a CMOS inverter is designed and built using a PMOS and a NMOS. Once
its operation and properties are clearly understood, a two-input NAND gate. NMOS and
PMOS properties and their operating regions are also discussed to better understand the
basic inverter topology.

CMOS inverters (Complementary NOSFET Inverters) are some of the most widely used and
adaptable MOSFET inverters used in chip design. They operate with very little power loss
and at relatively high speed. The CMOS inverter has good logic buffer characteristics, in
that, its noise margins in both low and high states are large. A CMOS inverter contains a
PMOS and a NMOS transistor connected at the drain and gate terminals, a supply voltage
VDD at the PMOS source terminal, and a ground connected at the NMOS source terminal,
were VIN is connected to the gate terminals and VOUT is connected to the drain
terminals.(See Figure 1.1). The CMOS does not contain any resistors, which makes it more
power efficient that a regular resistor-MOSFET inverter. As the voltage at the input of the
CMOS device varies between 0 and 5 volts, the state of the NMOS and PMOS varies
accordingly. If we model each transistor as a simple switch activated by VIN, the inverter’s
operations can be seen very easily:

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6.0V

4.0V

2.0V

0V
0s 0.5ms 1.0ms 1.5ms 2.0ms 2.5ms 3.0ms 3.5ms 4.0ms 4.5ms 5.0ms
V(OUT1) V(IN)
Time

DC Analysis of inverter

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8.0V

6.0V

4.0V

2.0V

0V
0V 0.5V 1.0V 1.5V 2.0V 2.5V 3.0V 3.5V 4.0V 4.5V 5.0V 5.5V 6.0V 6.5V 7.0V
V(OUT1) V(IN)
V_V3

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57.2 CMOS NAND GATE

The second step was the NAND gate is implemented based on the inverter terminology. The
pull-up network (PUN) of CMOS inverter is a single PMOS and the pull-down network
(PDN) consists of one NMOS. For a two-input NAND gate, the PUN consists of two PMOS
and the PDN is composed of two NMOS. The output of NAND gate is low only when both
inputs are high and is high for other input combinations. Thus, NMOS are connected in series
and the PMOS are connected in parallel. The PUN pulls the output high when either of the
PMOS is on and the output is pulled low only when both NMOS are on. This is consistent
with the truth Table 2 where the two-input NAND gate.

Truth Table

A B F

0 0 1

0 1 1

1 0 1

1 1 0

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6.0V

4.0V

2.0V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(IN1)
Time

6.0V

4.0V

2.0V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(IN2)
Time
800mV

600mV

400mV

200mV

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(OUT)
Time

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57.3 Current mirror

Design and build CMOS Transistor Level Current Sources

The purpose of this laboratory experiment is to understand the basic building blocks of an
integrated circuit. This is done constructing a current source which is a fundamental part in
many CMOS circuits.

Current mirrors are common circuits in analog and mixed signal integrated circuits. Many
fundamental current mirror configurations have been developed in bipolar, MOS, and
CMOS. A current mirror is a circuit designed to copy a current through one active device by
controlling the current in another active device of a circuit, keeping the output current
constant regardless of loading. The current that is being “copied” can be a varying signal
current. What an ideal current mirror can be thought of as is simply an ideal current
amplifier. The current mirror is used to provide bias currents and active loads to circuits. The
CMOS current source circuit capable of constantly generating a certain reference voltage
irrespective of an analog supplying voltage, a substrate temperature, and a temperature
variation, which includes a start unit for driving the CMOS current source circuit in
accordance with a start signal; a bias current generating unit driven by the start unit for
generating a bias current in accordance with an analog voltage, a substrate voltage, and a
temperature variation; a current input unit for inputting a bias current; and a current
compensation unit for receiving a bias current through the current input unit and for
compensating the bias current in accordance with an analog voltage, a substrate voltage, and
a temperature variation and for generating a reference current. The basic NMOS current
mirror using M1 and M2 is seen in figure 1.

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The first step was build The Current mirrors using the PSPICE schematic as shown in Figure
and that to understand the CMOS operation for will take places in the next procedure
5.0V

4.0V

3.0V

2.0V
0s 1ns 2ns 3ns 4ns 5ns 6ns 7ns 8ns 9ns 10ns
V(M1:d) V(M3:d)
Time

Fig. IO-IREF for current mirror

The PSPICE simulation displayed the input and output waveforms of the current mirror is shown in
Figure 5 where the red waveform shows the output current; the green waveform shows the reference
current through M1

Beta –multiplier reference

The second step to built two current mirrors one time with a resistance or Rref as shown in figure 3
where we can force the same current through M3 and M5:

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6.0V

4.0V

2.0V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(M3:b) V(M2:d)
Time

Beta –multiplier reference

The part two of the second step to built two current mirror using CMOS instead of Rref as shown in
figure 4 where we can force the same current through M3 and M5:

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3.6V

3.2V

2.8V

2.4V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(M5:s)
Time

Discussion and Conclusion:

The VSG of each MOSFET are equal to one another, the output current is at the drain of the MOSFET
which is not diode connected and be expressed by the expression ID=12μpCoxVSG2-VTP2W2L2 on
the current mirror. It should also be noted if both transistors are matched, meaning that W1L1=W2L2,
then the reference current will equal the output current, if the ratios are not the same then the current
at the output could be larger or smaller then the reference current. In the case of the CMOS current
mirror what is done is essentially connecting two current mirrors, an NMOS current mirror to the
drains of the PMOS current mirror, by doing so it effectively are eliminates the use of resistors in the
circuit. In the schematic (Figure 3) used for this experiment a Rref resistor is used to highlight the
reference current, this resistor could be replaced by a diode connected transistor or a biased transistor
in order to truly make a CMOS current mirror as shown in Figure 4. In this laboratory experiment we
learned many things concerning CMOS current sources as opposed to a simple MOSFET current
source. By building the CMOS version of a current source we can effectively create a true integrated
without the use of resistors. In learning how to construct a current source we are building the
foundation for future circuits by being able to apply a bias current, which is essential in so many
circuits.

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57.4 Design and build CMOS Transistor Level Utility Amplifiers

Introduction:

Single stage amplifiers are used in virtually every op-amp design. By replacing a passive load resister
with a MOSFET transistor (called an active load), therefore significant amount of chip area can be
saved. An active load can also produce higher values of resistance when compared with a passive
resistor, resulting in higher gains. A differential amplifier is a type of electronic amplifier that
multiplies the difference between two inputs by some constant factor. Given two inputs Vin+ and Vin- a
practical differential amplifier gives an output Vout. The differential amplifier is useful in situations
where we want to amplify a small difference between two signal levels and ignore any ‘common’
level both inputs may share. Figure 1 is a simple example of a CMOS differential amplifier. One of
them is where we have an input which has come from some distance and may have had some added
interference.

In this lab we built current differential amplifier. Since, a current mirror is designed to copy a current
through one active device by controlling the current in another active device of a circuit, keeping the
output current constant regardless of loading. The current being 'copied' can be, and sometimes is, a
varying signal current. Theoretically, an ideal current mirror is simply an ideal current amplifier. The
current mirror is used to provide bias currents and active loads to circuits. The use of current mirror is
more useful in a CMOS design since it will make our design more space efficient, and because it
naturally avoids supply and temperature dependence. However, Figure 1 show differential amplifier
also the size of the M1 and M2 can be ratioed to give a gain or to scale the input currents. The input
impedance of current differential amplifier is simply the small –signal resistance of a diode –
connected MOSFET, or

Rin = 1gm

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6.0V

4.0V

2.0V

0V

-2.0V
0s 0.1ms 0.2ms 0.3ms 0.4ms 0.5ms 0.6ms 0.7ms 0.8ms 0.9ms 1.0ms
V(M4:d) V(M4:g)
Time

In this experiment we learned the basic properties of a differential amplifier, in which the circuit
senses two inputs that vary by equal and opposite amounts and generate two outputs that behave in a
similar fashion. It can also be taking into account that one can tap the signal from one output only,
however taking the difference between both outputs delivers twice the gain, and improves Common-
Mode Rejection which is an essential function when the common-mode signal is a noise source or DC
bias. The results of the experiment also conclude that as the voltage input increases from -1V to 1V
the output 1 decreases in voltage while the 2nd output increases as does the current through the drains.
In the end building the circuit we didn’t get the exact gain as we found in PSPICE. However, the
result was close enough.

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57.5 Comparator
A comparator circuit compares two voltage signals and determines which one is greater. The
result of this comparison is indicated by the output voltage: if the op-amp's output is
saturated in the positive direction, the noninverting input (+) is a greater, or more positive,
voltage than the inverting input (-), all voltages measured with respect to ground. If the op-
amp's voltage is near the negative supply voltage (in this case, 0 volts, or ground potential), it
means the inverting input (-) has a greater voltage applied to it than the noninverting input
(+).

In the case of TTL/CMOS logic output comparators, negative inputs are not allowed

In general comparators are “fast”, their circuits are not immune to the classic speed-power
tradeoff. High speed comparators use transistors with larger aspect ratios and hence also
consume more power. Depending on the application, select either a comparator with high
speed or one that saves power.

A comparator normally changes its output state when the voltage between its inputs crosses
through approximately zero volts. Small voltage fluctuations due to noise, always present on
the inputs, can cause undesirable rapid changes between the two output states when the input
voltage difference is near zero volts. To prevent this output oscillation, a small hysteresis of a
few millivolts is integrated into many modern comparators. In place of one switching point,
hysteresis introduces two: one for rising voltages, and one for falling voltages. The difference
between the higher-level trip value (VTRIP+) and the lower-level trip value (VTRIP-) equals
the hysteresis voltage (VHYST).

If the comparator does not have internal hysteresis or if the input noise is greater than the
internal hysteresis then an external hysteresis network can be built using positive feedback
from the output to the non-inverting input of the comparator. The resulting Schmitt
trigger circuit gives additional noise immunity and a cleaner output signal. When hysteresis
is added then a comparator cannot resolve signals within the hysteresis band.

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1.0V

0.5V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(IN1)
Time

1.0V

0.5V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(V4:+)
Time

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1.0V

0.5V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(OUT)
Time

Discussion and Conclusion:

From the two outputs we can see how the comparator works by taking two analog voltages
and makes a decision whether the voltage at V+ is higher or lower than the voltage at V-. If
the voltage V+ is higher than V-, the comparator will output a high voltage, otherwise a low
voltage. The comparator can be built by cascading a high-gain differential amplifier with a
common drain amplifier. This amplifier serves as buffer which provides the required output
current and also as a converter that converts a differential output of the differential amplifier
to single-ended output. With this laboratory experiment we learned how we can put together
two inputs signals to create one larger and functional circuit. This experiment was also
essential in teaching trouble shooting skills and techniques because we had so many
challenges in getting the circuit to work properly even though everything was wired properly,
sometimes it may just be the equipment that is being used and a way around that problem
must be discovered.

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57.6 Design and build CMOS NOR Gate

1.0V

0.5V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(IN1)
Time

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1.0V

0.5V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(IN2)
Time
1.0V

0.5V

0V
0s 1ms 2ms 3ms 4ms 5ms 6ms 7ms 8ms 9ms 10ms
V(OUT)
Time

Friday, 06 February, 2015

Reference

1. “Circuit Design Layout and Simulation ”,R. Jacob Baker, second edition, Wiley & Sons, INC
(2005)

2. http://en.wikipedia.org/wiki/logice gates

3. Kuphaldt, Tony R. All About Circuits, http://www.allaboutcircuits.com

4. http://www.freepatentsonline.com/5744999.html

5. A. B. Grebene, Bipolar and MOS Analog Integrated Circuit Design. John Wiley & Sons, Inc.,
1984.

6. Wikipedia-The Free Encyclopedia, “Comparator” http://en.wikipedia.org/wiki/Comparator

7. http://dc308.4shared.com/doc/zA3bPdfY/preview.html

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