Fractional Order Memristor
Fractional Order Memristor
M. E. FOUDA, A. G. RADWAN
1. Introduction
Modelling using the concept of fractional calculus penetrates the basic funda-
mentals of many applications due to its advantages and also since the conventional
integer-order modelling is only a narrow subset of the fractional-calculus. From the
main advantages of fractional-order modelling is its long-memory dependency and
also the ability to increase the degree of freedom for the system through the added
fractional-order parameters. Many ground rules in many applications have been
generalized in the fractional-order sense such as in the control theory [1]-[3], circuit
theory [4]-[6] and in the fractional-order Smith chart [7]. In the circuit theory, the
fractional-order element (FOE) is considered as a generalized element that covers
the conventional three passive elements which are inductor, resistor and capacitor
when the fractional order parameter equals to −1, 0 and 1 respectively. One of
the realizations of the half order capacitor can be obtained by dipping a capacitive
type probe, coated with a porous film of polymer of particular thickness, into a
polarizable medium [8]. Recently, the memristor (short for memory resistor) was
postulated and theoretically proved by Leon Chua in a seminal paper in 1971[9].
Then he later generalized his theorem to all memristive systems in 1976 [10]. This
new element represents the missing relation between the charge and flux among
the conventional elements. Although the theoretical concepts related to this fourth
passive two-terminal element has been postulated more than 40 years ago, the first
passive realization in nanotechnology was introduced by HP-lab a few years ago
with its pinched i-v hysteresis [11]-[13]. Since the existence of the passive mem-
ristor device, huge research interests and projects have been directed towards the
new applications related to this element [11]. For example, the memristor can be
used as a non-volatile memory instead of the capacitor and transistor circuits be-
cause it can memorize its previous state. Moreover, the memristor resistance can
be changed between Rof f and Ron which can represent logic 1 and 0 in the digital
design circuits. Therefore building the memristor-based logic and digital circuits
instead of transistors draws great attention due to its nano dimension size[14]-[16].
In addition, the time-varying property of the memristor resistance introduces many
novel fundamentals in the analogy circuit design such as in the case of memristor-
based oscillators [17]-[19].
Since the memristor is a nonlinear element, the relationship between the voltagev
and the current of this element is proportional to the resistance which is a function
of the charge q. Generally, the ohmic relationship is given by:
dx
= ±ki(t)f (x) (3)
dt
where ± represents the polarity of the memristor, k = µv Ron /D2 is the mem-
ristor constant which depends on dopant mobility µv , and f (x) is the dopant drift
window function of the memristor which is given by:
dα x
= ±ki(t)f (x) (5)
dtα
By differentiating both sides of (2), then
dα Rm dα x
α
= −Rd α (6)
dt dt
Substituting by (6) into (5)
JFCA-2013/4 ON THE FRACTIONAL-ORDER MEMRISTOR MODEL 3
dα Rm
= ∓kRd i(t)f (x) (7)
dtα
where Rd is the difference between Rof f and Ron . For linear window function
f (x) = 1 and substituting in (1)
Rkα+1
Z Rm
1
L.H.S = J α Rm dα Rm = (Rk − R)α−1 RdR = (11)
Γ(α) 0 Γ(α + 2)
If the memristor’s resistance Rk changes from its initial value Rin to Rm then
α+1 α+1
− Rin ∓kRd t
Z
Rm
= (t − τ )α−1 v(τ )dτ (12)
Γ(α + 2) Γ(α) 0
Therefore, the memristor resistance as a function of the input voltage and the
time can be obtained by:
Z t
α+1
1
Rm = Rin ∓ α(α + 1)kRd (t − τ )α−1 v(τ )dτ α+1 (13)
0
When the fractional order memristor becomes a conventional memristor at α =
1,then
Z t
2 2 2
Rm = Rin ∓ 2kRd v(τ )dτ = Rin ∓ 2kRd φ(t) (14)
0
Where φ(t) represents the flux. It is clear that the above equation gives the same
results which are proposed in [21]-[22]. In the next section, the step response of the
memristor resistance will be discussed in two different cases as follows.
α+1
1
Rm = Rin ∓ (α + 1)kRd VDC tα α+1 (16)
The positive or negative sign in (16) discusses the polarity effect for both the
memristor and the applied voltage VDC , consequently two cases will be discussed
in the following subsections .
4 M. E. FOUDA, A. G. RADWAN JFCA-2013/4
1
α+1
+ (α + 1)kRd VDC tα
α+1
Rm = Rin (17)
It is clear from the previous equation that the resistance of the memristor in-
creases from the initial value until it reaches its maximum Rof f in a certain time
period which is called the saturation time tsat . Figure 2 shows the memristor be-
haviour when the applied step input voltage and the memristor parameters µv , D,
VDC , Rof f , Ron are equal to 10−10 cm2 s−1 V −1 , 10nm , 1V , 38kΩ, 100Ω respec-
tively for different values of α. From Fig. 2(b), the saturation time depends on the
value of the fractional-order α where the saturation time increases as α increases
for certain VDC .
The general formula of the saturation time tsat in the fractional-order case at
which the memristor resistance increases from its initial value Rin up to Rof f is
given by:
α+1 α+1
Rof f − Rin α1
tsat = (18)
(α + 1)kRd |VDC |
The maximum saturation time can be obtained when Rin = Ron as follows:
α+1 α+1
Rof f − Ron α1
tsat |max = (19)
(α + 1)kRd |VDC |
For the conventional model of the memristor α = 1 the saturation time will be
reduced to the formula given in [21]-[22].
The saturation time surface as a function of the α−VDC plane and three different
cases of α = 0.5, 1 and 1.5 are shown in Fig. 3(a) and Fig. 3(b) respectively. It is
clear from the above response that the saturation time can be controlled through
the fractional-order where it can be less than 1 Sec when α < 0.5 up to higher
values when α > 0.5. It is worthy to note that, the memristor will act as a linear
resistor as α tends to 0 with resistance Rin .
3.2. Same polarity configuration. This case discusses the memristor behaviour
when the positive of the supply voltage is connected to the positive of the memristor
as shown in Fig.1(b). Then the resistance of memristor is given by
α+1
1
Rm = Rin − (α + 1)kRd VDC tα α+1 (20)
The resistance of the memristor decreases from the initial value Rin until it
reaches its minimum Ron through the saturation time tsat which is given by:
α+1 α+1 1
Rin − Ron α
tsat = (21)
(α + 1)kRd |VDC |
The maximum saturation time when Rin = Rof f can be obtained by:
6 M. E. FOUDA, A. G. RADWAN JFCA-2013/4
α+1 α+1
Rof f − Ron α1
tsat |max = (22)
(α + 1)kRd |VDC |
This is similar to the previous case given by equation (19). Figure 4 shows the
saturation time surface and curves for three different cases. For the conventional
case α = 1, the saturation time is given by the same relation in [21] which also
matches the results in [12].
4. Conclusion
This paper introduces the analysis of the fractional order memristor state equa-
tion for step input voltage supply. The generalized formulas of the memristor’s
resistance and the saturation time for the two different cases of memristor polari-
ties are derived. The maximum saturation time which is needed for digital circuit
design is also introduced. Moreover, it is clear from the above discussion that the
fractional-order parameter can be used to control the saturation time from a part
of a second up to several minutes under the same input voltage.
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JFCA-2013/4 ON THE FRACTIONAL-ORDER MEMRISTOR MODEL 7
M. E. Fouda, A. G. Radwan
Engineering Mathematics Department, Faculty of Engineering, Cairo University, Giza,
12613, Egypt.
Nanoelectronics Integrated Systems Center (NISC), Nile University, Cairo, Egypt.
E-mail address: m− [email protected], [email protected]