0% found this document useful (0 votes)
31 views

Blueprint

The document describes a method for fabricating semiconductor structures using plasma etching. It involves performing multiple etch processes with intermediate photoresist removal steps. The method allows fabricating features such as vias and trenches that require etching different dielectric layers. It also describes a plasma processing chamber that includes a configurable plasma confinement assembly to transition between a closed orientation defining a small plasma volume and an open orientation defining a larger plasma volume.

Uploaded by

Irving
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
31 views

Blueprint

The document describes a method for fabricating semiconductor structures using plasma etching. It involves performing multiple etch processes with intermediate photoresist removal steps. The method allows fabricating features such as vias and trenches that require etching different dielectric layers. It also describes a plasma processing chamber that includes a configurable plasma confinement assembly to transition between a closed orientation defining a small plasma volume and an open orientation defining a larger plasma volume.

Uploaded by

Irving
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 15

US006527911B1

(12) United States Patent (10) Patent N0.: US 6,527,911 B1


Yen et al. (45) Date of Patent: Mar. 4, 2003

(54) CONFIGURABLE PLASMA VOLUME ETCH 5,534,751 A * 7/1996 LenZ et al. ........... .. 315/111.71
CHAMBER 6,008,130 A * 12/1999 Henderson et a1. ....... .. 438/710
6,143,125 A * 11/2000 Shoji ................... .. 156/34525
(75) Inventors: Bi-Ming Yen, Fremont, CA (US); 671787919 B1 1/2001 Li et al'
Tuqiang Ni, Fremont, CA (US); Lumin
Li, Santa Clara, CA (Us); David FOREIGN PATENT DOCUMENTS
Hemker, San 1056, CA (US) EP 0814495 12/1997
JP 58032417 2/1983
(73) Assignee: Lam Research Corporation, Fremont,
CA (Us) * cited by examiner

(*) Notice: Subject to any disclaimer, the term of this Primary Examiner—Thi Dang
patent is extended or adjusted under 35 (74) Attorney, Agent, or Firm—Martine & Penilla, LLP
U.S.C. 154(b) by 0 days.
(57) ABSTRACT
(21) Appl- NO-I 09/895,537 A plasma processing chamber is provided. The plasma
(22) Filed Jun 29 2001 processing chamber includes a bottom electrode con?gured
' ' ’ to support a substrate and a top electrode located over the
(51) Int. Cl.7 ......................... .. H05H 1/00; H01L 21/00 bottom electrode. The plasma processing chamber further
(52) US. Cl. .......................... .. 156/345.43; 156/345.47; includes a plasma Con?nement assembly designed to tran
118/723 E sition betWeen a closed orientation and an open orientation.
(58) Field of Search ..................... .. 156/34543, 345.47; In the Closed Orientation, the Plasma Con?nement assembly
118/723 E de?nes a ?rst volume for plasma during processing, and in
the open orientation, the plasma con?nement assembly
(56) References Cited de?nes a second volume for plasma during processing Which
is larger than the ?rst volume.
U.S. PATENT DOCUMENTS
4,838,978 A 6/1989 Sekine et al. 31 Claims, 7 Drawing Sheets

172 172

160 160

160 160

173 160 160 173

160 150

160 160

164 164
\
lllllllll lllllllll

200 162 l, 162


\g

166 166

202
U.S. Patent Mar. 4, 2003 Sheet 1 0f 7 US 6,527,911 B1

Start [100
V 102

Perform ?rst etch process


/

Remove photoresist

Pattern for next etch process

Perform second etch process )8


V 11

Remove photoresist

V 12

Etch SiN 11/


Done

FIG. 1A
U.S. Patent Mar. 4,2003 Sheet 2 of7 US 6,527,911 B1

[130 128a

m
m‘
m
m
FIG. 1B 686b
a.bb

126a

FIG. 1C
U.S. Patent Mar. 4, 2003 Sheet 3 0f 7 US 6,527,911 B1

132

1 4
l 12Gb
[ 130 ‘/
L22 126a

29
FIG. 1D
U.S. Patent Mar. 4, 2003 Sheet 4 0f 7 US 6,527,911 B1

145

142
/
1 40 NXXXXXXXXXXXXXXXXXXXXXXXXXXlm \
148 146 m >148

FIG. 2A

142
K/
140
A 145' V

150 146 / [J
144

FIG. 2B
U.S. Patent Mar. 4, 2003 Sheet 5 0f 7 US 6,527,911 B1

140

FIG. 3A

145‘
140

162 162

FIG. 3B
US 6,527,911 B1
1 2
CONFIGURABLE PLASMA VOLUME ETCH layer 122 and the second dielectric layer 124 are different
CHAMBER and require that tWo separate etching operations using tWo
distinct etch chemistries be performed to fabricate the via
130 structure. Returning to FIG. 1A, the ?rst etch process
BACKGROUND OF THE INVENTION 102 includes one or more etching operations required to
1. Field of the Invention completely de?ne the via structure 130.
The present invention relates generally to semiconductor The method continues With operation 104 in Which the
fabrication and, more particularly, to plasma etching cham remaining photoresist layer 128a (FIG. 1B) is removed. As
bers With controlled plasma volume using a plurality of is knoWn, photolithography is used to de?ne features in
con?nement structures. semiconductor manufacturing. In the instant example, the
2. Description of the Related Art locations of the vias Were ?rst de?ned and then the via
structures Were etched. The remaining photoresist is
In semiconductor fabrication, plasma etching is com removed in operation 104 so that the next feature can be
monly used to etch conductive and dielectric materials.
de?ned and etched.
Plasma etch chambers are typically used Which are capable 15
of etching selected layers deposited over a substrate as The method continues With operation 106 in Which the
de?ned by a photoresist mask. In general, the processing next feature in the fabrication operation is patterned. By Way
chambers are con?gured to receive processing gases, and of example, a next layer of photoresist is coated and then
radio frequency (RF) poWer is applied to one or more imaged to de?ne the next feature, the trench structures.
electrodes in the processing chamber. The pressure Within Using photolithography, the trenches are next de?ned in
the chamber is controlled in accordance With a particular accordance With knoWn feature fabrication processes.
desired process. Upon applying the desired RF poWer to the The method advances to operation 108 in Which the
electrode(s), the process gases in the chamber are activated second etch process is performed. The second etch process
such that a plasma is created. The plasma is con?gured to in the instant example is the etching of the trench structures.
perform the desired etching of the selected layers of a FIG. 1C shoWs the exemplary structure of FIG. 1B in Which
25
semiconductor Wafer. a via 130 Was etched as described in operation 102 above.
In order to perform the desired etching of the selected The photoresist 128b has been removed to de?ne the trench
layers of a semiconductor Wafer, the plasma is typically structure 132 Which is etched through the second dielectric
con?gured by manipulating variations in such parameters as layer 124 and to the etch stop layer 126b.
pressure, electron density, ?oW rate, and the like. In order to Returning once again to FIG. 1A, the method advances to
achieve the desired plasma parameter variations Within a operation 110 in Which the remaining photoresist 128b
single processing environment, examples of modi?able (Figure 1C) is removed. Once the second etch process is
parameters include the chemistry of the gases, the pressure completed and the trench structures are fabricated, the
Within the chamber, and the amount of RF poWer applied to remaining photoresist used to de?ne the trench structures is
the RF electrode(s) Within the chamber. The prior art, 35 removed.
hoWever, does not provide for the variation of the volume of The method continues With operation 112 in Which the
plasma Within a single chamber. Without the ability to vary silicon nitride (SiN) layers are etched, and the method is
the volume of plasma in a single processing chamber, it is done. FIG. 1D shoWs the completed features de?ned using
generally necessary to utiliZe a plurality of differently etching processes in the example fabrication of a dual
con?gured processing chambers in order to achieve opti damascene structure. The barrier layer 126a that Was Within
mum plasma characteristics for particular etching applica the via feature 130 is etched to expose the substrate 120. The
tions. The plurality of processing chambers need to be etch stop 126b that Was in the trench feature 132 betWeen the
compatible Within a processing system of etch chambers, or ?rst dielectric layer 122 and the second dielectric layer 124
capable of being positioned and operated in close proximity is likeWise etched. Both the etch stop 126b, an optional layer
to other processing chambers to ensure economical and 45 depending on the particular structure and process, and the
ef?cient Wafer transfer betWeen process chambers for the barrier 126a are typically layers of SiN, the removal of
various stages of etch processing. Which are the ?nal etching steps in the instant dual dama
Dual damascene fabrication includes a common multi scene fabrication example. As is knoWn, the etching pro
step etching process Which illustrates a range of processing cesses are typically folloWed by deposition of barriers and/or
environments required for optimum feature fabrication. FIG. metalliZation to fabricate the trenches and vias of the dual
1A is a How chart diagram 100 illustrating the method damascene structure.
operations for the etching processes of a typical via-?rst dual As illustrated in the How chart diagram 100 of FIG. 1A,
damascene fabrication process. The How chart diagram 100 at least three separate etching, and tWo photoresist removal,
begins after the substrate has been deposited With the operations are performed in the etching processes of a
various layers that Will de?ne fabricated features, and the 55 typical dual damascene fabrication operation. As Will be
?rst photolithography process has been performed to de?ne described in greater detail beloW, the ?rst etch process is best
the ?rst etching operation. The ?rst etch process is per suited for a large volume plasma etch environment.
formed in operation 102 in Which a via structure is etched. Typically, in a large volume environment, high ion energy,
In a typical via etching operation, at least tWo dielectric also knoWn as high bias voltage, is achieved at the surface
layers are etched to form the via structure. FIG. 1B shoWs an of the substrate. In a large volume environment, high plasma
exemplary substrate 120, over Which has been deposited a ?oW rate is achieved at a loW pressure. Because the ?rst etch
barrier layer 126a, ?rst dielectric layer 122, an optional etch process includes etching through tWo dielectric layers in
stop layer 126b, and a second dielectric layer 124. A addition to an optional SiN etch stop layer, the higher bias
photoresist layer 128a has been patterned to enable the at a higher ?oW rate are the desired plasma characteristics.
etching of a via 130 through the second dielectric layer 124, 65 A high plasma volume containment environment provides
the etch stop layer 126b, and the ?rst dielectric layer 122. In the optimal conditions for the most effective and ef?cient
one example, the material properties of the ?rst dielectric plasma.
US 6,527,911 B1
3 4
The removal of photoresist is most optimally performed ensuring the dissipation of ion energy prior to exhaust. The
in a small volume oxygen plasma environment. In a small plasma con?nement structure 150 can also be magnetic With
volume environment, the plasma is maintained very close to the magnetic energy expelling the ions and the electrons, or
the surface of the Wafer. The plasma achieved is generally charged species, from passing through the con?nement
very high density, and yields a very high photoresist removal structure of the etch chamber 140. For a detailed description
rate. Additionally, in a small volume environment, ion of an etch chamber con?gured for large plasma volume
energy to the Wafer is loW so that sputtering of the dielectric con?nement, reference is made to US. Pat. No. 6,170,429,
material can be minimiZed. A small plasma volume contain issued on Jan. 9, 2001 to the same assignee as the present
ment environment is generally desired for photoresist application, and Which is herein incorporated by reference.
removal. 10 As described above, the plasma etching operations of an
The second etch process can be either a large plasma
exemplary multi-step semiconductor fabrication process can
volume environment or a small plasma volume
require a plurality of plasma volume environments to opti
environment, and needs to be optimiZed in accordance With
miZe the required etching process. What is needed is a single
the materials utiliZed. By Way of example, the etch stop layer
plasma etch chamber that can be con?gured for either small
126b (FIGS. 1B, 1C, and 1D) is an optional layer. Further, 15 plasma volume containment or large plasma volume con
the ?rst dielectric layer 122 and the second dielectric layer
tainment. The single chamber should be capable of being
124 can be of various similar or disparate dielectric
con?gured to a plasma etch system incorporating a plurality
materials, and their particular material properties dictate the of such con?gurable chambers to increase ef?ciency and
etch chemistries needed to etch the second dielectric layer
throughput While decreasing doWntime and cost of opera
124 doWn to the optional etch stop layer 126b or the ?rst 20 tion.
dielectric layer 122. If an etch stop layer 126b is used, a
small plasma volume containment environment is com SUMMARY OF THE INVENTION
monly used to achieve a high etch rate. Generally, either a
large volume or a small volume containment is selected Broadly speaking, the present invention ?lls these needs
depending on materials and con?guration Which Will pro 25
by providing a plasma processing chamber that is con?g
vide the best etching uniformity across the Wafer. urable for a plurality of plasma volume applications.
Finally, the SiN etch is typically optimal in a small plasma In accordance With one aspect of the invention, a plasma
volume containment environment to achieve high plasma processing chamber is provided. The plasma processing
density Which yields high etch rate and loW ion energy chamber includes a bottom electrode con?gured to support
toWard the Wafer. LoW ion energy toWard the Wafer Will 30 a substrate for processing, and a top electrode located over
minimiZe the sputtering of dielectric material Which is the bottom electrode. The plasma processing chamber also
underneath the SiN layer. includes a plasma con?nement assembly Which is designed
FIG. 2A is a block diagram of a typical small plasma to transition betWeen a closed orientation and an open
volume containment environment in an etch chamber 140. A orientation. In the closed orientation, the plasma con?ne
Wafer 146 is positioned on a loWer electrode 144, and an 35 ment assembly de?nes a ?rst volume for plasma during
upper electrode is located over the Wafer 146 and de?ning a processing, and in the open orientation, the plasma con?ne
region of plasma containment 145 betWeen the upper elec ment assembly de?nes a second volume for plasma during
trode 142 and the Wafer 146. In one embodiment of a small processing Which is larger than the ?rst volume.
plasma volume containment in an etch chamber 140, a In accordance With another aspect of the invention, a
plurality of containment rings 148 are disposed betWeen an 40 plasma etch process chamber having con?gurable plasma
outer edge of the Wafer 146 and an inner Wall of the chamber volume is provided. The plasma etch process chamber
140, and de?ning a lateral boundary of the plasma contain includes con?gurable plasma con?nement rings that de?ned
ment region 145. The containment rings 148 are rings Within a plurality of separate parallel passages that alloW gas ?oW
the cylindrical structure of the etch chamber 140 of a desired through the rings. The con?gurable plasma con?nement
Width and spacing to de?ne a plasma containment area 145 45 rings are disposed around a pair of parallel electrodes Which
Within, and to alloW for the spent gasses of the plasma to de?nes a ?rst plasma con?nement region Where a plasma is
How outWard and exhaust from the etch chamber 140. The generated and con?ned by the parallel passages Which
containment rings 148 serve as a slotted con?nement shield neutraliZe ion particles in the plasma When they pass through
With each ring comprised of a dielectric such a silica or the parallel passages. The con?gurable plasma con?nement
quartZ. For a detailed description of a small plasma volume 50 rings are con?gurable to be positioned in an extended
con?nement chamber, reference is made to US. Pat. No. position de?ning the ?rst plasma con?nement region, and in
5,534,751, issued on Jul. 9, 1996 to the same assignee as the a retracted position Which de?nes a second plasma con?ne
present application, and Which is herein incorporated by ment region. The plasma etch process chamber further
reference. includes an upper chamber liner con?gured to line an upper
FIG. 2B is a block diagram of a typical large plasma 55 region of the plasma etch process chamber and having an
volume containment environment in an etch chamber 140. A outer plasma con?nement structure With a plurality of aper
Wafer 146 is positioned on a loWer electrode 144, and an tures.
upper electrode is positioned over the Wafer 146 and de?n In accordance With yet another aspect, a semiconductor
ing a region of plasma containment 145 betWeen the upper Wafer processing chamber having a con?gurable plasma
electrode 142 and the Wafer 146. In the large plasma volume 60 volume is provided. The chamber includes an upper elec
containment environment, a plasma con?nement structure trode and a loWer electrode Which is parallel to the upper
150 is positioned at a distance far enough aWay from the electrode and is con?gured to receive a semiconductor Wafer
Wafer 146 to provide for a large volume for plasma ?oW. The for processing. The chamber further includes a ?rst plasma
plasma con?nement structure 150 can be physical With con?nement region. The ?rst plasma con?nement region has
apertures in structures constructed of materials such as 65 the upper electrode as an upper boundary and the loWer
quartZ or silica to alloW for the neutral species of the plasma electrode as a loWer boundary. Asecond plasma con?nement
to How outWard and exhaust from the etch chamber 140 region is de?ned Which has the upper electrode as an upper
US 6,527,911 B1
5 6
boundary, the lower electrode as a loWer boundary, and an FIG. 1A is a How chart diagram illustrating the method
upper chamber liner as a lateral boundary The upper cham operations for the etching processes of a typical via-?rst dual
ber liner lines an upper region of the semiconductor Wafer damascene fabrication process.
processing chamber and is con?gured With an outer plasma FIG. 1B shoWs an exemplary substrate, over Which has
con?nement structure. The chamber further includes a been deposited a barrier layer, ?rst dielectric layer, an etch
plasma con?nement assembly Which has at least one plasma stop layer, and a second dielectric layer.
con?nement ring, a plurality of spacers, and a plurality of
FIG. 1C shoWs the exemplary structure of FIG. 1B in
shafts. The plasma con?nement assembly is positioned
Which a via 130 has been etched.
Within the semiconductor Wafer process chamber, is dis
posed around the ?rst plasma con?nement region, and 10
FIG. 1D shoWs the completed features de?ned using
de?nes a plurality of parallel circumferential passages. The etching processes in the fabrication of dual damascene
plasma con?nement assembly is con?gured to be positioned structures.
in an extended position to de?ned the ?rst plasma con?ne FIG. 2A is a block diagram of a typical small plasma
ment region, and in a retracted position to de?ne the second volume containment environment in an etch chamber.
plasma con?nement region. 15 FIG. 2B is a block diagram of a typical large plasma
The advantages of the present invention are numerous. volume containment environment in an etch chamber.
One notable bene?t and advantage of the invention is that a FIG. 3A shoWs a block diagram of an etch chamber With
single chamber can be con?gured for a plurality of plasma a con?gurable plasma volume con?nement region in accor
etch processes. Typically, in order to achieve the bene?ts dance With one embodiment of the present invention.
offered in the single chamber of the present invention, it has FIG. 3B shoWs a block diagram of an etch chamber With
been necessary to either combine a plurality of chambers a con?gurable plasma volume con?nement region in accor
often from different manufactures. With the siZe and expense dance With another embodiment of the present invention.
of system tools and the cost of obtaining and operating fab
FIG. 4 illustrates a con?gurable plasma volume con?ne
space, duplication of tools is not an economical or ef?cient
ment etch chamber in accordance With one embodiment of
option. The present invention provides for maximiZing ef? 25
the present invention.
ciency and economy by providing a single chamber that can
be con?gured for a plurality of precision plasma etch FIG. 5 shoWs a con?gurable plasma volume con?nement
processes. etch chamber in accordance With another embodiment of the
Another signi?cant advantage is the ability to optimiZe present invention.
the plasma etch processes in a single system or chamber. In DETAILED DESCRIPTION OF THE
multi-step plasma etch processes, intermediate etching PREFERRED EMBODIMENTS
operations often require speci?c con?guration to achieve
optimum etch for a particular process. Typically, in the prior An invention for an etch chamber With controlled plasma
art, a choice is elected to either achieve the best possible etch volume using a plurality of con?nement structures is dis
result for the plurality of etch processes With a single tool in 35 closed. In the folloWing description, numerous speci?c
a set con?guration, or to combine separate machines and details are set forth in order to provide a thorough under
systems to achieve the desired con?gurations for speci?c standing of the present invention. It Will be understood,
processes from different chambers. Single tool con?gura hoWever, to one skilled in the art, that the present invention
tions typically result in less than optimal processing, and the may be practiced Without some or all of these speci?c
combination of separate machines and systems typically details. In other instances, Well knoWn process operations
results in increased expense, increased transfer and handling have not been described in detail in order not to unneces
time, and increased potential for contamination. Operating sarily obscure the present invention.
and maintaining entire systems, often from different FIG. 3A shoWs a block diagram of an etch chamber 140
manufacturers, for individual process steps signi?cantly With a con?gurable plasma volume con?nement region 145
increases the cost of operation in such areas as maintenance, 45 in accordance With one embodiment of the present inven
training, and fab ?oor space and con?guration, in addition to tion. The etch chamber 140 includes an upper electrode 142,
the individual equipment costs. a loWer electrode 144, and a small plasma volume con?ne
Another advantage of the present invention is the ment region 145 de?ned betWeen the upper electrode 142
increased throughput With decreased cost of operation. The and the loWer electrode 144. A Wafer 146 to be etched is
present invention provides for both clean operation and for positioned on the loWer electrode 144.
deposition operation. By performing both operations in a The etch chamber 140 depicted in FIG. 3A is shoWn
single chamber, the useful life of consumables such as con?gured to a small plasma volume con?nement. Plasma
chamber liners is increased, doWn time for Wet cleans and con?nement rings 160 are shoWn de?ning a small plasma
other clean and/or maintenance operations is reduced When volume con?nement region 145 With a lateral boundary near
spread across a range of etch processes, and throughput is 55 the perimeter of the Wafer 146. The plasma con?nement
therefore increased With a more ef?cient utiliZation of pro rings 160 of the present invention de?ne a con?nement
duction equipment. assembly and are con?gured to be positioned as shoWn in
Other advantages of the invention Will become apparent FIG. 3A de?ning a small plasma volume con?nement region
from the folloWing detailed description, taken in conjunction 145, as Well as retracting to open the small plasma volume
With the accompanying draWings, illustrating by Way of con?nement region 145 into a larger volume Within the
example the principles of the invention. plasma etch chamber 140. In the small plasma volume
con?nement region 145 con?guration as shoWn in FIG. 3A,
BRIEF DESCRIPTION OF THE DRAWINGS the plasma con?nement rings 160 are disposed around the
The present invention Will be readily understood by the upper 142 and loWer 144 parallel electrodes, thereby de?n
folloWing detailed description in conjunction With the 65 ing the small plasma volume con?nement region 145 as
accompanying draWings, Wherein like reference numerals bounded by the plasma con?nement rings 160 and the upper
designate like structural elements. electrode 142 and the loWer electrode 144.
US 6,527,911 B1
7 8
The plasma con?nement rings 160, in one embodiment, electrode 142 and a peripheral edge of the loWer electrode
are constructed of materials such as quartz or silica With a 146 so that the plasma created by the ioniZation of the
plurality of stacked plasma con?nement rings 160 having reactive gases With applied RF energy is con?ned Within the
spaces therebetWeen. The spaces create distinct parallel small plasma volume con?nement region 145 de?ned
circumferential slots or passages through Which spent gases betWeen the con?nement rings 160 and the electrodes 142,
from the small volume of plasma 147 exit the small plasma 144 just over the surface of the Wafer 146. The plasma
volume con?nement region 145 to be exhausted from the con?nement rings 160 de?ne a slotted con?nement shield
etch chamber 140. The slots or passages are spaced apart in constructed of a plurality of circular rings 160. The circular
a direction normal to that of the How of the exhausting rings 160 are constructed of a dielectric such as silica or
gasses through the plasma con?nement rings 160 and further 10 quartZ, and adjacent rings are separated by spacers 170
con?gured to neutraliZe any remaining ion particles so that creating circumferential slots or passages betWeen the cir
substantially only neutral species of the plasma is exhausted cular rings 160 through Which neutral species of the plasma
from the etch chamber 140. are exhausted. The circumferential slots thereby form par
FIG. 3B shoWs a block diagram of an etch chamber 140 allel passages that are spaced apart in a direction normal to
With a large plasma volume con?nement region 145‘, Which the How of plasma or gasses through the parallel passages.
is con?gurable, in accordance With another embodiment of 15
The spacers 170 are similarly constructed of a dielectric
the present invention. The etch chamber 140 includes an
such a silica or quartZ, or conducting materials such as
upper electrode 142, a loWer electrode 144, and a large
plasma volume con?nement region 145‘ de?ned betWeen the silicon carbide or doped silicon, and the slots or passages are
upper electrode 142 and the loWer electrode 144. A Wafer con?gured to extinguish any ion particles remaining in the
146 to be etched is positioned on the loWer electrode 144. exhausting gases Which ?oW through the con?nement rings
The etch chamber 140 shoWn in FIG. 3B is generally 160, and through the etch chamber 200 to exhaust through
structurally identical to the etch chamber 140 shoWn in FIG. turbopump 202. In one embodiment, the outer plasma con
3A. ?nement structure 162 provides a redundant baffle through
The etch chamber 140 depicted in FIG. 3B is shoWn Which the exhausting gases from the plasma pass While
con?gured to a large plasma volume con?nement. Plasma 25 ?oWing to the turbopump 202. Additionally, the exhaust
con?nement rings 160a are shoWn WithdraWn or retracted from the etch chamber 200 to the turbopump 202 is con
opening the plasma volume con?nement region to de?ne the structed With a plurality of baf?es (not shoWn) to prevent any
large plasma volume con?nement region 145‘. The lateral residual ions in the exhausting gases, or any polymer
boundary of the large plasma volume con?nement region residue, from ?oWing into the turbopump 202.
145‘ is the etch chamber 140 interior Wall With an outer In one embodiment, the plasma con?nement rings 160 are
plasma con?nement structure 162 de?ning an outer bound connected by shafts 172. The shafts 172 can be constructed
ary of the large plasma volume con?nement region 145‘ and of a lightWeight, loW particulate-generating substance such
alloWing for neutral species of the plasma to How to exhaust. as nylon, and are con?gured to support the con?nement
The outer plasma con?nement structure 162, in one embodi rings 160 and spacers 170. The spacers are con?gured to
ment of the invention is a physical structure constructed of 35 telescope around the shafts 172 and betWeen the con?ne
materials such as quartZ or silica With apertures de?ned ment rings 160 to create the desired space betWeen rings to
therein to alloW the neutral species of the plasma from the neutraliZe any ion particles or electrons from the plasma that
large volume of plasma 147 to How through to an exhaust may traverse the slots or passages When the plasma con
and turbopump (not shoWn) While extinguishing any ion ?nement rings 160 are extended to de?ne a small plasma
particles that may remain. In another embodiment, the outer volume con?nement region 145. The plasma con?nement
plasma con?nement structure 162 is magnetic and con?g rings 160, spacers 170, and shafts 172 together form a
ured such that magnetic energy expels any remaining ion con?nement assembly 173. In one embodiment, the con
particles before exhausting the spent gases from the etch ?nement assembly 173 includes at least one plasma con
chamber 140. ?nement ring 160. In another embodiment, the con?nement
FIG. 4 illustrates a con?gurable plasma volume con?ne 45 assembly 173 includes a stack of six plasma con?nement
ment etch chamber 200 in accordance With one embodiment rings 160. When the con?nement assembly 173 is retracted
of the present invention. The etch chamber 200 includes a to con?gure a large plasma volume con?nement region 145
top electrode 142 and a bottom electrode 144 With a semi (See FIG. 5), the shafts 172 WithdraW from the con?nement
conductor Wafer 146 disposed thereon. The etch chamber region 145, collapsing the spacers 170 Within adjacent rings
200 is shoWn con?gured for a small plasma volume con 160 and thereby collapsing the stack of plasma con?nement
?nement With plasma con?nement rings 160 positioned to rings 160.
de?ne the lateral boundaries of the small plasma volume When the plasma con?nement rings 160 are retracted, the
con?nement region 145. The top electrode 142 and the large plasma volume is created With boundaries extending to
bottom electrode 144 With the semiconductor Wafer 146 a chamber liner 164 con?gured in the etch chamber 200, and
disposed thereon de?ne the top and bottom boundaries of the 55 the outer plasma con?nement structure 162. As is knoWn,
small volume plasma con?nement region 145, respectively. plasma etching operations generate polymer deposits and
The con?gurable plasma volume con?nement etch cham resulting particulate contamination as Well as RF signal
ber 200 includes an outer plasma con?nement structure 162 interference and temperature ?uctuations. The polymer
Which is functional as a plasma con?nement structure 162 deposit problems are generally not an issue in small plasma
When the etch chamber 200 is con?gured for large plasma volume con?nement con?gurations. The polymer deposit in
volume. When the etch chamber 200 is con?gured for a small volume con?nement con?gurations is generally
small volume, the outer plasma con?nement structure 162 quickly cleaned using oxygen plasma. Large plasma con
remains in place providing a redundant baffle through Which ?nement con?gurations, hoWever, remain subject to poly
neutral species of the plasma must pass When exhausting mer deposit issues, and, in one embodiment of the present
from the etch chamber 140 through turbopump 202. 65 invention, chamber liners 164, 166 are incorporated to
In one embodiment, plasma con?nement rings 160 are provide thermal stability, an adequate RF ground return
con?gured to extend betWeen a peripheral edge of the upper path, and serviceability With minimal doWntime. Upper
US 6,527,911 B1
9 10
chamber liner 164 is con?gured to the outer plasma con Thus con?gured, the con?gurable plasma volume con
?nement structure 162, and loWer chamber liner 166 is ?nement etch chamber 200 can achieve optimum plasma
con?gured to line the loWer region of the etch chamber 200 volume in accordance With the desired etch process. The
Wall from the outer plasma con?nement structure 162 to the same embodiment of the present invention can be con?gured
base of the etch chamber 200 and turbopump 202 exhaust. for small plasma volume With the plasma volume con?ne
FIG. 5 shoWs a con?gurable plasma volume con?nement ment assembly extended and plasma volume con?nement
etch chamber 200 in accordance With another embodiment rings de?ning a small plasma volume con?nement region,
of the present invention. The etch chamber 200 in FIG. 5 is and then the plasma con?nement rings can transition from
shoWn con?gured for large plasma volume con?nement. an extended position to a retracted position to de?ne a large
Plasma con?nement rings 160a have been WithdraWn or 10 plasma con?nement region. The transitioning of the plasma
retracted from the etch chamber 200, creating the large con?nement assembly from an extended or closed position
plasma con?nement region 145‘ to the large volume de?ned to a retracted or open position, or from a retracted position
by the upper chamber liner 164, the outer plasma con?ne to an extended position, con?gures the same processing
ment structure 162, the upper electrode 142, and the loWer chamber to either a large plasma volume con?nement pro
electrode 144. In the embodiment illustrated, the plasma 15 cessing chamber or a small plasma volume con?nement
con?nement rings 160a have been WithdraWn or retracted processing chamber. Additionally, When the chamber is
through an overhead or chamber lid structure. In an alter con?gured for large plasma volume con?nement, the outer
native embodiment, the plasma con?nement rings 160a plasma containment structure is con?gurable to vary the siZe
WithdraW or retract into the chuck and/or electrode 144 of the large plasma volume con?nement.
structure.
Returning to the dual damascene example illustrated in
In the large plasma volume con?nement con?guration as FIG. 1, the ?rst etch process of operation 102 is optimally
shoWn in FIG. 5, plasma ?lls the larger volume of the performed With a large plasma volume con?nement con
volume con?nement region 145 resulting in a high bias ?guration as illustrated in FIG. 5. The large volume plasma
voltage and high plasma ?oW at loW pressure. Such plasma con?nement yields a high bias, high ?oW plasma at loW
generally results in higher polymer deposition on chamber 25 pressure and a resulting uniform, controlled etch.
surfaces Within the large plasma volume con?nement region
Next, the ?rst photoresist removal 104 is optimally per
145‘, and therefore the upper chamber liner 164 is desired.
formed With a small volume oxygen plasma con?nement
Additionally, loWer chamber liner 166 is desirable due to
con?guration as illustrated in FIG. 4. The small plasma
accumulating build-up of polymer residue that ?oWs through volume con?nement is optimal for oxygen plasma etching
the outer plasma con?nement structure 162 With the neutral
and yields high density plasma With loW ion energy to the
species of the plasma ?oW exhausting from the etch chamber
Wafer and high etch rate Which is most desirable for a
200 to the turbopump 202.
photoresist removal operation.
Outer plasma con?nement structure 162 is con?gured to
de?ne a boundary of the large plasma volume con?nement After the patterning of the next features, the second etch
region 145‘, and to facilitate neutraliZation of any remaining 35
process 108 is performed. As described above in reference
to FIG. 1, the second etch process 108 can be optimiZed With
ions and electrons, or charged species, from the substantially
either a small plasma volume or a large plasma volume
neutral species of plasma. Spent plasma gases therefore ?oW
through the outer plasma con?nement structure While the con?nement, depending on the particular structure, and
degree of etch desired. Generally, if the structure includes an
plasma sheath is con?ned to the large plasma volume
con?nement region 145‘. In one embodiment of the optional etch stop layer, the optimal con?guration Would be
a large plasma volume con?guration as shoWn in FIG. 5. The
invention, the outer plasma con?nement structure 162 is
etch stop typically serves as a barrier through Which a
con?gurable to be positioned along vertical axis 180 in order
speci?c etch chemistry that is most effective for a dielectric
to achieve a desired range of density and How of the plasma
sheath. Such positioning of the outer plasma con?nement layer Will not rapidly proceed. The high ?oW, high bias of the
structure 162 enables some variation betWeen the small 45
large plasma volume con?guration is typically desired for
plasma volume con?nement region 145 With the plasma this particular etching process. Additionally, the variable
positioning of the outer plasma con?nement structure 162
con?nement rings 160 extended (FIG. 4), and the large
plasma volume con?nement region 145‘ as shoWn in FIG. 5.
described in reference to FIG. 5 might provide the most
It should be recogniZed that variable positioning of the outer optimum etching plasma volume by reducing the plasma
plasma con?nement structure 162 requires the loWer cham volume region 145 With a higher position Within the etch
chamber 200.
ber liner 162 to be con?gured to ensure adequate and
continuous inner chamber Wall coverage. The variable posi If no optional etch stop is utiliZed, the optimal con?gu
tioning of the outer plasma con?nement structure 162 Would ration is most likely a small plasma volume con?nement
typically range from a large plasma volume 162a With the con?guration. The high density, high etch rate achieved in
outer plasma con?nement structure 162 positioned near a 55 small plasma volume con?nement is desirable to precisely
mid-region of the interior of the etch chamber 200 near a etch through an upper dielectric layer, stopping at the second
position even With a top surface of the loWer electrode 144, dielectric layer.
to a largest plasma volume 162b With the outer plasma The second photoresist removal 110 and the SiN etch 112
con?nement structure 162 positioned near a loWer region of are both operations that are generally optimiZed With a small
the interior of the etch chamber 200. In one embodiment, plasma volume con?nement con?guration. High density
variable con?nement is con?gured through a plurality of etch is generally preferred for such processes. LoW bias, or
chamber liner 164, 166 structures. Achamber liner 164, 166 loW ion energy to the Wafer, is preferred as described above,
having an outer plasma con?nement structure 162 integral to and also preferred for the speci?c application of SiN etching
the upper chamber liner 164 is selected according to the When minimiZing the sputtering of the underlying dielectric
desired plasma volume. In this manner, any one of a 65 material is a consideration.
plurality of chamber liner 164, 166 structures is utiliZed to In one embodiment, the con?gurable plasma volume
con?gure the etch chamber 200 for a desired plasma volume. con?nement etch chamber is suitable for all etch operations.
US 6,527,911 B1
11 12
In one con?guration, the chamber is optimized for clean 12. A plasma etch process chamber having con?gurable
mode operations, and in another con?guration, the chamber plasma volume, comprising:
is optimized for deposition mode operations. Therefore, a con?gurable plasma con?nement rings de?ning a plural
single con?gurable plasma volume con?nement etch cham ity of separate parallel passages that alloW gas ?oW
ber is suitable for stripping, nitride, and oXide etch pro through the con?gurable plasma con?nement rings
cesses. Compatible chambers, therefore, can be combined in from an inner surface to an outer surface, the parallel
a single system to achieve optimal semiconductor Wafer passages being spaced apart in a direction normal to
fabrication achieving a high through put With minimal that of the How of gases through the parallel passages,
transfer time or doWn time, and While minimiZing cost by the con?gurable plasma con?nement rings being dis
utiliZing multiple function, single system tools. 10 posed around a pair of parallel electrodes de?ning
Although the foregoing invention has been described in therebetWeen a ?rst plasma con?nement region Where
some detail for purposes of clarity of understanding, it Will a plasma is generated, and the parallel passages being
be apparent that certain changes and modi?cations may be proportioned for essentially con?ning the plasma
practiced Within the scope of the appended claims. Within the ?rst plasma con?nement region by neutral
Accordingly, the present embodiments are to be considered 15 iZing ion particles created in the plasma When the ion
as illustrative and not restrictive, and the invention is not to particles pass through the parallel passages; and
be limited to the details given herein, but may be modi?ed an upper chamber liner con?gured to line an upper region
Within the scope and equivalents of the appended claims. of the plasma etch process chamber and having an outer
What is claimed is: plasma con?nement structure With a plurality of aper
1. A plasma processing chamber, comprising; tures;
a bottom electrode con?gured to support a substrate for Wherein the con?gurable plasma con?nement rings are
processing; con?gurable to be positioned in one of an eXtended
a top electrode located over the bottom electrode; and position de?ning the ?rst plasma con?nement region
a plasma con?nement assembly designed to transition and a retracted position de?ning a second plasma
betWeen a closed orientation and an open orientation, 25 con?nement region.
the closed orientation de?ning a ?rst volume for plasma 13. A plasma etch process chamber having con?gurable
during processing and the open orientation de?ning a plasma volume as recited in claim 12, Wherein the second
second volume for plasma during processing, Wherein plasma con?nement region is bounded by the pair of parallel
the ?rst volume is smaller than the second volume. electrodes, the upper chamber liner, and the outer plasma
2. A plasma processing chamber as recited in claim 1, con?nement structure.
Wherein the con?nement assembly includes a plurality of 14. A plasma etch process chamber having con?gurable
plasma con?nement rings. plasma volume as recited in claim 13, Wherein the plurality
3. A plasma processing chamber as recited in claim 2, of apertures of the outer plasma con?nement structure are
Wherein the plurality of plasma con?nement rings transition proportioned for essentially con?ning the plasma Within the
together. 35 second plasma con?nement region.
4. A plasma processing chamber as recited in claim 2, 15. A plasma etch process chamber having con?gurable
Wherein the plurality of plasma con?nement rings are spaced plasma volume as recited in claim 12, Wherein the upper
apart by spacers, and the plasma con?nement rings and chamber liner is con?gured to position the outer plasma
spacers are attached to shafts. con?nement structure in one of a plurality of positions.
5. A plasma processing chamber as recited in claim 1, 16. A plasma etch process chamber having con?gurable
Wherein shafts are designed to move so as to transition the plasma volume as recited in claim 12, Wherein the con?g
plasma con?nement assembly betWeen the closed and open urable plasma con?nement rings are constructed of a dielec
orientation. tric.
6. A plasma processing chamber as recited in claim 1, 17. A plasma etch process chamber having con?gurable
Wherein plasma processing in the open orientation enables 45 plasma volume as recited in claim 12, Wherein the con?g
an increased plasma ?oW rate and an increased bias voltage. urable plasma con?nement rings include spacers, and the
7. A plasma processing chamber as recited in claim 1, con?gurable plasma con?nement rings and spacers are
Wherein plasma processing in the closed orientation enables attached to shafts.
higher density plasma generation, relative to plasma pro 18. A plasma etch process chamber having con?gurable
cessing in the open orientation. plasma volume as recited in claim 17, Wherein the shafts are
8. A plasma processing chamber as recited in claim 7, designed to transition the con?gurable plasma con?nement
Wherein in the closed orientation, higher pressure plasma rings betWeen the extended position and the retracted posi
processing is enabled, relative to plasma processing in the tion.
open orientation. 19. A plasma etch process chamber having con?gurable
9. A plasma processing chamber as recited in claim 1, 55 plasma volume as recited in claim 12, Wherein plasma
further comprising: processing With the con?gurable plasma con?nement rings
a con?nement structure con?gured to surround the bottom in the retracted position enables an increased plasma ?oW
electrode at a level beloW a level of the bottom elec rate and an increased bias voltage.
trode. 20. A plasma etch process chamber having con?gurable
10. A plasma processing chamber as recited in claim 9, plasma volume as recited in claim 12, Wherein plasma
Wherein the con?nement structure is attached to a liner of the processing With the con?gurable plasma con?nement rings
plasma processing chamber. in the eXtended position enables higher density plasma
11. A plasma processing chamber as recited in claim 9, generation, relative to plasma processing With the con?g
Wherein the con?nement structure is adjustable in position, urable plasma con?nement rings in the retracted position.
the position being adjustable closer or further from the level 65 21. A plasma etch process chamber having con?gurable
of the bottom electrode, Wherein an adjustment in the plasma volume as recited in claim 12, Wherein the con?g
position changes the second volume. urable plasma con?nement rings in the eXtended position
US 6,527,911 B1
13 14
enables higher pressure plasma processing is relative to the retracted position enables an increased plasma ?oW rate
plasma processing With the con?gurable plasma con?ne and an increased bias voltage.
ment rings in the retracted position. 25. A semiconductor Wafer processing chamber having a
22. A semiconductor Wafer processing chamber having a con?gurable plasma volume as recited in claim 22, Wherein
con?gurable plasma volume, comprising: plasma processing With the plasma con?nement assembly in
an upper electrode; the extended position enables higher density plasma
a loWer electrode being parallel to the upper electrode and generation, relative to plasma processing With the plasma
being con?gured to receive a semiconductor Wafer for con?nement assembly in the retracted position.
processing; 26. A semiconductor Wafer processing chamber having a
10 con?gurable plasma volume as recited in claim 25, Wherein
a ?rst plasma con?nement region having the upper elec
trode as an upper boundary and the loWer electrode as plasma processing With the plasma con?nement assembly in
a loWer boundary; the eXtended position enables higher pressure plasma pro
cessing relative to plasma processing With the plasma con
a second plasma con?nement region having the upper ?nement assembly in the retracted position.
electrode as an upper boundary, the loWer electrode as 15 27. A semiconductor Wafer processing chamber having a
a loWer boundary, and an upper chamber liner as a
con?gurable plasma volume as recited in claim 22, Wherein
lateral boundary, Wherein the upper chamber liner is the outer plasma con?nement structure includes a plurality
con?gured With an outer plasma con?nement structure of apertures proportioned for essentially con?ning plasma
and con?gured to line an upper region of the semicon Within the second plasma con?nement region.
ductor Wafer processing chamber; and 28. A semiconductor Wafer processing chamber having a
a plasma con?nement assembly having at least one con?gurable plasma volume as recited in claim 27, Wherein
plasma con?nement ring, a plurality of spacers, and a the outer plasma con?nement structure is adjustable in
plurality of shafts, the plasma con?nement assembly position, the position being adjustable closer or further from
being positioned Within the semiconductor Wafer pro a level of the bottom electrode, and Wherein an adjustment
cess chamber disposed around the ?rst plasma con?ne 25 in the position changes a volume of the second plasma
ment region and de?ning a plurality of parallel circum con?nement region.
ferential passages; 29. A semiconductor Wafer processing chamber having a
Wherein the plasma con?nement assembly is con?gured con?gurable plasma volume as recited in claim 28, Wherein
to be positioned in one of an eXtended position to de?ne the outer plasma con?nement structure is constructed of a
the ?rst plasma con?nement region, and a retracted dielectric.
position to de?ne the second plasma con?nement 30. A semiconductor Wafer processing chamber having a
region. con?gurable plasma volume as recited in claim 22, Wherein
23. A semiconductor Wafer processing chamber having a the at least one plasma con?nement ring is constructed of a
con?gurable plasma volume as recited in claim 22, Wherein dielectric.
the plurality of shafts are designed to transition the plasma 35 31. A semiconductor Wafer processing chamber having a
con?nement assembly betWeen the eXtended position and con?gurable plasma volume as recited in claim 22, Wherein
the retracted position. the plasma con?nement assembly has siX plasma con?ne
24. A semiconductor Wafer processing chamber having a ment rings.
con?gurable plasma volume as recited in claim 22, Wherein
plasma processing With the plasma con?nement assembly in

You might also like