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RADIO ENGINEERING I
Design Exercise Manual

2016

© Timo Kumpuniemi
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CONTENTS

1. INTRODUCTION TO THE ADS ............................................................................ 3

1.1. File hierarchy of the ADS .................................................................................. 3
1.2. Launching the program ...................................................................................... 3
1.3. Example workspaces ......................................................................................... 5
1.4. Copying example workspaces ........................................................................... 5
1.5. Data windows of the example workspaces ........................................................ 6
1.6. Creating a new workspace ................................................................................. 7
1.7. Creating and designing user’s own schematic ................................................... 7
2. DESIGN EXERCISE ............................................................................................... 9
2.1. General information ........................................................................................... 9
2.2. Unzipping the example workspace and design kits ........................................... 9
2.3. Specifications of the amplifier ......................................................................... 16
2.4. Using the program ........................................................................................... 16
2.5. Design procedure ............................................................................................. 17
3. PRINTING THE RESULTS .................................................................................. 21
4. DESIGN EXERCISE REPORT ............................................................................. 22

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1. INTRODUCTION TO THE ADS

In the chapter basic structure and operation of the Advanced Design System (ADS)
simulation software is discussed. The actual definition and practical advice for
performing the design exercise is found in the chapter 2.

1.1. File hierarchy of the ADS

In the file hierarchy of the ADS the highest level is Workspace. Below that are
Libraries, Cells and Views as depicted in the figure 1 below.

Figure 1. File hierarchy in ADS.

1.2. Launching the program

The usage of the Agilent Technologies ADS software requires that the user has a
valid username for the working stations of the Department of the Electrical and
Information Engineering. After logging in the program can be launched by typing

hpads

After the startup two windows are displayed. These windows are presented in
figures 2 and 3. The window in the figure 2 is a quick selection window for opening
the most recently opened workspaces and starting new workspaces. It is also possible
to open the links ”ADS Overview”, ”Quick Start Tutorial for New Users” and
“Documentation (Manuals)” from this window. For first time users it is beneficial to
familiriaze themselves with these links. Also a number of other actions may be
selected from this window.
The window presented in figure 2 is the so-called main window of the ADS. All
selections that are available from the quick start window can be done from the main
window also. In addition to that numerous other functions are available in the main
window. The functions become evident from the pull-down menus and quick buttons
in the upper edge of the window.

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Figure 2. The quick selection window of the ADS.

Figure 3. The main window of the ADS.

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1.3. Example workspaces

The ADS software is provided with a vast number of ready built example
workspaces. They can be obtained by selecting File Open  Example from the
main window. The example workspaces must be unzipped to user’s home directory
before usage. Each workspace contains one or more libraries, cells and views. After
the workspace is opened for instance different schematic windows of the workspace
can be opened either from the main window or another schematic window if one
such is open.
In the figure 4 there is an example of a schematic view Stability under the example
workspace found from examples/MW_Ckts/LNA_1GHz_wrk.

Figure 4. An example of a schematic view.

1.4. Copying example workspaces

As stated in chapter 1.2 the ADS software has a wide number of ready built
examples that must be unzipped to user’s home directory before thet are accessible.
It is recommended that the extracted workspaces as well as the self-built workspaces
are copied directly to the root of the user’s home directory. Placing the workspaces
deeper in the directory tree causes sometimes problems.
Unzipping a workspace is performed through the main window by selecting File
Open  Example from the pull-down menu. From the opened window the user

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selects the workspace to be extracted and after that the destination and name for the
file.
1.5. Data windows of the example workspaces

Most of the example workspaces containing example schematic views are equipped
also with corresponding data windows where the simulation results of the examples
are saved. The data window related to a schematic design can be opened for instance
by selecting Window  Open Data Display from the schematic window. The data
display file names have a postfix .dds.
Figure 5 depicts as an example the data display Stability.dds related to the
schematic shown in figure 4. In the figure also the name of the dataset is shown.
Dataset is the data pool that contains the simulation results. From the dataset the
wanted data is picked and shown in the data window. In the case of figure 5 the
dataset has the name Stability. The name of the dataset can be set from the schematic
window by selecting Simulate  Simulation Setup. By using different dataset
names for different simulations one data window can be used to present simulation
results from several different simulations.

Figure 5. An example of a data display.

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1.6. Creating a new workspace

In case the user wishes to create a totally new workspace it can be done by selecting
File  New Workspace from the main window of the ADS. A wizard will be
lauched that help the definition of the new workspace.
ADS contains also several half-ready built schematics that are actually simulation
benches. They are fully parametrized with the idea that the users places his/her own
design between the input and output nodes of the bench. When opening a new
schematic these test benches can be opened by selecting a suitable bench from the
box Schematic Design Templates (Optional) after selecting File  New from a
schematic window. If no selection is done from the box a blank schematic is opened.

1.7. Creating and designing user’s own schematic

After a workspace has been created schematic views can be designed under the
workspace. Components used in the schematic can be found either from the quick
button (picture of a bookshelf) or by selecting Insert  Component Component
Library from the pull-down menu of the schematic window. The window of the
component library is opened and the desired component can be selected from the list.
There is also a search engine for selecting the components.
When using the Analog/RF environment there are several different simulation
controllers that are used for different kind of simulations. The available controllers
are DC, AC, Budget, S-parameter, Harmonic Balance, XDB, Envelope, LSSP and
Transient simulation controllers. The detailed descriptions and usage of the
controllers can be read from the help files.
After the schematic under design is equipped with the suitable components and
they are correctly parametrized the schematic can be simulated. Before doing this the
user should check the simulation setup by choosing Simulate  Simulation Setup.
There the data window should be set to open automatically and the user should also
set the names for the data display and dataset. For the basic simulation it is often
enough if the cell name of the schematic, data window and dataset are set the same.
The simulation is launched by pressing the quick button (picture of a nut) or by
selecting Simulate  Simulate. The simulation window is opened containing
information related to the progress of the possible and the possible warnings and
error messages.
After the simulation has been ended with no errors the data window is opened.
There the results of the simulation can be presented by selecting a correct data plot
type and the variables that are wanted to appear in the data plot. It should be checked
that the data window refers to a simulation that the user wishes to examine i.e. the
name of the dataset is correct (for instance in figure 5 a dataset called Stability is
used). Results from several different simulations can be presented in a single data

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window all at once if the simulations are given different names in different
simulations.
This design exercise, however, leans strongly on half-ready schematics which
easies the work load considerably at least to a new ADS user when compared to the
situation that the user designs schematics starting from a blank schematic view.

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2. DESIGN EXERCISE

In the chapter the definition of the design exercise as well as practical advices for
performing the exercise are explained.

2.1. General information

The task is to design and simulate a low-noise preamplifier for a certain bandwidth
with certain parameters by using the simulation software Advanced Design System
(ADS) produced by Agilent Technologies. At first it is beneficial for the student to
get familiar with the theory of a small-signal amplifier presented in the lectures. Also
the design examples presented in the exercises are useful. The simulation software
can be used in the workstation computer classrooms of the Department of Electrical
and Information Engineering in Tietotalo (e.g. classroom TS137).
When you are logging in to the workstation, choose a linux server, for instance st-
cn0001.oulu.fi. The software starts by command hpads.
The manuals of the software can be found in electrical format by clicking help –
button. Try using it whenever you face problems. It is recommended that the user
begins the usage of ADS by reading the ADS-Quick Reference manual. It can be
found as described in chapter 1.2.

2.2. Unzipping the example workspace and design kits

For the design process there is an example workspace that is very useful. It can be
extracted the following way:

1) Download the file “LNA_1GHz_wrk.7zads” from the course page in the

Optima environment and place it to the root of your home directory.
2) Select File->Unarchive from the ADS main window. A window as in Figure
6 is opened.
3) Browse to the root of your home directory. Select “LNA_1GHz_wrk.7zads”
and press “Open”.
4) A window similar to figure 7 is opened. Select “Next”. In the figure username
= your username to the workstations.
5) A window similar to figure 8 pops out. Click “Finish”. You can also change
the name of the workspace at this stage but it is not compulsory.
6) A windor similar to figure 9 is now opened. Click “OK”.
7) A warning message similar to figure 10 is opened. Ignore it by pressing “No”.
8) If the installed workspace is not automatically opened, open it from the main
window by selecting FileOpenWorkspace.
9) Click “Library View” from the main window, then right click the “Read-
Only Libraries” and select “manage Libraries” as in fig. 11.
10) Select the red line (lib.defs (disabled)) as in fig. 12 and select “Remove”
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11) Next select “Add Library Definition File” from fig. 12.
12) Select the path /cad1/linux/agilent/local_libs/ RF_Transistors_vendor_kit
by clicking from the sequentially opening windows.
13) You will end up to a window similar to figure 13. From there select
“lib.defs” and press “Open”.
14) A window similar to figure 14 appears showing the path the component
library.
15) Select the path /cad1/linux/agilent/local_libs/ S_parameter_vendor_kit by
clicking from the sequentially opening windows.
16) Select “lib.defs” and press “Open”.
17) A window similar to figure 15 is opened. Press “Close”.
18) The design environment is now ready for starting the design exercise.

Figure 6. Unarchiving the example workspace (1).

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Figure 7. Unarchiving the example workspace (2).

Figure 8. Unarchiving the example workspace (3).

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Figure 9. Unarchiving the example workspace (4).

Figure 10. Unarchiving the example workspace (5).

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Figure 11. Opening the library definition setting.

Figure 12. Removing the incorrect library file definition path.

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Figure 13. Setting library definition file paths.

Figure 14. Setting library definition file paths (2).

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Figure 15. Setting library definition file paths (3).

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2.3. Specifications of the amplifier

Use the BJT transistor model AT-60570 during the work. There exists a nonlinear
model pb_hp_AT60570_19921101 in the component library RF_Transistors and a
S-parameter model sp_hp_AT-60570_1_19921201 in the library S_Parameter. They
are both needed during the design exercise. The easiest way to find these components
is to use the “Search” operation in the component library with for instance the
component number “60570” being the search word.
In the design the goal is to match the transistor into minimum noise figure at
frequency band 2.0 – 2.1 GHz in such a way, that the available gain is as high as
possible. Using transistor AT-60570 at the operating point VCE = 8 V, ICE = 2 mA
the following performance values at frequency band 2.0 – 2.1 GHz should be
reached:

Noise figure NF: not greater than 2 dB

Gain S(2,1): not smaller than 9 dB
The transistor must be unconditionally stable within the defined bandwidth.

2.4. Using the program

In the example workspace copied in chapter 2.2 there are 13 different exemplary
schematics with the data displays related to them. Part of these can be used during
the design exercise. Some modifications however must be done by switching
components and changing parametrizations.
When the schematic is ready and the parameters are set correctly the schematic can
be saved and simulated by  Simulate. After the simulation a dataset is created
which has as a default the same name as the schematic simulated, but the extension
of the file is .ds. The data displays are named with an extension of .dds. Usually the
window opens automatically. When the window has opened the correct dataset
should be selected from the upper bar. Different kind of graphics can be added in the
data display by dropping them by mouse (Rectangular Plot, Polar, Smith, List etc.)
and the functions displayed in these are selected from the window that is
automatically opened.
It is important to check that the data is displayed from the correct dataset. Also
graphs from several different datasets (i.e. simulations) can be added to a data
display and they can be moved freely by mouse. Also simple graphics and text fields
and markers can be added into the data windows to produce clear documents. Clear
documents and results should be the aim also in this work.

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2.5. Design procedure

During the design the schematics and data windows from the example workspace can
be used. In the schematic A_Readme the other schematics of the workspace are
presented. It is useful to add markers and texts in the data windows to make the
results and further analysis clearer. Remember to save the schematics and data
windows because they must all be included into the design exercise report. You may
for instance procedd in the following order when performing the design exercise:

1) Examine the value needed for base-emitter voltage (VBE) and base current
(IBB) of the nonlinear transistor model when this transistor is biased to the same
operating point as the S-parameter amplifier model (ICE = 2 mA, VCE = 8 V).
You can use schematic BiasSetup and data display BiasSetup.dds from the
example project completing this task. Find out the value of base current when
the biasing condition is fulfilled and use this value as the last value in the DC
sweep. After the simulation update the results in the schematic window by
selecting Simulate → Annotate DC solution. The value of the bias-current is
presented in the data-window by the variable VCC.i. In practise it is most
probably a negative value due to the definition of the direction of the current. In
practise the absolute value of VCC.i should be observed. Make sure that for the
voltage source you set the parameter “Save Current” to have value “Yes”.

2) Compare the two transistor models (nonlinear model vs. S-parameter model)
using the schematic view ModelVerif and the corresponding data display
ModelVerif.dds. As the value of the base voltage use the value you found out in
previous task. Examine how well the S-parameters match to each other.

3) Do the biasing of the nonlinear transistor model to the biasing point of the S-
parameter model (VCE = 8 V, ICE = 2 mA). Use Vdc= 10 V as the operating
voltage in this case (consider why it useful to do so instead for instance 8 V).
You can use the schematic Bias_Network and the data display
Bias_Network.dds related to this. Simulate the structure in this case by selecting
Simulate → Optimize. You can view the values of the resistors in the schematic
by selecting Simulate → Update Optimization Values. If the simulation does
not converge to the bias values accurately enough try to focus the ranges for the
GOAL-settings and/or by adjusting the Weight-parameters in GOAL-boxes.

4) Simulate and present in Smith chart (in ADS data window) the constant noise
circles, reflection coefficients S11 and S22 and the reflection coefficient Sopt
that is calculated to give the minimum noise figure of the S-parameter transistor
model. Present also the gain S21 [dB] and minimum noise figure NFmin [dB]
and effective noise resistance Rn. You can use the schematic SparamsNoise and
the data display SparamsNoise.dds related to this.

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5) Examine the stability of the S-parameter transistor model and stabilize it if

needed so that it is stable over the whole frequency band of interest (>1). You
can use the schematic Stability and the data display Stability.dds related to this.
See below for the details.
Find out how much the possible stabilizing affects on the minimum noise
figure and gain. In the data window present also stability factors , K ja B1 and
the stability circles of the input and output. Note: Save the simulation results of
the unstabilized and stabilized transistor into different datasets by selecting
Simulate -> Simulation Setup -> Stability or StabCkt (see below for details).
Make sure that the results in the tables are taken from the right dataset. You can
check this by clicking right mouse button on the table and checking the dataset.
In practise it is useful to do to following in order to complete the previous
instructions:

a) Deactivate the stabilizing circuit.

b) Make sure that after opening the window Simulate -> Simulation
Settings:
 there is a dataset with a name “Stability”
 there is a data display with the name “Stability”
 the option “Open Data Display when simulation completes” is
selected.

c) Simulate and the data window is automatically opened. Check the results.
d) Activate stabilizing circuit.
e) Do the following:
 Change the dataset name into “StabCkt”
 verify that the data display has still the name “Stability”

f) Simulate and the following window should be opened:

Figure 16. Simulating the stability.

g) Answer “No”.
h) The simulation results are updated into the data window

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i) If the result is not what you wanted change component values and repeat
the step f)  i). Continue repeating the sequence until you reach results
that satisfy you.
j) The values for Sopt can be viewed for instance by adding as a list form
the function called Sopt. Note that the dataset for this function should be
selected to be “StabCkt” in order to plot the data from the correct dataset
where the stabilizing circuit is taken into consideration. See the following
figure 17.

Figure 17. Viewing the values for Sopt.

6) Match the transistor to reach minimum noise figure in such a way that the
specifications for the task are fulfilled. You can use the schematics Match1-4
and data displays InputMatch.dds and OutputMatch.dds from the example
project as a help. (Note: you can set the value of Sopt directly in polar format in
the form ‘polar(magnitude,angle)’, the value for Sopt can be reached from
previos simulations, find out which one). Check from the simulation settings that
Match1 and Match2 refer to data display InputMatch.dds. Respectively,
Match3 and Match4 should refer to data display OutputMatch.dds. In addition
to ADS simulation, present also the matching done manually in separate sheets
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of Smith chart and added with the calculations as an appendix to the design
exercise report.

7) Simulate the whole amplifier you have designed and present the obtained values
of noise figure, gain and reflection coefficients S11 and S22. You can use the
schematic FinishedAmp and the corresponding data display FinishedAmp.dds.
as a help.

8) Voluntary bonus task 1:

Do the matching by using microstripes and compare the result with the result
obtained by lumped components. This task is not compulsory and it can only
raise the grade of the laboratory work report. In practise use some of the ADS
components TLIN, TLOC, TLSC. You can determine the electrical lengths of
the stripes either by calculating them theoretically by hand or by using ADS.
Finally, build anyway in ADS similar circuit as in task 7) in order to be able to
simulate the performance of the stripe solution. Realize only the matching
components with the stripes.

9) Voluntary bonus task 2:

Discuss the possible changes in your design in steps 1-7 if the operating
frequency of the amplifier should be much hgher, e.g., on the order of 10 GHz.

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3. PRINTING THE RESULTS

You can print the schematics and data displays to the printer or in electronic format
into files in .pdf or .ps format. Printing to a file might be a better option. It is then
easy to attach the figures to the Design Exercise Report.
In order to print to a file select File->Print and select ”Create File”. Please check
that the figure in the produced file looks like it should be.

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4. DESIGN EXERCISE REPORT

The design exercise report’s structure and appearance is supposed to apply the
department’s instructions for the Master’s Thesis. The instructions can be found in
Finnish from:

http://www.oulu.fi/sites/default/files/content/ST_diplomity%C3%B6ohje2011_0.pdf

and in English from:

http://www.oulu.fi/sites/default/files/content/masters_guide.pdf

There is also a template document in Word format that has the same page settings as
described in the department’s instruction document above. It can be found in:

http://www.oulu.fi/sites/default/files/content/WordTemplate.doc

In the design exercise report at least the following things should be included:

 The essential parts of the theory needed during the course of the design
exercise
 All schematics and data windows used/produced in the simulations. The
results must be clearly displayed, use the markers.
 Matching of the input and output also performed manually in Smith
chart/paper with calculations
 Comments and considerations on the simulation results and performing
the work!!
 Feedback and notes on the design exercise on general

The deadline for returning the report is 14 November 2016. Each group returns
one report and the reports must be individual between the groups. The reports are
returned electronically by e-mail in pdf-format. Also the zipped ADS workspace file
must be included.

Timo Kumpuniemi
e-mail: [email protected]

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