Apia, Automatic _ Digital Calculators Andrew D. Booth Kathleen H. V. Booth Third Edition srozENIe [eyusiq onewojny Butterworths =VINO ola DCL 5 Osco aati aie SYOLV IOS e Ono AasKe) ey een cug oerticaa OO Mere Ca Tee POMC RSE Seat as ay SoroNow in its third edition, AutomaticDigital Calculators is a well-established text and reference book, used extensively by undergraduates and postgraduates con- cerned with computer design, programm- ing and application. The general purpose of this book is to discuss the history of digital computers; the logical design of computing systems; the design of electronics and other circuits for computation and. storage; the programming of computers; and some applications of computers. For this new edition, the material has been brought up to date ; it now includes detailed accounts of transistor and tun- ne] diode circuits, thin film magnetic and cryogenic storage and modern auto- coding systems with particular refer- ence to FORTRAN. Press reviews of previous editions are set out on the back of this jacket. 52s 6d 2bbo CUMBERLAND EDUCATION COMMITTEE COUNTY LIBRARY This book is due for return on or before the date last stamped below.The M3 Gomputer AUTOMATIC DIGITAL CALCULATORS by ANDREW D. BOOTH, DSc., PhD., F.Inst.P. and KATHLEEN H. V. BOOTH, BSc., Ph.D. THIRD EDITION LONDON BUTTERWORTHS 1965ENGLAND: BUTTERWORTH & CO, (PUBLISHERS) LID. AUSTRALIA: BUTTERWORTH & CO. (AUSTRALIA) LTD. SYDNEY: 20 Lote Steet 2473 Boupke Street BRISHANE: HO Queen Stree TYERWORTH & CO. (CANADA) LTD. RONTO? 1367 Danforth Avene, 8 NEW ZEALAND: BUTTERWORTH & 09. (NEW. ZEALAND) LTD. WELLINGTON: 49/51 Ballan AUCKLAND? 35 High Street SOUTH AFRIGA: BUTTERWORTH & CO. (SOUTH AFRICA) LTD. DURBAN? 53/35 Beach Grove BUTTERWORTH INC, WASHINGTON, D.C, 20014: 7500 Peart Street CANADA: vs. First Eaition 1953 ‘Second Réition 1956 Third Edition 1965 723728 ee fea 2) (esac Butterworth & Co. (Publishers) Lid. (1965) ‘Set én Monotype Bastersile type Made and prised in Grct Britain by William Clowes ond Sont, Limited, Landon ood Beccles PREFACE TO THE THIRD EDITION Apart from the death of the two principal pioneers of computer design, von Neumann and Turing, the passage of eight years since the second edition of this book has seen an explosion in computer technology and applications. It hasalso seen a transfer of the centre of computer thought and innovation from England to North America. ‘The causes of these phenomena are partly rooted in the vast technological resources of the U.S.A. and at least equally in the almost pathological concentration of British effort in one or two centres which have produced no significant ideas or development for some years. ‘Technological advance has made necessary an almost complete revision of the text in the areas of device concepts and of computer programming. Computer structure is not yet established in its final form, although microelectronics, thin film magnetics and cryo- genics seem to be the main contenders for permanence. The universal acceptance of autocoding has settled down to a war of attrition between two or three principal systems, and one in which victory will not necessarily go to the contender with the greatest logical claim to success, Possibly the most exciting area of computer research at the pre- sent time is that of artificial intelligence. It is a source of sardonic amusement to the authors that the ideas contained in the last section of this book, first put forward in the first edition in 1952, seem to be those most in favour at the present time. Unfortunately, however, the state of information retrieval is such that they have since been ‘rediscovered’. ADB. K.HLV.B. University of Saskatchewan, 1965PREFACE TO THE SECOND EDITION In preparing this edition the opportunity has been taken to bring the text up to date by the inclusion of a considerable amount of new material. New circuit elements, such as the transistor and the ferro-electric matrix store, have been introduced and automatic coding procedures devised in the last two years, and these are now described. A commentary on the activity which exists in the field of auto- matic computation is the revised bibliography which is over twice as long as that given in the first edition. ‘A few errors have been corrected, and the authors wish to thank readers and reviewers for bringing these to light. ADB. The Wharf, KHVB. Fenny Compton, November, 1955PREFACE TO THE FIRST EDITION ‘Tur decade 1940-1950 was one of intense activity in many fields of science. Under the spur of war it proved necessary to perform, rapidly and frequently, complex calculations which were beyond the scope of available human computers. It thus happened that the 19th century dream of Charles Babbage became the practical reality of the 20th century, and the automatic digital calculators of today form an important factor in the planning of most new departures in the sciences, and in engineering. ‘The present book is intended to serve as a guide to the theory of these machines, and particularly to introduce new workers in the field to the notions, language and literature of the subject. Not unnaturally, the techniques described in most detail are those in use in our own laboratory; but since, in the last seven years, most of the current suggestions have received investigation there, the account should not prove too biased. ‘The terminology of the subject is not yet stabilized, and it is hoped that readers with strong feclings will not take exception to our use of such an anthropomorphic term as ‘memory’ which, in any case, must be made familiar to any potential reader of the existing literature. It is perhaps unfortunate, however, that the advanced state of production of the book made it impossible to adopt the spelling ‘program’ instead of programme, since, at the 1953 Conference on High Speed Digital Computers held at the National Physical Laboratory, this revision found general acceptance. Al- though, in defence of the old variant, it may be pointed out that the past tense, and personal noun, then require no modification. ‘This should appeal to advocates of simplified English. ‘The authors wish to acknowledge their indebtedness to John von Neumann and his staff, at the Institute for Advanced Study, Prince- ton, for the stimulating period spent as the guests of their Project. Thanks are also due to the British Rubber Producers’ Research Association, Imperial Chemical Industries, Ltd., and to the Rocke- feller Foundation, for their generous support which made the con- struction of APE(X)G type machines possible. ix— PREFACE In conclusion, it gives us particular pleasure to thank Mr. John Wilson, now Director of Research at the British Rayon Research Association, for his patience, encouragement and very practical support over the past years. ADB. KAV.B. The Wharf, Fenny Compton, May, 1953 CONTENTS PAGE Frontispiece facing iii PRerAce 10 THE Tump Eprrion v Prerace To THE Sconp Eprrion vii PREFACE To THE First Eprrion ix 1. InrRopuctio 1 2. Tue Mrcuantcat Era 9 3. Tae Apvenr or ELectronic TECHNIQUES 16 4, Tae Overatt Desicy or a Compurinc System oh 5. Taz Conrrot 31 6. Tue Artramertc Unit 42 7. MiscecLanrous OPERATIONS 70 8. Ineur-Oureur ” 9. Gates 96 10. Siete Dicrr StoracE 117 11. Miscentanzous Components 139 12. SroracE Devices 155 13, Derinrrion or a Cope anp Discussion oF 11s Form anp Contents oe . a “ 181 14. Tue Tromigue oF PRooRaMnina 190 15. Suproummes 199 16. Avromatic ProGRAMMING 213 17, A Cowprcer Sysre 217 18. Some Aperications or Compurine MacHINes 227 Brauiocrarny AND ACCUMULATIVE READING ... 243 Name Invex 259 Susjecr Inpex 2601 INTRODUCTION Berore coming to the main subject-matter of this book it seems appropriate to give a short introductory account of general ideas in the field of computing machinery. This is particularly necessary in view of the wealth of technical jargon which has grown up during the past fifteen years, and which makes it difficult for those working in the subject to remember when their remarks involve a background which is not a part of the general knowledge of the non-specialist. Many calculations which are familiar in everyday life involve the repetition of certain cycles of operation a great number of times. For example, in evaluating the deduction of Income Tax from the wages of workers in a factory or office, the same small set of rules apply to each worker, the only difference being the amount of his or her income and the various allowances depending on such things as number of children. If a machine were set up to compute Income Tax, it would only be necessary to insert the particular data mentioned above and the operation of the machine would then be automatic, This idea of a computer performing a fixed cycle of operations a number of times on different sets of input data is known as ‘iteration’ and is fundamental in the operation of a modern calculator. In the scheme mentioned above, a machine was postulated which performed a fixed set of operations upon input data. The mechan- ism which causes the correct sequence of operations to occur is known as the ‘control’, and those parts of the machine which perform the actual additions, subtractions, multiplications, etc., are known as the ‘arithmetic unit’. In the simple scheme pictured above the machine was assumed to have been constructed to perform one set of operations, to solve one particular problem. Such a machine is nowadays known as a ‘special purpose computer’, Computers have now been built which are capable of being set up to solve any problem amenable to treatment by the rules of arithmetic and these are called ‘general Purpose computers’, It is quite possible to perform calculations upon numbers by I—a.0.0, 1INTRODUCTION representing them by various physical quantities and then, using some mechanical or electrical device, to generate the required answer. A familiar example of this type of calculator is the slide rule; here the numbers are converted into lengths on a logarithmic scale, and products and quotients generated by the superposition of these quantities followed by their evaluation on a suitably calibrated scale. A device which works by such physical analogy is usually known as an ‘analogue computer’. Many and complex analogue computers exist and are of great ~ beauty and elegance; they will not, however, form the subject-matter of this book which is concerned with ‘digital computers’. As their name implies these machines accept numbers in the form of digits and operate upon them by a process of counting. An elementary ‘example of this type of computer with which the reader will be familiar is the cash register. The great advantage of digital computers, over the analogue variety, lies in their potential accuracy. Thus it is extremely diffi- cult to construct an analogue computer whose accuracy is much higher than one part in a hundred, whilst a digital machine can be extended to any accuracy required by the simple process of adding extra digits in the form of counting wheels and actuating mechanism. ‘The question may be asked, of what value is an accuracy of one part in ten million? In everyday life such precision is seldom, if ever, required; in mathematical calculation, however, it frequently happens that a desired small number is calculated as the difference of two large numbers so that great precision may be needed in the latter to make the former significant. (The question as to whether there exists a better mathematical method of approach to all such problems is here left open since, even if such methods exist, they may not always be the simplest from a computational point of view.) Again, if a calculation on numbers of, say, two decimal digits involves a multiplication, in order to preserve two decimal digit precision the resulting product has to be ‘rounded off.’ This means that the answer may have an error of the order of one-half in the last digit. It may be shown by a statistical process, that the sum of n numbers, each having a probable error +4, is likely to have an error of Vn/2. Thus the sum of 40,000, two decimal digit numbers hav- ing the above probable errors, will have a probable error of about 100. Ifthe numbers had arisen in a problem where they alternated in sign and the resulting sum was small, it is evident from the above argument that the round-off error on the sum might exceed the actual sum itself. Modern high speed digital computers perform , INTRODUCTION arithmetic sequences of at least the magnitude mentioned above, and it is therefore important to maintain a high precision in the numbers used. A modern digital computer may operate at a speed which makes it impossible for a human operator either to supply it with data at an adequate rate, or to write down the numbers as fast as the machine can compute them, This necessitates the provision of “terminal organs’ or ‘input/output’ devices. Such devices may take the form of readers for paper tape on which numbers can be rep- resented by punched holes, and of electric typewriters or punches ” operated by the machine itself, ‘The use of a tape, read by the machine, makes it possible to employ a number of human operators to keep the machine occupied. Terminal equipment which is directly connected to the computer is usually described as ‘on line’. When data, on punched cards or tape, produced by a computer are to be turned into printed material by equipment which is not con- nected to the computer itself, the reproducing equipment is said to be ‘offline’. Moreover, there exists a vast range of problems, both mathematical and physical, which, while involving an enormous amount of calculation, require little input and generate only a small output. Such problems occur in the determination of molecular structure by X-ray methods, in the solution of many problems in nuclear physics, in the design of aircraft for supersonic flight, and in innumerable purely mathematical problems of the type: for what values of n is 2*—1 prime? Because of the expense and difficulty of building machines with large numbers of electrical or electronic components, most modern general purpose computers are constructed so that they can perform only a limited number of arithmetic operations. ‘Thus addition and subtraction are universal, multiplication facilities exist on most machines but a divider is frequently absent and such things as square root units are almost unknown. Any problem which it is required to solve must be split up into sequence of these basic operations before the machine can be used; the process of arranging the problem in this way is called ‘program- ming’ or ‘coding’ and the set of basic operations which the machine can perform is called the ‘code’ or order set. ‘The idea of repeating or iterating a fixed sequence of operations ‘@ number of times has already been mentioned ; suppose now that a machine is required to go through such a sequence just n times and then to stop. If the set of operations had to be inserted into the machine m times a great amount of equipment, time and space would be wasted. To overcome this the machine is so arranged that each 3INTRODUCTION time it comes to the end of the sequence it examines a certain num- ber; if this number is positive or zero, say, it returns to the start of the sequence as before; if the number is negative, however, it stops ‘or goes into a new sequence. ‘Thus, suppose that as a part of the original sequence the number (n~1) has unity subtracted from it after each iteration and that the result is examined, for the first (n-1) cycles the result will be positive so that the sequence is repeated; after the nth cycle, however, the result will be negative and the new sequence will be initiated. The number n ~ 1 is called an ‘iteration index’, and the instruction which examines the value of n-1 and directs the machine to one of two courses of subsequent action is called a ‘conditional transfer’ or ‘branching order’. The conditional transfer is perhaps the most important order in the repertoire of a modern computer. It can be shown that even the most advanced logical processes can be programmed by using it and it can be made to direct the machine into alternative courses of action in a manner initially unknown to the human operator. As an elementary example of this may be mentioned the problem of extracting the square root of a number generated during the operation of the machine. This will be considered in detail in Chapter 15, but it suffices to say here that the process of extraction applied to a number a is an iterative one which generates at each iteration, m, an approximation x, to Va. The problem is that the number of iterations required to produce a result of given accuracy depends on the magnitude of a and is initially unknown tothe operator. ‘The solution is simple. At the end of each iterative cycle the machine forms —(x,-;—%,)?. ‘This number is negative 80 long a8 %q-1++%, to the precision required; at the end of the iteration, however, the difference is zero so that an application of the conditional transfer procedure will take the machine out of the square root extraction cycle and on to the next part of the prob- Jem. To conclude this introduction it is appropriate to make a brief remark upon the manner of representation of numbers in a com- puting machine. In normal arithmetic a negative number would be represented by, say, -0-642. ‘This presentation is not particularly suitable for the numbers used in a computing machine, instead the notation 9-358 (= 10 - 0-642) would be used, in which the negative number has been subtracted from a power of 10 greater than the maximum capacity of the machine. ‘This process of representation is known as ‘complementary’, and if 10? is the greatest power of 10 within the capacity of the machine, negative numbers are said to be represented 4 INTRODUCTION as complements mod 10°*!, It is easily seen that, within the capacity of the machine, a~b=a+(comp. 6 mod 10°*#), In many digital computing machines, especially those using electronic circuits, it turns out that the normal decimal scale is not that best suited to engineering practice. Instead a scale involving only the digits 0 and 1 is most convenient; this is known to mathematicians as the ‘binary scale’ or scale of 2. Leibnitz sug- gested long ago that this scale should replace the decimal scale for school teaching in view of its simple tables. 040-0 0x0=0 1+0 Ox1=0 1+1=10 Ix1l=1 ‘There are, however, good reasons why this suggestion was never adopted, which the reader will appreciate if he tries to add a column of more than about three figures in this scale. In the binary scale the decimal digits appear as: and any decimal number can be represented in binary form. It may be questioned whether difficulties will arise from the use of such a scale in a machine; this is not so since the machine can be programmed to accept information in decimal scale via a keyboard or punched tape: the numbers so inserted are converted by the machine into binary form for ease of calculation and storage. When the main calculation is complete the machine re-converts the numbers to decimal form for output to the human operator. ‘This process is described in detail in Chapter 15 where the coding of problems receives attention. It should be noted that complement notation is again used for the representation of negative numbers in binary scale, complements now being taken mod 2e+! where 2? is the most significant digit which can be held in the machine registers. ‘A number of different coding schemes for representing numbers 5INTRODUCTION have been devised for computing machines, ‘The rationale of these is often based upon circuit expediency, but two classes of codes deserve special mention: cyclic, or ‘Gray’ codes, and error detecting les. In the cyclic codes the objective is that only one digit shall change between successive numbers, thus: Gyclic binary representation 00000 00001 00011 00010 00110 oolll 00101 ele. The advantage of this type of code lies in its application to analogue digital convertorsin that ambiguity during digit changes eliminated. (on) x % om (01) (on Ea fon ag (110) (00) L— 10) (000) (100) xy (a) (b) Figure 1.1. Error detecting and error correcting codes Error detecting and correcting codes are based largely upon the work of R. W. Hamming, and are designed so that, according to their sophistication, the transmission of an incorrect (binary) digit can be detected or, more generally, detected and corrected. ‘The simplest way to demonstrate the existence and derivation of such a code is shown in Figure 1.1. Suppose that it is required to construct an error detecting code for the two digits 0 and 1. It is clear from Figure 1.1 (a) that, if we let Digit Code 0 00 1 rt INTRODUCTION then the effect of a single digit error on 0 is to produce the codes (01) or (10) and similarly for the digit 1. The code suggested there- fore detects single errors, In the case of Figure 1.1 (b) the codes are as follows: Digit Code 0 000 1 il It can be seen from the diagram that a single error in any of the code digits of 0 leads to the nearest neighbour points: (100), (010) or (001) whilst a single digit error in 1 leads to (011), (101) or (110). It follows that, on the assumption that only one code digit can be in error, a device can be constructed which will not only detect the .ce of the error, but also derive the correct code. The system will also detect the presence of two errors but, in this case, will either stop or make a wrong correction. ‘The example chosen is, of course, avery elementary one—in practice codes are used which will operate for the whole range of decimal digits 0,1,.. ..9. It may be asked: of what use is a correcting code if multiple errors produce wrong corrections? The answer to this lies in the fre- quency of error production in actual hardware. Probably the least reliable unit of a modern computer is the input-output. For telegraph-type readers the error rate is about | binary digit in 10,000. It follows that the chance of two binary digits being in error is about 1 in 108 and this is a sufficiently small chance to make the correct- ing system worth while. Error detection within the computer, where the chance of failure is more nearly 1 in 10®, is usually effected, ifat all, by the use of a so- called ‘parity check’. This involves simply the transmission of one extra digit which makes the first digit of the sum of all of the digits in the word (including the ‘parity digit’) non-zero. The most usual case is that of binary digits and here the rule for parity digit deriva- tion can be simply expressed: the parity digit is so chosen that the sum of the digits is odd. Thus, for the binary number 11010 the parity digit would be 0, therefore the pattern used would be 11010,0, Similarly, for the 101101 the pattern used would be 101101,1, The reason for choosing the parity digit to make the digit sum odd rather than even is that gross machine failures often make all transmitted digits zero and this would escape detection. A valuable feature of using a parity digit check is that the parity of a number which results from the addition or subtraction of two other numbers is the sum or difference of the parities of the 7INTRODUCTION respective numbers so that, here again, a valuable check is possible. For multiplication in binary scale, it is the digit sum rather than the parity which has to be manipulated, therefore digit sum of product =product of digit sums of multiplier and multiplicand. Since digit sum =(1- parity) in binary scale, no difficulty results. Finally, it is worth mentioning the considerations which apply in determining the optimum base for the representation of numbers in a digital computer. Here optimum is defined in the sense: uses least number of components, and a plausible argument is as follows: for numbers in base ‘b’, using only on-off configurations, a unit such as, (-1) 0 0 . 00 (6-3) 0 0 00 apes OmD / 00 Br gem Ores 00 TsO) 00 OnsviOnO) a 00 nn-l at in which only one of the elements in each column can be in the ‘on’ state at any time, can represent all numbers up to b*. We require to find the value of 6 for which (n xb) is a minimum when 6* has some fixed value, say JV. Using these relations we have: (n xb) =b log, Njlog, b whence (nx) _ ari ve iy aw 8. (EG mam) or sax) 20 when log, b=1 whence: =¢, which is easily shown to give a minimum, Now since ¢=2-71. .. it does not correspond to an arithmetically valid base. ‘The two nearest bases are 3 and 2, corresponding to ternary and binary scale respectively. Binary scale is used exten- sively in computers but, so far, only two ternary based machines seem to have been constructed: the TREAC at Malvern, England, and the SETOON in the University of Moscow. It is worth men- tioning that these machines used the ternary scale in its symmetric form, that is with digits (-1,0, +1) rather than the more usual (0, 1,2). D sae: THE MECHANICAL ERA ARITHMETICAL MACHINES Tur earliest reference to the possibility of constructing a calculating machine capable of performing the operations of ordinary arith- metic appears to be due to Pascal who, in 1642, designed a machine which was able to perform addition and subtraction. He applied this machine, with considerable success, to tax collection in France. ‘The general idea of mechanical calculation strongly appealed to Leibnitz who, in 1694, constructed an extended version of Pascal's machine which had the faculty of multiplication and division. Great interest attaches to the development of these first crude machines from the stage of being scientific curiosities to their present compact and reliable form, a development in which the English genius for mechanism found full expression in the early calculators of Morland and of Stanhope. It is perhaps worthy of mention, in passing, that the stylus operated adding machine of Morland is still sold in a largely unmodified form, as a low price instrument. ‘Any considerable commercial development of machines for per- forming the common operations of arithmetic had necessarily to await the availability of sound engineering techniques suitable for the precision mass production of the numerous small gears and other mechanism required in their construction. ‘Thus, whilst Thomas de Colmar, in 1820, put on the market a commercial machine, this was not particularly reliable. The first arithmetical machines of the type now known were produced by Ohdner in 1891, although the variable toothed wheel which bears his name was, in fact, described by Roth in 1841 and used in an actual machine by Baldwin in 1875. It is an interesting commentary upon scientific progress that one of the most compact and beautiful calculators recently available (1952) has reverted to the original Leibnitz stepped wheel as its main element.THE MECHANICAL ERA Semi-automatic Machinery ‘The machines so far described depend upon the presence of a human operator to supply them with data, to cause their operation either manually or by the intermediary of an electric motor, and to record and re-order their results for the next stage of the calculation. Pascal, in his Pensées, says of calculating machines, with particular reference to his own, ‘La machine arithmetique fait des effets qui approckent plus de la pensée que tout ce que font les animauce; mais elle ne fait rien qui puisse faire dire qu'elle a de la volonté comme les animaux’ and upon this doubtful evidence, has been described as the father of modern large scale computing machinery. ‘The quotation seems altogether too vague for such a credit especially in view of the second clause. Leibnitz has also the reputation of being a parent of self-operating machines; it has not proved possible to find a first-hand reference to support this and it seems unlikely that Leibnitz made any pro- posals of sufficient detail to substantiate his claims to priority. The first documented suggestion for a partially automatic machine seems to be that of Maller who in 1786 proposed the construction of a device for the generation of functions from alge- braic formulae involving their differences. This machine was ap- parently never made and it appears doubtful if detailed designs were prepared. Charles Babbage designed a difference engine in 1822 and applied to the Government of the day for funds to construct it. This machine was to compute automatically, any function the first five of whose differences were given, and furthermore to produce a printed record of the calculations. It was based on a small model which ‘produced figures at the rate of 44 a minute and performed with rapidity and precision all those calculations for which it was designed’, and was commenced in 1823. By 1829 a large part of the machine had been constructed but difficulties with the engineer- ing staff had led to an unsatisfactory state of the accounts and to trouble with the Treasury. When about £17,000 had been expended the constructional engineer, Mr. Clement, made such exorbitant demands for compensation that support was with- drawn. Work finally ceased in 1833 and, despite voluminous correspondence, a concrete statement of policy was not forthcoming from the Government until 1842 when the project was finally abandoned. The whole of the machine so far completed was generously offered as a gift to Babbage; this, however, was refused, The completed parts of Babbage’s difference engine have, since 1842, had a chequered career. In 1843 they were deposited in 10 ARITHMETICAL MACHINES King’s College, London; after many years of neglect they were transferred to the Science Museum in South Kensington. Before leaving the subject of the difference engine it is worth remarking that the main cause of delay in the actual manufacture lay in the absence of precision machinery as it is now known. Babbage set out first to construct such devices and it is in no small measure due to his exertions in this direction that Great Britain achieved the pre-eminent position in engineering which it occupied by the end of the nineteenth century. Although Babbage did not complete a difference engine, one constructed according to his design was built in Sweden by Scheutz and gave good and reliable service, being later moved to the Dudley Observatory, Albany, U.S.A. It is perhaps not out of place to mention here the subsequent history of partially automatic calculating machines. Babbage him- self suggested, in connection with his analytical engine vide infra, the use of punched cards, similar to those used in the Jacquard loom, to store data and instructions for a calculator. This plan was adopted in 1889 by Hollerith in a machine developed for data sorting in connection with the American census. From this device has developed the complex sorting, calculating and tabulating machinery used at the present time for business administration. ‘Two main types of punched card machine exist; in the first, or Powers Samas machine, cards are read and calculations performed by exclusively mechanical means in a manner which is the spiritual descendant of that suggested by Babbage. ‘The second, or Hollerith type of machine, uses the electromagnetic relay and other similar devices as computing elements, thus effecting a simplicity and flexibility impossible in the days of Babbage. ‘As far as the generation of functions from differences is concerned, the National Accounting machine with its 6 registers allows the performance and printing of exactly those calculations for which Babbage’s difference engine was designed. ‘THE UNIVERSAL MACHINES By 1833 Babbage had come to consider the possibility of construct- ing a calculating machine which would be capable of performing any calculation specified to it by the operator, and not merely calcula~ tions of a particular type as was the case with the difference engine. This machine Babbage called the ‘Analytical Engine.’ In its design Babbage’s genius came into full flower; it is not an exaggera- tion to say that all of the logical devices rediscovered for the building oF‘THE MECHANICAL ERA of the latest types of electronic machine were initially thought of by Babbage. In the first place the machine was to consist of two main parts, the ‘mill’ and the ‘store.’ The former, as its name suggests, was to be capable of working on or with numbers in accord with the common operations of arithmetic. ‘The latter unit was to consist of 1,000 columns of 50 counting wheels each to be available, under instruction, to the mill and other parts of the machine. ‘The wisdom of Babbage can be scen when it is remarked that the minimum adequate storage capacity is today considered to be just about this size. In order to insert data and instructions into the machine Babbage proposed to use a modification of the punched control cards long in use for the weaving of complex designs in the Jacquard loom. In the latter device cards are linked together permanently in sequence which would, of course, prevent rearrangement. Whilst it is true that Babbage did not make explicit mention of the fact that in his machine the cards were not to be connected, it seems clear that such was his intention since he mentioned that stacks of cards are to be inserted into the machine. ‘Thus the punched card operated business machine was foreshadowed in Babbage’s initial work. ‘Next, concerning the mill itself, Babbage realized clearly that in order to have a reasonable speed of arithmetic operation it was necessary that the accumulating units of a machine should have the faculty of recognizing the presence of a chain carry and of jumping from the first to the last stage. Thus, to take a simple example, if 1 be added to 899,999,999, the machine is to recognize the long string of 9's and consequent carries and to liquidate the latter simultaneously whilst adding unity to the 8. Mechanism for this process was designed by Babbage and incorporated in the analytical engine. So far as output is concerned, Babbage projected mechanism whereby the machine would set up a block of type representing the results of its calculations ready for printing. In addition it would check the correctness of the type so set and in this respect it was markedly superior to any machine constructed up to the present. Finally Babbage proposed that his machine should be capable of determining its course of action between several alternatives, in a way not previously known to the human operator. This is the so- called ‘conditional transfer’ of a modern computer and its inclusion in the analytical engine is yet another indication of the genius of its inventor. 12 ‘THE UNIVERSAL MACHINES ‘When Babbage died, in 1871, the analytical engine was still incomplete. His son, Major-General H. P. Babbage, constructed a part of the mill in the years between 1880 and 1910 and at a demonstration this calculated and printed a table of multiples of to 20 decimal places. The 1910 model and some fragments of Babbage’s original mechanism are to be seen in the Science Museum at South Kensington. ‘The logical descendant of Babbage’s analytical engine was not to be constructed for nearly 70 years after his death. In 1937 Howard Aiken of Harvard University began work on an ‘Automatic Sequence Controlled Calculator’ now generally referred to as ‘ASCC’ or Mk. 1. This machine, built with the assistance of the International Business Machine Co., was completed in 1944. In some ways it is a much more modest device than that envisaged by Babbage. It contains 60 constant registers and 72 adding registers compared with the 1,000 planned by Babbage. Units are provided for multiplication and division and also electromechanical tables for logyo +, 10 and sin x. A special device is incorporated for interpolating between tabular values of the above functions, and the main sequencing of the machine is performed by perforated paper tapes. The normal length of the numbers used in the machine is 24 decimal digits. Following the construction of the ASCC the Harvard group commenced in 1945 the construction of a calculator, usually called Mk. 2, in which all arithmeticand transfer operations were performed by means of electromagnetic relays. ‘This machine, completed in 1947, contained 13,000 relays of a special design, The use of the relay, as a substitute for mechanism, made possible a considerable increase in speed, thus the times of operation in Mk. 2 were: Transfer to or from store 33 msec Addition or subtraction 200 ,, Multiplication 700 5, The storage capacity of the machine was 100 numbers each of 10 decimal digits and a sign. Elaborate input and output facilities were provided and output could be typed at the rate of 15 x25 characters per minute, alterna- tively it could be punched on tape, for future use in the machine, atthe rate of 40 x25 per minute. Finally the machine could be split into two complete units and operated independently. Other pioneer work in relay computing was carried out by the Bell laboratories starting in 1938. ‘The first of a series of machines ‘was completed in 1940 and since that time three other models have 13‘THE MECHANICAL ERA been constructed. ‘These computers were designed for fire control applications, but in 1944 a general purpose machine was built. ‘Two models of this computer were constructed; and each used about 9,000 telephone relays and a large number of teletype units. Decimal numbers coded in bi-quinary scale were used in the machines (in this scale digits 0-4 and 5 are available and each deci- mal digit appears as the closure of only two of the available relays thus allowing a simple check to be made), the numbers had 7 decimal digit precision together with a sign, and the machine was the first to use floating point notation. Forty-four storage registers were available in relay form and arithmetic facilities for the more usual operations were provided. ‘Times of operation were: Addition or subtraction 0-3 sec ‘Multiplication 10 ,, Division 22 5, Square root 43 A particular advantage of this machine lay in the extensive checking facilities built into it which enabled long problems to be run unattended. Two of the Bell Laboratory relay machines were installed at the Ballistic Research Laboratories, Aberdeen Proving Ground. These machines operated until 1955, when they were sent to Fort Bliss, Texas, and later presented to the University of ‘Texas. Commercially available relay calculators were marketed by the International Business Machine Co., under the name Pluggable Sequence Relay Calculators. ‘This machine followed closely the standard desi for LBM. equipment, it had 36 storage registers of 6 decimal capacity. Arithmetic operations and times were: Addition or subtraction _25 msec Multiplication 900 5, Division 1200 A particular advantage of this machine lay in its use of punched cards for inputfoutput which provided great flexibility and also a speed well matched to the internal speed of the machine. ‘Other large scale relay or electromechanical computers were the BARK in Stockholm, the Zése computer and The Imperial College Computing Engine. In 1947 a study was made by the present authors of the possibility of constructing general purpose computers of much greater sim- plicity than those either available or projected. This work cul- minated in the design and construction of the Automatic Relay 14 ‘THE UNIVERSAL MACHINES Computer (ARC). This had, in its initial form, storage for 256 numbers on a magnetic drum and in consequence should really find its place in the next chapter; however, the magnetic drum store was replaced by an extremely compact clectromechanical store for 50 numbers together with a pluggable sequence unit for 300 instruc- tions so that it can be properly described here. ‘The machine operated in true binary scale with numbers of 21 binary digit precision (5 decimal). Operating times were: Transfer, addition or subtraction 20 msec Multiplication or division 1000 ,, Input and output were on standard teletype equipment with an auxiliary keyboard for test operation. ‘The notable feature of the machine lay in the fact that it used only 800 single-contact high speed relays; a number which could be further reduced by using multi-contact relays. The relatively high speed of the machine was attained by parallel operation and the accumulator had chain carry facilities of the type envisaged by Babbage. A particular difference between this machine and its contemporaries lay in its use of binary scale throughout, conversion being programmed to and from the decimal output and input devices. ‘A second machine, the ARRA originally based on the ARC design, was constructed in the Mathematical Centre, Amsterdam.3 THE ADVENT OF ELECTRONIC TECHNIQUES Wun the technical developments of the radio industry had made possible the large scale production of wireless valves, the way was open for the application of these devices to the construction of computing machinery. Itis surprising, in retrospect, that the step was so long in coming, since the characteristics required of valves in computing machine use are far less complex than those needed for wireless telephony. ‘The key electronic discovery (after that of the three electrode valve) was made as long ago as 1919, when Eccles and Jordan showed how a pair of triode valves could be connected to form a circuit having two stable states. At any time, from this date on- ward, a computer of modern type could have been constructed. In case the cognoscenti should argue that the problem of storage had not been solved, it should be pointed out that notwithstanding the absence of the cathode ray tube and the mercury delay line from the field of available devices, the Poulsen magnetic recorder had been in existence for nearly 25 years and the basic suggestion of magnetic data storage had been made by Oberlin Smith in 1888. ‘The computational problems which might form the spur to the development of an electronic computing machine had existed for nearly a century in the astronomical field, and were in active re- quest by the Quantum Chemists of the 1930s. Despite the presence of all these favourable factors, it was not until the early 1940s that serious consideration was given to the engineering problem of constructing an electronic calculator and, in fact, it is not too much to say that the 1940s have been the era of electronics in their wider sense, and as distinct from wireless applications. SPECIAL PURPOSE DIGITAL COMPUTATION Under the stress of war with its need for extensive ballistic tables, the U.S. War Department sponsored the development of a special purpose electronic computer for these calculations. This machine, 16 SPECIAL PURPOSE DIGITAL COMPUTATION called the ‘Electronic Numerical Integrator and Calculator’ (ENIAC), was designed by Eckert and Mauchley and constructed at the Moore School of Engineering, Philadelphia. After a public disclosure in 1946 the machine was moved to the Ballistic Research Laboratory, Aberdeen, Maryland, where it was operated from 1947 to 1955. The machine was then retired and pieces of it are on loan to various museums. Although primarily designed for projectile calculation, it was soon realized that ENIAC could be used for a wide variety of other calculations of a general character, and to this extent it is perhaps unfair to class the machine as special purpose. Nevertheless, the basic design of ENIAG lacks many of those characteristics foreseen by Babbage, and its use in any particular problem requires a mathematical four de force so that the classifi- cation seems fair. ENIAC was constructed without regard for space and cost; it contained some 18,000 valves, consumed 100 kW of electric power and occupied a room over 100 ft. in length. ‘The machine was provided with a plugging system so that the various units could be connected together and sequenced to suit the particular problem to be solved. This interconnection process was very tedious but was replaced, to some extent, by the use of a function table (vide Chapter 11) for sequencing in a way suggested by von Neumann, Decimal scale was used throughout and 20 accumulators were provided, each capable of holding a 10 decimal number and its sign. ‘Typical operating times of the machine were: ‘Addition and subtraction 200 psec Multiplication 2,300 ,, and units were provided for division and extraction of the square root. It was also possible to store functional values required in the course of a calculation; these were set by hand on resistance matrix function tables which could, as mentioned above, also be used for easy insertion of the programme. Input and output to ENIAC were by way of standard punched card equipment and, in view of the limited internal storage of the computer, formed the chief limitation on its speed of operation. In the years following its construction, ENIAC was used for the solution of a very wide range of problems notable among which were the solution of partial differential equations, and the calcula tion of the values of 2 and ¢ to 2,000 decimal places. Despite its undoubted limitations and design complexity, ENIAC marked, perhaps, the most important single step in the history of applied 2-AD.c, 17THE ADVENT OF ELECTRONIC TECHNIQUES mathematics, and it provided the encouragement and backing for the more versatile machines described in the next section. GENERAL PURPOSE ELECTRONIC DIGITAL CALCULATORS Charles Babbage clearly foresaw the need for a large storage capacity to be available in a general purpose calculator. When ENIAC was under construction, von Neumann and his co-workers devoted considerable attention to the problem of the optimum form of a calculating machine. As a result of this it was shown that a cal- culator should have a storage capacity of the order of 4,096 words and that, given this, both operating instructions and pure numbers could be stored in thesame unit. ‘The way in which this is achieved is simple; each instruction contains (or implies) the position in the store not only of the numbers upon which operations are to be performed, but also of the next instruction, Thus if the machine is started in a position known to contain an instruction, it can select, in the correct sequence, those words which are really instructions (as distinct from pure numbers) from the mass of numerical data held in the store. The parenthetical ‘implies’ given above refers to an alternative mode of operation in which instructions are stored in consecutive positions so that a simple counting process can be used to locate them when the starting position is known. Means must be provided for jumping out of sequence either unconditionally or in the light of some criterion, but both of the above schemes are readily extended to meet this need. The storage capacity of 4,096 words mentioned above, posed by itself a considerable problem. Each word must consist of a number of digits and it was shown that an appropriate length was between six and twelve decimals. Furthermore, to make adequate use of the high intrinsic speed of the electronic valve, it was desirable that the storage device used should be able to emit data, after request, in a time of the order of a few millionths of a second, and should be capable of absorbing it at the same rate. Even at the present time this desideratum has not been fully met, but in the mid 1940s the only device which seemed capable of operation at the required speed was the mercury acoustic delay line. The delay line will be considered in detail in Chapter 12, it suffices to say here, that if a number can be represented by a set of impulses, spaced out in time, it can, in principle, be stored by sending these impulses into some medium which will delay them (without alteration) and re-emit them at a later time. If the head and tail of such a device are connected together, data, once inserted, will circulate 18 GENERAL PURPOSE ELECTRONIC DIGITAL CALCULATORS indefinitely; but it should be noted that, on the average, a waiting period of the order of one-half of the total delay time is needed before a word can be read from or written in an arbitrary position. ‘The original proposals of von Neumann led to the design of an electronic general purpose computer—the Electronic Discrete Variable Automatic Computer or EDVAG, which used the sonic delay properties of mercury as a store and employed only about 3,500 valves. This machine, projected in 1941 at the Moore School, was only completed in the early 1950s: it suggested, how- ever, two other projects which produced more rapid results. The first of these was the Electronic Delayed Storage Automatic Com- puter or EDSAC, which was completed at the Mathematical Laboratory of the University of Cambridge in 1949. This machine had a storage capacity, in mercury delay lines, of 512 words each having $4 binary digits; it employed some 3,000 valves. Facilities ‘were provided for operating on words of only 17 binary digit preci- sion and, in this mode, the addition/subtraction time was about 34 usec. For full length numbers addition or subtraction needed eee 70 sec and for multiplication about 8-5 msec were required, The EDVAC ‘was maintained at Aberdeen Proving Ground until March 1963 when it was scrapped. ‘The second project for a high speed electronic computing machine using delay line storage was initiated, in 1945, at the National Physical Laboratory, London, under the direction of Womersley, Turing and Colebrook. The Automatic Calculating Engine, or ACE, was completed in 1950, it had a storage capacity of 512 words of 32 binary digits. Addition and subtraction took 32 ysec and multiplication required about one msec. Input and output were via standard punched card equipment. The ACE was particularly well designed, it employed less than 1,000 valves and was compact in structure, this simplicity resulted in a reliability of operation which was probably unequalled in its time (1952). It should be stated that what has been described above as the AGE was, in reality, only a pilot model for a much larger machine of the same name, this was constructed in the late 1950s, by which time the DEUCE, a commercial version of ACE (PILOT), had proved its value. Both the EDVAC and the EDSAC operated in the mode in which instructions are placed in consecutive positions in the store; the ACE (pilot), however, adopted the so-called ‘two code” in which each instruction contains, not only the location of the number to be operated upon, but also that of the next instruction. This procedure allows the use of optimum 19THE ADVENT OF ELECTRONIC TECHNIQUES programming techniques (see Chapter 13) to reduce the waiting time inherent in delay line storage devices. Several other machines were constructed on the basis of the acoustic delay line store. Notable among these was the Bureau of Standards Eastern Automatic Computer, or SEAG, at Washington, which made extensive use of semi-conducting devices as replace- ments for thermionic valves, and was designed to accept newer forms of storage device than the delay line when these became avail- able. The characteristics of SEAC are roughly the same as those of ACE; it was first used on problems in 1951. Another machine of similar type, but working in the decimal scale, was the UNIVAC. This machine was constructed for the U.S. Bureau of Census by Eckert and Mauchley, builders of the ENIAC; it was notable as being one of the first machines to use magnetic tape as an input~ output medium and has led to a succession of commercially available UNIVAC systems, As an interesting aside it may be remarked that the UNIVAC was used to predict, from small sample analysis, the results of the 1952 American Presidential Election with, it may be stated, complete accuracy! Following the initial projects for the construction of computers based upon the storage of data in serial form, in sonic delay lines, there was a period devoted to the consideration of alternative forms of storage device and of the optimum logical design for the machines themselves. On the logical side, Burks, Goldstine and von Neu- mann, at Princeton, examined the necessary components and best form of code for amachine. In asset of now classical reports starting in 1946, the foundations were laid for the design of most of the best computers available today. The Princeton group projected the construction of a machine working in parallel, binary mode and depending for its data storage upon a device known as the ‘Selectron’ for the high speed clement, and upon magnetic wire for the input and output. Eventually the Selectron was abandoned in favour of a somewhat simpler—though slower—form of storage, and the input/output device replaced by the now usual punched paper tape ‘The Institute for Advanced Study computer was brought into service in March 1952, it operated on words of 40 binary digits used in parallel; internal storage was on a cathode ray tube system and had 1,024 word capacity; addition and subtraction took approximately 10 usec and multiplication required 300 sec. This machine was (taking account of the large word length) the fastest in operation in its day; the punched paper tape input-output system constituting the bottleneck since nearly 20 min were required to fill or empty the high speed store from this medium. 20 Plate 1. The Institute for Advanced Study Computer, Princeton Te fae p20GENERAL PURPOSE ELECTRONIC DIGITAL CALCULATORS Mention has been made of the Selectron and of cathode ray tube storage. These made use of certain secondary emission properties of dielectric surfaces when bombarded by an electron beam and a more detailed description must await Chapter 12; they were trouble- some to maintain and unreliable in operation and have long since passed from the computer scene. ‘Two main applications of cathode ray tube storage were made. ‘The first at the Servomechanisms Laboratory of the Massachussetts Institute of Technology, where a very fast computer, the Whirlwind, < was built under the direction of J. Forrester. ‘This machine used a cathode ray tube store of a type devised by Forrester, which required two sources of electrons in the tube; the Whirlwind had storage for over 1,000 words, each of 16 binary digits, it employed 6,000 valves and was capable of performing addition and subtraction in 5 usec. Multiplication required 40 usec. Input and output were normally via punched paper tape and teletype, but an elegant device was provided which enabled the machine to display its output, in graphical form, on the face of a large cathode ray tube where it could be inspected visually, or recorded photographically; such cathode ray tube displays now form a part of almost all large computer systems. The second main type of cathode ray tube storage was that developed at the University of Manchester, England. In this system (see Chapter 12) standard cathode ray tubes were used. A ‘computer based on this system was constructed by Ferranti Limited, it was considerably slower than the Whirlwind. Storage for 256 words of 40 binary digit precision was provided, addition and sub- traction required 1-2 msec and multiplication more than 3 msec. ‘Three thousand valves, in addition to the cathode ray tubes, were used. Input was via punched paper tape read photo-electrically, and output was toa teletyper. An intermediate store was provided ona magnetic drum, Other machines, using the cathode ray tube store in some form, were those at the Telecommunications Research Establishment (TRE), Malvern, England, at the Institute for Numerical Analysis, California, U.S.A. (SWAG) and at the University of Illinois, U.S.A. (ORDVAG). The third form of storage device made use of the magnetic remanence of ferromagnetic materials. The first system of this type to be used in a computing machine was constructed by the Present authors in 1947. This employed a nickel-plated cylinder which rotated at high speed and was arranged with reading and recording heads to enable binary data to be recorded in the form of magnetized elements on its surface. The first fully electronic 21THE ADVENT OF ELECTRONIC TECHNIQUES machine constructed with storage on this plan was the prototype Simple Electronic Computer (SEC) at the Electronic Computation Laboratory of Birkbeck College, University of London. By very careful logical design this machine employed only 230 valves to give a storage of 256 words of 21 binary digit precision, addition and subtraction required 1-6 msec; in view of the experimental nature of the machine no multiplier was provided. A notable feature of SEC was the use of a two-address code, which enabled optimum coding techniques to be used to reduce the waiting time inherent in a cyclic storage device. Following the operation of SEC, several All Purpose Electronic Computers were constructed on the same lines (the letters in parentheses are used to specify the agency for whom the machine was constructed). So far, eight types of machine have been built: APE(X)C—For Birkbeck College, London. APE(N)C—For the Board of Mathematical Machines, Oslo, Norway. APE(H)C—For the British Tabulating Machine Company. APE(R)C—For the British Rayon Research Association. UCC—For University College, London. MAC—(Magnetic Automatic Calculator) built by Wharf Engineering Laboratories. M.2—An engineered version of MAC. M.3—In the University of Saskatchewan. The first two machines had storage for 1,024 words of 32 binary digits and utilized about 420 valves. Addition and subtraction required about 600 see, and multiplication took up to 20 msec. Input and output devices ranged from teletype equipment on APE(R)C and APE(N)C to punched-card card machines for APE(X)C and APE(H)C. UCC is of the same general type as the other APE( )C machines but is provided with drum storage for 8,192 words, MAC also follows the same general pattern except that, by the use of some 200 germanium diodes, the number of thermionic valves has been reduced to about 220. The British ‘Tabulating Machine Company produced two series of machines of the same general type, known as HEC 2M and HEC 4. A number of M.2 type machines were constructed and most had storage capaci- ties of 8,192 words ona magnetic drum. ‘The M.2 differed from the MAC in having a simple form of automatic divider, ‘The M.3 machine is an all solid state computer constructed at the University of Saskatchewan, It has fully automatic multiplication 22 GENERAL PURPOSE ELECTRONIC DIGITAL CALCULATORS and division facilities for binary numbers of arbitrary sign and has provision for the reception, and emission of analogue signals. Several other machines using magnetic drum storage were con- structed; notable among these were the Mk. 3 and Mk. 4 Calcula- tors at the Computation Laboratory, Harvard, the Engineering Research Associates ERA 1101 Calculator, the University of California CALDIC, and the Circle Computer at New York University. ‘The mid 1950s constituted a period of transition in the history of the computing machine. Many machines were built and these exploited a number of techniques for storage and logic. As far as storage was concerned, the cathode ray tube was definitely aban- doned, the ultra sonic delay line metamorphosed into the magneto- strictive delay line, which was used in such machines as the Ferranti Pegasus. ‘The magnetic drum retained its place but re tired to a secondary position in the storage hierarchy in favour of magnetic cores, A large number of commercial organizations em- barked on the manufacture of computers; for example, in the United Kingdom Associated Electrical Industries, Elliott Automation, E.M.I. Electronics, The English Electric Company, Ferranti Limited, International Computers and Tabulators Limited, Leo Computers Limited and Standard Telephones and Cables Limited. On the continent of Europe the Zuse Organization, Siemens, and Les Machines Bull together with the Olivetti organization in Italy, developed and produced a number of computing machines. In the United States an enormous development of manufacturing in this field has taken place, and at one time a count of over 50 distinct firms claiming to manufacture computing systems could be made. The early 1960s have constituted a period of consolidation and ab- sorption. In the United Kingdom Powers Samas, E.M.I., and Ferranti have become one with I.C.T., whilst in the United States the major effort has settled down with firms like I.B.M., Remington Rand, Burroughs, and Honeywell all occupying the major places. With regard to machines of the 1960s, these fall into three distinct ranges. In the first, relatively low speed machines, often employing either magnetic drums or magnetic core storage systems, are now produced for a sufficiently low cost to make them available to small firms and to individual university departments. In the medium speed and size range the storage organs of current machines are almost invariably completely fabricated from magnetic cores. The same remark applies to the ultra high speed machines, of which per- haps two outstanding examples require mention; the IBM Stretch 2 system, and the I.C.T, Atlas. In the latter machines the emphasis, 23THE ADVENT OF ELECTRONIC TECHNIQUES is on achieving the ultimate speed with practically no regard to cost ‘or complexity. Core stores have been developed in which more than one core is used for each bit stored, and speeds of access to these units have been increased so that about $ usec is all that is needed to recover and recycle a word from storage. The arithmetic and control sections of machines have been com- pletely revolutionized technologically during the past 5 years, and the hot thermionic valve has been entirely replaced by the transistor and the semiconductor diode, Whilst magnetic cores have found an important place in the main storage unit of the machine, mag- netic core logic, which seemed to have promise in the mid 1950s, has in the event found no part in any existing machine and seems likely to fade from the picture. On the technological horizon at the present time are the magnetic thin film store, which potentially at least, should increase speed of access to about 10 mysec, that is to say about 50 times as fast as with present devices; and the tunnel diode and field effect transistor which should have a similar impact upon the arithmetic speeds of the machine. Of perhaps slightly more remote potential and promise, is the science of cryogenics and numerous attractive storage mechanisms have been produced using thin film cryogenic circuitry. These appear to have the merit of low cost and relatively fast access, that is to say, from 75 to 1 usec. ‘They have great freedom from noise and therefore larger units can be constructed than is possible with magnetic cores. In addition to these virtues, the cryogenic store has the possibility of being con- structed to make possible associative action. That is, for the store to have the property of being able to answer the question as to whether information is or is not contained in it without, in fact, locating that information precisely. 24 4 THE OVERALL DESIGN OF A COMPUTING SYSTEM ‘Wuarever type of computing machine is projected, so long as it is to have the attribute of universality, it must necessarily have in its structure some component capable of performing at least the most elementary operation of arithmetic—subtraction. It is not necessary that any more complex operation, for example, multiplication, be provided as an automatic function, although it appears that if the machine is to be reasonably fast and not to make excessive demands on the capacity of its storage elements, the provision of at least some additional arithmetic functions is desirable. Broadly speaking, then, the computing system of an all-purpose computer can be likened to an ordinary desk calculating machine of any well-known type, and it is instructive to consider a few statistics in connection with the latter variety of device. In the first place, for automatic models, the time of an addition is of the order of 0-5 sec and that for multiplication about 10 sec. Now an analysis of the time schedules of a large number of fairly complex computations shows that for each operation of the machine about 50 sec are spent in referring to numbers and computational formulae on sheets of paper and in inscribing interim results on other sheets. It therefore follows that, even if additions were relatively few compared with multiplications, the machine could not be working more than about one-sixth of the available computing time, and in general a much smaller duty cycle will prevail. These observations make it clear that little or nothing is to be gained by increasing the speed of the arithmetic unit, as the com- puting part of the machine will be called, unless such an increase can be coupled with an increased speed of using the unit and of recording its data. Taking account of the fact that with relatively ‘unsophisticated electronic techniques, addition times of 5-10 sec and multiplication times of 100-1000 psec are possible, it becomes evident that some electronic equivalents of the pencil and paper and also of the computing sequence are necessary. ‘These units are 25THE OVERALL DESIGN OF A COMPUTING SYSTEM usually called the ‘Memory’ and the ‘Control,’ and in the next sections their characteristics will be briefly discussed. ‘THE MEMORY This, as explained above, is a high speed equivalent of the pencil and paper used by a human computer. Clearly it must have at least two functions, (1) Data must be inscribable in it (‘writing’). (2) It must be capable of emitting inscribed data when required (‘reading’). Furthermore, since many computations can be reduced to iterative processes, it is most desirable that it should be possible to erase data recorded in any given memory location and to replace them by new material. With some storage devices, a more or less long time elapses be- tween the receipt of an order to ‘read’ or ‘write’ and its execution by thesystem, This delay is called the ‘access time’ of the memory, and for typical units varies from 1 psec to 10 msec. Considering next the computing sequence itself, it is evident that, unless some particular sequence is to be built into the fabric of the machine, which is contrary to the postulate of universality made at the start of this chapter, some memory must be provided for the instructions or ‘orders.’ It would, of course, be possible to provide a separate memory for this purpose, but it will now be shown that such a procedure is illogical and results in wastage of components. To do this it is merely necessary to remark that most computations fall into one of two classes; in the first, a large number of operations are to be applied to a relatively few numerical quantities and the results of the calculations are to be few in number; in the second, few instructions suffice for the disposal of a large stock of data. ‘As examples may be mentioned the solution of some types of ordinary differential equation and the evaluation of the sums of squares and products of observed data, these problems being of the first and second types respectively. Whence, a machine would, to be of universal application, require to have two large memories, one of which would usually be only partially filled. The question thus naturally arises, can one unit be used for both functions? The answer is yes, and it is easy to see how to achieve this objective; one solution would be to affix to the groups of digits representing orders, some extra digit to distinguish them from pure numbers. This, 26 THE MEMORY however, would be wasteful of memory capacity and is unnecessary since another more satisfactory procedure is available. In general, the orders required to perform a given calculation will follow one another in an orderly sequence, only rarely (relatively) will it be necessary to jump over portions of the table or to reiterate the procedure. This means that if orders are stored in sequence in the memory, the control can select them by a process of counting as soon as it knows the location of the start of the sequence. Simi- larly, it can jump to other positions containing orders if the last instruction in any sequence always makes a reference to the location of the start of the next. Thus, all that is necessary, is to have the machine, on being switched on, refer to memory location 1 and to arrange that an order is always recorded there. ‘Two courses are then possible, either the control may contain a counter, which is advanced one position on receipt of a signal that an order has been executed, and whose contents then give the memory location of the next order (except of course when the control ‘jumps’ out of sequence, in which case the contents of the counter are exchanged bodily to record the new position), or each order contains a record of the memory location in which the next order is to be found. ‘The latter procedure is very flexible and leads to numerous useful ‘dodges’ but has the disadvantage of wasting valuable memory space to record these extra locations. : Storage devices can be divided into two main classes—serial and parallel. In the former, the digits of a stored number become available one at a time, usually (although not necessarily) starting from the least t, in the latter all the digits of a number become available simultaneously. . ‘An intermediate form of operation can be described as serio parallel. ‘To illustrate this, consider the following example. The decimal number 981 has the binary equivalent: 1111010101. Ina serial machine the digits would arrive in the sequence: 1 least significant digit is first to arrive 0 1 0 1 0 1 1 1 1 most significant digit is last to arrive 27THE OVERALL DESIGN OF A COMPUTING SYSTEM whilst, in a parallel machine, all would arrive simultaneously: 1111010101. A serio-parallel machine, working in the binary coded decimal mode, would transfer and receive digits in the sequence: 0001 (coded form of 1) first group to arrive 1000 (coded form of 8) second group to arrive 1001 (coded form of 9) last group to arrive ‘The advantage of a serio-parallel machine which uses binary coded decimal representation lies in the fact that conversion facilities to and from normal decimal notation are simple. ‘The system is used in many machines whose prime objective is commercial data pro- cessing where much communication with the. outside world is accompanied by relatively little actual calculation. In such appli- cations the time of conversion to and from true binary scale could easily exceed that needed for the actual arithmetic. ‘The organization of the remainder of the machine, and especially of the arithmetic unit, depends to a very large extent upon the particular class to which the memory belongs. For example, when all digits of a number appear simultancously it is clearly desirable and proper to operate with them as a group in performing an addition. Not so, however, for serial operation since in this case the digital pattern would first have to be transferred to some form of parallel storage device and this operation followed by another distinct operation commanding addition as a group; but it is clear that if the sum is formed one digit at a time as the number appears from the memory, the whole process will be complete as soon as the read out operation terminates, thus saving the extra operation mentioned above. In practice, it is sometimes necessary to deviate from this strictly logical design principle since, for certain types of serial storage device, the access time may be so great as to make multiplication a prohibitively slow operation if performed in a strictly serial manner. This subject will be taken up in greater detail in Chapter 6 when discussing the organization of the arithmetic unit. ‘THE CONTROL Some idea of the nature of the control will have been gathered from the discussion of the mode of storage of orders in the memory, the constituent parts of this important organ will now be enumerated. Since the control must be capable of receiving the coded order from the memory and storing it during the execution process, which will 28 ‘THE CONTROL, generally involve the separate use of the memory itself, it is evi- dently necessary to have at least one storage device in the control unit. This is called the ‘control register.’ The fact that the control may also contain a counter has already been mentioned. ‘This must be interconnected with the control register in such a way that on receipt of an instruction of the form: ‘Jump to the order located in memory position (2)’ the contents of the counter can be modified so as to read (x). In practice, as will be seen in Chapter 5, it may be more convenient to have a complete adder instead of a counter; this will count in the ordinary manner if impulses are applied to its units position, but can be changed to read (x) by the simple process of adding (x-c) into it, (c) being its contents before the addition takes place. In order to store instructions in the memory, it is necessary that they be expressed in some coded numerical form. Thus certain digits out of the group comprising a complete order will specify Figure 4.1. Block diagram of complete machine the memory location in which the relevant data are to be found, whilst others will comprise the instruction to the elements of the machine regarding the required operation on the data. This last group, consisting initially of digits, must be necessarily translated in electrical impulses to actuate the machine. This process is called “decoding” and the control must contain a unit to perform this function; it is called the ‘decoder.’ Apart from switch or ‘gate’ elements, the foregoing are the principal components of the control so that Figure 4.1 gives an outline of the structure of a typi- cal machine. It is to be noted that the elements which direct the arithmetic unit in its special functions are not included in the control described here. They are assumed to be included in the 29‘THE OVERALL DESIGN OF A COMPUTING SYSTEM arithmetic unit itself and are called the ‘local control.” A descrip- tion will be found in Chapter 6. ‘THE TERMINAL ORGANS Finally it is obviously necessary to be able to insert data into the machine and also for the machine to communicate the results of its calculations to the operator. These functions are performed by two “terminal organs’ called respectively, the ‘Input’ (I) and the “Output” (0). 5 THE CONTROL Ir mas been seen in the preceding chapter that the control of an all-purpose computing machine may have at least three distinct functional units, register, counter and decoder. The next stage is to examine the manner in which these are effective in ordering the operations of the machine. It is difficult to be completely general in describing the unit, since its structure and operation depend to some extent on the nature of the memory and of the arithmetic unit, but it is hoped that the outline given will be sufficient to make evident the mode of operation in any particular case. ‘THE ORDERS Before entering upon any description of the control itself, it is necessary to have some idea of the types of order which require execution, and of the way in which these are represented in numerical coded form. Briefly speaking, in binary code a typical order would appear as follows: 10010 10000 10100 11110 01100 a 6 ¢ d € Groups a and 6 together give the location of the memory position from which it is desired to extract (or to which it is desired to send) data. Group ¢ gives, in coded form, the operation which it is re- quired to perform; and in a certain type of computer, d and emight contain the memory location of the position in which the next instruction is to be found, although, for this type of machine, no control counter would be required. Thus the code shown above would mean: Add into the accumulator —_c ie. 10100 (20) the absolute value of the number contained in memory position 592 aand b, i.e. 10010, 10000( = 592) 31THE CONTROL ; then start to locate the next order which is to be found ion 972 (i.e. d and e=11110, 01100 =972). In general the orders to be executed by the machine can be divided into six main types. (1) Involving operations in the arithmetic unit only with no reference to a number stored in the memory. For example, shifts and transfers of numbers. (2) Arithmetic operations involving transfer of data from the memory to the arithmetic unit. Such as addition, sub- traction, multiplication and division. (3) Transfers of numbers from the arithmetic unit to the memory. (4) Transfers of the control, to new routines, located outside the main sequence, or within that sequence. Such transfers not involving the use of any data not contained in the instruction itself (5) Conditional transfers of the control out of sequence of the type: if the number N (located in the arithmetic unit) is >0 proceed in sequence with the orders but if <0 jump to the order located in memory location (x) and proceed in sequence from there. (6) Orders involving the terminal organs (input/output). It will be seen, later, that the control described in this chapter is capable of executing all instructions of these types. ‘THE, DECODER Since the operation to be performed is initially represented by the state of certain elements (electronic ‘flip-flops’ or electromagnetic relays) which themselves represent a number, it is evidently neces- sary to have some means of translating this information into action on the part of the machine. For many machines the total number of distinct operations, which can be performed, is less than 32. This means that, if each opera- tion is given a code number, not more than 32 such code numbers will be required and, in binary scale, five places will be required. ‘Thus a device is required which has 5 inputs and 32 outputs and works in such a manner that for each combination of the inputs there exists a unique live member of the 32 outputs. Furthermore, 32 ON NOTATION since several operations will have various sub-operations in com- mon, it is clearly desirable that mechanism exist for having some of the 32 outputs operate the same sub-operations without the possi- bility of internal feedback in the system. ‘These functions are performed by the decoder, which is seen to consist of two parts. (1) A ‘many-one’ function table. (2) A ‘one-many’ function table. ‘This is shown schematically in Figure 5.1, and further details of this unit are given in Chapter 11. a =; fo rtions, stops | tery sa rit nd | One Fetter arabian | "a" | Boda wot | many | any conbinatn possible —| table | et D hime able possi Fe Figure 5.1. Decoder ‘THE CONTROL COUNTER Little need be said of this unit, it can take two forms according to the way in which the particular machine operates. In the first it is a straightforward counter which can be zeroed and reset to any required contents by simultaneous application of these to each of its stages; in the second form it consists of a complete parallel adder, that is, it can form and store the sum of the number which it already contains and any incident number. ‘THE CONTROL REGISTER ‘This is a simple unit having as many stages as there are digits in the standard length word stored in the memory. It must be capable of receiving such words from the memory and of storing them for as. long as required. It must also be capable of connection with the various operational units of the control itself (e.g. the decoder and the counter). ON NOTATION In order to make possible the drawing of simple schematics for the workings of the machine, it is convenient to have certain goAD.C. 33THE CONTROL ‘shorthand’ notations for the various components, To describe the control the following prove convenient: GC. | =Control counter = Decoder =Control register [az | =Memory AU, = Arithmetic unit =A gate whereby an output is produced only if simultaneous inputs occur on each of the n inputs. = An inhibitory gate in which an input on a pre- vents the passage of an input on 5 to the output, ¢. se =The input to a functional unit having n channels. Al =The output from a functional unit having channels. =An n channel input (1) which is such that it affects the functional unit only on receipt of a gating pulse on the input g. =A delay. Usually inserted to enable some operation to be completed prior to the commencement of the next. =A binary clement. An input on a causes the state to change so that the output at ¢ is suitable to operate a gate, Similarly, an input on 6 causes a change of state such that the output at d can operate a gate. Under suitable circuit conditions simultaneous in- puts on a and b cause the element to change its state. =An auxiliary register which stores the location of the position from which the memory is required to read data. 34 AN ACTUAL CONTROL SCHEMATIC ‘THE MEMORY Before describing the particular control circuit selected for dis- cussion, it is necessary to say a few words about the memory itself, since the mode of operation of this unit influences the structure of the control. Memories can be of two general types, parallel and serial. In the former all the digits of a number become available simul- taneously, whilst in the latter they arrive one at a time starting from the least significant. In both types there is in general a more or less great delay before the emission of the data begins. For the purposes of the following description it will be assumed that the memory has the following characteristics. (1) Capacity for 1024 words each of 32 binary digits. (2) Is of serial type. (8) Emits data pulses continuously. (4) Emits a group of 32 clock pulses coincident with the required data which can be used to ‘gate’ the output data pulses to the appropriate receptor. (5) Emits an operation complete pulse after the data markers have all been transmitted. The record operation is effected by using the 32 gating pulses, emitted at the correct word location, to cause the data stored in the arithmetic unit to be shifted digit by digit to the right, at the same time recording the value of the previous right-hand digit in the memory. AN ACTUAL CONTROL SCHEMATIC. In Figure 5.2 is shown the control schematic for a typical all-purpose electronic computing machine and it will now be explained how this operates to guide the machine in each type of order specified on p. 32, First it will be assumed that a group of order digits is just appear- ing at the digit output of M. and that the binary clement B. is set so that the gate g; is open and the train of 32 clock pulses passes through to C.R. ‘These pulses cause the contents of C.R. to shift progressively to the right and, at each stage, one of the incident digits from M. is absorbed. When the whole 32 have appeared these will be stored in C.R. and the memory emits an operation com- plete pulse which is incident upon the right-hand input of the binary element and causes a state change so that g; closes and gp opens, At the same time the state change at the right-hand output of B. is 35THE CONTROL Figure 5.3. Schematic of two-address controt 36 AN AGTUAL CONTROL SCHEMATIC used to generate a pulse, which is emitted via line a and which causes the transfer of the 10 memory location digits contained in C.R. to the memory location register M.L.; also, after a delay to enable the decoder to settle down on the contents of C.R., a gating pulse is applied to the 32 functional outputs of D.C. and also to the gate gs which is concerned with absolute transfers of control. At this stage several courses of action are possible and will be considered in the order specified on p. 32. (1) Orders not involving the memory. Here the gate pulse applied to the 32 functional outputs of D.C. actuates the par- ticular sequence line in 4.U. 4.U. performs its operation and then emits an operation complete pulse. This operation complete pulse advances the control counter one step ia line 6 and then, after a delay A to allow C.C. to settle down, causes M.L. to absorb the position recorded by C.C. via lines cand d. At the same time the binary element is sent into its other state (via c) and the memory is instructed to emit the order located in the position shown by ML. (via c after a delay A to allow the binary element and the associated gate tofunction). When the memory has reached the appropriate position the clock digits are emitted and pass via g: to repeat the operations already specified. (2) Arithmetic orders involving transfer from M. The gate pulse applied to the 32 functional outputs of D.C. acts as before and the arithmetic unit organizes itself to execute the required order. When it is ready it emits a ‘read’ pulse via f to the memory. The memory when ready emits 32 clock pulses at the given word, these pass, via g, (because the binary element is now in the appropriate state), to the arithmetic unit which receives the incident digits and performs the required operation on them. When this is finished an operation complete pulse is emitted by M. and A.U. which initiates exactly the same cycle as enumerated in (1). (3) ‘Transfers from the arithmetic unit to the memory. Here, as in (2), the arithmetic unit prepares itself for operation and then emits a ‘record’ pulse via h which causes the memory to emit 32 clock pulses as before, these cause data to be shifted out of 4.U. via k to M., which now absorbs them in the given position. When the cycle is ended, M. emits its operation complete pulse which sends the binary clement to its other state and also causes 4.U. to emit an operation complete pulse ofits own. After this the cycle proceeds as in (1) and (2). (4) Transfers of the control. In this operation a pulse is 37THE CONTROL emitted by D.C. via gy, this passes via J to gate the new memory location, as contained in the control register, into the control counter which then contains the new data. After a delay A, to enable C.C. to settle down, a pulse passes via ¢ and initiates the read out operation for the new order exactly as above. (8) Conditional transfers of control. ‘These depend on the sign of a certain number contained in 4.U. ‘Thus the decoder emits a pulse to 4.U. which then emits a standard operation complete pulse if the number is >0 but emits a pulse on m if it is<0. In the first case the ensuing cycle is exactly the same as follows a standard arithmetic operation of the types described in (1), (2), (8). In the second the cycle is identical with (4). (6) Input/output orders. If it is imagined that the input/ output equipment is in 4.U. the operation in this case is identi- cal with that described in (1), (2), or (3). OTHER TYPES OF CONTROL The differences which result from the substitution of a different sort of memory or arithmetic unit are more or less trivial. If a parallel operation memory is used the only change will be that, instead of M. emitting 32 clock pulses, it will emit only one which will simultaneously gate all the digit outputs to the appropriate receptors, this means that k, 0 and p will become 32 digit channels (or, in general, n digit channels). Similarly, if each order contains the memory location of the next, the only effect will be to eliminate C.C,, the pulses on 6 and d become one and gate C.R, directly toM.L. Another set of separate outputs from C.R, will be required for the location digits in con- ditional transfer operations, these will go directly to M.L. and will be gated by the pulse on /, This is shown in Figure 5.3. When the same routine is to be used several times upon different parameters it is convenient to have available some means of auto- matically altering the appropriate instructions. Thus, suppose that it is required to calculate f(x) for a range of values of the parameter (x) which are stored in a sequence of locations starting from (m,). The computing routine will necessarily contain at least two orders which must be altered for each function value calculated: the first to obtain the value (x) from the position in which it is stored and the second to dispose of the function value when it has been calculated. It is, of course, trivial to alter the appropriate instructions by 38 OTHER TYPES OF CONTROL means of a programme (ef. p. 183) but when, as often occurs, a number of orders require the same increase in location number, the operation can be performed automatically by means of a ‘B-box’. This is simply an auxiliary storage register (or registers) whose contents can be added into any instruction before this is executed. ‘Thus, if an instruction reads: ‘Add 152 and then proceed to 109, and the B-box content is, say, 10, the result of the combined operations is: ‘Add 162 and then proceed to 109. More complicated processes can be derived in which both addresses and the specified instruction are modified. It is usual to arrange that the B-box contents are only added into instructions which are marked in a particular way and various logical systems are available for incorporating the B-box into the Control. For a serial machine it is convenient to use the B-box if the first emitted digit of the con- trol word is unity and to effect the addition as the word is with- drawn from the store. On the other hand, it is equally possible to add the B-box con- tents after the control word has been stored in the control register and this is useful when several B-boxes are to be used and must be selected by means of groups of control digits. Yet another system would select the B-box contents to be added into the current control word as a result of information coded into the previous control word; this leads, in a serial machine, to the simplest circuit arrangements. Another useful device, particularly for computers whose store is cyclic, is the iteration or ‘It-counter’. This is simply a counter, or set of counters, which can be sensed by means of a special con- ditional transfer instruction. After each such sensing the counter contents are automatically increased by unity and when the con- tents reach some specified value the transfer order changes the computing sequence in the usual manner. ‘A relatively recent development in the computer field has been the so-called time-sharing operation. In this, the basic idea is that the computer may run a number of programmes simultaneously. Two distinct possibilities exist: In the first of these, where true time-sharing is possible, the structure of the computing machine is sufficiently complex, and the number of arithmetical components sufficiently large, to allow genuine simultaneous operation of differ- ent parts of the machine on several programmes. Probably the first example of a machine working in this mode was the old Harvard 39‘THE CONTROL Mark II. The way in which the various units co-operate together in the time-sharing operation depends either on a built-in micro- programme of the type invented by K. D. Tocher in the early 1950s which directs the operation of the computer between several alterna- tive courses of action according to the availability of its units, or alternatively, and more generally, of an overall supervisory pro- gramme which is recorded in the store in the usual way and which can be modified according to the type of operation required so that the computer makes use of its constituents in the best possible way. ‘The second general type of time-sharing operation is that in which the intrinsic speed of the computer is so high that with any normal input-output equipment the machine would be idle for long periods between the receipt of one set of data and that of the next. Any machine which has multiple input-output facilities so that, for example, distinct instructions exist requiring the input of data from input station 1, input station 2, input station 3, input station 4, and so on, can be programmed and therefore, in effect, operates in a time-sharing mode. Suppose that the first of the inputs is relevant toa ‘bread and butter’ operation such as income tax computation for employees, the second a stock-keeping operation, and the third a free input for scientific calculations for an industrial drawing or design office. The machine is supplied with programmes which will perform the first two operations, and which have the property that after the input of taxation data for an employee on input 1, the cycle of calculations required is performed and the answer disposed of. After this the machine re-examines input station 1 to sec if new data are available. In the event that they are not, as signalled by an occupied sign on the equipment, the machine then tests input station 2, in this case assumed to have second priority. If input is available at input station 2 the machine transfers its control to a second programme dealing with input of station 2. At the end of this cycle the machine reverts to input station 1; if no input is avail- able here it refers again to 2, and if again no input is available, it transfers its attention to 3 to see whether any scientific calculation is in request. This is dealt with in the same way as the others and itis clear that, if'a sufficiently large number of inputs are available, or ifaltemnatively, a low priority job involving considerable calcula~ tion is present, the machine can insure that it wastes no time in idle- ness always occupying itself with one of the jobs concerned. It is of course quite trivial to change the priorities assigned to various input stations by changing preset parameters in the programme. ‘A number of machines operating in the time-sharing mode are available. These range from the Bull Gamma 60 to the Ferranti 40 OTHER TYPES OF CONTROL ‘Atlas. It is very probable that all of the ultra high-speed machines of the future will either have special provisions for such time-sharing operations, or that they will be provided with programmes of the type just described, so that their computing speed can be adequately utilized. It will be clear that there is no fundamental difficulty cither in designing a control to utilize the internal complexity of the arithmetic unit adequately or, alternatively, of having a programme that can do the same thing. 416 THE ARITHMETIC UNIT ‘As rrs name suggests, the arithmetic unit of a computing machine is that part which operates on stored information to produce the combinations of ordinary arithmetic. It is customary, in all existing computers, to have circuits which will perform the operations of addition and subtraction. Most computers also have devices for multiplication and division. Such special apparatus as square rooting units are of such limited utility that they have found a place in only one or two historical machines. In this chapter the logical construction of these and other arith- metic devices will receive consideration, the aim being to provide engineering schematics of the type provided for the control in Chapter 5. These schematics will be in such a form that they can immediately be transformed into actual components by means of the basic circuit units described in Chapters 9-12. Numbers will be assumed to be in true binary notation and to lie in the range +1>x>-1. The form taken by negative quan- tities is important and two general representations exist. In one, a negative quantity appears as (sign) (absolute value) and in the other as a true complement mod (2). ‘The first system is, perhaps, more suitable for human observation, but has a particular dis- advantage from the machine point of view. This lies in the fact that the addition and subtraction of two numbers, represented by (sign) (absolute value), must be preceded by an operation which compares the signs and decides upon the true nature of the opera- tion. Thus: (+)(4) +(-)(8) is really: (+)(4) -(+)(8) and, although the operator has specified an addition, the machine, in fact, performs a subtraction. In machines working in the parallel mode this comparison process may be quite easy, but for serial working, especially if the sign indication appears as usual at 42 MAIN COMPONENTS the most significant end of the number, it is troublesome. The following analyses assume complement representation of negative num MAIN COMPONENTS Before detailing the design of the various constituent parts of the arithmetic unit it is profitable to examine, in general outline, what must be present. In the first place an adder or subtractor requires the provision of some form of register in which the sum is to be stored. This may bea register of physically distinct digit storage units of the flip-flop type or alternatively an n pulse delay unit in which a single number can be stored, Such a unit is absolutely necessary in any form of computer in which two numbers cannot be simultaneously drawn from the store, and it is desirable in all computers. In the second place a machine capable of multiplication must have an extra register in which the multiplier can be stored. The multiplication of two n digit numbers generates as product a number of 2n digits. Since (in most multipliers) the digits of the multiplier are used in sequence there is no reason why the contents of the multiplier register should not be successively displaced to the right and their place taken by the least significant n digits of the product as these are generated. It has been assumed that the product is generated starting from the least significant digit of the multiplier; this is clearly the most advantageous arrangement since the storage register for the last n digits then requires no adding and carrying facilities. Multiplication requires, then, the two registers mentioned; in any machine in which access to the store is slow, however, it is a great advantage to have a third register in which the multiplicand digits are stored during multiplication. When division is considered the presence of this third register becomes mandatory since the divisor has to be compared with the partial remainder at any stage of the process in order to decide the nature of the next operation to be performed. It is thus seen that an arithmetic unit should contain three registers capable of holding the digits of interacting numbers. For multiplication it is also necessary that the product and multiplier registers should be such that numbers held in them can be shifted ‘one place to the right on receipt of a suitable impulse. This faculty may also be necessary if the main storage of the machine is of the serial type; the digits of a number then become available one at a time and can be ‘staticized’ by insertion into such a shifting register. 43THE ARITHMETIC UNIT In machines having automatic division the registers previously mentioned should be able to shift left as well as right to enable partial remainders to be brought to the same size as the divisor. Before considering the individual arithmetic operations it is profitable to consider the formulation of the shift instructions. RIGHT AND LEFT SHIFT It will be shown in Chapter 11 how a register can be constructed to shift its contents in a given direction. Consider first a register capable of right shift, this is equivalent to division of the stored binary number by two. When it is remembered that the numbers concerned may be positive or negative itis evident that such division by two should preserve the sign of the number. If the register stages are A; A2... A, the unit right shift operation should, then, generate the pattern Aj, Ay, Az... 4,1. To avoid loss of digits the original A, can then be shifted into the first stage of the multiplier register, if present, and any existing contents of this register simi- larly shifted, the least significant digit in this register being lost. ‘The left shift operation is more complex; it is of course, possible to construct flip-flop type registers capable of both right and left shift operations but this is uneconomical; furthermore, in delay type registers, the unit left shift operation, assuch, is physically impossible. ‘The solution is to observe that if head and tail of an n-stage register be connected then a single left shiftis equivalent to (n ~1) rightshifts. Here again care must be taken to preserve the sign of the shifted number, Left shift is equivalent to multiplication by 2. For posi- tive numbers left shift will maintain the sign until the number has grown beyond the range of the machine, thus: 0-01 (= +3) 0-10 (= +4) first shift 1-00 (= = 1) second shift the second shift not being permissible under the ordinary rules of arithmetic understood by the machine. Again: 101 =(-3) 0-10=(+4) the shift being unjustifiable since 2 x -}= - 14, which is outside the range of the machine. 44 ADDITION On the other hand: renee) 1-10=(-4) so that this shift, which is permissible, generates the true signed double of the original number. ADDITION Several distinct varieties of adding unit have been described. Perhaps the most common is that compounded from two units known colloquially as ‘half adders,’ and shown diagrammatically in Figure 6.1. 4 Ay o Ls, 4x] 4 % a ae) 4 Ls, &—| 2 oi poo dasa o 1 (a). Hal Figure 6.1 (b).. Logie i Figure 6.1 (a). Half and full adder 6. 9% ee o, and o2 are the ‘half adder’ units; they have the property of combining binary digital inputs A and B in accordance with the following scheme: Table 6.1. Half adder matrix for A+B rool a B 0 1 0 1 onve|'o -ooola Here S is the sum digit produced by adding A and B and C in the carry. At any stage in a binary addition process it is necessary to combine up to three digits, (a) A resident or existing digit 4, (8) An incident digit—from store, say, By (c) The carry, ifany, resulting from a previous addition C,_, 45‘THE ARITHMETIC UNIT It will be seen that the circuit of Figure 6.1 performs the operations required to produce the true binary sum, S,, and also any carry, C, resulting from the combination of inputs 4,, B, and C,_s. Up to this point it has been assumed that the digits to be added were available without any very definite specification of how this was to be arranged. It will now be shown how the device of Apr 6.1 can be made the basis of several distinct types of addition Fit let it be assumed that the digits of A and B are available as et eo] feta eae ff etl IL to J L__Clock |e unit dete tne, a Signal amplitude Time Figuré.6.2 (a). Datajtime graph for serial adder Main clock Clear Figure 6.2 (8). Serial adder (delay line type) simultaneous short pulses separated from other digits of the same numbers by definite time intervals; this situation obtains in delay line type machines. Figure 6.2 (a) shows the way in which typical time/pulse height patterns for the digits of A and B might appear. ‘The question of how the information is held is, for the moment, left open, but is answered in Chapter 12. Figure 6.2 (8) shows how the basic two half adder unit is used to produce a serial binary adder for two streams of binary digits of the type just described. It is assumed that the number B is stored in some form of delay 46 ADDITION of n digit time duration; A appears, from an external store, one digit at a time starting from the least significant and in synchronism with the digits of B. A single pulse time delay @ arranges for the carry Cy, from the pth addition stage, to be available to the adder at the time required for input to digit addition (p +1). ‘The gates marked @ and 6 are arranged to cut off the incident and carry digits except at times dictated by the arrival of suitable ‘clock’ pulses; this enables any particular number to be selected from the external store and added to that already contained in B. ‘A matter frequently overlooked in the examination of a device of the type described above is the fact that it is impossible to clear data out of an n digit delay (of the acoustic type) without waiting Digits f Aan. Crear register Figure 6.3. Serial adder (shifting register ype) for a period of n digits. Allowing the necessity for this, there still remain several alternative methods, for example: (i) A separate ‘clear’ operation can be included. (ii) A ‘read out and clear’ order can be included in addition to the normal read out. (ii) The clearing can be accomplished at the same time as the next addition. Alternative (i) would waste one complete word time and is therefore undesirable. Alternative (ii) requires that the problem analyst remembers to insert the appropriate order before the actual operation requiring the clear line is considered. ‘This obviously offers scope for error. Alternative (ii) therefore appears to be the most satis- factory. From the engineering standpoint there is little difference, since all of the above variants can be constructed with the aid of a single gate. For (i) gate c transmits clock pulses at all times except when clearing, for (ii) at all times except when reading out and 47‘THE ARITHMETIC UNIT clearing, and for (iii) at all times except when adding into cleared line. ‘A second type of serial adder employs a storage shifting register for the number B. This is characterized by the fact that the digits of B are static but can be shifted, one place at a time, to the right on receipt of clock pulses. An addition unit constructed on this plan is shown in Figure 6.3. The number B is stored in the register stages By . . . B,; digits from the store and from B, are continuously incident on 2¢ but nothing occurs, except when the shift gates 1 «+ gq of the register and the auxiliary gates go and g, are pulsed. When this happens, the sum of incident, resident and carry (stored in c..) digits is shifted, via go into By; B, is lost and replaced by B,_y Ant An ay @ u Jee] Figure 6.4. Parallel adder (register be) dc. and the carry for the next stage (if any) is shifted into cs. Since a shifting register permits access to all digits of B simultaneously, clearing can be accomplished as a one-shot operation prior to addition if required. Similarly, the carry store c.s. is always cleared prior to addition unless multiple length addition is required. Finally, itis shown in Figure 6.4 how the 2o units can be arranged to provide parallel addition of a number of channels. A;...4, and B, ...B, are the respective stages of the A and B storage registers. Addition takes place in the units 201 . .. 20, interconnected so as to propagate the carry. When the circuit has settled down a pulse is applied to all of the gates gy « . . gy simul- taneously causing the sum of A and B to be sent to B. It should be noted that the shift pulse is assumed to be sufficiently short, compared with the response time of the 2o units to changes at their inputs, for B to change without affecting the inputs to the gates Bisse 48 ADDITION In the case of a register type machine, a completely different adding scheme is available, this depends upon the fact that the Figure 6.5. Serial adder contents of B, (Figure 6.5) need not be known to the addition circuit as such. ‘The scheme of operation is as follows: If 4,=C, send B, to B, and shift one place to right; do not alter Cy, If 4,#C,, send inverse of B,, to B, and shift one place to right, sending B,, to C,, Here the symbols 4,, B,, and C,, represent the contents of A,, By and C, after m operations. ‘The circuitry involves only standard coincidence and anti-coincidence units and three input gates g, gaand g.. Operation depends upon the fact that if A,=C, then sum digit (4, +€,) =0 carry (4, +C,) =Cy and if 4,4C, then sum digit (4, +C,) =1 carry =B, which is readily seen from the following table. Table 6.2 ‘4|.26 | B 0 0 0 0 0 1 1 1 0 1 1 1 1 0 0 1 0 1 0 1 0 0 1 1 4-Av.0. 49THE ARITHMETIC UNIT Input from the store is at 4; upon receipt of shift pulses, coincident with the digits of the word which it is required to add, register B,...B, performs right shift operations and B, is fed either direct via g, or inverted via g; into By. At the same time B, is fed directly to C'via g, if g, is actuated. The anti-coincidence unit is identical with its coincidence mate except that its connection to Cis inverted. An entirely different class of adding element is the diode network. This is in reality a combination of a many-one and a one-many function table and will not be described further here, its mode of operation will be evident from the discussion of Function Tables contained in Chapter 11. Proposals have appeared, from time to time, for the construction of special valves for the operation of binary addition. The best known of these was due to J. Katz, who devised a series of such devices which would be particularly suitable for incorporation in a parallel accumulator. By deflecting an electron beam in the electrostatic field of three electrodes, the combinations required to produce sum and carry digits were to be generated in a single valve, Neither these valves, nor any of the semiconductor equival- ents which were proposed later, appear ever to have been manu- factured. SUBTRACTION Two distinct methods are available for the design of a subtraction unit; in the first a ‘half subtractor’ unit is constructed to have the properties shown in Table 6.3. Table 6.5. Half subtractor matrix for (B- A) This results in a subtractor unit which is identical in layout with the adder unit of Figure 6.1. The logical construction for a half subtractor unit is shown in Figure 6.6. In this figure a second gate has been used to obtain the carry, in conformity with Figure 6.1 (6); it would, however, have been equally possible to buffer the output from gate and to use this. The second type of subtractor makes use of the fact that subtrac- 50 SUBTRACTION tion of A from B is equivalent to the addition of the true complement of 4 to B, This can be readily achieved by presetting the carry store to unity (the ‘elusive 1” of computing parlance) and adding the digital complement of A to B. ‘Since the digital complement of a binary number is obtained by changing 0’s into 1’s and vice versa this is trivially derivable from the incident digit stream. ie Aandnot B=C Figure 6.6, Logical construction of half subtractor ‘A completely different approach to the problems of addition and subtraction in binary scale is provided by the notion of many-one, one-many, function tables. Thus consider the addition of three binary digits, A, B, and a carry, C, derived from a previous stage of the process, The required sum and carry digits are shown in Table 64. Tobe 64 dation and sobetion ables for thee digi (4+8+6) and HeHHecce| > See selen Te were-o~o| 9 Sum | Cary | Diference | Carry : 1 0 0 0 1 pobsenws REWeLeos aon oe no! It will be clear that since the all-zero combination, marked n, pro- duces no output it need not be introduced into the many-one table. The other combinations must be provided as distinct outputs from the many-one table, but it should be noted that the three combina- tions marked ¢ produce outputs which are common to addition and to subtraction and do not need to be repeated in the latter. Of the remaining four combinations, for (001) and (010) the sum/difference 51THE ARITHMETIC UNIT digit is the same for addition and subtraction so that the carry digit, present only in subtraction, can be derived directly from the com- bination of the many-one function table outputs for these combina tions via a 2-gate which operates only on recept of a subtract instruction. Similarly, the carry produced in addition from the combinations (101) (110) can be generated by the combination of the function table outputs applied to a 2-gate whose other input is the add instruction. MULTIPLICATION ‘The process of multiplication has frequently been engineered into computing machines in such a way as to permit of operation only when both multiplier and multiplicand (and consequently also the product) are positive; this has been due, to a large extent, to the detailed following of the Goldstine-von Neumann scheme of correction of product when interacting numbers are non-positive. In essence, all of the available schemes of multiplication for non- positive numbers are complicated by the fact that negative numbers are invariably stored in complement form, If numbers were stored as (sign). (absolute value) multiplication and division would be as easy for non-positive numbers as for the simpler case. On the other hand, as was pointed out in an earlier section, addition and sub- traction—which are the most used operations—would be more complex. Supposing, then, that negative numbers are stored as comple- ments (Mod. 2), the following cases arise: (i) +ax+b=+ab (i) +ax -b=[+ax(2-8)] =2a-ab (iii) -ax +b=[(2-a) xb] =2b-ab (iv) -ax -b=[(2-a)(2-0)] =4-20-26 +ab Thus, after a straightforward multiplication case (i) would be correct, (ii) would require the subtraction of 2a, (iii) the subtraction of 26 and (iv) the subtraction of (4~2a-2b). Whilst it is true that Goldstine and von Neumann have shown how at least some of these corrections can be applied during the course of the multiplication, their scheme is not well adapted to the case of a serially operating machine in which the signs of numbers are not continuously available. An alternative scheme, suggested by the present authors, docs not involve any knowledge whatever of the signs of the interacting 52 MULTIPLICATION numbers. The scheme of operation, for binary numbers, is as follows: Let a, and b, be the nth digits of A and B respectively. ‘Then the following process will generate the correct product A xB whatever the signs of A and B. nA1 (1) If b.=baut Shift partial product already obtained one place to right. (2) If b,=1, by4,=0 Subtract A from partial product and shift latter one place to right. (3) If b,=0, by, =1 Add A into partial product and shift latter one place to right. Repeat until n=1 above except that the shift is deleted. Observe ly by1 =0- ‘The following is a constructive proof of the validity of the process. Let dy-p41 be the contents of the accumulator after the pth stage of the process and let m represent the multiplicand. Then the following recursion formula expresses the above process: Gyap = Fon pst + (Cx—pet ~ bap): b= (e—I)] — . .s « (G1) It will be observed that the factor (64, ~ 04) has the values: 0 fb =bia 1 if by=0, byl <1 if =I, big, 30 as required by the description. Since, at the first stage, the convention 6,,,=0 holds and the accumulator is clear: 0,0 + (by41 —6,)-m = — by sees 62) ‘Thus, multiplying the pth member of equation 6.1 by 2-1: 4,1 = 444 + (bq ~ bq—1).m yg = y1 + 2(bq-1 ~ by) Pay 3 =2tq-2 +24(byu2 ~ bys) 22a, = 234g +2"-2(by — by). whence, adding: 2a, me hay + [ — 2-2 +2°3bg +. Oy Hy] 53‘THE ARITHMETIC UNIT 2 liminating ¢, by means of equation 6.2, and dividing through by ttt oe +yh|-m i} gon) ions. ee, 1 Now if b is positive 6 =0 and Sas and similarly, if 6 is -* a . 1 negative b= 1 and > s5-7b,=(1-Ibl) whence, for & negative, o2 [-»+Den9] =[-1+(1-l6)] = -6 an pat tion 6.3 can be written: is seen that equa- Figure 6.7. Multiplier whatever the sign of b. "Thus, since no restriction was placed upon the sign of m, the process gives a correctly signed product for all sign combinations. The logical design of a multiplier constructed on the above basis is shown in Figure 6.7. ‘The nth and (n +1)th stages of the B register are d, and b,,,. The operation of multiplication is signalled by the triggering of the setting flip-flop m from the function table. When this occurs, 4,41 is set to zero and gates p,q, rand s are tested; if by = bg either g or s will react and produce an output which operates the ncounter. Assuming that the last operation has not been reached, 54 DIVISION the counter will not operate to close gate ¢ and the counter trigger signal, delayed by d, will pass through it to cause the accumulator register C to shift one place right. At the same time ¢, is sent to by, the whole contents of B are shifted, 6, is replaced by 6, and Sait BY Bae Should any change have taken place in the relative contents of }, and bj, one or other of the gates p, g, r, s will again react. For b,=0, 04,;=1 r emits a signal to the adder and for 6,=1, },41=0 p emits asignal to the subtractor. ‘These units cause A to be added or subtracted from @ and then emit a signal that their operation is complete. This operation complete signal actuates the counter exactly as before and, if necessary, initiates a shift of Cand Bas before. ‘At the last operation the n counter will close gate f, thus inhibiting the shifts, and signal the end of the multiplication by resetting m. DIVISION ‘The process of division in the case of a binary based computer has marked similarities to that of multiplication. Specifically, there are two alternative processes for its operation: (1) The standard trial-and-error method. (2) The so-called non-restoring method. In the first of these the divisor is compared with the partial remain- der at any stage (the numbers being assumed positive). If it is ess than the partial remainder a subtraction is performed and unity placed at the right hand end of the partial quotient; if, on the other hand, it is greater than the remainder, no operation is and zero is placed at the right hand end of the partial quotient. ‘The partial remainder is then doubled and the process repeated to give a quotient of any desired precision. This method suffers from two disadvantages, firstly that it will work only for positive numbers, and secondly that the only simple method of comparing the relative size of divisor and partial remainder is to perform a subtraction. This subtraction is redundant when the remainder is less than the divisor and requires (in most machines at least) a subsequent addi- tion to annul it. ‘The non-restoring method is considerably more flexible since it will operate on numbers of any sign and does not require the per- formance of any unnecessary operations. Assuming that the divisor (m) is stored in the memory, theTHE ARITHMETIC UNIT dividend (d) in the accumulator register and that the quotient (6) appears in a shifting register the process is as follows: Operations 1 - (n - 1) If m(1) =a(1) Add 2-*- to (b) Shift left accumulator and register one place Subtract m from a If m(1)#a(1) Add 0 to (6) Shift left accumulator and register one place Add m to a Operation (n) Add 20 +2-"-0) to (6) 1m this scheme a(f), m(p) and (0) represent. the ph digit ofa, mand b. A constructive proofis as follows: Let ry —remainder after the kth operation and let 5, be the Ath digit of 6. Then the recursion formula for the above process is: 14 =2r4- + [1 ~2bp].m sees (68) » (6.6) ‘Multiplying the terms of equation 6,5 by appropriate powers of 2 it is seen that: Notice that m=a font =2tyan +[] ~ 26,1]. Dry =22ry-y +211 —2b,_2].m Pry = Pq g +22[ -2b_s]-m Fy, yy 42"-2L1 — 2b]. whence, adding: 2 ont Ho tmEY—-mE2%, —.... (6.7) oo pod or, using equation 6.6, dividing by 2"-!.m and rearranging. 1 orig, ~ 1 +[h +H... ta teavsss KGB) 2 (since E 2? =2"-! -1), =o It follows that the scheme given above will generate the true quotient a/m whatever the signs of a and m and except for the sign digit, to correct which unity must be added to the result. The 56 DIVISION reason for the addition of the final unit (2~!-") lies in the fact that this gives the least biased round-off when 6, is unknown, tis particularly easy to construct the logical diagram for division using the non-restoring method. d,...d, is the divisor register, a... @, the partial remainder register and b,...b, the quotient register. For simplicity it is assumed that the a and registers are capable of direct left shift. Figure 6.8. Schematic of binary divider Sign digits d, and a; are compared, via the gates |, m,n, p. When the divider is switched on a flip-flop q is set up; this emits, via buffer B,a pulse to test gates J, m,n, p. Gates ! and n emit a pulse when 4d; and a; have the same sign and thus call for subtraction of d from @, at the same time unity is sent to quotient register stage by. Similarly, ifd and a have different signs one or other of gates m and p emit the delayed B test pulse to call for addition, at the same time b, is set to zero. Meanwhile, the pulse from B has passed, via a delay Az, and has caused a left shift of the contents of a and 4, It is assumed that there is sufficient delay in the commence- ment of the add or subtract operation for this shift to be complete before the former begins. When the addition or subtraction is over, an operation complete pulse is emitted. ‘This operates the n counter and, after a delay Ax to enable the latter to settle down, tests gate u. If the division is not complete u passes the test pulse to Az and causes a and 6 to shift one place left, this shifts 6, into ,_,, and effectively multiplies 57THE ARITHMETIC UNIT the partial remainder, in a, by 2. Gates J, m,n, p are again tested and the cycle repeated. When the required number (n) of add/subtract operations is complete the a counter will close gate w, reset division flip-flop q and cause stage 6, to ‘count,’ i.e. invert its contents, whilst b, is set to Sa i ea nis canna) to the remainder of the machine. DECIMAL AND OTHER ARITHMETIC So far it has been assumed that the computing machine under discussion operates with numbers represented in true binary form, this is dictated by the greater simplicity of machines operating in this scale. There is no difficulty, in principle, in designing a computer to work in any scale whatever and the adding and multi- plying units of such a device will now be considered. ‘One means of representing a number, to base , and having p digits, is to let each digit occupy (n-1) units of time. Thus, in decimal scale, the number 981 might appear as: 2a 456789 > Time intervals Figure 6.9 where some form of signal on cach channel represents the digit. This corresponds to a parallel operation system. Alternatively, in serial working, the same number could be written: Viesesevesresys 9129056708 Single chanml Time intervals Figure 6.10 where the same number now occupies three times as great a time interval as before. Or, yet again, 30 channels might be used, only three of which (corresponding to 9, 8 and 1) receive impulses at a given time. A completely different method of representation is to code each digit in terms of, say, binary scale. 58 DECIMAL AND OTHER ARITHMETIC Again three representations are possible and, taking the number 981, as before: ei 9 aa Ne een ef s Fae 1 1208 panes eration “ raverevsiadve al 2 ? 7 ‘ a, roe ome Ta NF c= Figure 6.11 In the first all digits are available at the same instant of time— at the expense of 12 channels. In the second four time intervals are needed but the number of channels is reduced to three, and in the third, or truly serial, mode of working, twelve time intervals are required on a single channel. ‘At this point it becomes clear that the equipment, or time requirement, is less in binary coded representation than in straight- forward decimal notation. Even further saving results when the true binary form of the number is used, thus for the previous example: 981 =(1001) (1000)(0001) in the coded notation, whilst 981 =1111, 0101, OL in true binary notation, a saving of two channels or two time intervals, The logic of adding circuits in non-binary scales is directly related to the representations discussed above. The binary ele- ment, or flip-flop, is no longer the unit element and some form of 59He ARiTHMETIC UNIT n counter must be used for each digit. Two general forms of this unit exist, in the first a set of on-off elements are connected into a ring, as shown in Figure 6.12. Here the elements are represented by 9... 6,1 and are so arranged that only one at a time can be in the on state. On receipt of impulses the on condition is advanced one stage at a time; it follows that if the Ith element of such a device is on and m impulses are applied the final state is (J +m) [mod n]. ‘To construct a multi- digit adder from these units, it is merely necessary to arrange that Figure 6.12. Ring counter Figure 6.13. Binary counter with reset at ten when the on condition passes from element 6,_, to bg an impulse is sent, via a carry lead, to the next ring of the set. Naturally it is necessary to ensure that the propagating carries do not interfere with any set of digits which are being sent to other rings, and to ensure this it is usual to store all carries until the end of the individual digit additions and then to propagate them, one ata time, starting from the least significant. The second form of n counter in general use is some form of binary scaler. For the decimal scale, as was seen above, four binary stages per decimal digit suffice and incident pulses cause these to make a binary count in the normal manner. Since the modulus of operations is (in the 4 binary stage counter) 16 it follows that when the sum of the counter contents and the incident digit exceeds 9 an incorrect representation will occur and no carry is 60 DECIMAL AND OTHER ARITHMETIC necessarily produced. To correct this two techniques have been used; in the first, shown in Figure 6.13, an auxiliary gate a is primed when the counter reaches 8 and then emits the advancing pulse’ from the first stage (corresponding to the transition 9-10). ‘This pulse is delayed by 6 to allow the second counter stage to settle down and is then applied to stages two and four forcibly to reset them to zero, at the same time this reset pulse is passed on to the next counter as.acarry. In the second form of correction the digits of the two numbers are added as usual and then 6 is added to cach of the counters. It will be seen that this results in the emission of a carry impulse from those stages whose contents lie between 10 @, Digit tos 17 Bes) a7 NT iy see Ie 1 i= ‘ne-many Function Yable ‘One-many Pnction Fable tay | escal iecsesy [bebe iia Four outputs sum digit nat Four outputs sum digit 00.7 Figure 6.14. Parallel decimal function table adder and 15 and the correction of their contents to its value mod (10). (For example 14=10+4 and 14+6=16+4.) ‘This method is not without its disadvantages since means must be provided to restore any counter, from which a carry has not arisen after the addition of 6, to its original state. An entirely different form of adder is applicable when the binary coded digits of the two numbers to be summed are available simultaneously in, for example, a pair of registers. In the case of decimal numbers the sum may be generated by the arrangement shown in Figure 6.14. In this type of adder the groups of four binary digits, corres- ponding to the decimal digits of the numbers to be summed, are applied to sets of function tables. First a many-one function table generates outputs on twenty lines corresponding to the possible digit sums 0 to 19; this is followed by a one-many function table which 61‘THE ARITHMETIC UNIT reduces this single output to a correct sum digit, mod (10), in coded binary form on four outputs together with a carry ifrequired. This carry is passed on to the next many-one function table of the series. ‘The arrangement has the advantage of providing a static output, but is very costly in equipment. ‘The complexity of the circuits required for addition in non-binary scales will have prepared the reader for the fact that multiplication is even more cumbersome. The simplest type (conceptually at least) of multiplier follows closely the technique which is customary with ordinary desk multiplying machines of the Brunsviga variety. The principle is simple; if A is to be multiplied by B an accumula- tor is arranged so that, if the digits of B are 6, . . . by, A is added into this unit 6; times, shifted to the left one place, added in by times and the process continued until all of the digits of B have been treated. The accumulator then contains "the product AxB. A variant of this process keeps the digital position of A fixed and shifts the partial product digits, in the accumulator, to the right. The above process will only work when all digits of A and B are represented in the same scale. For example, £ s. d. cannot be operated upon. More sophisticated techniques for the multiplication of non- binary numbers have been devised but, for electronic machines at least, have not been much used. Two examples will suffice to illustrate some of the principles which are involved. First it may be observed that the successive addition and shift multiplier described above may take up to (p— 1) addition times to generate the product of two n digit numbers to base p. An improvement on this situation can be effected by the use of built-in multiplication tables. A schematic for the process is given in Figure 6.15. The digits of the number A are,held in stages A,... Ay (the nature of the A, units will not be specified more closely as the reader will be aware of their construction from the preceding dis- cussion of adders). The digits of B are held in stages B,. . . By of a register so ed that the contents can be shifted, one place at a time, in the direction B,-rB,. Each digit of A is multi- plied by B; by means of a set of function table units, and the outputs of these, which may consist (for decimal scale at least) of up to two digits, are summed together in the matrix adders S, which are so interconnected as to form the correct output By x A. ‘The digits of this product are now added to those of the contents of the product register P,.. . Py by means of the set of matrix adders S;. The sum so formed is then transferred to the product register 62 DECIMAL AND OTHER ARITHMETIC P, ..« P, but shifted one place to the right. ‘To avoid loss of data aS the multiplication proceeds, the extreme right-hand digit of the partial sum is always shifted into B, and the contents of B similarly shifted. In this way, by repeating the process just described, the contents of B, are successively By, Bz... B, and at the end of n cycles of the process the product A x B is found to be stored with its first n digits in P,... P, and its last n digits in B,.. . By. Figure 6.15. Schematic of single cycle decimal multiplier By suitable attention to registers and matrices the above process can be made to deal with numbers of non-uniform scale. The multiplication time with this type of device is only 2n addition times BS as will be readily seen, the cost in components is likely to be ‘To conclude the discussion of multipliers the so-called ‘halving and doubling” proces will be described. This depends upon the ts axb=(20)(5) if bis even = (20) C5) +aif bis odd it follows that, in order to obtain the product of two numbers, it is sufficient to repeat the above process until b is reduced to unity, 63THE ARITHMETIC UNIT and then to add the various remainders together. The following example illustrates the process: 981x314 1,962 x 157 3,924 x 78+ 1,962 7,848 x 39+ 1,962 15,696 x 19+ 1,962+ 7,848 (= 9,810) 31,392 x 94+ 9,810 +15,696 (=25,506) 62,784 x 4 +25,506 +31,392 ( 56,898) =125,568x 2 +56,898 =251,136x 1 +56,898 =308,034. woneoe The mathematically inclined reader will have noticed that the process is effectively the conversion of into its binary equivalent and the multiplication of a thereby. It is also true that this al- gorithm will generate the cotrect product whatever thescales of notation of the two numbers, and this makes clear the reason for the adoption of the method in certain business machines. To construct a multiplier using this technique is a simple exercise in the methods discussed in this chapter and will not be considered in greater detail, save to remark that if the digits of the numbers are given in binary coded form the multiplications and divisions by two are particularly easy. It may be mentioned that the non-binary dividers suggested up to the present are more or less identical in principle with the ordinary process taught in the schools. The particularly elegant non-restoring process described for binary numbers is not applicable in any other scale of notation. ‘An elegant method, which enables an essentially binary calculator to operate automatically in any scale of notation, is known as pro- grammed notation, and is analogous to the forced reset technique illustrated in Figure 6.13. First a decision is made as to the langest, radix which is to be encountered—usually 12—then the next higher power of two is taken as a basis of operations and the (non- binary) digits to be operated upon are represented by combinations of the digits within the given range. Thus, for numbers in decimal scale, each digit would be coded in terms of four binary digits. To effect the addition of a pair of numbers represented in this way they are combined with a third number, known as the ‘filler’, so that the sum of digits and filler produce a carry past the binary point when the sum of the original digits would have produced a carry in the scale being represented. 64 DECIMAL AND OTHER ARITHMETIC ‘Thus, in decimal scale, the required filler is 6 and a typical example would be: 981 1001, 1000, 0001 +314 — 0011, 0001, 0100 +Filler 0110, 0110, 0110 =1,0010, 1111, 1011 Only in the hundreds denomination is a carry produced, so that to obtain the true sum the filler has to be subtracted from the units and tens denominations: 0001, 0010, 1111, 1011 —, —, 0110, 0110 =0001, 0010, 1001, 0101 or 1295 which is the required result. In practice the sum of digits and filler is produced in two stages: digit plus digit and then sum plus filler. By a suitable arrange- ment of the equipment both the digit plus digit and the sum plus filler can be retained so that a simple selection circuit enables the required value to be selected without the necessity of subtracting the filler from groups which do not produce a carry. q_Dilicultes are encountered when numbers are to be. sub- racted, but these can be overcome resenting the original digits in so-called ‘excess’ notation. ase as sail excess is 3 50 that a digit, d, appears as (d+3). Subtraction is now casy since a simple reversal of the binary digits changes a decimal digit into its complement (mod. 9), and a simple and symmetrical scheme of operation is possible. The filler is 3 and the operational procedure is: (1) Ifthe sum ofa pair of digits produces a carry add the filler. (2) If no carry is produced subtract the filler. For example: 981 1100, 1011, 0100 +314 — 0110, 0100, 0111 =1,0010, 1111, 1011 Filler ( +0011), (+0011), (-0011), (-0011) 0100, 0101, 1100, 1000 which is 1295 expressed in the excess three notation. The idea of excess notation can be extended to numbers having any even radix (») and in this event the ‘excess’ is (16 -)/2. ‘Unfortunately multiplication and division become very com- plicated in programmed notation so that the method does not appear to have received much practical support. SADC. 65‘THE ARITHMETIC UNIT FLOATING-POINT ARITHMETIC One of the central problems which occupied the attention of the early computer designets was that of producing a machine whose structure was sufficiently simple to make possible its manufacture with the techniques available in the 1940s, whilst at the same time its arithmetical and order structures were adequate to make useful large-scale calculation possible. Fixed-point binary machines have proved their worth many times over, but it has become amply apparent that their program- ming is a highly-skilled operation. When the ordinary engineer or scientist uses a computer himself, he is liable to be highly inefficient if he has to bear in mind, constantly, the need for conversions to and from some non-decimal scale and the fact that numbers may grow and shrink so as to exceed the range allowed to a fixed-point machine. ‘These difficulties can, of course, be overcome by using an auto- code system, and this is discussed in Chapter 16; however, the major- ity of modern large-scale machines include, as part of their structure, equipment for floating point arithmetic. A typical floating-point decimal number might be 8, ~ 97526210. ‘This would represent --97526210 x 108 or ~97526210. Similarly, —2, --97526210would represent --97526210 x 10-2 or --009752621. In an analogous manner binary numbers can be written in floating point notation thus, 0011,0-101 would mean 2% x0.101 or 101. In general, for numbers represented in a notation to base r, Aa,B,b,.. ete, would mean r4,a,78,b,.. ete. ‘The numbers A,B, elc., are called the exponents and a,b, etc., are known, as the mantissae. ‘The mantissa, a, say, in floating point notation is always conventionally scaled so that its first, non-zero digit appears immediately to the right of the decimal or binary point. Thus to base 10, l>apel to base 2, 1>ab1/2 or, for general base r, 1>a>1/r Just as in fixed-point arithmetic, negative numbers can be repre- sented by (sign) (absolute value) or as complements mod. some power of the base. The operation of a floating-point arithmetic unit varies with the precise details of scale of notation, method of negative representa- 66 FLOATING-POINT ARITHMETIC tion, and operating mode of the computer serial, parallel, or mixed. In general, however, the following sequence of operations must be performed: (1) For addition or subtraction of floating-point numbers Aja and Bb, ie. A,a+B,b (a) The exponents are first compared. If A=B, the man- tissa a:b is formed. Since :b may no longer lie in the correct range (1,1/r) a scaling operation may be needed. This consists of left or right shift operations on (a:t8) until its first significant digit lies immediately to the right of the point. Suppose that JV; left or Ng right shifts are needed, the exponent of the result is then A-V;, or A+Np. (b) The exponents are compared and it is found that 4>B andA-B=M. bisnowshifted M places to the right (to form r-#,8) and then a+1-b is produced. Here again the result may require scaling to come within range so that NV; or Np shifts are needed to correct the situation. ‘These are made and the exponent of the result is, as in (a), 4- Nz or 4+Np. (©) On comparison of exponents, it is found that A B to shift b to the right at the same time increasing B by unity for each shift. The Process ends when 412 and then the operation @:+r—Mb occurs as fore. 67‘THE ARITHMETIC UNIT ‘There is no difficulty in constructing an arithmetic unit based on these principles although it is evident that, because it must contain separate adder/subtractor or comparison units for the exponents and. also shift counters and coincidence sensers, it will be much more complicated than the equivalent unit for fixed-point numbers. One fundamental difficulty attends floating-point arithmetic and must be mentioned: it is concerned with the representation of zero. Clearly no mantissa may consist entirely of zeros otherwise the range- comparing circuits would cause continual attempts at scaling to take place and the machine would remain in a closed cyclic condition. This problem is often overcome by an enforced round-off procedure in which the least significant digit of the mantissa which results from any arithmetical operation is augmented by unity. This, in turn, complicates the use of a floating-point machine in non-numerical data processing—the rounding up of a digit group which, for example, represents a letter being highly undesirable. A better solution to the problem is to continue the left shifting operations un- til the exponent reaches a maximum permissible negative value and then to stop notwithstanding the fact that the mantissa falls outside the permitted range. Care is, however, needed in the formulation of multiplication and division procedures under these circumstances, ROUND-OFF PROCEDURES The operations of multiplication and division, with numbers of such alength as fully to occupy the accumulator of a computer, generally require that, for single precision working, the product or quotient be rounded off to the normal length of machine numbers. ‘How best to achieve this round-off depends to some extent on the details of the arithmetic unit of the machine involved, but certain general facts are worthy of notice. In multiplication both halves of the product are usually produced, the first (most significant) in the accumulator, and the least significant in the multiplier register. ‘This implies that, assuming that the numbers in the standard length ‘word have n digits, the first n digits of the product are in the accumu- lator after the multiplication and the (n-+1)th and succeeding digits are in the register. ‘The (n+1)th digit is thus available and, as the accumulator has carry facilities, the gaussian round-off rule can be applied, That is: if the (n+l)th digit <-5 do nothing, if the (n-+1)th digit >-5 add 1 unit into the nth digit. ‘The case where the (n+l)th digit is equal to -5 is treated in a statistical way in the gaussian process, but this is usually ignored in computing machine round-off circuits. 68 ROUND-OFF PROCEDURES For division, the (n +1)th digit of the quotient is generally un- known and this poses the question: what is the best round-off pro- cedure in this case? To answer this question, and to indicate the magnitude of the errors involved in other cases, the following heuristic treatment can be given. Two parameters are of interest: first the mean error due to a round-off method and, secondly, the mean square deviation of this error. ‘Three cases are considered: (1) Noround-off applied. (2) Last digit (for binary numbers) forced to be 1. (3) One unit added to last (nth) digit if (n+1)th digit is 1, It is easy to see that for numbers chosen at random the errors are uniformly distributed in each of these cases. In units of the last digit of the n digit numbers involved these rectangular distributions have ranges: no round-off (0, -1) last digit forced to 1 (-1, +0) gaussian round-off Cae "The mean error is: f xax/ (h de . . and the mean-square error is fi 2 ax/f de Where a,b are the range extremes of the rectangular distributions. Inserting the particular values for the different methods results in the following mean and mean-square errors. Process Mean error Mean-square Range No round-off 9-1 } + Last digit forced tol —1, +1 6 + Gaussian ot 12 tis clear from this that the gaussian. process is the best of those examined and should be adopted after multiplication. After division the nth digit forcing method is best, not only because it pro- duces no mean error, but also because the nth digit docs not need to be calculated and this saves one addition time.a MISCELLANEOUS OPERATIONS Iw addition to the normal arithmetic functions mentioned in the last chapter, it is necessary for an automatic calculating machine to have in its repertoire certain other operations of a non-arithmetic character. Clearly such instructions as: ‘Record number in register in memory location (x)’ are necessary to the working of the machine; their existence was clearly envisaged in Chapter 4, and their logical construction is so much an integral part of the construction of the store that it will be held over until Chapter 12 where the physical details of this organ receive consideration. Less obvious is the need for an operation of the type: ‘Record the first n digits of the number in the register in the first n digital positions of memory location (2), leaving the remaining contents of the latter unchanged.’ The special use of such an instruction is as follows; suppose that the standard instruction word is of the following form: “Perform operation A on number stored in memory location (x) and go to location (y) for the next instruction’ and that the digits specifying 4, (x) and (y) are arranged in the standard word as follows: Location “ Application Ion (@) (n+1)>m 4 (m+l)>(m+14n) (9) The effect of the modified record instruction is to enable the value of (x) in any other instruction to be changed to some other value (4)! say. ‘This process has an important application in allowing the machine to make use of tabulated functions stored in its memory, thus suppose that the function sin 30) is stored in the memory in such a way that x varies in steps of 2~* and that the sine values are 70 MISCELLANEOUS OPERATIONS stored in memory locations having numbers x. Now assume that during a calculation itis required to find sin 5z where zis generated as a result of the activities of the machine and is initially unknown to the person preparing the problem for machine calculation. All that need be done is to insert, at the appropriate place, » say, an instruction ‘Contents of memory location (?) to register, etc.” ‘The place marked (2) is left blank and when z has been generated in the register by the machine the partial substitution order: “Record first n digits of register in first n digital positions of memory position y; efc."is used. ‘This now inserts into the original order the value z, 30 that the order now reads effectively: 8 ‘ “Sin 5¢ to register, ete” The second non-arithmetic order which needs consideration is the so-called ‘collate.’ One form of this is as follows: ‘Compare the number in register with that in memory location (x) and place in register A a number having 1’s wherever R and (2) have 1’s and zeros elsewhere.” This instruction has uses very similar to those of the partial substitution order discussed above. For example, the problem of finding sin 5 might have been solved by sending the instruction to register A after collating with a number consisting of n zeros followed by a string of 1’s—this would remove any previous z value—then adding the value of z into register A, and re-recording register A contents in the original memory location, ‘This process is somewhat more complicated than that involving the partial substitution order; however, the collate instruction has other uses to which the latter does not apply. For example, suppose that it is desired to split the accumulator register into m independent sub- registers in order to deal efficiently with numbers of much less precision than those normally used by the machine. Clearly, if each small number was separated from its neighbours by a vacant position or zero, a single addition of two such numerical groups could not produce carries which interfered with other such groups. This does not apply, however, to subsequent additions and it is necessary to clear the zero spaces prior to each such operation. ‘This clearing can be easily done by collation with a number con- sisting of I's everywhere except at the positions of the original spacing zeros, at which positions zeros are placed; the result of this 7‘MISCELLANEOUS OPERATIONS collation will be to leave the sub-sums unaltered, but to clear out the space positions. Other applications of collation include the comparison of given digits of two numbers and the use of the machine for mechanical translation. A second non-arithmetic order which is often useful is the ‘logical add’. Here the sum of the digits of two numbers is produced but without a carry from one digital position to the next. Thus: 10110 @ 10011 =00101 ‘The symbol @ indicates logical addition in which the rules of com- bination are: 0@0 0@1 1@0 ‘THE PARTIAL SUBSTITUTION The logical design for this instruction depends largely upon whether the mode of operation of the machine is serial or parallel. For a serial machine the circuitry of Figure 7.1 is adequate. ‘The number to be recorded is held in register 2, flip-flop p is set up; this calls for emission of suitably placed clock pulses from the store and opens gate g to admit them to the n counter and to the register shift gates g,...g, ‘The counter is normally preset he 4 4 Fs = 1. @ PL @ en... a.comp. | Aaa? hos wi Counter remae! nee o Chock Rlrmi=Heelrn) oncom. ‘Figure 7.1, Partial substitution—serial to the complement of n so that when n digits remain in R, gates r and s are opened to the clock pulses which then cause recording of the appropriate digits of R to occur. At the end of the operation 72 COLLATION AND LOGICAL ADDITION p is reset by the memory operation complete pulse and in turn ‘emits an operation complete pulse to the rest of the machine. In parallel operation type machines the partial substitution instruction is trivial since it involves only the suppression of the record gates on the unwanted channels. COLLATION AND LOGICAL ADDITION A suitable collation circuit for serial machines is given in Figure 7.2. ‘The number being collated is emitted from the store under the command of fiip-flop c. The collation number is stored in register R which has its head and tail elements connected by gate go. When marker clock pulses arrive from the memory they pass gate d and cause registers R and A to execute right shifts. Gate ¢ transmits I's to register A when both the input digit from the store and the last stage contents of register R are unity and zeros other- Figure 7.2, Collation wise. Thus at the conclusion of the operation the collation number remains in register R (having been recycled by gate g) and the collation result is found in register A. The memory operation complete pulse resets ¢ thus closing d and emitting an operation complete pulse to the rest of the machine. For logical addition the gate, ¢, is replaced by a pair of gates which are so connected to R, and to the store output that only when these are anti-coincident (i.e. 1 and 0 or 0 and 1) is a pulse emitted 10 By. 738 INPUT-OUTPUT The subject of input-output for an automatic computing machine is so bound up with the nature of commercial equipment that it will be necessary, in this chapter, to relate the discussion to available apparatus. This is appropriate since previous chapters have been logical in context, whereas subsequent chapters will deal with engi- neering aspects of the various organs, and the subject-matter of this section can be thought of as a bridge between the two sections. It would be impossible, in the space available, to detail every variant of each type of input or output equipment; instead a typical example of each general variety will be examined. Input devices can be classified into: (1) Key switches. (2) Typewriter keyboards. (3) Punched tape sensed electrically, electronically or photo- electrically. (4) Punched cards read as in (3). (5) Film read photo-electrically. (6) Magnetic tape disc packs and file drums. (7) Direct character sensing from written or printed page. (8) Voice-operated equipment. For output, there are available: (1) Filament or neon lamps. (2) Teleprinters and paper tape punches. (3) Multi-channel punched card producers and reproducers. (4) Magnetic tape disc packs or file drums. (8) Film produced from (1). (6) Film produced from cathode ray tube display. (7) Audio output. These two classes of equipment will be taken in order and their application to a computing machine considered. The general principles to be observed are, that any input device should be capable of keeping the machine supplied with data at a speed a INPUT DEVICES sufficient to prevent wasted time, and that any output device should be fast enough to avoid disproportionate loss of machine time during the output operation. INPUT DEVICES Whereas most extant calculating machines have a manual input on key switches, these cannot be considered adequate. For solving a simple problem, of the type ‘find Vx,’ where the routine for solution is already stored in the memory they are, of course, as good as any other device since x would have, in the last analysis, to be first presented to any input device by either writing or key depression. When the computing routine is not already in the machine, how- ever, such an input device is quite inadequate, since the time of insertion of programme information would be, for all existing and for probably all future machines, of the order of 15 minutes. This does not imply that such an input should be omitted since it is particularly suitable for test purposes. ‘The typewriter keyboard suffers similar disadvantages to the key switch. It is perhaps slightly faster and has the advantage of preparing a printed record, but unless the calculating machine has a store of such a size that all programmes ever used by the machine are retained permanently it cannot be considered satisfactory. ‘Typewriting equipment can produce a permanent record of any material typed upon it not only in printed form but also on punched paper tape. The latter can be subsequently re-used by feeding through a tape reader connected to the main computer. By sensing the previously punched tape by electronic or photo- electric means it is possible to increase the reading speed from the customary 7 decimal digits per second of telegraphy, to approxim- ately 1,000 per second, the limitation being, not the sensing device, but the handling device for starting and stopping the tape. Effec- tively this increase in speed means that, assuming the main computer is adequately fast, many independent problem setters operating separate tape producers can be kept busy. ‘Using punched card equipment, problem preparation time remains approximately the same, but by optimum use of the avail- able card surface it is possible to input up to 300 decimal digits per second without the complexity of electronic or photo-electric sensing. Before proceeding to more sophisticated input devices, it is appropriate to consider the means of operating the mechanisms described above in conjunction with a high speed computer. The important principle is that the computer has an operating speed 75INPUT-OUTPUT several orders of magnitude greater than that of the input devices. This implies that for efficient and reliable operation, during input the computer should be the slave of the mechanism and not vice versa, Figure 8.1 shows a typical means of operating a computer from a teleprinter. ‘The computer is assumed to be of the serial operation type. When using the input device I is in the open Manval Z fee Inhibit eyeing es rt Se remote = computer Shit? pulses from 70 record eae ng Location ores oa mentee G) DODO--@ ed pulses Keyboard telaprinter Tope reader 2 € | Operates — Operotes s Z Figure 8.1 position so that the machine is incapable of internal cycling. Data to be inserted are typed upon the teleprinter keyboard, the printer mechanism prepares a typed record and at the same time emits a set of serial impulses corresponding to the binary coded form of the number or symbol being typed. ‘These impulses are applied to the input of a register R and at appropriate times the teleprinter mecha- nism supplies shift pulses to the register via buffer diodes B,, B,, By and gates £1 «++ fe Since the input number or word is destined to be recorded in the memory of the computer, the location must be specified. This is typed first, followed by the actual number, or word. Register R is connected to the control register of the machine, C, so that as the word digits and shifts arrive the location is eventually shifted out 76 Plate 2. IBM 1311 Disk Pack. (By courtesy of IBM United Kingdom Limited) (Ts face»INPUT DEVICES of R into the relevant positions in @. The important principle is that R and G can perform a shift operation in about 1 sec whereas the digit input pulse is available from the teleprinter for a time of the order of 2 x 10 usec; thus a large time exists for correct setting of the first register stage from the printer. At this point the word and location digits can be checked by examination of the typed record (teleprinters often make mistakes, but rarely, if ever, generate a wrong electrical signal and type the correct number). $ is then depressed and this causes the main computer to execute a record order which sends the word in R to the memory location indicated in C, suitable machine clock pulses being supplied to gi . . . g, This recording process is repeated until all information has been inserted, the machine cycle is then started by closing J. ‘To incorporate a standard teletype tape reader as input the same arrangement is used except that the printer is fed, via the standard connections, from the reader. The latter is so arranged that whilst tapeis still to be fed a control brush keeps [in the open position, and a further control contact actuates S at the end of each set of rows of tape perforations. In this way the tape is fed to the computer and at the same time a printed record is produced which can be used as a check on programme accuracy in case of malfunction of the machine, The use of a punched card reading device as computer input is even simpler. Assuming that binary data are to be inserted, 12 rows of 80 binary digits can be read from a single card. ‘The reading is parallel on all 80 columns simultaneously so that direct connection to the individual stages of registers R and C can be made, The duration of digital impulse from each card row is usually greater than 20 msec so that ample time exists to record the required word in the specified position before the arrival of the next row under the sensing brushes. The use of the punched card as a two-dimensional binary store is, however, somewhat unorthodox, and should the normal method of decimal representation shown in Figure 8.2 be used, a slightly different input procedure is necessary. Decimal numbers are represented by a punching as shown, Internal means exist, in punched card machines, for translating these decimal digits into their binary equivalents and these transla- tions can be fed, in parallel, to the R and C registers as before. It should be noted that this mode of use of a punched card is consider ably less efficient and about 10 times as slow as the binary two- dimensional technique previously described. EsINPUT-OUTPUT Up to this point only one of the possible uses of an input device has been mentioned, namely its function as an initial supplier of data to the computer. In this respect neither punched tape nor punched cards have adequate speed to match the operating times of current calculators, and only by multiple inputs using some form of time sharing can a modern system be fully utilized. The second aspect of an input device is its availability as an auxiliary store of effectively infinite capacity. Here the machine may require two Column 1238-- se rteceee sees 0 Row @ ” o}me 1 7 e ot 3 ’ 5 i 1 ? eon e ' s am WOSEOTASSSETO Figure 8.2. Standard ‘Hollerith? punched eard things, first the supply of fresh programmes or numerical data when it has exhausted those already contained in its high speed store, and secondly a repository for extensive tables of standard functions. Considering the first requirement, with a typical machine having an internal storage capacity of 4,096, 9 decimal (32 binary) digit words the filling time from punched cards need not be more than 2 min, this is about four times the filling time from punched tape photo- electrically read but is adequately fast for most purposes. The second application, that of hunting for an entry in a mathe- matical table, is more enlightening. Consider a machine repertoire of 10 tables, each of 1,000 entries, of 9 decimal accuracy. If this were randomly available to the machine on punched cards, optimally used, an average hunting time of about 24 min would be required to look up a given tabular value, only 45 sec would be re- quired by a photo-electric punched tape reader. This time is about two orders of magnitude too great, even for applications requiring relatively infrequent use of tables. The equivalent time, on a mechanical reader, is over two hours. 78 INPUT DEVICES Modern machines use either magnetic tape or magnetic disc packs for this second echelon storage, A typical tape unit might have a transfer rate of 30,000 decimal digits per second so that, at random, about 14 sec would be required to locate a table entry in the example just examined. The disc pack is far more efficient and, typically, ‘a random access time of }— } sec would locate the required entry. ‘The case in favour of the disc pack is, however, far stronger than this example indicates, because the random access time to as many as 3 million decimal digits is still } — } sec for the disc pack, whereas the magnetic tape would now require on average, about I min. ‘The structure of a typical disc pack is shown in Plate 2. The IBM 1311 Disk Storage Drive, Model 3, is self-contained in a com- pact cabinet and consists of two major components: the disc assembly and the access mechanism. ‘The removable disc pack is a compact unit that weighs only 10 Ib. As shown in Plate 2, each disc pack is composed of six discs, 14 in. in diameter, mounted Jin. apart on a vertical shaft. Circular plates are mounted above the top disc and under the bottom disc to protect the assembly. The six discs pro- vide ten surfaces on which data can be recorded. (The upper sur- face of the top disc and the lower surface of the bottom disc are not available because of the protective plates.) The entire assembly of discs, vertical shaft, and protective plates rotates at a speed of 1,500 rev./min, The access mechanism has five horizontal access arms mounted on a vertical assembly and each arm is positioned between two discs. ‘The whole assembly resembles a large comb. Each access arm has two read/write heads mounted at the extremity of the arm; each head is positioned to read or write on the corresponding upper or lower disc surface. The entire assembly moves horizontally from the ‘home’ position—the position in which the read/write heads are near the periphery of the discs—toward the centre so the read/write heads will have access to the entire recording area. ‘As the access mechanism moves from the home position toward the centre of the disc, it can be stopped at any one of 100 positions. In any of these positions a band of information, or ‘track’, can be read from or written on each disc surface as the disc revolves. ‘The ten disc tracks available to the read/write heads at each position thus provide 1,000 tracks of information. ‘The mode of operation of high-speed tape readers is of interest, four general methods of actually sensing the punchings are in general use. (1) By inserting a mechanical ‘pecker’ through the hole and using this to set an electrical contact which generates the 9INPUT-OUTPUT appropriate signal to the computer. This method is generally limited to speeds of under 20 characters per sec. (2) By sensing the hole with a wire brush which makes contact with a backing contact through the hole. Evidently only a single ‘make’ contact operation is possible using this method, ‘The wire brushes usually have a number of constitu ent wires, 3-10, and this reduces the liability to error due to accumulated dirt. For example, if each wire has an error probability of 45, then three wires will reduce this probability to ($q)3 or one error in a million. ‘The errors are assumed to be independent and gross accumulations of dirt do not satisfy this condition, this implies a frequent servicing operation to keep the brushes of this type of reader clean. ‘The operating speed of brush-sensing tape readers can be as high as 300 characters per second, but the usual limit is 100. (8) By photo-electric sensing. There is virtually no upper limit to the speed possible by this technique and available readers achieve 1,000 operations per second. (4) Pneumatic sensing, using the air transmitted through a hole to cause resistance variation in a hot-wire detector. The Soroban type FRA reader uses this technique to attain an operating speed of 300 characters per second, although it is claimed that 2,000 characters per second are possible. ‘The actual reading operation is only one-half of the function of a reader, it being also necessary to advance the tape between readings. ‘Two general methods have been used to do this: (i) Discontinuous or impulse methods involving some form of ratchet wheel in which the tape stops between opera~ tions. (ii) Continuous methods in which a roller system transports the tape with sensibly uniform velocity. Ifinformation is not to be lost it is necessary to be able to stop a mov- ing tape on any perforation at will. The impulse-driven readers do this automatically, but continuous-motion readers require careful design to ensure reliability. Figure 8.3 illustrates some typical mechanisms which have been used in tape readers. The only one which calls for comment is 8.3(c). It is to be noted that both rollers are driven continuously, otherwise the inertia of the free roller would cause slip onstarting and limit the start/stop operating speed. Again, both the rollers and the brake block should be in continuous contact with the tape. ‘The 80 INPUT DEVICES Tope Top plate —‘Pecker’ released ‘after tape has moved, Is withdrawn before next advance . Y This contact springs to upper position if pecker passes Upper through a hole Sprocket whee, ‘Contact | ‘moves tope contact (a) Tape - Metal strip for Wire brush, return path ‘mokes contact with Strip if @ hole is pees es present in the tope oa} Detent roller & spring Rotory solenoid Sprocket wheel Ratchet wheel. Powl (b) Continuously rotating Pontius ere Bonk of photocells ‘one to each track’ fee front stop for ‘armature Loose block in contact with: tape. Armature of electromagnet Nat Tope ~Electromognet No.1 Armature of electromagnet~ No.2 Electromognet_| No.2 Line light ‘source (c) Figure 8.3. (a) Pesker reader; (¥) Wharf Enginering brush reader; () bpical ig i Sg Paes op ee og 6—av.c. 81INPUT—OUTPUT start operation then consists in applying pressure to the top roller, via an electromagnet, whilst the stop magnet is de-energized. The stop operation removes this pressure and operates the stop magnet thereby clamping the tape between the loose block and the magnet pole face, which is fixed. The essential feature of the device is that only pressure is changed and physical motion of the system is virtu- ally eliminated. By these means speeds of up to 2,000 distinct start/ stop operations per second have been achieved in experimental readers, whilst speeds of 1,000 operations per second are commonly found in commercially available readers such as that produced by Elliott Automation. One or two extremely complex transport mechanisms have been produced in the past. These are cumbersome and unreliable and form a monument to misplaced ingenuity and absence of clear thought on the fundamental needs of the situation. The remaining input devices are considerably more remote from practical realization, although they seem worthy of discussion as having attractive features. ‘The possibility of mechanical recogni- tion of printed characters and of their translation into electrical impulse patterns has long been a subject of discussion among com- puting machine designers. A number of possible solutions exist, of which the simplest will be outlined here. ‘The paper bearing the letters or figures to be read is mounted ona platen as shown in Figure 8.4. This is movable, under the action of servo motors, in two mutually perpendicular directions. A glass. disc, opaque except for a set of transparent replicas of the characters to be recognized, rotates at high speed about an axis normal to its plane. A light source, behind the disc, illuminates the transparent regions in turn and the transmitted light is focused, by means of a lens, on to the surface containing the printed matter to be encoded. Assuming that the character concerned has been properly aligned with the lens system—an operation which can be performed auto- matically by means of the servo motors—only for one disc character will the light reflected by the platten be a minimum of pre-assigned smallness, this corresponds to the bright image of the disc character falling to exactly cover the printed character. When this minimum is reached, as detected by a suitably placed photocell, the angular position of the rotating shaft is made the basis of a device to trans- mit the coded version of the recognized character to the computer. This simple device leaves many questions unanswered, for example the moving of the platten at an adequate speed and the need to obtain accurate size relationship between printed and image charac- ters. These purely technical difficulties could, however, be overcome 82 INPUT DEVICES in a variety of ways. Again, difficulty would arise from the fact that, for example a printed O would give a minimum with the image C; this can be resolved by operating the device in such a manner that 0 always precedes C in scanning sequence and that recognition inhibits the remainder of that particular cycle. As far as speed is concerned it would appear that such an apparatus might work at 50 characters per second and in this respect it would be inferior to most of the other input devices. One considerable advantage might lie in the fact that problems could be prepared for machine use on ordinary office typewriters which, in the case of a large number of coding operatives, would effect a considerable saving in the cost of teleprinter equipment. ‘Peper fo be reed Aperture 1 eit light Lans from one character Light tight box with Sent dent Figure 8.4. Elementary character recognition device This simple device can be improved in numerous ways, for example, a flying spot technique can be used to replace the rotating disc and obviate the necessity of a moving paper platten with conse- quent increase in speed. An advantage of this lies in the fact that the characters traced by the flying spot can be directly generated from sample characters supplied with the problem sheet thus avoid- ing the need for standardized typewriters and opening up the possi- bility of recognizing handwritten script. 83INPUT-OUTPUT ‘The optical recognizer which has received the greatest com- mercial development is that produced by the Solartron Company in England. Their device is capable of reading the numerical symbols and some alphabetic characters produced by a cash register. This till roll’, as it is called, has the advantage of being in a regular form but, even so, care must be taken to ensure that the type is kept clean and certain standardizing operations have to be carried out at the start of each day’s work if accuracy is to be maintained. ‘The Solar- tron reader uses a flying spot tube to generate a raster which scans the character. Two operations are conducted for each character, the first to standardize the scanning position with respect to the object being read, the second to generate the signals which are actu- ally interpreted by the circuits. High speeds of operation are claimed and these range up to 300 characters per second. Other approaches to character recognition have been made by the E.M.I. company and by various American computer manu- facturers. In the E.MLI. equipment a specially constructed type fount is used which has the merit of being readable by human beings whilst still generating, in a simple vertical scanning operation, clec- tronic signals which are unambiguous to an electronic interpreter. ‘The American approach, intended chiefly for automatic cheque sorting, is to use special characters printed with a magnetic ink which can be sensed with a magnetic reading head. Examples of these characters are shown in Figure 8.5. Yet another possible character recognition device might be based on what may be called the ‘topology’ of alphabetic and numerical characters, this would depend on the number of times suitably placed scanning lines intersected the printed character. Several such devices have been suggested but none seems so simple in prin- ciple as the covering scheme which has been described above. ‘AS a final possibility for input devices it is proposed to discuss briefly the possibility of voice operated input equipment. Possible uses for such equipment lie in the fields of automatic language trans- lation and for stock-taking and similar on-the-spot record making. Possibly the simplest technique, although by no means the most efficient, is to prepare a magnetic recording of the word, and then to compare this record with a master recording containing all the words within the machine’s vocabulary. This comparison can be made in various ways, one of which makes a direct calculation of the function: Leaf. (u-w,)2 dt 84 INPUT DEVICES where u is the amplitude of the unknown word recording at time ¢ after its start, and w, is that of the nth word in the machine's vocabul- ary. The integral extends over the time T during which u lasts. ‘A numerical technique or a set of special analogue integrators can bbe used to calculate the Z, and the assumption is made that w is that word for which Z, is a minimum, o1e 34 8 678 9 10 Il 296 EML coded typetace lock fs ah 4) iy ?Qeamooan Waite (b) LL a { Wi (6) Yh 10111 M0 (a) Figure 8.5. (a) E.MLL. character reader, figures and electrical output ; (b) typical magnetic ce ink paltor from choque Another technique, which has been used by Fry and Denesh, makes use of the notion of formant frequencies. The analysis detects the presence or otherwise of certain frequencies in the spoken 85INPUT-OUTPUT word by means of filter circuits. The output from these operates a set of gates which form a many-one function table which identifies the word. In practice, unique characterization may not be pro- duced, and the machine then secks to use information regarding previous sounds to generate a probabilistically best estimate of the current word. A third method which has been used with success passes the input sound through a high pass and a low pass filter and uses the numbers of axis crossings of the direct waveform and of those produced by the filters for the duration of the word to give three characteristic numbers. These have proved adequate uniquely to identify the digits 0-9 spoken in a variety of accents. When a complete match had been found the digitally coded equivalent of the vocabulary word would be read out into the body of the machine. OUTPUT DEVICES The first type of output device to be considered is a visual display by lights or neons. From the purely technical standpoint neon lamps are greatly to be preferred to those of the filament variety on account of their small size, speed of reaction and low power con- sumption. However, the voltages required to operate neon lamps are generally unavailable in transistorized computers and so, for these, hot filament lights are often used. As a single output mechanism for a high speed calculator no form of luminous device can be considered adequate, however, since a human operator would be required to transcribe the displayed numbers on to paper. On the other hand, when a high speed computer is in use as an essenti- ally special purpose machine, such display may suffice. For example, if the machine is being used to test the primeness or other- wise of input numbers displaying, in the composite case, the lowest factor, no more sophisticated device is needed. Such prob- Jems as this are, however, not the chief raison d’éire of a large general purpose computer, and neons are many orders of magnitude too slow for general use. It is convenient to consider here device (5) of our initial list. It is easily possible to photograph, on moving film, the numbers dis- played onaneon bank. Using sensitive film and reasonably intense neons, an output speed of at least 50 numbers of as many digits as are required per second could be attained. ‘Teleprinters and teleprinter tape punches are the next form of output and these have been the most commonly used. ‘The funda- 86 OUTPUT DEVICES mental speed of these devices is approximately 7 characters per second. This is at least one order of magnitude too slow for most calculating machines, for example a typical slow machine could generate values of a third degree polynomial for equal intervals of the argument at the rate of 50 values per second. ‘More recently the Creed Model 75 teleprinter was introduced. ‘This uses a rotating and reciprocating type head of cylindrical form, and operates at a printing speed of 15 characters per second. ‘The latest form of I.B.M. electric typewriter, using a ball type head, achieves the same speed as the Creed device. ‘A 100 character per second typewriter, using high pressure hydrau- lic operation, has been introduced by Greeds and a similar but all electromechanical printer is produced by the Soroban Company for printing on paper tape. ‘A more satisfactory output device is the parallel channel printer of standard punched card equipment. This will output up to 80 decimal digits at a speed of 150 operations per minute. By suitable programme arrangements the 80 channel parallel output can be split into 8 or 9 digit groups and an effective speed-up of the output by this factor obtained. A very considerable advantage of this type of output lies in the fact that it was designed with the require- ments of numerical work in view, specifically to be extremely accu- rate and reliable. The punch-card companies and computer manufacturers have introduced other forms of parallel printers in order to increase oper- ating speeds. Four general forms exist: in the first a matrix of 5 x 3 or7 x 5 small wires generates each character by means of suitable coding impulses supplied to individual wire-driving sole- noids. In the second a roller has up to 80 bands, each of which contains all of the characters needed. The roller rotates continu- ously and a set of hammers, one for cach column of characters, re- ceive timing impulses and sandwich the paper onto an inking ribbon and thence to the appropriate type which is thus impressed on the paper. The third method uses one set of type mounted either on a large disc or on a chain which rotates continuously. ‘The paper is curved to lie close to the disc or is placed in proximity to the chain which is, of course, in a straight line, Hammers are again used at each column and are so timed as to strike the paper when the appropriate character is in position to be impressed. The fourth method uses a cathode ray tube or a special electronic character generator such as the ‘Charactron’ to form the letters or numbers and then records these either by photography or by a Xerographic printer, 87INPUT-OUTPUT ‘The speeds of the various devices vary from 15 lines per second for the Potter single-wheel printer, to 30 lines per second for the roller inter. Existing models of Charactron printers work at about 400 lines per second, but future developments may increase this by a factor of 10. Figure 8.6 (e) Matrix printer; (b) roller printer 88 OUTPUT DEVICES It will be clear that the increased speeds which these devices make possible are only achieved at the expense of great complexity in the selection circuits. This may, to some extent, be reduced by the use of built-in magnetic impulse generators on the devices or of pre-wire core stores. Photo - electric commutator ‘Paper, moving continuously (a) Figure 8.6 (¢) principle of Potter single wheel, ‘kit-on-the fly, printer; (d) Principle of chain primer ‘Typical examples of printers are illustrated in Figure 8.6. ‘The devices so far described may be called primary in the sense that they generate outputs directly interpretable by human beings. 89INPUT-OUTPUT ‘The next group of apparatus provides high speed output but in a form not suitable for ocular examination, the point being that such output can then be distributed among several ‘interpreting’ devices working at more moderate speed whilst the complex and expensive main computer is free for other work. First of the high speed output devices is the magnetic wire, tape drum or disc pack. This will be familiar from its previous inclusion amongst the input devices; the important factor when output is Die block — Stripper _‘Se" magnets Tape, ¥ eee Punch block: Reset’ magnets ZL \ pt — lie — Freguency . doubling toggle Constant diameter cam retain continuously Figure 8.7. Principle of Soroban punch considered is the possibility of its operation at the same digital repetition rate as that used in some computers—up to | Mejsec. ‘This means, in principle, that no slowing up of the main machine is necessary on account of output requirements, As an example of this flexibility, a magnetic tape has been used to record all of the numbers held in the registers of a computer during the whole of a computation, a most valuable diagnostic tool. A minor, but real, advantage of magnetic devices lies in their erasability, which means that the large quantity of medium used in a high speed diagnostic device can be re-used as many times as required. ‘The use of film produced from a neon display has already been considered at the beginning of this section; a disadvantage of this form of output lies in the fact that, in the simple form at least, the photographic record will contain only dot imprints whose positions give the digital value of the actual output—at least in any system of notation other than binary. Almost all computers have an output on punclied tape or cards. 90 OUTPUT DEVICES ‘The latter can be produced at rates of up to 250 cards/min and the former at up to 300 characters/sec. ‘The design of ultra high speed punches calls for great care both tominimize the actual physical motion of the punch knives and the accelerations to which the mech- anism is subjected, Three interesting devices have been produced which illustrate these principles. The‘ Teletype’ 60-110 characters/ sec punch, the Wharf Engineering 100 character/sec punch and the Soroban GP-2 300 characters/sec punch shown in Figure 8.7. It will be noted that the 300 characters per second rate is achieved with a motor speed of only slightly more than 3,600 rev/min. This is a consequence of the use of the toggle and of the constant diameter cam, the latter also has the advantage of operating both the punch ing and withdrawing parts of the cycle without using a spring to keep a follower in contact with the cam. ‘The magnets which oper= ate the interposers are arranged so that each interposer is set by one magnet and withdrawn by another. ‘This avoids the energy which would be wasted ifa spring were used to produce the return motion. ‘The Scottish firm of Dobbie McInnes (Electronics) Ltd. have re cently produced two interesting computer input/output devices, the first of which is the Pencil Follower Trace Analyser. For many years the analysis of analogue traces has involved the necessity for complicated reading equipment requiring a hard- working specialized operator. ‘Automatic analysers have been devised for special purposes, but are generally not suitable for all requirements. "The operator’s equipment has previously consisted of a reading unit on which the record is stretched, a cursor or light spot being moved to position by hand wheels or similar methods. At each reading position, a footswitch or button causes an automatic readout to be obtained onto punched tape, cards, etc. The Pencil Follower merely consists of a ‘free’ pencil which is picked up by the operator and pointed at the desired position or moved along a desired line. In the first instance, the co-ordinates ofa point are obtained as a digital output, and in the second case as a stream of co-ordinates, usually on a fixed time basis, Readout is obtained whenever a button on the side of the pencil, or a footswitch, is ‘The continuous line output mode is particularly suitable for com- puter use, as more information is output for sharp peaks and at intricate features, where the operator automatically goes more slowly. Special facilities enable readings to be taken from curvilinear pen recordings as well as normal rectilinear recordings and charts. The 91INPUT-OUTPUT readout of information is normally backed up by the addition of keyboards, address units, etc. ‘The Pencil Follower is particularly suitable for use with projected images. In this case the pencil is replaced by a white square which is positioned by the operator. On the upper part of the square a cross is engraved and the image falls directly on to this surface so that no parallax errors are involved. Operation of both types of equipment is very fast. Point read- outs can be obtained at a rate of 2 per second, and on continuous line work this speed is limited only by the required accuracy and the rate of punchout. In certain instances, in particular with high accuracy map work, magnetic tape can be used to record the output. This device is probably the simplest that could be devised since people learn to use a pencil from their earliest days and there is thus no necessity for special operators. ‘The method of working is that a small coil is fitted in the pencil point or at the centre of the ‘square’, and an a.c. current circulates in this coil which is fed by two light electrical leads. Below the reading surface is an XY servomechanism which accurately locks on to the magnetic field produced by the current passing through the coil, and digital units are attached to the servomechanisms, An interesting new development has just taken place in the use of the equipment as a method of finding ‘best fit” lines, One important application of this is the analysis of spark chamber photo- graphs. Instead of a white square a white ruler is used with a line drawn down the centre, and this line is adjusted by eye to the ‘best fit’ position. ‘Two coils are built into this ruler—one at each end. On pressing the readout button first one coil and then the other is energized, the mechanism first homing on one end and then on the other. The output appears as X1, 71, X2, 2. The same method is used in examining kinetheodolite photographs where the attitude of a mis- sile in flight has to be output. ‘The second interesting development, the Microfilm Plotter, is con~ cerned with computer output devices. In most plotting devices, which may have an analogue or digital input, a printing mechanism is moved into position over the required area. In microfilm plotting the printing unit remains still and an optical unit passing the image to the microfilm is moved. By this means very high speeds can be obtained and very complex prints can be produced. To be a practical general purpose unit, this equipment is associ- ated with an automatic processing unit and standard microfilm 92 OUTPUT DEVICES enlarging apparatus. For ease of handling, the microfilm is mounted in an aperture card and the process is entirely automatic from the time a batch of unexposed aperture cards is placed into the light-tight cassette, until the exposed and processed microfilm mounted in a card is presented to the operator. . ‘The operator may then pass this to an enlarger for examination, or an enlarging printer, or to a copier, or it may simply be filed away in store. In any case, standard drawing office equipment, which is readily available, is used for all these processes. A special image-generating unit has been devised using engraved Perspex sheets—selection of the appropriate symbol is by selection of a par- ticular lamp and is entirely electrical. For line drawing, a single spot of light is used. Speeds of line drawing equivalent to several metres per second on the enlarged copy and more than 2 complex symbol plots per second can be obtained. After the microfilm has been exposed for the necessary lines and symbols, the automatic pro- cessing then takes 50 sec. ‘Applications of this unit cover all the general field of graph pro- duction and also enable more complex ones, such as synoptic charts for meteorological work and PERT network analysis drawings, to be easily and automatically made. Finally, as with the input devices, it is worth considering the possibility of generating a sonic output from a computing machine, not with a view to its use in strictly mathematical applications, but rather for the possible application of computers as translating or interpreting devices. The production of musical sounds from a high speed calculator is trivial, all that is needed is an audio ampli- fier and speaker connected to the output of a register or to the main store. If a single unit is stored in the register and is caused, by means of a suitable iterative routine, to cycle with a given frequency, a note of corresponding pitch will result at the speaker, Harmonics of the fundamental can be produced by the simple process of altering the disposition of the number of units in the register thus: Fundamental _1111111100000000 Ist Harmonic 1111000011110000 2nd Harmonic 1100110011001100 3rd Harmonic 1010101010101010 and other non-integral ratios can be similarly obtained to give the notes of the common chord. This application of a computer has already been realized and made the basis of an adequate perfor- mance of ‘God save the Queen.” ‘The production of the spoken word requires a more elaborate 93INPUT-OUTPUT equipment than that needed for the generation of music. Two schemes are available; the first is the naive one of recording each word to be spoken on the magnetic medium and arranging for a suitable coded output from the machine to select that portion of the record containing the word to be ‘spoken’ and to gate it to the audio output device. ‘This scheme, although it might give very realistic output, would be complicated to engineer and would involve an exceedingly bulky apparatus. A simpler technique is to use the method of speech output developed for the ‘Vocoder’ or *Voder.’ Essentially this generates the relevant speech sounds by the sequen- tial combination of a very small number of basic tones which, in the present application, might conveniently be recorded on magnetic tapes and be selected by the machine as required. Spoken word production has recently achieved practical operation in an experi- mental machine constructed at the I.B.M.: T. J. Watson Labora- tories, N.Y. RETROSPECT Looking back over the preceding discussion of input/output devices it is possible to make some general observations concerning those systems which appear best at the present time, In the first place, any calculator should be fitted with a manual input and a visual output of the simplest and most reliable kind as an aid to the service engineer who has to maintain it. All of the more sophisticated terminal organs require that a large portion of the main machine be operative before they can be used. When a breakdown occurs this is unlikely to obtain and in the absence of a simple device the unfortunate engineer is reduced to the laborious process of input via a suitably connected screwdriver and connector, and output via a valve voltmeter! As far as the automatic and high speed input/output are con- cerned the choice ee largely upon the amount of use required of the main machine. In small installations the combination keyboard printer, perforator and reader is probably adequate, especially if the internal store of the machine is of the magnetic type so that working instructions do not have to be input after each shut- down. Modern, ultra high-speed, machines have many input- output devices associated with them. ‘These may be situated along- side the machine or at a great distance away and connected by telephone wire or micro-wave link. The reliability of such inter- connecting systems has been carefully investigated during the past few years and it has been established that both form adequate means o4 RETROSPECT of communication. ‘To produce reliability it is usually necessary to use at least an error-detecting code for the transmitted data and, in many cases where accuracy is of paramount importance, correc tion and detection circuits are often installed. The extensive peri- pheral installations of modern machines have led to the provision of satellite computing facilities which perform data-processing opera~ tions independently of the main machine. Thus input data concerning inventory may automatically modify inventory files so that when the main machine uses them the data are up to date. Large-scale data files such as discs are often arranged so that the main machine uses one set of access heads whilst the external con- nections use another. This leads to the truly simultaneous use of one store by several machines. 959 GATES In discussing the specific circuits and devices used in the construc- tion of a high speed automatic computing machine it is a matter of some difficulty to find a logical starting point. If, as might seem appropriate, the memory or store were taken first it would at once be found that the organization of this required the use of a number of interconnecting elements whose properties and function had not previously been studied. The same argument holds with even more force in the case of arithmetic unit components which are constructed entirely from simpler and more fundamental sub-units. Careful consideration suggests that the proper element to receive consideration should be either the single digit storage clement or the gate. The latter has, in fact, been chosen because the physical form of a gating element is such that it can be applied in a machine using almost any high speed storage device. ‘The design of the single digit store, on the other hand, depends to a large extent on the particular form of the main store and particularly upon its speed of operation. ‘TYPES OF GATE LOGIC In the previous discussion of computer logic some of the gates used were of the types in which inputs a and 6 would produce an output if both were present, this type of gate is called an ‘and’ gate. ‘The other type of gate used was that in which either a or 6 (or both) pro- duced an output, this is called an ‘or’ gate. The problem of the adequacy of such a pair of fundamental units to produce a whole, general purpose, computer was solved by example rather than by logical argument. In fact, a critical examination of the preceding pages will show that, generally, three other things may be needed, either the presence of an inhibitory gate: that is one in which the presence of one signal denies the passage of another, or the presence of an inverting element: that is, one which produces no output when it receives one, or produces an output when it does not receive one, or, finally, the use of single digit storage elements, like the flip-flop, in which both the digit (or signal) and its inverse are simultancously available from separate outputs. 96 ‘THE ELECTROMAGNETIC RELAY The interesting question arises: is there any single element which is adequate to perform all of the tasks in a computer? The answer to this was provided by the logician D. L. Webb and was presented in intelligible form by R. L. Goodstine at a lecture to the British Association given in 1961. In simple terms it is that two such cle- ments exist, first the ‘nor’ element which produces an output if neither a nor 6 is present, and secondly the ‘nand’ element whose output occurs when a and 4 are not present. It can be shown that both of these elements are particularly easy to construct from any active electronic element such as the valve or the transistor since these automatically invert the sense of an incoming signal in producing their output. A word of caution is, however, necessary. ‘The blind use of a single clement is likely to result in a very redundant computer design and the practical designer is well advised to exploit the physical situation presented by his storage medium rather than blindly to rush into an enthusiasm for uniformity, ‘THE ELECTROMAGNETIC RELAY ‘The simplest and most versatile gate clement, although also the slowest, is the electromagnetic relay. It consists essentially of a soft iron armature a [Figure 9.1 (a)] normally held out of contact with a core c by means of a spring s. Upon application of an electric current to the leads, AA, of a coil of wire wrapped about ¢ the armature a is attracted against the force of s to make contact with c. The current to be ‘gated’ is supplied to a via a lead B and is then directed to one of two outputs @ and D according to the presence or absence of current on the leads AA. For convenience of drawing, a relay is usually represented as shown in Figure 9.1 (8). ‘The coil is replaced by the rectangle and the contacts by the structure B, C, D. Relays are available with several coils and a variety of contact arrangements, but in general it is true to say that the greater the number of contacts, the slower the operating time of the device. A typical example of a fast relay is the Siemens high speed relay which has up to two operating coils and a single change-over con- tact; this has an operating time on make or break of about 1 msec. ‘The British Tabulating Machine Company has produced a similar relay with up to 8 change-over contacts and an operating speed of only 1-5 msec. Typical of a slower relay is the P.O. 3,000 type. This can have up to 3 coils and up to 6 change-over contacts, its speed of operation is about 20 msec. Current handling capacity of the 7-av0. 97GATES Siemens type relay is up to 2 A, and that of the P.O. 3,000 type, with suitable contacts, up to 5 A. Figure 9.1. Electromagnetic relay More recently the telephone companies and those manufacturing punched card machines have introduced the wire relay in which a number of single wires form the respective contacts. These are moved (by bending) via an insulating card operated by the arma- ture. The speed of wire relays is intermediate between the P.O. 3,000 and the Siemens high-speed relays and, for as many as 10 change-over contacts, may be as low as 5 msec. @ ) Figure 9.2. ic puivale marian Figure 9.3. Use of relays as multiple gates It is seen that a single relay is essentially a 2 gate of the type used in previous chapters. Figure 9.2 (a) shows the logical notation lettered for comparison with Figure 9.1 (6). By rearranging the contact connections in accord with Figure 9.2 (b) an inhibitory or ‘not? gate is produced. By the use of relays in series it is possible to produce multiple gates and multiple gates with inhibitory connections. A typical example of this application is shown in Figure 9.3. Here, the coincidence of 98 THE ELECTROMAGNETIC RELAY inputs on leads A and B leads to an output on G so long as no input is present on E. In logical terminology a gate of the type shown in Figure 9.2 (a) is known as an ‘and’ gate, and that shown in Figure 9.2 (b) as a ‘not’ gate; the third conventional logical element is usually called an ‘or’ gate. This can be realized in a number of ways by means of relays, one of these being shown in Figure 9.4. ‘The relay circuit has been drawn so as to bring out the close analogy with the basic logical diagram used, for example, in the half adder of Chapter 6. ‘The close analogy of relay circuitry with the elements of symbolic logic has been made the basis of a number of applications of that calculus to the design of such circuits. Boolean algebra, as it is A Figure 9.4, Use of relays as ‘or elements called, is a convenient method, in principle at least, for the solution of design problems; in practice, however, it is almost invariably quicker to proceed by more intuitive means. It is almost a truism to say that some engineers will design an optimum relay circuit in a very small time without any reference or knowledge of propositional calculus, whereas others, less gifted, will never design a good circuit using any means. Before leaving the subject of relay gates it is appropriate to make a few remarks on practical matters. For general computer work the best form of high speed relay seems to be that having a coil resistance of 2,000 Q, this operates very reliably and fast when placed in the anode circuit of a pentode type valve capable of giving a continuous current of 15-20 mA. For reliable circuit operation a voltage in excess of 50 should exist across any relay contact just before closure, this has been shown to produce a microscopic weld on contact which ensures negligible contact resistance. ‘The normal contact material for high speed relays is platinum; it appears that rhodium 99GATES would be more suitable from the contact resistance viewpoint, but the latter material does not seem to have been used. Contact pressure in the released position should be at least 17 g and on ‘make’ slightly greater than this. For relays of the P.O. 3,000 type a coil resistance of 2,000 Q again. seems optimum for valve drive circuits. Contacts are generally of silver and the pressure depends almost entirely upon the number of sets mounted upon the relay. ‘The advent of the power transistor has greatly decreased the use of relays in computing machine peripheral circuits. Their present usefulness is limited to those situations in which the multiplicity of contacts available at low cost override the disadvantages of slow reaction time and short life, THE DIODE The relay, because of its mechanical construction, is essentially a slow device, and in order to produce a faster gating operation it is necessary to have recourse to electronic ete ‘The simplest Figure 9.5. Equivalent diode circuits form of electronic gating element is the diode, ‘This can exist in several distinct forms; in the first a suitably coated cathode is heated by an external source of current and emits electrons. At some distance from the cathode and mounted with it in an evacuated glass envelope is a collector plate or anode. When a positive poten= tial is applied between anode and cathode electrons flow from the latter to the former giving rise to a current in the external circuit; a potential applied in the reverse direction, however, produces no corresponding electron transport and consequently no current flows. An exactly analogous situation exists in certain semi- conductor devices. Diode gates are not the precise equivalent of the relay for a number of reasons. Apart from physical characteristics, which will be considered later, the diode can be considered as only one halfof a change-over relay contact system. Figure 9,5 shows various representations of the diode. In each 100 THE DIODE case the direction of conduction is from top to bottom under the influence of a positive potential. In practice, more or less conduc tion may occur under conditions of reverse bias, For the thermionic diode reverse conduction is virtually negli down occurs but, for the semiconductor diode, a progressive increase in reverse current is observed with increasing reverse voltage. This increase becomes catastrophic at a certain breakdown voltage and the clement may be destroyed. In modern computer design only three types of diode are used to any extent, these are based respectively on selenium, germanium and silicon. The selenium diode, apart from its use in power recti fication, is only applied in situations where operation at frequencies below 100 kojsec is required. In operation, all diodes are charac- terized by a forward resistance and capacitance R;, G,and a reverse resistance and capacitance R,,C,. For the selenium diode R,, Cr obey the approximate relationshi Ry xG,22105Q.ypt ‘This means that for a forward resistance of 1000 the associated capacitance would be 1,000 pf which is far too high for high-speed operation, Germanium and silicon diodes combine low forward resistance with low capacitance and the latter are also desirable because their back resistance is of the same order of magnitude as that of hot diodes. ‘At very high speeds of operation another effect of semiconductor diodes may become objectionable. This is the so-called ‘hole storage phenomenon’ in which, after a period of forward conduc- tion, the diode appears as a short circuit in the reverse direction for a period which may be as long as a few microseconds. Special diodes in which this effect is minimized are, however, available for computer use. It must also be mentioned that the junction type diode, whilst having a very low forward resistance, greatly resembles the selenium diode in its large capacitance. ‘These diodes are not generally suitable for use in the high speed part of a computer although they may find a place in the peripheral equipment. Some typical diode circuits are shown in Figure 9.6. In Figure 9.6 (a) is shown the diode equivalent of the 2 gate. Dy and Dz are the two diodes required for efficient operation of the circuit, the potential at B is set by the resistor Ry connected to a source of, say, +10 V potential. Diode D, and its associated resistor Ry have a combined resistance small, say 7s, compared with that of Rg, so that in the absence of an input on line A the potential 101GATES THE TRIODE, at B is approximately 1V. R, gate is that its output characteristics depend entirely upon those or cathode of diode D, at a potential of +21 V, that is 20 V positive its input and no regeneration of signals occurs in the gate so that with respect to its anode. Under these conditions a +20 V pulse additional pulse shaping equipment will, in general, be needed if applied at B will drive the anode of D, to a potential of +20 V gates are to be used in series, When transistor circuits are used to which is just insufficient to produce conduction and thus output drive the inputs the effective resistance of each input circuit will be at D. If, on the other hand, A is in receipt of an input voltage of of the order of 100. This means that the voltage step produced +30 V, say, D, is normally cut off and the potential at Bis +10 V. at the output when only one input is switched will be about Under these circumstances an input pulse of +20 V at B will pro- INGTA duce an output pulse of +11 V, through the diode D3, at D. Input 1 Input 1 2 real oenry Theat Output Input 2 OV 6 22k ouput Ov id 5 +22 ot fa) (b) Figure 9.7. Diode* AND? gate ts V. which is unlikely to be large enough to justify elaborate clipping circuits. A similar circuit can be used to produce an ‘or’ gate, as shown in Figure 9.8 (a). The only point which merits remark in connection with this type of gate is that the output imped- Figure 9.6. Typical diode gating circuits ance is that of the 22k Q resistor for the negative start of the wave- form, so that only slow changes can be produced across appreciable A more complex variant of this circuit is the 3 gate shown in output capacities. Figure 9.6 (8). This is identical with Figure 9.6 (a) except for the addition of an extra gate input E, The operation is the same uty INSTA as before except that now, since both Ry and Rg are much smaller we Input 1 OV than Rp, the potential at B remains approximately +1 V unless an pera, ouput —inpytg OV. input occurs on both A and E simultaneously. “eV ‘To produce an inhibitory input it is merely necessary to arrange 224M Output that the input voltage at A [Figure 9.6 (a)] is normally +30 V, L UW Urey in which case the gate is open, and that a negative gate voltage is applied when inhibition is required. Figure 9.8. Diode‘ OR’ gate eee ee ee eee The illustrations have been drawn for negative pulse inputs, by dal de ouaat Dominica oe reversing the sense of the diodes and of the supply voltages, the same ae Satie meet icioeae gates are applicable to positive pulse operation. voltage pulse can then pass diode D, at high speed and with good rise time of leading and trailing edges. A typical example of a exaicg ry modern ‘and’ gate using semiconductors is shown in Figure 9.7 (a). When considered as a gating clement the triode valve is in some sense ‘This gate responds to negative signals and produces a negative out- more akin to the electromagnetic relay than is the diode. Par- put as shown in Figure 9.7 (b). ‘The disadvantage of this type of ticularly is this the case in the isolation which it affords between 102 103GATES input and output. Without going into detail the triode may be considered as a diode into which has been inserted a control element. ‘This element, known as the grid, is usually in the form of a wire mesh interposed between cathode and plate. When its potential approximates that of the cathode a positive potential applied between plate and cathode is still able to draw electrons through the interstices of the mesh. When, however, the grid potential is sufficiently negative with respect to that of the cathode, all electrons are repelled back to the latter and none pass to the anode. In terms of relay circuitry the triode value may be represented by the circuit of Figure 9.9. Itis to be noted that a diode element has been inserted in series with the relay contacts, this is to conform with the physical fact that 2 4 % Plate f ond RY 1 2 0 Figure 9.9. Triode and relayrectifer Figure 9.10, Anode coupled trade ‘equivalent ae eee the plate/cathode circuit of a triode has the properties of a diode and will not pass current in the reverse direction. Apart from its control function an essential property of the triode is that the grid circuit can control large currents in the plate/cathode circuit with- out itself drawing appreciable current. The first application of triode valves to the construction of a 2 gate is shown in Figure 9.10. This circuit is the equivalent of the diode circuit of Figure 9.7, when no signals are applied at inputs A and B both triodes behave as the diodes of the latter figure and maintain the potential at D equal to: FRI(Ra + 4R) x Vs If R,~10 R, this means that the normal voltage at D is about 2s of the supply voltage V,,_ When either of the triodes is cut off by a negative potential at its grid its resistance becomes effectively infinite and the voltage at D rises to 74s of the supply voltage. When both triodes are cut off, however, the voltage at D rises to the full supply voltage V,. 104 THE TRIODE Compared with the diode circuit this version has the advantage of very high impedence input at 4 and B, but the disadvantage that since the internal resistance of the triodes R, is usually about 7,000 Q, an anode resistance R, of 70,000 © must be used and an output waveform rise time—assuming 20 wuF capacity—of about 2 usec is the best that can be hoped for. ‘To produce an n gate it is merely necessary to connect additional triode elements to the common anode point remembering, however, that each additional valve introduces an output capacity of at least 10 wuF with consequent additional variation of the output rise time. It must also be remembered that small output variations will result from any change in the input conditions and it is generally necessary to follow this type of gate with a clipping stage. Figure 9.11. Cathode coupled double triode gate Next in the list of possible triode gate circuits is that shown in Figure 9.11. ‘Here use is made of the fact that if the cathodes of a pair of triodes are connected together and taken to earth via a resistor Rg, then if the grid potential of either stage is V, the cathode potential is approxi mately the same when Re is suitably chosen. The effect of this is that if both grids G, and G, are kept at a common potential a negative pulse applied to cither of them separately will produce little voltage change at D. When both receive simultaneous nega- tive pulses, however, the potential at D falls to whichever grid voltage is the greater. Exactly as in the anode coupled gate a number of such devices can be connected together to form an n gate. Using normal valves a value of Rx of about 20,000 Q can be used with a supply voltage V,=150 V, this means that the ‘rise’ time attainable with the device is somewhat better than that in the anode coupled case. It has been suggested that the ‘rise’ time should be that of the valves themselves, that is, equivalent to that obtainable across 500-1,000Q. This is not so, since for negative 105outputs the output impedance of any cathode follower is equal to that of its cathode load Rx. ‘An advantage of the cathode coupled gate circuit is that the out- put potential is approximately equal to the input potentials; this means that stages can be series connected without the elaborate biasing networks required in the anode coupled gate. Disadvantages are, first that the cathodes of the triodes may be operating at a considerable positive potential with respect to the heaters and care must be taken to observe the manufacturers’ limits on this voltage; and secondly, that the negative output resulting from the gate has to be clipped to remove the breakthrough resulting from the operation of A or B separately. The latter clipping operation is complicated by the negative nature of the pulse and the want of an efficient clipping amplifier for such wave- forms. Many of the faults of both of the above circuits are removed in the combined version shown in Figure 9.12. In this circuit the potential on grid B is normally low, say 60 V, that on grid A is high, say 90 V, so that the potential across Ry is effectively that at 4, i.e. 90 V. If, now, A receives a negative im- pulse of 20 V amplitude, potential at Ry drops to 70 V which is Figure 9.12. Anode output cathode coupled gate still below the cut off voltage of V. In the same way, if A is at 90 V and B receives a 20 V positive impulse the voltage on G3 rises only to 80 V so that V, is still cut off. If, however, A receives its negative pulse at the same time as B is driven positive, conduction through V, is transferred to V, with a resulting negative output on D. The important features of this circuit are first that no break- through occurs on D for changes on A or B singly, and second, that since the device is essentially a current-switching one, the resistance 106 THE TRIODE Ry can be made as low as required with consequent improvement in output fall time. Typical values are Rx =22,000Q, Ry =4,700Q, which give an output rise time across 20 uuF of v's usec. Just as in the other devices described a multiple gate may be formed by the addition of as many type A input stages as are yuired. ‘A considerable advantage of this gating system lies in the fact that it may be modified, by the substitution of a pulse transformer for Ry, 80 as to give a positive output waveform. This is a particular advantage if subsequent pulse amplification is required, since appro- priate biasing for the amplifier stage is readily obtained as shown in Figure 9.13. Before concluding the discussion of the triode as a gate element, it is perhaps worth mentioning a further mode of connection which has been applied, this is shown in Figure 9.14. Here the triodes are series connected with a suitable anode resistor as shown. If A and Bare held at a potential of, say, — 10 V, both triode sections will be non-conducting and the potential at D will be equal to V,, If either A or B is driven positively, current flow Amplifier Figure 9.13, Modi Or postive Figure 9.14, Series connection igure 9.13. Modifation for posite eu to fertle ae will still be inhibited by the remaining triode; if, however, both A and B are simultaneously in receipt of positive inputs, both triodes conduct and a negative output appears at D. Unlike the previous circuits this one does not appear to have had extensive trial, but it would appear that it offers considerable promise for certain applications, as shown by its successful use in the ACE. From a practical point of view the valve types 6J6, 6SN7 and 107GATES 12AUT or their equivalents are particularly suited to the triode gate circuits previously described; for details the reader is referred to the relevant manufacturers’ data sheets. BI-DIRECTIONAL GATES ‘The gates just described have the property of passing signals which consist essentially of a pulse of either positive or negative polarity. It is sometimes necessary to have a gate available which will pass composite signals and which, furthermore, does not produce an appreciable output or ‘pedestal’ when the gate is operated in the absence of a signal. ‘Two systems which have been found to be practically useful are shown in Figure 9.15. In Figure 9.15 (a) is shown a diode clamp circuit in which signals appearing via the capacitor C are shorted to earth by the diodes D, and Dj. When a positive gate signal is applied to Ry and a negative gate signal is applied to R, the diodes o Input, Output iG iq Figure 9.15 become non-conducting and any subsequent output through C is transmitted without modification. To avoid the necessity of providing anti-phase gating signals Ry and Ry are often replaced by a centre-tapped transformer whose centre is grounded. ‘The second bi-directional gate is shown in Figure 9.15 (b). The grid-cathode circuits of the double triode perform the same function as the diodes in the gate just described. If a large negative voltage (200 V or more for the 12AU7 or 6SN7) is applied to the anodes electrons are repelled to the cathodes and are unable to reach the grids, the gate is thus opened. MULTI-GRID VALVES Just as it proved possible to control the electron flow in a diode by the insertion of a grid, so also can additional grids’be inserted into 108 ‘THE TRANSISTOR the triode valve to give additional control function. At present only one such multi-grid valve, the 6AS6, seems to be suitable for use in computing machines. This has the unique advantage over other valves of multiple input type that the voltages required to effect cut off are the same on both grids; in the case of other valves this is not true and in some instances the second grid G, in Figure 9.16 requires 5 to 10 times the applied voltage as G,. ‘The operation of this device as a gate is precisely the same as that for the series arrangement of triodes previously described in con- nection with Figure 9.14. Ifthe valve is held cut off by suitable bias Figure 9.16. * Matli-grid valve as gate potentials applied at A and B, only by simultancous application of positive gating voltages at these points will the valve conduct and in so doing produce a negative output at D. Whilst in principle, at least, the multi-grid valve is an excellent gating device it suffers, in currently available types, from the dis- advantage that the resistance to ground in series with G must not exceed a few thousand ohms. This makes the device an essentially low input impedance one and severely limits its application. ‘THE TRANSISTOR Just as it is possible to insert a control grid into a vacuum diode ‘and thus convert it into a triode, so it has been shown to be possible to control the transmission characteristics in semi-conductor diodes. The resulting device is known as a transistor. The electrodes in the transistor are known as emitter, base, and collector respectively and the conventional notations are shown in Figure 9.17, it is sometimes helpful to regard these electrodes as the analogues of the cathode, grid and anode of the triode, although the action of the transistor is quite different from that of the former. ‘Three types of transistor are generally available: p-n-p; n-p-n, and symmetrical. ‘The n-p-n transistor is the equivalent of the thermionic triode, except for its impedance characteristics which are about two orders of 109GATES magnitude lower. The p-n-p transistor has similar impedance char= acteristics but is the equivalent of a hypothetical triode which uses positrons instead of electrons. The impedance characteristics of transistors differ from those of triodes in that input resistance to the base is relatively low and output resistance is relatively high. Lnitter Collector i eae hae Pap npn Syrmetrico! (2) (») G) Figure 9.17. Notations for transistor tes Gate circuits with transistors follow closely those available with triodes, thus Figure 9.18 (a) is the transistor equivalent of Figure 9.11, and Figure 9.18 (b) that of Figure 9.14. Tt will be noted that the gate of Figure 9.18 (b) inverts the sense of the incoming pulses as well as acting to combine them. Logically ov By 2N1306 dnout 1 input 2 Ov wT —=6v ‘output kn Lagy ev ( o Figure 9.18, (a) Transistor ‘AND? gate; (b) transistor ‘NOR’ gate it can be regarded as performing the function NOR, that is NOT input 1 or input 2. The by-pass condensors across the input resis- tors fiunction to increase the response speed to sharp pulses and the diode at the output acts as a device to limit output swing to the pre- scribed value. It was explained that the NOR and NAND elements have the virtue that either is a sufficient device, logically, for the construction 110 THE TRANSISTOR of a complete machine. For this reason much effort has gone into the design of NAND and NOR elements of minimum complexity. Typical examples of such minimum designs are shown in Figure 9.19. The configuration (a) produces an output only if all three inputs A, B,C, are zero. ‘The NAND gate (b) produces an output only if all three inputs 4, B, C, are unity. ‘The output of each element is compatible with its own input and the fan-in and fan-out is, in each case, three. Fan-out is defined as the number of elements which can be driven by the output ofa given element, fan-in as the number of inputs which an element can receive. <12V+12V av 12 3k SI6KA Inputs 562 56ko ‘a Ouiput A Output ¢ @ ©) Figure 9.19. (a) ‘NOR’ gate; (#) ‘NAND" gate ‘A recent development in the transistor family is the field effect transistor. This has the desirable characteristics of very high input impedance and low output impedance and thus resembles a ther- mionic valve, it can also be had with two gate electrodes of identical performance and thus makes possible circuits of the type shown in Figure 9.16, ‘The insulated gate type of field effect transistor has an even higher input impedance than the more conventional type of ‘bulk’ field effect device, but, what is probably much more import- ant for digital circuits, it can be operated with the gate forward- biased, This enables stages to be directly coupled in a manner Figure 9.20, Transistor gates 1GATES similar to that described later in connection with direct coupled transistor logic. For the gating of analogue waveforms, without introducing undesirable switching transients, the circuits shown in Figure 9.20 are sometimes useful, the symmetrical transistor circuit shown in (b) is particularly economical. MAGNETIC DEVICES Before leaving the subject of gates it is necessary to consider the application of purely magnetic devices to the performance of switch- ing operations. Whilst in principle almost any ferromagnetic material has sufficient hysteresis to make it suitable for gating operations, the use of such devices did not become really advan- tageous until materials with an almost exactly rectangular B.H. B=75,000 gauss iC 8 * 4 pyre a il H= 0-8 oersted te = tan 4 A i Higa 1008 Figure 9.21. Schematic of ‘magnetic gate uy, Figure 922, Magnetic characteris of “Batana, HOR and PomaloyF loop were available. Several such materials are now obtainable commercially. In the U.S.A. Deltamax and in England H.C.R. and Permalloy F are perhaps the best known. Ferrite cores are now available in grades which possess appro- priate characteristics and their low hysteresis losses make them particularly suitable for high frequency operation. To illustrate a simple gating operation performed with the aid of a magnetic clement, consider the circuit of Figure 9.21. A toroid of the magnetic material is furnished with three windings, A, Band D. Ifa current pulse, of sufficient magnitude, is applied to A, then the magnetic state of the core is taken to J, say, in Figure 9.22. 112 MAGNETIC DEVICES On removal of the pulse on A the magnetic state of the system returns to r in which practically the whole of the input energy remains stored in the core. If now a pulse is applied at B, in such a manner as to have the reverse magnetizing effect as that applied at A, the core undergoes a large fiux change to u and relaxes to f, and by normal transformer action an output pulse will have appeared at D. If, however, the initial pulse on A had not been applied, the pulse on B would have found the core already in state and the resulting change to u, and back, since it involves little or no change in B will produce only an insignificant output at D. It should be noted that a large pulse (of the reverse sign to that discussed) appears at D when A is primed; this can, if undesirable, be removed by means of a series or shunt diode suitably connected. Similarly the input at B may produce output, not only at D but also at A and this may require removal, a a * a ", 4 Figure 9.23. Differential gate Figure 9.24. Magnetic states in diferetial ate An advantage of the above gating system not possessed by the electronic devices previously described lies in the fact that the magnetic ring is also a single digit storage device, the priming pulse on A does not have to be (and in fact must not be) coincident in time with that on B and this may be an advantage in certain applications. Several variants of the above circuit exist; for example, A may normally be in receipt of a polarizing current which maintains the magnetic state of the core at /, pulses applied at B are insufficient to take the magnetic state beyond s and consequently produce no output. If the polarizing current on A is removed, or reduced, pulses at B cause change of magnetic state past s to “ and conse- quently produce an output. Used in this manner the gate can be Boav.c. 113GATES extended to several inputs; when this is done, however, it becomes effectively an analogue current adder producing output only above a certain level. In order to make use of materials which have otherwise desirable properties, but insufficiently rectangular hysteresis loops, the differ- ential circuit of Figure 9,23 was devised. Two toroids C, and C,, are used. Windings B are connected in the same sense in series, windings A and D, respectively, in series opposition. Pulses applied to B, in the absence of input on A, produce equal and opposite outputs on the two coils of D and thus no resultant output. When any pulse whatever is applied to 4, cores C, and C, are magnetized in opposite senses. Suppose that in Figure 9.24 C, isin state 1, and G, in state /, and that on removal of the pulse on A the cores relax to r, and r, respectively. When the B pulse is applied, C, changes in state from r, to J, and ; from r, to 1,; the resultant output on D, which is generated by the difference between these two flux changes is effectively that due A fi % fn Fi in a direction 14 SUPERCONDUCTIVITY appropriate to reverse the flux in path Fj. The pattern is then Fy and, since in this configuration F is no longer saturated, small signal coupling between W and W, is re-established. Devices of the transfluxor type should have applications in which their impedance matching possibilities are of value; however, up to the present, com- plexities of inter-unit coupling seem to have prevented their adop- tion in any large-scale system. The development of multiple flux path devices as an exercise in ingenuity has been considerable and the principles of multi-aperture cores have been extended to provide a complete binary adder in a single core. Data shifting is also possible and this has been elabor- ated in the LADDIC. SUPERCONDUCTIVITY Onnes discovered, in 1911, that the resistance of certain metals be- comes zero at a temperature of about 4° K(-269°C). von Neu- Tantalum A Niobium Hs c (@) (o) Figure 9.26. The Cryotron mann, Snyder and the present authors suggested, in 1947, that this phenomenon might form the basis of a system of computer circuits, but it was left to D. A. Buck to produce, in 1956, the first workable cryogenic system. Buck’s cryotron is shown in Figure 9.26, it con- sists of a tantalum wire surrounded by a niobium coil held at 4-2° K_ ina bath of boiling helium. The operation of the cryotron depends upon the fact that the superconductivity of tantalum is removed by a magnetic field of suitable intensity but that, for the same magnetic field, niobium remains a superconductor. The tantalum wire of the cryotron thus constitutes a gate whose resistance is zero, in the absence of a signal on the niobium wire, and is non-zero (although small) when the niobium wire passes a current. Figure 9.26 (b) shows how an OR gate can be constructed. ‘The tantalum wire has 15GATES non-zero resistance if A, or B, or C pass current, alternately the tanta- lum wire has zero resistance if A and B and C have no current in them. It will be seen in Chapter 10 how cryotrons can be connected to produce a flip-flop and this enables inversion to be achieved so that the above gate systems, with the flip-flop, constitute an adequate set of components for a complete computer system. The original cryotron is slow in operation, but recent thin-film versions achieve switching times of a micro-second or so. 116 10 SINGLE DIGIT STORAGE In Tue design of control equipment for high speed calculating machines it is necessary, first to extract the instruction word from the main storage device, and then to staticize it in such a way that the individual digits are available for examination over a period much greater than the fundamental repetition interval of the machine. Furthermore, the gates of certain machine units, e.g. the adder, have, in serial operation at least, to be held open for the duration of the operation. These functions, as well as those typi- fied by the storage of R,,; in the multiplier circuitry, call for a unit which may be called a single digit store. Many forms exist for this device, and in general the design is closely interlinked with that of the main high speed store; since, however, the design of the latter by no means fixes absolutely the form of single digit storage used, it seems worth while devoting a chapter to a fairly exhaustive survey of such devices. ‘THE ELECTROMAGNETIC RELAY ‘This is possibly the simplest example of single digit storage. The relay is connected as shown in Figure 10.1. The normally off contact G has one side taken to a battery or other source of power, its make is taken to the relay coil R, the other end of R being returned to the battery. If coil R is energized by a current pulse of sufficient duration applied at A the relay will go into the on position, C closes and is supplied with current inde- pendently of the input of A. In order to reset the device it is necessary to interrupt the current by means of an external switch. ‘A more elaborate variant of this circuit is shown in Figure 10.2; here the relay is provided with two independent coils R, and Ry and several contacts G,, Cy, etc. Current applied to Rz via A energizes the relay which then holds on contact C, and its other coil Ry. A resistor r placed between G, and R; enables the device to be cleared by closure of D, thus earthing R,. The additional coil R, isolates the input from the hold and output currents, and contacts , ete. provide independent output channels if required. 117SINGLE DIGIT STORAGE This type of store, in common with other relay devices, provides operate and release times from -001 sec upwards, and in electronic computing machinery the chief application is in the interconnection of input-output apparatus to the electronic circuitry. tee fe &} Figure 10.2. More claborate relay store Figure 10.1. Simple relay store ‘THE GAS FILLED THYRATRON ‘The thyratron, or electronic relay, consists of a structure similar to that described for the triode valve; instead of being mounted in an evacuated enclosure, however, the electrodes are sealed into an envelope containing mercury vapour, neon, argon, fc. The effect of the presence of these heavy ions is to break up the electron cloud normally surrounding the cathode of a hard valve and thus to allow the passage through the valve of much heavier currents than are possible with vacuum valves. The second effect of the vapour is to render the valve insensitive to potential variations on its grid when itis in the conducting state. Such a valve is thus a two-state device and once conducting can only be brought to the non-conducting state by reduction of its anode potential to a low value. ‘Typical valves of this type, such as the 2D21, will pass currents of up to -5 A, will take up the excited state in 20 ysec and require up to +I msec for restoration to the quiescent state. In computing machines the chief use of thyratron-type valves is at the output side where the low level electronic devices of the machine are required to operate heavy print magnets and allied circuitry. Great care must be taken to avoid internal generation of spurious pulses by thyratrons as the valves are particularly liable to this fault and the radiated interference can produce serious mal functioning of low level circuits, So-called ‘difference diodes’ are also available, these resemble a us ELECTRONIC FLIP-FLOPS neon lamp but have the property that the striking (V,), and burning, (Vp), voltages are widely separated. If a difference diode is con- nected between wires whose potential differs by 3(V,+Vs) no conduction will normally occur. ‘The application of a voltage pulse of sufficient amplitude to bring the applied potential above V, volts will, however, cause the device to strike and once this has occurred conduction will continue until a further negative pulse is applied. For the Hivac diode type XC14 V,=135-180 and Vp =60-75 and this unit has been used successfully as buffer storage between punched cards and a high speed machine. Philips types 2A 1000-1004 cover approximately the same range. CONTROLLED RECTIFIERS Several types of semi-conductor device now exist which are equival- ent to the thyratron and the difference diode. A typical example is the silicon-controlled rectifier which has the property of prohibiting the flow of current until it is fired by an impulse on a control elec- trode. After firing the device, like the thyratron, remains conduct- ing until the applied voltage is reduced to zero. A set of controlled rectifiers for general application consists of 2N681-2N689 (R.C.A.) which cover the voltage range 35-600 V. The potential use of con- trolled rectifiers is in driving electromechanical peripheral devices where the memory function enables buffer storage to be eliminated. ‘The need to reduce the applied voltage to zero to switch the recti- fiers off is troublesome but is easily arranged if the electromechanical equipment operates in synchronism with alternating current mains which can thus supply power on one half of their cycle and suppress the rectifier on the inverse half cycle. ELECTRONIC FLIP-FLOPS ‘This type of circuit exists in two distinct forms, monostable and bistable. By these expressions it is meant that the circuits, when triggered into an excited state, either return after an interval to their original state without further external action, or remain in the excited state until triggered out of it. ‘A typical example of a monostable circuit is shown in Figure 10.3. Here, the grid of Vis taken to high potential ria a resistor & large enough so that the permissible grid dissipation of the valve is not exceeded. Under these conditions current flows through Ray V2 and establishes a potential across the cathode resistor Rx. The grid of P, has its potential set by the network RoRe so that, with Ry 119SINGLE DIGIT STORAGE at the potential generated by the conduction of V2, V; is cut off: The anode of V; is connected to the power supply via Rg, and to the grid of V7 via the condenser G. The conditions described are stable. Figure 10.3. Monostable flip-flop Figure 10.4. Schmidt trigger circuit If now the grid of V; receives a positive pulse of sufficient ampl tude, V will be rendered conducting, the potential at its anode will fall and the resultant negative pulse will pass via C to the grid of V. V;, will tend to conduct less strongly, the potential across Ry- will drop and the potential at the grid of V; will be increased. ‘This cycle is regenerative and will cease only when V, is fully conducting and V, is cut off. At this point condenser C starts to charge via R, and when it reaches the point at which V; starts to conduct, the reverse of the above process occuirs and the circuit restores itself to its initial state. This type of circuit has been much used for the production of delays, the rising pulse at the anode of V; being delayed with respect to the trigger pulse at its grid by an amount depending on the time constant RC. A circuit intermediate between the monostable flip-flop described above and a bistable circuit is the Schmidt trigger shown in Figure 10.4, In this circuit there is a resistive connection between Ry, and the grid of V, via Ro, the grid of V2 is also taken to ground via Rr, For a suitable low d.c. voltage applied at the grid of Vi, V2 is conducting and V, is held cut off by the voltage developed across Rx. As the potential of G, is increased these conditions are maintained until Vj starts to conduct; at this point a regenerative cycle sets in and the circuit triggers into the state in which V, is conducting and 120 ELECTRONIC FLIP-FLOPS Vz is cut off. For suitably chosen component values this regenera- tion is extremely rapid and the circuit is often used to shape or sharpen a slowly varying incident waveform, A further advantage of the Schmidt circuit lies in the fact that, since G, is not connected to any other circuit element it is a very high impedance input and the device will give rapid triggering action when connected to such devices as selenium matrix function tables. Suitable valves are the 6J6 and 6SN7, and suitable component values Ry, =Ry,=22kQ. Ro, =33kQ. Re, 22KQ. Re = 10k and V,=150 V. Since Ry, is not loaded by a grid network as is the case for Ray the potentials at the two anodes are not symmetrical; if such sym- metry is required Ry, may be returned to a supply voltage of +90 Figure 10.5. Bistable fip-flop in which case the anode voltages are +90 and +54 and vice versa for the two states of the circuit. ‘The truly bistable flip-flop is shown in Figure 10.5. . Here the general circuitry is exactly as in the Schmidt trigger with the addition that control grid G, is linked to the anode of V2 by means of a network identical with that used for connecting the anode of V; to the grid of Vz. The effect of this additional path is that if Y;, for example, is conducting, the potential at bislow. This is communicated to the grid of V, which is thus kept cut off. Since V; is cut off its anode potential, at a, is high and thus maintains the grid of V; at a suitable potential for conduction to occur. Since the circuit is symmetrical in valves and components, the above argument can equally apply to the case where Vis conducting and V; is cut off. ‘The circuit can be triggered from one state to the other by pulses of suitable polarity applied to grids or anodes. 121SINGLE DIGIT STORAGE _In order to make a binary counting element from the bistable flip-flop it is necessary to add to it some device which maintains a record of the previous state of the circuit whilst the change-over from one state to the other occurs. Using the basic circuit of Figure 10.5 as the bistable element and representing it by the shorthand notation shown, two binary counting elements are given in Figure 10.6. In the first element, Figure 10.6 (a), the ‘memory’ is provided by the two condensers C,, connecting each anode with the opposite grid, ‘The circuit is triggered by the application of suitable pulses to both grids, simultaneously, via the coupling elements Ggand input S. The elements Gc may take the form of simple condensers, diodes, or triodes, or in fact any elements which do not effect d.c. connection between the two grids. An alternative point for insertion of the trigger pulse is the Rec ) Figure 10.6, Counting elements common cathode K; it is easily seen that appli is equivalent toa pair of pulses at the grids. amass A simple explanation of the triggering action is as follows. Suppose that negative pulses are applied at the grids; that applied to the non-conducting valve will have no effect, but that applied to the conducting valve will be amplified and fed, via the condenser Gn a8 a positive pulse to the grid of the non-conducting valve. At this point it will be of sufficient amplitude to swamp the original negative pulse and will cause conduction in the originally non- conducting valve. From this point the action is regenerative since a farther negative pulse is sent back to the grid of the originally conducting valve to reinforce the negative pulse already present. ‘The action when the state of the circuit is the reverse of that obtaining initially. The circuit of Figure 10.6 (b) makes even more evident the memory properties required to convert a bistable flip-flop into a 122 A LOGICAL STORE counting element. Here each anode is connected to its own grid via resistor R and diode D. Since the anodes are necessarily at higher potential than the grids the diodes normally allow no con- duction. ‘The diode cathodes are connected to the pulse line via capacitors C. During the non-operative existence of the circuit capacitors C will charge to their respective anode potentials via resistors R. ‘Suppose, now, that a negative pulse is applied at S. ‘This will be transmitted via condensers C to the diode cathodes. Suppose side 0 to have been initially cut off, its anode will be at high potential and this will have been registered at D,, the negative pulse via C is then insufficient to cause conduction of D,. On the other side, however, since conduction was occurring, the anode potential will have been low and the diode D, will have a cathode potential only slightly greater than that at its anode. When the pulse via Sand C arrives D, will conduct and cause a negative pulse to appear at the conducting grid of the flip-flop. This side is thus cut off and regeneration occurs causing the initial state of the element to be reversed. ‘The storage properties of the RC networks are clearly seen to be such as to prevent the rapid regenerative action of the flip-flop circuit communicating itself to the input points and thus preventing operation. Practical details of the above circuits are as follows: V; = V2 =6J6. D,=D,=6AL5 or 1N38. Ry, =Ra,=Re, = Rp, =22 kQ. Roy= Ro, =33.kQ. Ry=10 KO. R=68 KO. C, =C=50 wpF. V4 =150 V. A negative pulse of | sec rise time and amplitude between 20 and 60 V is required in Figure 10.6 (6). Operationally this circuit has proved extremely reliable and easy to set up. A LOGICAL STORE For thermionic valve machines working inthe serial modeand having megacycle repetition frequencies the flip-flop single digit storage devices described above are not suitable. It is true that by the use of power valves with load and bias resistors of magnitude measured in thousands of ohms instead of the tens of thousands given above it is possible to construct flip-flops for use in the megacycle range; this does not, however, seem a satisfactory solution of the problem. A simpler approach is via the purely logical device shown in Figure 10.7. It is seen that in the absence of an input on A the circuit will be quiescent. If now A receives a suitable pulse this will pass through 123SINGLE DicIT sToRAGE the gate (B being inactive) and emerge after unit pulse delay A at C. ‘The delayed pulse is fed back to A and maintains the cycle indefinitely. In order to restore the circuit to zero state an inhibitory input is applied at B. This simple device has the disadvantage that it would not keep in step with the main clock pulse source of the machine. A more complicated variant is shown in Figure 10.8 (2). Figure 10 (6). Giveuit for Figure 10.8 (a) In this cireuit the starting and delayed pulses are made to gate a standard set of clock pulses with the result that the store gives an output which is synchronized with the rest of the machine. ‘A simple way in which the circuit of Figure 10.8 (a) might be constructed is shown in Figure 10.8 (b). In the circuit V,, Vz and V3 function as a2 gate with inhibitory input at V, ‘The negative going output from Ry, is amplified and inverted by V, and is then emitted from Ry, as an output. In 124 ‘TRANSISTOR STORAGE addition it passes, after delay by the electromagnetic line, back to the grid of V; and thus maintains the cycle. Circuits of the logical type used on SEAC avoided the valve V3 in Figure 10.8 (b) by replacing Ryq with a pulse inverting transformer. This enabled a low impedance output to be obtained for driving other circuits, Semi-conductor diode gates replaced V and V2 so that the only constant source of energy loss was Vs. ‘TRANSISTOR STORAGE To every thermionic valve circuit there corresponds an exact transistor equivalent, The transistor has, however, many advan- tages over the hot valve. Apart from eliminating the large energy drain involved in cathode heating, the transistor has impedance characteristics which are from one to two orders of magnitude lower than those of thermionic valves. For this reason transistor circuits (b) © 125SINGLE DIGIT STORAGE can operate at speeds about an order of magnitude faster than those easily attainable with valves. ‘A simple circuit which is the analogue of that shown in Figure 10.5 is given in Figure 10.9 (a). Practical details are: T, =n-p-n junction transistor, Vs=5V-25V, Ro=15kQ, Ry=150kQ, Ro=56kQ Rp=1-5kQ. “The transistor flip-flop circuit used in the M.3 computer is some- what more sophisticated and is shown in Figure 10.9 (b). ‘The pres- ence of the clamping diodes should be noted. These prevent satura tion of the transistors and improve output waveform characteristics. Figure 10.9 (¢) shows the extremely simple flip-flop configuration which is possible if surface barrier transistors are used. ‘The sole disadvantages of this circuit are the price of the transistors and the very small voltage swings which are available, typically 0-2.V. This class of transistor has been made the basis of a whole system of com- puter circuits, usually called ‘DCTL’ (Direct Coupled Transistor Logic) of which the TRANSAG machine is a typical example. MAGNETIC (STATIC) STORAGE ‘The basic ideas of this type of storage will already have been made apparent by the discussion of magnetic gates given in Chapter 9. Possible means of magnetic data storage are, first by the use of rectangular hysteresis loop materials, used in circuits of the type shown in Figure 9.21, second, the essentially binary store shown in Figure 9.23 and third, by means of the transfluxor, shown in Figure 9.25. ‘The first two of these devices can only be read by a process which involves the loss of the contained data, In order to provide con- tinuous storage over an interval embracing many pulses it is neces- sary to provide some form of regeneration. This can be done elec- tronically, as suggested in the logical store previously described, a more satisfactory method, however, is to use a shifting register pair of the type to be described in the next chapter. The transfluxor is potentially convenient in that data are not necessarily destroyed by the process of reading. MAGNETIC (DYNAMIG) STORAGE Several forms of dynamic single digit magnetic stores have been suggested. In the first, or magneto-acoustic device, use is made of two properties of magnetic materials: (1) Remanence. (2) Magnetostrictive effect. ‘A fine wire of nickel or vanadium permendur, has three small coils 126 MAGNETIC (DYNAMIC) sTORAGE of wire A, B and C wrapped on it. B and C are wound on top of each other and A is separated by a variable distance. ig Ifa currents passed through B the wire is magnetized with appro- priate polarity. Ifnow a current pulse is applied at A magnetostric- tive contraction (or expansion) occurs and a sonic pulse is propa- gated along the wire. When this sonic pulse reaches BC it causes, in effect, a movement of the elementary magnetized region under the coils and thus, by inverse magnetostriction, produces an output voltage at C. Clock Digit in ' Wa A ¢ Nickel wire Digit out Figure 10.10. Simple magneto-acoustic store ‘This device is robust, simple to construct, capable of megacycle operation and produces adequate output. It has the property that by appropriate spacing of A and BC the stored data can be read out after delay, instead of immediately as is the case with other devices. ‘There is no limit to the length of wire which can be used and up to 4 binary digits per inch can be stored. Some further properties and circuit details will be given in Chapter 12. ‘Two other devices which use magnetic remanence are also worth description, the first of these, the Twistor, invented by Bobeck in 1957, is shown in Figure 10.11 (a). A nickel wire, AB, a few thou- sandths of an inch in diameter, is twisted about its axis by means of a permanently applied external torque. The resulting maxi mum of compression stress will then lie at an angle of 45° to the wire axis along a screw whose sense is that of the applied couple. For a strain-sensitive material such as unannealed nickel, the preferred direction of magnetization will follow this direction of maximum compression so that the flux path is as shown. Where there is suffi- cient difference between the ease of magnetization axially and along the circumference of the spiral, the analogue of coincident current core storage is obtained. Simultaneous currents, /,, along the wire and J; through an auxiliary coil are used and only when both are of adequate strength will the magnetic state of the wire switch from one possible state to the other. It is possible to use the Twistor either for non-destructive or for 127SINGLE DIGIT STORAGE coincident current read-out. A typical system uses -001" dia. molybdenum-permalloy wire and achieves a packing density of 10 bits/in. with a read-out time of 0-2 usec. ‘The Tensor, invented by Gianola in 1958, uses an axially applied tension to achieve anistropy in the magnetic properties of a per- malloy wire or tape. The coil system used is shown in Figure 10.11 (6) and, as with the Twistor, either non-destructive or coincident Output Reading current (b) (@) The Twistr; (b) the Tensor Figure 10.11. (b) © Figure 10.12(a).. Basic ferro resonant circuit Figure 10.12(b and c). Current curves for ae current techniques are available. Preliminary experiments sug- gested that the packing density should reach 1 bit/50 wire diameters and that read-out times of about 1 usec can be attained with ampli- tudes in the 1-4 mV range. Another dynamic magnetic digit store is the so-called ferro-reson- ant flip-flop. This makes use of the property of saturable magnetic materials when operated in the simple circuit of Figure 10.12 (a). When alternating current flows in an iron cored inductor the inductance of the latter first increases with current and then, after reaching a maximum, decreases asymptotically to a fixed value. 128 MAGNETIC (DYNAMIC) STORAGE ‘This is shown in the 2, curve of Figure 10.12 (6), with a normal magnetic material, of the Mu-metal type. The change between Zi mx and Z4 is of the order of 20:1, and with rectangular loop materials even greater variation is possible. Consider next the behaviour of the circuit of Figure 10.12 (a). It is seen by considering Figure 10.12 (b) that the voltage Ze, across the LC combination first increases with current, reaches a maximum, and then drops to a minimum at which the capacitor reactance is the negative of that of the inductor, this position corresponding to a resonant condition of the LC circuit, Further increase in J causes a corresponding increase in Ecr. Figure 10.13. Practical form of ferro-resonant fip:fop When a load line is added to Figure 10.12 (c) it is seen that two intersections P and Q occur at which stable conditions exist. (That at U corresponds to a negative resistance characteristic and is unstable.) ‘The circuit of Figure 10.12 (a) can thus exist in two stable current states for suitably chosen values of the applied alternating voltage E~, A practical form of the ferro-resonant circuit is shown in Figure 10.13, Here two resonant units LC,, LC, are supplied from an a.c. source E~ via a common condenser C;. G; and E~ are so chosen that only one of the circuits can be in resonance at any given time, thus if both are at resonance the voltage E; will drop until one goes out of resonance, whereas if neither is in resonance £, will rise until one goes into resonance. D.c. outputs can be obtained by connecting rectifiers in series with the output leads O, and 03. The circuit can be caused to iake up a given state by means of a pulse applied at either of the windings J, and J,; if both are pulsed simultaneously the circuit will change state and can thus be used as a conventional binary counter. Ian. 129SINGLE DIGIT STORAGE Ina commercially available example of this component a supply frequency of 500 kc/s is used and trigger pulses of 2 ysec duration and 20 V amplitude are adequate for a repetition rate of 20 ke/s. It has been suggested that the Ramey magnetic amplifier can be used to give single digit storage, but so far as can be traced no practical use has been made of this suggestion which offers the attraction that considerable power can be produced at the output. ‘TUNNEL DIODE STORAGE The Esaki, or tunnel diode, discovered in 1958 forms the basis of a set of storage and switching circuits which are probably the fastest in existence, or prospect, at the present time, ‘The diodes consist + 3 = TT : Sy 4 am PA Final ay (® - © 100200 300400 5005 v(mv) ) Figure 10.14. (a) Conventional symbol for tunnel diade; (8) typical (i) cere for i ase aes) tip, hate teal ele coca me OH of heavily doped p and n materials separated by a very thin junction (50-100 A). Because of the thinness of this junction quantum mechanical tunneling of electrons through the junction can occur. ‘Owing to the high doping concentration, about’ 104 times as high as with normal junctions, the devices show a low susceptibility to external conditions such as temperature, humidity and radiation. One, perhaps over optimistic, estimate of tunnel diode life puts it at 10,000 years! Figure 10.14 (a) shows the conventional symbol for a tunnel diode and a typical voltage-current curve is illustrated in Figure 10.14 (b). If the circuit shown in Figure 10.14(¢) is considered it is seen that, assuming the tunnel diode characteristic to be given by: v=f(i) 130 TUNNEL DIODE STORAGE then the circuit behaviour is defined by: o=f(t) V-v=iR The voltage, », is thus given by the intersection of these two curves, the second of which is simply the Joad line, AB, shown in Figure 10.14 (6). Where OA=V/R, OB=V. It will be scen that, for suit- able values of V and R, there are three intersection points, a, Band y, ofwhich only aand y represent stable conditions. ‘The circuit there- fore has two stable states and can be used as a binary storage ele- ment, vel) o-———y——+| (b>) Figure 10.15. (a) The Goto pair; (b) analysis of Goto pair circuit operation This particular circuit is not often used and a variant known as the Goto pair, is more favoured. This circuit replaces the resistor, R, by a second tunnel diode as shown in Figure 10.15 (a). ‘The analysis of the circuit follows the lines previously described except that, with the notation shown in Figure 10.15 (a) the describ- ing equations are: for the upper diode: v =f(i) for the lower diode: (V—») =f(i) or v=V-f(i) ‘The equilibrium points are thus those illustrated in Figure 10.15 (8). Again three intersection points occur but f is one of unstable equili- brium so that, even if the circuit found itself in this state, the pre- sence of random noise, from thermal or other sources, would cause a transition either to a or to y. ‘The Goto pair is usually triggered by applying a current, in one or other sense, at A, This results in the circuit taking up one or 131SINGLE DIGIT STORAGE other of the two stable states and since this setting current can be derived from the analogue addition of the outputs of other Goto pairs, as shown in Figure 10,16, a compatible set of computer ele~ ments can be produced. ‘There are three principal disadvantages to Goto pair logic, first that since an inversion operation is absent the system is logically incomplete, second that the supply voltage to the elements must be removed when data have to be inserted in order that the elements are sufficiently sensitive, and third, arising out +/2 R A Wh v2 R DOR 8 “V2 WB -Wl2 R c “V2 Figure 10.16. Majority logic using Goto pairs of the last difficulty, that a polyphase clock source is needed to give direction to the information flow. CRYOGENIC STORAGE The cryotron, described earlier as a gate element, can readily be converted into a single binary digit store as shown in Figure 10.17. If the tantalum wire, A, is superconducting current flows through A and the niobium wire coil surrounding the tantalum wire B. ‘The magnetic field so produced is sufficient to keep B in the non- superconducting state. Clearly this situation is reversible with B superconducting and A normal so that a flip-flop type circuit is pro- duced. Additional coils of niobium can be added to the tantalum wires to provide further gate elements. Because the cryotron pro- vides both the stored digit and its inverse when accompanied by the gate element shown in Figure 9.26 (6), a complete logical system is available, ‘The original cryotron was, as mentioned earlier, capable of only 132 CRYOGENIC STORAGE limited speed. More recently thin film cryotrons have been pro- duced which remove this disability and also the need to use exotic materials such as tantalum and niobium. ‘Two main types of cryo- trom have been proposed: ‘crossed film’ and ‘in-line’, ‘The crossed film cryotron is shown in Figure 10.18 (a); here use is made of the fact that tin has a lower magnetic field threshold for the destruction of superconductivity than lead and also that the effective field for this purpose is the vector sum of any applied fields. Thus, if the Tantalum Figure 10.17. Gyyotron store width of a thin conductor is W and the applied current J, the result- ing magnetic field in the presence ofa superconducting ground plane, is O-4e0l/W near to the surface of the strip. ‘Thus, if current Jg flows in the gate strip whose width is Wg, and if J, and W, are the corresponding parameters for the control film, the maximum resultant field H, on the gate film is given by: iT H-04n) Tia ts and superconductivity destruction will occur when: H>H, the critical field for the gate material. ‘The current gain of the gate, 8, is defined by: Jou We b=2=475 where Jg and Ig are the critical currents required, singly, to produce H>H,. 133SINGLE DIGIT STORAGE ‘The cryotron factor, A, is defined by: salt (BY) tis the film thickness, T the absolute temperature and T,, the critical temperature of the gate material (3-74° K for tin), C is a constant whose value depends upon film purity. Insertion of appropriate values shows that 4 <1 but current gains greater than unity can be obtained by making W,>W,. Leed ground plane __ Lead control film—_ Figure 10.18. (a) Crossed lm exyotron; (b) in-line eyotron __ The time constant of thin film cryotrons is given by Z/R where L is the inductance of the whole circuit and R its resistance. Tt can be shown that, for the individual cryotron: Dept (BNE Root 4 6) x10- where f, is the gate film thickness, s the control-gate film separation, and 9, is the gate film resistivity, An examination of this result shows that there is an optimum thickness for minimum time con- stant, M, L. Cohen has described a version of this circuit for which B=3 and L/R=20 x 10-9 sec. The in-line cryotron, shown in Figure 10.18 (6), produces control and gate fields whose direction ia the same so that’ H=0-42(1,+1)/W, 134 NON-BINARY STORAGE It can be shown that, for this configuration, al Fa Baes x 10-9 Res which does not involve 6 and A and is thus less than that for the crossed film device. ‘Thin film cryotrons can be used in exactly the same way as the original Dudley Buck device; they have, however, the advantages of higher speed and ease of fabrication, NON-BINARY STORAGE Numbers to bases other than two can be manipulated either by means of special devices such as: (1) The Dekatron, (2) The S.T.C.-tron. (3) The Trochotron. or by means of electronic counters which use conventional elements. ‘The Dekatron is a normal sized valve (a miniature version also exists) having a set of four electrodes mounted in an atmosphere of an inert gas of the neon type. The electrodes g1, g2, K and Ko form a cage-like structure surrounding the disc shaped electrode 4, shown in Figure 10.19. In operation the anode A is connected to a voltage source via a high resistance, the cathodes K are connected directly to earth, Ky is connected to earth via a resistor having a much lower value than that in the anode circuit, and the grid systems g, and gy are returned to a potential, intermediate between that of the anode and ground. A typical circuit is shown in Figure 10.20. Since the two cathode structures are at considerably lower potential than that of the grids, a glow discharge will start at A and settle on one of the wires of Kor on Ko, the high anode resistance making impossible a general discharge at all points. ‘The cathode Ko is used as a zero point and the discharge can be caused to settle upon it by a momentary removal of the earth connection from K. If now a negative impulse of sufficient duration is applied to g1, the glow will spread from the wire of K (or Ko) to the adjacent wire of g;. A further negative pulse applied to g» will share the discharge between g, and g; and, if the pulse on g, is now removed, the dis charge will spread to the wire of K (or Ko) adjacent to ga. Removal of the pulse on g, results in the re-stabilization of the discharge on K (or Ko), but advanced one position from its initial state. It will be seen that this action is precisely that required of the 135SINGLE DIGIT STORAGE ring counter described in Chapter 6 and also, that a reversal of the order of operations on g, and g, will cause a backward movement of the glow. The two overlapping pulses which are required to operate the Dekatron are quite simply obtained by the use of an integrating network placed between g, and gy (or vice versa). Discharge 4 Meretene amv hs IA Fy tal fy N6 Figure 10.19, Dekatron structure Figure 10.20, Typical Dekatron circuit A particular advantage of the Dekatron lies in the fact that the position of the glow is visible so that, by the provision of a suitable mask, the digital contents can be viewed at any time. On account of its limited speed of operation (1 kc/s) the Dekatron GGIOA has not been much used in automatic computers; a faster variety of cold cathode discharge tube for decimal ring counting has been evolved by the Standard Telephone and Cables Laboratories and this, with its 20 ke/s operating speed, may well find a place in the medium speed computing installations of the suture, its type number is G10/240E. The Trochotron is an electron beam tube which is such that the beam can take up any one of a set of stable positions and can be stepped by the application of suitable pulses. Since it does not depend on gaseous discharge itis capable of great speed of operation. It is very complex in structure, however, and will not be discussed further here. The devices described above are normally constructed for opera- tion in decimal scale but there is no reason why they should not be produced with any given number of electrodes. Versions of both the GCIOA and G10/240E are under development in which all nine cathodes are brought out; this would have the advantage of allowing the contents to be sensed statically, without cycling the tube and 136 NON-BINARY STORAGE observing the passage of the discharge through the zero position by the elevation of the potential of Ky (Figures 10.19 and 10.20). Auxiliary pulse and carry storage tubes are available for the S.T.C..tron or G10/240B, these also have cold cathodes and are economical in power requirements, their type number is G1/370K. ‘An interesting type of ring counter, which uses tunnel diodes, has Deen designed by N.F. Moody. ‘The circuit of this, which is an extension of the two state device shown in Figure 10.14 (c), is given in Figure 10.21, y...ts are 2 mA tunnel diodes and f¢ is a 1 mA tunnel diode. The bias currents J, and J, are assumed to be 1-5 mA and 0:7 mA respectively. Assume initially, that all of the tunnel diodes are in their low voltage stable state [a in Figure 10.14 (b)]. For the type of diode used, the voltage across each diode will be about 30 mY so that the potentials at A and Bare approximately equal. Ifa negative input pulse is applied, via the capacitor C,, of such a value as somewhat to exceed the voltage threshold, f in Figure 10.14 (b), thts type IN2969 fe type IN1939 Waener diode y= 15mA Figure 10.21, Moody's tumnel-diode ring counter the system will become unstable and one of the tunnel diodes will switch to its high voltage state to restore stability. Which diode actually switches depends upon accidents of noise and manufacture but is, generally, unimportant and subsequent input pulses will cause other diodes to switch until each diode in the chain is in its upper voltage stable state, 7 in Figure 10.14 (b). ‘To produce an output and a reset to zero pulse, however, it is necessary that one known diode switches last and this is achieved by by-passing ts with the condenser C, thus inhibiting voltage change until all other diodes have switched. 137SINGLE DIGIT STORAGE When ts switches, the potential at 4 falls to about 0-44 V and a current of about 0-8 mA flows from A toB, The current through fy is thus increased to about 1-5 mA and fg switches to produce a volt- age of about -0-4V at B. The effect of this is to switch on the transistor which removes the current from 4. ts which then reset. When this happens a reverse current flows in AB and shuts off f6, thus restoring the circuit to its initial state, Circuits of this type have been operated at frequencies of up to 50 Me/sec. 138 | ll MISCELLANEOUS COMPONENTS Iris the purpose of this chapter to deal briefly with a number of computer components which, although their form and detail is readily predictable from the previous discussion, are of major im- portance in the overall design of a computer. Most of these devices will by now be familiar to the reader, in essence at least, from their mention under the relevant logical discussions. Typical of such units are the shifting registers whose properties have been defined in the discussion of adding and multiplying circuitry. In this chapter such units will not be discussed if they are identical in form and construction with the main machine storage; this is par- ticularly the case for acoustic registers, or ‘short tanks’ ate construction is identical with that of the main acoustic store dis- cussed in Chapter 12. It also applies to registers using the storage properties of secondary emissive media of the cathode ray tube type and of recyelic magnetic recording techniques. Other components are less dependent on the structure of the particular machine in which they are used, and of this class typical examples are function tables and coincidence units. SHIFTING REGISTER UNITS It is proposed to discuss two general types of register unit, those based on valve or semiconductor single digit storage elements and those based on the rectangular hysteresis loop magnetic elements. In the first class of registers the fundamental problem is that of transferring the contents of a stage A, (Figure 11.1) into stage Ayes of the same register and performing identical operations on all stages of the register. ‘Three general methods of achieving this suggest themselves. In the first 4,, is connected to Aj+ by means of a gate G,, which has the property of retaining the state of 4,, for a short time after its contents have, in fact, been altered, and of passing the state of 4,, on to Ay. The second method is to clear all stages to zero and to the circuits in such a manner that if any stage contains unity it 139MISCELLANEOUS COMPONENTS emits a pulse on restoration to zero. ‘This pulse is delayed by A, and then resets 4,,;1, say, after the latter has had time to recover from the previous clearing operation. The third method is a strictly logical one. ‘The contents of all stages of 4 are transferred to an auxiliary register B, initially clear. Ais then cleared and the contents of B sent back to it displaced by one digital position in the desired direction. C ] 1 Shit Figure 11.2. Typical delay coupling register Registers of each of the above types have been built and operated and, except on grounds of complexity, there is little to choose between them, A typical register of the first type is shown in Figure 11.2. In this, the anodes of the projecting register stages, assumed to be of the type shown in Figure 10.5, are connected, via resistors R and diodes D, to the grids of the receiving stages. Current stage con- tents are effectively stored on capacitors C with time constant RC. D.c. isolation between anode and grid circuits is normally maintained by diodes D. Application of a suitable negative shift pulse to the common condenser line results in the application of a negative pulse, via the relevant diode, to that grid of the receiving register 140 SHIFTING REGISTER UNITS stage connected to the conducting (low potential) anode of the projector, The effect of this is to set the receiving stage to the same digit as was originally contained by the projector. All of the stages change simultaneously and memory of the initial contents during the application of the short shift pulse is via the time constant RC. Suitable values are: R=68,000 Q. C= 50 yuk. Circuitry for the A, type register is illustrated in Figure 11.3. Here all register stages are cleared to zero state by means of a negative pulse applied to their grids. ‘Those containing unity will emit, at their left-hand anodes, a negative step voltage; this is delayed by the electromagnetic line and, when the clear pulse and subsequent disturbances have died away, passes via isolating con- denser C and diode D to reset the next flip-flop to unit contents. Tr sor Figure 11,3. Typeal delay line ‘lear’ register Registers of this type appear to possess no advantages whatever over the directly gated variety previously described. They have also the considerable disadvantage of requiring expensive electro- magnetic delay elements which are not commercially available. ‘A good example of a strictly logical shifting register is shown in Figure 11.4. ‘The storage units are Goto pairs, and three are needed for each digit stored in the register. Suppose that Gy, Gyz and G,3 are associated with the first stored digit, Gy, ef¢., with the second and soon. In the static state it is assumed that data are held in G, Gy, etc., and that the supply lines 44’ to these pairs are at appropri- ate positive and negative voltages, whilst those to the slave pairs, Giz, G13, ele., are at zero voltage. To cause shifting the following sequence of operations is per- formed: (1) BBY is energized. Gy thus sets to the state of G1. (2) Ad’ is reduced to zero, Data are retained in Gy2, G22, ete, 141MISCELLANEOUS COMPONENTS (3) OC’ is energized. Gj, thus sets to Gy, i.e. to Gy). (4) BB" is reduced to zero. (5) Ad’ is energized. Ga, thus sets to Gy, i.e. to G,). (6) CC’ is reduced to zero, The need for this rather complicated three phase system can be re- moved if additional interstage components are inserted, however, the extreme simplicity of the three phase circuit makes it logically attractive. Many other tunnel diode shift registers have been designed and one, constructed by A. Krause at the University of Saskatchewan and using charge storage diodes for inter-stage coupling, has been operated at a shift rate of 300 Mc/sec. Gum Giz: “GR? Sa Csr Cz 63) O32 Figure 11.4, Goto pair, 3 phase, shift register Ans Brat An ” a, s fate “fat 2 & “A Figure 11.5. Magnetic shifting register x A shifting register on the same principle as that just described may be constructed from rectangular loop magnetic elements. One variant is shown in Figure 11.5. Energy is stored in core A, by saturating it magnetically via winding W>, say, and allowing it to relax to a state governed by its remanence, A current pulse is now applied to W’y in such a sense that the magnetic state of 4,_, is reversed. Under these conditions 142 SHIFTING REGISTER UNITS fan induced voltage is produced across W, and this passes via rectifier D; and resistor R to a receptor winding on the intermediate core B,y. Supposing that the remanence of the cores 4, B is sufficiently high, it can be shown that the core B,-1 can be driven to saturation despite the inevitable circuit losses. A crude demonstration of this is the following: suppose that a flux change dg, is produced in core A and that winding W; has NV, turns whilst the receptor winding W, on B has Nz turns. Then, assuming a flux change dg, to occur in B, the differential equations of voltage oe Output from W;, -12 Inputto W tt or, since these are necessarily equal: dp, Man-Made Integrating: ™M % “yr +const, Thus, neglecting circuit losses, @, can be made greater than 9, by any desired amount simply by varying the ratio N;/NN._ In practice this is not true and a more elaborate analysis, taking into account circuit losses, shows that the optimum energy transfer value is obtained when NV; =2N5. ‘The purpose of the diodes D,, D2, and the resistor R is to prevent the back flow of current from 4, to By via W. For materials having adequately rectangular hysteresis loops, the output from A, ;, when its initial magnetic state is identical with that generated by the current pulse in Ws, is insufficient to produce any change in the state of the following stage B,. Thus any digital pattern stored in the A cores will be transferred to the B cores on application of a pulse to the windings W’, via K,. ‘The A cores are then left in the cleared or zero state and thus receive the pattern from B upon application of a similar transfer pulse to the W, windings of the B elements via K;. Practical details of the above circuit are as follows: the rectangular loop material should consist of 2 or more turns of -001 in. x4 in. strip wound in a ‘clockspring,’ The diameter of the ring thus produced should be -375 in.--50 in. 143MISCELLANEOUS COMPONENTS It is desirable that the remanence of the material should exceed 90 per cent of its saturation flux, as a practical criterion. It has been shown by the Harcard Computation Laboratory, however, that a more correct evaluation of suitability is 8H, we” Hi, where the various quantities are defined in Figure 9.22 (p. 112). ‘The winding scheme should be: W =150 t, W,.=75 f, Ws =200t, and under these conditions a set of 82 coils can be series connected and driven from any pentode type valve capable of delivering a 20 usec 125 mA current pulse (e.g. the 6V6). Resistor R should be approximately 15 Q and the rectifier units Aes 4 Anes % % ec "3 all, 3] || 2 % 3 i 2 % ‘Shit Figure 11.6. One core per stage shifting register should have not more than 6 Q forward resistance and not less than 1,000 Q back resistance at an applied d.c. potential of 20 V. Units of this type constructed from Deltamax, H.C.R. or Permalloy F alloys have given excellent reliability at shift frequencies (4,1->4,) of 30 ke/s. Delay storage magnetic shift registers can also be constructed and these show a considerable saving in equipment and complexity of driving circuitry. In Figure 11.6 is shown a one core per stage shift register; suppose that only the core A, isin the unit, or saturated, state. The application of a shift pulse to the coils W will produce an appreciable energy output only from A,, this takes the form of a current flow via the diode D and proceeds to charge the con- denser C. ‘The shift pulse duration is made small compared with the time constant GR so that C does not discharge appreciably during the shift pulse interval. When the shift pulse has ended C discharges through R and the input coil, W, of the core A,,43 the circuit 144 SHIFTING REGISTER UNITS arrangements are such that the resulting magnetizing current is sufficient to set core 4,1 into the fully excited state. It will be seen that the principle just described enables the digit pattern stored in a series of cores C,—C,, to be shifted one place to the right by the application of a single shift pulse. For very high speeds of operation it is difficult to satisfy the condition that the shift pulse duration is to be considerably smaller than the time-constant RC and this has led to the development of systems in which, by the insertion of an additional diode, the charge stored upon the condensers, G, is isolated from discharge through W; whilst the shift pulse is present and is then gated through W at the appropriate time. Since all of the core elements are toroids it is desirable to re- duce the winding requirements as much as possible. The most Figure 11.7. Minimum complexity shifting register % ee * economical scheme so far devised is shown in Figure 11.7, it will be noticed that the shift winding is itself used as output winding and as reset winding. The disadvantage of this type of register lies in the presence of d.c. voltage on the windings and on the existence of a potential drop along the register, which makes it impossible to connect head and tail to form a cyclic system. Practical details of the register shown in Figure 11.6 are: W; = 1008, W,=501, W3=200t, C=-05uF, R=150 Q, D=2 plate selenium rectifier stack. The cores used are 8 mm rings of Mullard Ferrite ‘Type D1 and the shift pulse has duration 7-10 usec and amplitude 300 mA. Repetition rates of 30-50 ke/s can be attained. It may be noted that the shift pulse shape is important and that a front edge rise of 3-4 usec seems appropriate. The minimum com- plexity register shown in Figure 11.6 has W3=100 turns and the other elements identical with those of the register just described; the shift pulse current amplitude must, of course, be increased. Experiments using 2 mm diameter cores and germanium rectifiers have resulted in register designs which will operate at shift fre- quencies of up to 250 ke)s. Alll of the shift registers so far described have the disadvantage of 10—a.v.0. 145MISCELLANEOUS COMPONENTS relatively high complexity involving, as they do, numerous dis- similar components for the actual storage and shift stage. It occurred to the authors many years ago that the ideal register would be one in which the digits consisted of magnetized spots of a medium arranged ina linear array. ‘The whole pattern to be movable under the influence of a controlling field. Whilst this ideal has not quite been realized, a register invented by K. D. Broadbent comes near in after (d) Figure 11.8. (a) Thin film shift register ; (b) film conductor layout; (c) domain before — Ana a) dona fr moog to the ideal; it is shown schematically in Figure 11.8. A thin magne- tic film of 80 per cent Ni, 17 per cent Fe, 3 per cent Co or a similar alloy, is deposited on a suitable substrate. A layer of insulator is deposited over the surface and then a conducting layer such as that shown in Figure 11.8 (a) is added. A second insulating layer follows and then a second conductor, of similar shape to the first but dis- placed by one half conductor width. Another insulating layer and a write conductor follow the final register being as shown in Figure 11.8 (b). 146 CRYOGENIC SHIFT REGISTERS ‘To operate the register, the thin film is magnetized in the direc- tion shown in Figure 11.8 (c) and (d). ‘The write conductor shown, in Figure 11.8 (b) receives a current to produce a domain, beneath AB magnetized as shown in (¢). Current is now passed through the AB system to produce fields whose senses are those shown in (c) and (@). For suitably chosen field strength it has been shown that the domain moves to the position shown in (d), A similar sequence of operations on the conductor system 4’B’, after removing drive current on AB, causes the domain again to move this time position- ing itself under the next AB intersection. Repetition of this input- shift sequence causes the film, under the conductor system, to absorb any digit pattern which is desired. Registers of this general type have been constructed to hold 32 bits and to shift at a 1 Mc/sec rate, their physical size is only about 1 in, long. Certain difficulties occur with this system, notably nucleation, remanent nuclei and domain break up. ‘These can be overcome by using a polyphase drive system and by close attention to film and conductor geometry. The subject is still in a state of rapid development, however, and established practice is likely to differ considerably from present day experimental arrangements. ‘CRYOGENIC SHIFT REGISTERS The crossed film cryotron provides a simple means of constructing a variety of cryotron shift registers. Possibly the simplest, conceptu- ally, is shown in Figwe 11.9. The binary digits are stored, initially in the stages A, B, efc., typically cryotron a [Figure 11.9 (b)] is super- conducting ifstage A holds “0” whilst cryotron 6 conduets ifthe stage holds ‘1’. Cryotron a controls gate cryotron ¢ and cryotron } controls gate cryotron d. An auxiliary stage A holds the digit dur- ing shifting. On receipt of the first pulse of the shift pulse pair gates ¢ and dare tested, if‘o’ is held in stage A c will be off and d will conduct, if ‘1? is held d is off and ¢ on. Suppose that A holds ‘o’, d then conducts and inhibits the cryotron 4, c does not conduct so that cryotron a, is active. The contents of A have thus been trans- ferred to Ay and, by a similar argument, those of B to B,, C to Ci, etc, Notice the superconducting links 1, 1,, m, m,, el¢., needed to hand on the transfer current from stage to stage whatever the cell contents, The second phase of the operation is to remove the cur- rent from the A —> A; shift lines and transfer it to the A, > B lines. The operation is exactly similar to that described above except that data are shifted from A; to B, B, to C and so on. Since there is a continuous superconducting path through all of the cells A, 4), B, 147MISCELLANEOUS COMPONENTS By, etc., they can be connected in series without detriment. It is ‘worth drawing attention to the fact that closed gates pass no current despite their low resistance. This is because, in a parallel combina- Gate (tin) ae % fy mn! ee i Control aod {e i PS (lead) ote 1 1 ! ‘Shift | ye } a Be Boog fe Bit io i @ (») Figure 11.9. (a) Schematic of exyotron ; (b) exyotron shift register tion of paths of zero resistance and non-zero resistance, however small, the current always chooses the former, Other types of cryo- tron shift register have been proposed which exchange reduction in numbers of eryotrons for increased complexity of clock pulse sources, ‘but none seems to have been tested experimentally. FUNCTION TABLES ‘The two types of function table, one-many and many-one, have already been defined in Chapter 5. It will be remembered that the many-one type is required to produce single unique outputs in accord with any particular combination of several inputs which may be selected. Table 11.1 ° base Possibly the simplest device of this kind is the relay ‘tree’ shown in Figwe 11.10. The circuit is drawn to illustrate the case of two inputs /, and J, which may be energized in any combination. 1; is connected to the coil of a relay H having a single change-over con- tact, whilst J; is similarly connected to the coil of a relay H having a pair of change-over contacts. ‘The contacts of H, and H, are con- 148 FUNCTION TABLES nected as shown and it will be seen that the line 0 is connected to the four outputs 4, B, C and D in accord with the scheme shown in Table 11.1. 4 fe Figure 11.10. Relay tree function table The scheme can, of course, be extended to larger numbers of inputs and corresponding increase in output selection. In general, for n inputs the relay H, must/have 2*- change-over contacts. Figure 11.11, Matrix function table ‘The relay tree circuits have the advantage of producing 100 per cent discrimination between the selected output and the (n ~ 1) rejected ones; they have the disadvantages of limited speed, (1 msec maxi- mum) and comparatively high cost for large numbers of inputs. ‘The type of many-one function table which has found most frequent use in electronic computer developments to date is shown in Figure 11.11. Here the inputs J,, J, are assumed to be in the form of pairs of voltages a and 6 such that, for example: 1-0 has a=0V b= +1007 Iy=1 has a=+100V 6-07 and similarly for Jp. ‘The output lines A, B, C, D are connected, as shown, to the 11(a, 6) Ia, b) wires by means of resistors R. It is readily seen that 149MISCELLANEOUS COMPONENTS the voltages at A .. . D for differing combinations of J, and J, are: Table 11.2 Voltage h=1| h=1,h=0 ‘Thus for each combination of inputs there exists only one output line whose potential is 100 V (or for that matter 0V). The device can therefore be made to operate a gate at the selected output only. In practical applications it is necessary to use relatively high values for the resistors R, greater than -25 megohm for example. This limits the speed of the output pulse rise to a value governed by the time constant of R and the external capacitance. More serious, however, is the fact that when the number of inputs n is increased, the discrimination between the voltage of the selected output and that of its nearest neighbours decreases as I/n xvoltage change across (a, 6). ‘This means that very high (2, 6) differentials have to be used if more than, say, 5 inputs are required. The latter disadvantage can be overcome by replacing all resistors with diodes. With this modification the output voltages become sen- sibly b for the selected channel and a for all others. This simple type of function table is by no means the most econo- mical in components for large numbers of variables. A less expen- sive variant is shown in Figure 11.12. Here the input variables are divided into two groups of approximately equal size, the possible outputs from each of these groups is then generated by a separate function table and the results are then combined in pairs to give the complete decoding. An inspection of the diagram, and a comps son with the single matrix case, gives the following comparative figures for the number of diodes required in each case. Number of Diodes for Diodes for 2 variables plain matrix level decoder 2(=141) 8 8 3(=2+41) 24 24 4 (=242) 64 48 5 (=3 +2) 160 96 6 (=3 +3) 384 176 150 FUNCTION TABLES ‘The idea can be extended to more levels, but the use of many diodes in series is unattractive because the power handling requirements of the first stage decoding diodes increase rapidly. A cryogenic function table can be simply constructed as shown in Figure 11.13. ‘The notation for the cryotrons is that used previously in Figure 11.9 (a). For outputs which do not require direct currents, alternative schemes are available which make use of saturated core inductors; | |e . a el e. - Cl > Le ee a be et wig, Figure 11.12. Teeoolecel function table one such device is shown in Figure 11.14. In this a number of rings of rectangular loop magnetic material are wound with 4 coils. The a and b lines of J, and J, are now arranged either to carry current (state 4) or not (state a). For the condition shown ail cores, except A, have at least one coil passing current and are, in consequence, saturated. To detect the operative coil a pulse current is applied to all rings via the series winding p. ‘This current is so arranged that only when no current flows in another winding of a particular ring does the magnetic state of that ring 151MISCELLANEOUS COMPONENTS reach the point of change (cf. s in Figure 9.22). In this one ring, however, a large flux change occurs and by normal transformer action an output appears at A. Oem eal, 4 % Figure 11.13, Groton function table Figure 11.14, Saturated reactor function table A considerable advantage of this type of function table lies in the fact that large currents can be obtained at the outputs by the simple means of making 4, B, etc. step down windings with respect to p. 152 COINCIDENCE SENSERS COINCIDENCE SENSERS In computing machine design it is frequently necessary to have available means for ascertaining the identity of two quantities. A pair of simple relay circuits for performing this operation are shown in Figwe 11.15. ‘The first design (i) is a straightforward function table in which those outputs corresponding to identity between the Gi), Figure 11.15, Relay coincidence senser two inputs are joined. It is clear that certain contacts are redun- dant in this circuit and a moment's reflection leads to the variant (ii). Ifa relay be available having two identical coils a still simpler Circuit is shown in (iii); when neither coil is energized the relay stays in the off position as shown, when either coil is energized separately the relay operates and the circuit is broken, when both coils are energized together they are arranged so that the resultant fields cancel out and the output contact remains closed. When a fast coincidence circuit is required analogy with Figure 11.15 (i) suggests that a simple matrix function table would perform the operation. This is obviously true and a comparison with Figure 11.15 (ii) again suggests the variant shown in Figure 11.16. In this circuit the potentials at the cathodes of D, and D3 are only both median when either J, =1, J2=1 or ,=0, =0. Thus, only in this state can the potential at p rise above the lowest diode cathode voltage. The characteristics of this circuit may be im- proved by replacing resistors R by diodes in which case the coinci- dence output at p is equal to the voltage difference between a and & instead of one-half as in the strictly resistive case. ‘An obvious extension, when the identity of two digit patterns is to be established, is to compare the individual pairs of digits by 153MISCELLANEOUS COMPONENTS Figure 11.16, Coincidence senses means of circuits of the above type and to connect the outputs to an n gate of the type discussed in Chapter 9. In relay circuits, however, the even simpler technique of series connection of circuits of the type shown in Figure 11,15 (ti) and (iii) is perfectly adequate. 154 12 STORAGE DEVICES Posssiy the most important component of a modern computing machine is that which performs the operation of storing digital data. This has frequently been called the ‘memory’ and to some extent this title is justified since storage devices have many features in common with the memory processes of animals. The functions required of a computing machine store are four in number. (@ It must be capable of storing incident digit patterns for an indefinitely long time. (i) Tt must be capable of emitting such data when called to do so. It should be inexpensive. (iv) It must be possible to erase stored data and to substitute new. In addition, the speed at which data can be inserted or recalled —usually called the ‘access time’—should be comparable with the unit operation time of the arithmetic and control circuits with which the store is to be used. At the present time it may be asserted that there is no device which satisfies all of the above desiderata perfectly and it is pro- posed, in the present chapter, to discuss the various solutions which have been constructed and to comment briefly upon their virtues and defects. A catalogue of suggested or existing storage devices reads like a science degree syllabus in physics, for heat, light, sound, properties of matter, mechanics, electricity and magnetism have all found their advocates and almost all have been brought to a state of physi- cal existence. It is proposed as far as possible to deal with these devices in order of speed rather than in any sequence dictated by physical properties. Even within this framework it is impossible to ‘be consistent since certain techniques, by means of alteration to the logical structure of the machine, can be made to compete in speed of access with fundamentally more rapid devices. 155STORAGE DEVICES ELECTROMECHANICAL STORAGE Direct storage of data on relays is possible but not practicable where a large capacity is required. Several devices have been suggested, however, which do have high volumetric and financial efficiency and it is proposed to describe some representative specimens from this group. The first type consists of a circular plate which can be rotated about an axle ¢ through its centre and normal to its plane. Around the periphery of the disc are a number W of equispaced holes A in each of which is a small pin. The pins can be pushed, Figure 12.2, Wire store by means of a solenoid operated mechanism ¢, to either side of the disc, and the latter can be rotated so as to stop with any particular pin either under the pusher ¢ or under a read out contact r. Only those pins projecting from the same side of the disc as r will make contact and consequently the device can function as a binary storage unit, Both serial and parallel operation is possible, in the first, the pins of a single disc are brought, in sequence, past the reading contact, whilst in the latter corresponding pins in a number of discs rigidly mounted on a single shaft are sensed, ‘The volumetric efficiency of the device is quite high considering its mechanical nature, a typical example stores 50, 21 binary digit numbers in a cylindrical volume 8 in. long by 2 in. dia. 156 Plate 3, Electromechanical store (To face». 158DRUM TYPE MAGNETIC STORAGE In practice more sophisticated means have to be employed to prevent vibrational displacement of the pins during operation; these, however, are of an obvious nature and need not be discussed here. A photograph of an actual store of the above type is shown in Plate 3. A similar device, but capable of greater ease of manufacture, is shown in Figure 12.2. Here the storage elements take the form of thin wires 4 projecting radially from a metal disc. ‘These wires can pass on either side of a thin partition 6 via a slot s and a flexible tongue of metal. When the tongue is in the plane of the partition the wires are unable to change from one side of the partition to the other and thus store any information permanently. When any digit wire is required to change its contents the inner disc dis rotated, and just before the appropriate wire reaches the gating position the tongue s is deflected to guide the wire to the required side. Equi- librium is restored before the arrival of the next wire and in conse- quence all other data is left unchanged. Read out is effected by causing those wires projecting on one side of 6 to pass over an electrical contact. This device, on account of the simple mechanism used to deflect the wires, is capable of considerably greater speeds than the pin store previously described; it has also the advantage of allowing the disc and wire assembly to be produced by a simple diecasting operation. In parallel operation both of the above stores have mean access times of the order of -25 sec, for serial operation the wire store can operate at a frequency of about 50 c/s. DRUM TYPE MAGNETIC STORAGE The satisfactory development of magnetic sound recording equip- ment inevitably led to the consideration of this medium for digit storage. ‘The use of coated tape or wire, whilst eminently suitable for input/output equipment in computer design is, however, hardly suitable for an internal high speed store. ‘To overcome the handling difficulties associated with magnetic tape and wire it has proved satisfactory to apply the magnetic medium to the surface of a cylinder so arranged as to rotate with great accuracy between a pair of bearings. Mounted close to the drum are a series of read/record heads consisting of a closed magnetic circuit having a small gap at one point. When a direct current is passed through a coil of wire 157STORAGE DEVICES encircling the magnetic core a field is produced which spreads to the air in the region of the gap. Assuming that the drum is stationary, this leakage field will magnetize an elementary portion of the drum surface in the region of the gap and with a polarity governed by the direction of current flow in the input coil. Suppose, now, that the drum is rotated at high speed, as the elementary magnetized region passes the gap flux will change in the head circuit and an electric potential will be induced in the a) NF & id in gop Figure 12.3. Drum ype magnetic store Figure 12.4. Output waveforms from drum windings. ‘The form of this potential is as shown in Figure 12.4 (a) and (b). According to the direction of the initial magnetization the potential wave will take one of the two forms shown, and it is an easy matter to design circuitry to distinguish between them and set up a flip-flop into zero or unity state. ‘Thus far it has been assumed that the drum was stationary whilst the original act of magnetization was being performed, if this were not the case a slightly modified waveform results; this is shown in Figure ‘The presence of the flat between the two terminal peaks to the fact that over the region i-j the flux density of magnetization is constant and in consequence no voltage is induced in the reading head. 158 DRUM TYPE MAGNETIC STORAGE In order to represent a series of binary digits by means of the flux pattern on a drum of the above type, a number of different methods of magnetization are possible; these correspond in general type to the well-known techniques of signal transmission used in telegraphy. Chief among the methods are the following: (a) Short pulse recording. (b) Rectangular pulse recording. (c) Non-return to zero recording. (d) Amplitude modulated carrier. (c) Frequency modulated carrier. (f) Phase modulated carrier. ‘The waveforms for input and output voltages in each of the above methods are shown in Figure 12.5. In the first section a; shows an input pulse which is so short that the drum surface may be considered stationary during the recording process. Assuming that the head gap is small the output waveform shown in a, will be produced. The flats are present only if the drum speed is sufficient for the travel between pulses to be greater than -01 i ‘At 6; is shown a somewhat longer input pulse system and at b, the resulting output. 4G shows a so-called non-return to zero waveform for the same digit pattern. The output ¢ is characterized by having a voltage change only where a change in digit occurs. ‘This system has approximately double the digit packing potentialities of (a) and (b) and has considerable advantages when the design of output systems is contemplated. It has the defect, however, that the re~ cording head driving circuits must be capable of maintaining a d.c. saturating current through the head continuously. To a lesser degree this defect is shared by the system shown in (b) and is only removed when the short pulses of (a) are used. A transformer is often used to match the driving elements to the recording head. ‘When unsymmetrical pulse patterns are applied, the core material of the transformer acquires a bias and this manifests itself in a pro- gressive reduction in recording strength for long series of 0's and 1’s and also in the generation of a long switching transient after record- ing. One of the simplest methods of overcoming this difficulty completely is that used in the M.3 computer: each digit is recorded by means of a pulse pair + — for 0 and ~ + for 1. The pulses are about | sec wide and follow one another without any gap, the sepa- ration between the digits is, for this machine, 7 sec. Each of the above systems is self erasing, that is, input data 159STORAGE DEVICES automatically erase data already present. ‘The carrier type sys- tems shown in (d), (e) and (f) do not have this property. In d, is shown an amplitude modulated carrier and in d, the resulting out- put; similarly in ¢; and ¢, are given the waveforms for frequency 0 7 ° 1 1 o a Humber S t__1_, 1. % AAIARNMA- Figure 12.5 modulation. On the scale shown both of the above systems are feasible; however, it is evident that the systems are inefficient since several oscillations of the carrier are needed to establish the recorded digit, whereas on the same scale each oscillation space could be used as a recording position if the waveform of (a) were used. 160 — DRUM TYPE MAGNETIC STORAGE A more satisfactory scheme is that shown in f,. Here phase modulation of the carrier is used and an efficient system results; some of the virtues of the non-return to zero method are present with the added attraction that, since a carrier is used, the voltage waveforms can be passed through a transformer. Possibly the most attractive scheme of all is shown in g,. Here the input is again in pulse form; the recording gap is long, however, compared with the physical digit spacing on the medium. The effect of this is to compress the waveforms of a; and a, so that the flats vanish and the head of one pulse overlaps the tail of the previous one. The result of this is shown in g, and it is seen that an essentially non-return to zero output is produced. Naturally the recording gap is not lengthened, but the digit packing density is increased until the effect shown is produced with a standard gap. ‘This uses the medium in the most efficient manner, and in experi- ments recording densities of more than 200 binary digits per inch have been obtained. When using magnetic drum storage it is usual to have a number of recording tracks side by side, the system may then be used, either as a parallel access store having separate recording and output arrangements for each track, or as a serial store having one recording pulser and output amplifier which is switched from channel to channel as required. A typical magnetic drum storage unit, which is available com- mercially, is shown in Plae 4 (a). ‘The storage capacity of this equipment is 1,024 words, each of 32 binary digits, and it will be seen that, since the surface area is only 15 in.2, a high volumetric efficiency is attained. The type of head used for the read/record operation is illustrated in Plate 4 (b); it consists of a single -015 in. lamination of high-permeability steel, provided with a working gap of about -0015 in, Windings may vary from 5 turns, for a low impedance head, to 50 turns, for a head with which the use of a transformer is not desired. Modern practice would favour the use of a ferrite to replace the steel lamination in head design. Such materials have low eddy current losses and a permeability which can be as great as 1,000 at frequencies in the megacycle range. Unfortunately, thin sections of the ferrites are very brittle, and it has not, to date, proved possible to produce the large numbers of units required. The use of a thick, non-magnetic, ceramic backing would obviate this trouble, but such composite materials have yet to be pro- duced. For input/output applications, where a head width of -050 in. is ave. 161STORAGE DEVICES acceptable, ferramic heads have been successfully applied. ‘They have the virtue that, because of their hardness, they show no appre- ciable wear after prolonged rubbing contact with the tape or wire. ‘The high currents (5-20 A) required for low impedance heads make the use of a transformer essential and an economical system is shown in Figure 12.6. Each head is connected to the primary of its own matching trans former, T;,T,..T, ‘The remaining windings of the transformers consist of a pair of equal windings connected, atone end to1a common line CC’ and at the other end to the emitter/collector elements of a set of symmetrical transistors Sj, Sy..5,- To select a particular Write ” ve fe poof Figure 12.6. Electronic head switch head, the base of each of the symmetrical transistors is connected to one of the outputs of a many-one function table. The selected symmetrical transistor thus receives an appropriate bias but all others are cut off. The common lines CC’ terminate in’ a centre tapped winding of the matching transformer (44‘BB'CC’). To write ‘0’ an appropriate pulse is sent to B, say, and causes voltages to appear on GC" and thus to pass through the selected head trans- former and its associated symmetrical transistor. A writing current thus passes through the head associated with the transformer. Similarly, to write ‘1’ B’ receives an impulse. For reading, exactly the same selection procedure obtains, but the voltage induced in the selected head by the recording finds its way to the read windings Ad’ and thence to an appropriate amplifier. This switch is extremely economical and, because of its symmetry, introduces negligible switching transients into the reading amplifier. 162 DRUM TYPE MAGNETIC STORAGE A suggested logical design for a serial store using the magnetic drum is shown in Figure 12.7. It is assumed that two tracks of the drum D are devoted to pre- recorded ‘clock’ markers. Ty, contains groups of n markers (n=number of digits in word) separated by gaps. T,, has a single marker coincident with each of the gaps in Tj. Data to be stored on the drum are located opposite the markers of Ty. It will be assumed that the particular digit track T, is selected by means of a selector switch s. The digit markers from T, are amplified by A, and applied to gate G which is normally held closed by flip-flop F;. Word mar- kers from T,, are amplified by 4, and fed to counter C. The contents of @ are compared with the required track position—held in register ML—by coincidence senser GS. Some time during each drum rotation CS will emit a pulse to indicate the start of the required word. ‘To use the store, flip-flop F, is set up, this opens G, so that the next coincidence pulse emitted by GS is transmitted and sets up F>. Fy is normally cleared by each word start pulse from 4, but the circuit delays are such that it is ready to be re-set by the pulse emitted from CS via Gy. This somewhat elaborate system is necessary to ensure that the circuits shall not be switched on except at the start of a word. The excitation of F, opens G to pass the digit markers emitted from Az, these are then applied to gates Gs, Gs, G, and Gy. Suppose first that data is to be recorded. The digit pattern is stored in register stages R, ... Ry and gates Gs, G; and Gy will have been primed by the record instruction circuitry. G, and Gy will emit the clock pulses from G; to G, and the register shift circuitry thus causing the contents of R to shift at each clock position. At the same time Gs will emit clock pulses which cause the contents of R, to be recorded on the drum via pulser P. ‘At the end of the recording operation the register contents will be unchanged and will have been inscribed on the drum, and F will be restored to zero state by the next word start pulse emitted by Ay. The re-setting of F, closes Gz and resets F, which in turn emits an operation complete pulse to the rest of the machine. The read operation is performed in a simnilar manner except that Gs and Gy are not operated whilst G; and Gs are. ‘This means that existing register contents are shifted out and stored data are inserted via Ay and G; into Ry and, by virtue of the shifting properties of Ry into the remaining stages of R. The operation is terminated in exactly the same manner as that described for recording. 163STORAGE DEVICES It will be noted that no provision has been made for ensuring that the counter Cis correctly set in relation to the markers on the drum. This is conveniently achieved by means of the connection Z. At the most significant track position two pulses are recorded close together instead of the normal one. If the counter has the wrong relationship to the track positions this extra pulse will advance the counter content one step per revolution until parity is attained. At this point the digitally most significant counter stage emits a pulse via Z, which paralyses A; for a short time thus deleting the extra pulse and resulting in stable conditions. wh fe Fieure 12.7. Schematic of serial magnetic store OTHER TYPES OF DYNAMIC MAGNETIC STORAGE It is not necessary to disperse the magnetizable medium over the surface of a drum; other possibilities include endless tapes of coated paper or plastic, or of special steel as in the original Blatiner- phone. A possible means of obtaining a larger output than occurs with the drum device previously described is by using a disc of remanent magnetic material rotating between the actual pole pieces of the recording head as shown in Figure 12.8. The advantage of this scheme lies in the fact that all of the flux generated during recording passes through the medium instead of the leakage flux normally used. On the other hand, calculation shows that the improvement to be expected from the use of this method would not be much greater than 2:1 and this appears hardly worth while in view of the mechanical difficulties of the arrangement. 164 Plate 4 (a). Magnetic drum store Word ag ate, D we 7 Inches Plate 4 (6). Readjrecord head (To face 9. 164MAGNETIC-ACOUSTIC STORAGE It is, perhaps, worth mentioning that a disc type storage system was originally used on the ARC calculator, oxide coated paper formed the medium and centrifugal force was used to keep the discs flat and in contact with the recording heads. oy Figure 12.8, Dise type magnetic store ‘The IBM Disk Pack, described earlier, is a developed example of this technique. MAGNETIC-ACOUSTIC STORAGE, An extremely simple type of storage devioe having a multiplicity of uses, both serial and parallel, i shown in Figure 1 A rod, tape or wire, R, of any material having ‘gh remanence and exhibiting magnetostriction, has wound upon it a number of coils 4, D;, D2... D, each separated by an appropriate gap. If currents are passed through D; . . . D, in one or other of the two possible directions, that portion of R affected by the resulting field will become magnetized with either NS or SN polarity. On removal of the polarizing currents through Dy . .. D, remanent magnetism of the same polarity will remain in the portions of R underlying Dy . . . Dy. If now a current pulse is applied to 4, because of the magneto- strictive property of R, a compression (or expansion) wave will be generated at A and will travel along R. As this pulse passes under R Ss Paes Py Figure 12.9. Magneto-acoustic storage 165STORAGE DEVICES D,...D, the elementary movement of the magnetic fields so produced will induce voltages in D, . . . D, whose variations, for a short pulse at 4, are shown in Figure 12.10. It will be observed that the waveforms are, as expected, identical with those produced by the drum type magnetic store. Several different input/output arrangements are available. In the scheme just described both input and output are parallel via D,... Dy alternatively a long coil $ may overlay D,... D, in Figure 12.10, Induced voltages for magneto-acoustic storage which case a serial output will occur via S as the sonic pulse passes under the magnetized regions D, . Any digit repetition rate (up to a fixed limit) may be obtained by varying the spacing between D, ... D, and any desired read out delay by adjusting the distance 4... . Dy. From the practical point of view R can consist of a -005 in. dia. nickel wire, the coils AyD, . . . D, having each 10-500 turns, and the minimum distance D, . . . D2 being about -25 in. The pulse current through A should be about 2 A and the pulse duration -1 to -5 psec. To bring the output from D,... D, toa level of 20 V three stages of pentode amplification are required for 10 turn pick-up coil In order to eliminate end reflections from the wire it has been found adequate to clamp the ends of the latter between soft rubber sheets, or more simply, to embed the ends in lumps of ‘plasticine.” Since the attenuation of sonic waves in metals is small, very con- siderable lengths of wire may be used without trouble due to difference between pulse size at D, and at D,._ In some experiments lengths of 40 ft. have been employed and it has been found satis- factory to coil these on rubber sponges. For completeness, it must be mentioned here that the magnetic- acoustic store can be used as a delay line store of the type described in a later section. In this application the output can be greatly increased by placing a polarizing magnet over the output coil Dy. 166 RECTANGULAR LOOP MATRIX STORAGE REGTANGULAR LOOP MATRIX STORAGE ‘The easy availability of magnetic materials with rectangular hystere- sis loops has made storage on this type of medium common in all modern computers. The earliest form of matrix storage was sug- gested by Forrester and operates in the following manner. Z Figure 12.11. Noise cancelling read-out windings for core store ‘Two sets of wires (0 6 2 a4) (bi ba bs be) [Figwe 1211 (a) are arranged to form a two-dimensional grid. At the intersection of each pair (a,b,) is placed a ring core G, of a rectangular loop magnetic material of the type described in Chapter 10. The ring is so arranged that both a, and b, pass through it. Suppose, now, that one of the @ wires az, say, and one of the 167STORAGE DEVICES 4 wires bs receive simultaneously current pulses sufficient to produce individually fluxes less than Hyg [Figure 12.1 (b)] in any core which they thread. Under these circumstances all cores Cp, G,s (rs) will receive flux changes of H,,;, nd these will not change their magnetic state. Cys, however, will receive flux change 2 Hpi, and this will be sufficient to put it into state 1 [Figure 12.11 (6)] if it was not already in that state. To read out from the array several schemes are available accord- ing to the type of output required. For parallel output, if wire bs is pulsed with current sufficient to produce a flux greater than Huis in all cores which it threads, each element C,s will emit an impulse to the ¢, wires if previously magnetized to state 1, but not otherwise. If an individual output is required from ps, the whole array is threaded by an extra and continuous wire Z, upon pulsing ap and Ds with currents adequate to produce a total flux in Cas greater than Hpiy an output will be produced in Z if, and only if, Crs was initially in state 1. To avoid noise addition from the non- selected cores in the row and column which define the selected cores, it is necessary to dispose the Z winding in the manner shown either in Figure 12.11 (a) or (6). It will be seen that, in both cases, induc- tive pick up from co-ordinate lines and noise pick up from unselected. cores is cancelled. Unfortunately, with an even number of cores ina given direction, one uncancelled, unselected pick up arises from each co-ordinate and this imposes one of the limitations on plane size. The use of noise cancelling Z windings also means that the output from the matrix store varies in polarity with the core selected. This disadvantage is, however, easily overcome by using a centre tapped sensing transformer and diode rectifiers to produce uni- directional signals as indicated in Figure 12,11 (b). Since only single wires thread each core, fairly large currents are needed to produce adequate writing fields. In the past, transformer type function tables such as that shown in Figure 11.14 were used to drive the array and these gave the possibility ofimpedance matching. Modern transistors have removed this difficulty and also the other one that the writing currents are in the opposite direction to the read ones. With thermionic tube drive the production of these two directions of impulsing made it necessary to duplicate each of the a and 6 conductors, to use transformer coupling, or to adopt elaborate biasing schemes. For example, by providing a second ‘2? winding which, however, threads all cores in the same direction and by passing a current adequate to produce a field ~H, through this winding, ‘1° can be written in Cys by applying @ current to produce field +H,/2 in all a conductors other than ag anda similar 168 RECTANGULAR LOOP MATRIX STORAGE current in all 6 conductors other than 6,. ‘The availability of npn, pnp transistors has, however, made such schemes unnecessary. When the construction of really large matrix stores is considered two problems arise; first, the selection system and second the maximum size permitted by signal-noise ratio. ‘The selection system can be simplified by increasing the dimensionality of the matrix. This involves the passage of more than two coincident currents through each element and, in turn, requires that the core material must be capable of discrimination between (n) and (n+1) inputs where (n) depends upon the dimensionality of the matrix. To select a single core from an array containing K'cores by means of a matrix having dimensionality, (n) can be shown to involve the provision of nK¥» selection lines. Thus, for 4,096 digits the selection lines vary in number from 128 for a two-dimensional matrix to 24 for one having six dimensions. Matrices of high dimensionality involve the use of materials which can discriminate between various numbers of inputs; it appears at first sight that, for n dimensions discrimination between (n=1) and (n) inputs might be needed. Closer examination shows, however, that by arranging inputs to be both positive and negative in sense, the material need discriminate between only (n) and (n+1) inputs for a matrix having dimensionality (2n) or (2n +1). It can be shown, with the notation of Figure 12.11 (c) that a neces- sary condition which a material must satisfy, if it is to be used in a matrix of dimensionality (n) is: Hyggl > 1 ~ Vm The size limitation, due to signal/noise ratio, depends not only upon the core material but also upon the method used for testing the output. ‘Three systems are in current use: in the first straight- forward output voltage amplitude discrimination is used, in the second the voltage-time integral of the output is tested, and in the third a test or ‘strobe’ pulse is applied to the voltage output at an optimum time—usually about 0-5-0-75 ysec after the application of the coincident currents. The signal/noise ratios attainable by these techniques vary from 10;1 for the former, to 50:1 for the latter. For noise cancellation Z windings, of the type just described, it is clear that, for an n xn array the output voltage, Vo is given by Vo= +[V,-2Vy%(n-2) VQ) where V, is the output from the selected core, Vis the contribution from each of the half selected cores which are not paired and V, is 169STORAGE DEVICES the noise component from each pair of cancelled cores—usually called ‘delta noise’. It can be seen that the noise contribution varies linearly with n, for present-day cores the maximum value of n is about 64. 60 60} Output voltoge for single furn psec Figure 12.12. Output from ferroxcube matrix store element Figure 12.12 gives an indication of the physical magnitudes involved. Two sizes of drive current pulse are applied to single conductors which thread a 2 mm diameter Ferrite core. The out- puts V, and V2 occur when the core contents are read out after a single half-selecting disturbance and after eight half-selecting disturbances respectively. Vy shows the output produced when a half-selecting read-out pulse disturbs a core which has just been set up and V, shows the output produced by all half-electing dis- turbances after the first. It was thought at one time that ferro-clectric materials such as barium titanate and triglycine sulphate might form the basis of 170 MAGNETIC THIN FILM STORAGE matrix stores, Experiments by Prutton in the author’s laboratory, showed, however, that there exists no threshold below which these materials fail to switch. Coincident voltage techniques are thus inapplicable and the potential of ferro-electric storage is now con sidered negligible. MAGNETIC THIN FILM STORAGE It has been shown that thin films of alloys such as 80 per cent Ni, 17 per cent Fe, 3 per cent Co, when deposited in the presence of a magnetic field, to a thickness of 750-1,000 A.U, exhibit magnetic anisotropy. Their magnetic properties are characterized by a‘hard’ and an ‘easy’ direction and, in these directions, the hysteresis curves are as shown in Figure 12.13 (a) and (b). (b) Figure 12.13. Hysteresis loops for thin magnetic film : (a) ‘hard? direction loop (6) ‘easy? direction loop ‘The way in which an element can be made to store information is shown in Figure 12.14. The clement is defined by the cross-over area of two conducting strips, called the digit line and the word line respectively. These are insulated from each other, and from the thin magnetic film by very thin layers of a vacuum deposited insula tor such as SiO. Figure 12.14 (b) shows the process of magnetiza- tion, First a word field, H,, is applied which rotates the magnetic vector, M, of the element into the hard direction. Next a digit field, H,, is generated in such a sense as to rotate the domain vector M in a clockwise or an anti-clockwise direction. ‘The word field is now removed and the vector, M, snaps into the nearest easy direc tion saturation direction and remains there after Hy is removed. Since there are two possible directions for M it follows that ‘0° and ‘I? can be stored. ‘The read-out operation uses a current in the word line only. Since the word and digit lines are perpendicular the application of a current pulse to the word line will produce no induced voltage on the digit lines (to a first-order approximation) ; M71STORAGE DEVICES however, because of the fact that the storage vector, M, is rotated, an output will be produced by the film magnetization in a sense which depends on the initial direction of M. FF Word field applied Huh oy ny te M ” Ha Hg Digit Hord line. | direction Word ime field Digit field applied Word tine — et Hg M wis “Storage Word field removed element “Easy, \ direction =a wo h (a) Digit field removed (0) a) (b) Figure 12.14, Operation of thincflm storage element: (a) storage element and drive cone ee ON Guerss (by fd and flax patierts daring recording of 0 end *T™ go Word lines - VAN 1 Substrate T rE AN Hi I L iy Magnetic vin 7A 2 insulator Digit lines —~ Figure 12.15, Organization of word-ordered thin-film store 172 SONIC DELAY STORAGE The construction of a thin-film word-orientated store on these principles is shown in Figure 12.15, such stores have been switched in times of the order of 10-9 sec and are potentially the fastest at present known. The form described is probably the simplest one so far discovered, other versions use films deposited on tubes or wires, but seem to have no particular advantage and are more difficult to manufacture. It can be seen that a non-destructive read-out process is easily arranged if this is desired. SONIC DELAY STORAGE One of the first and most elegant high speed storage devices to be suggested was the sonic delay line. This consists, basically, of a sonic conductor (Figure 12.16) supplied with circuits, 7 for transforming an incoming signal into a sonic pulse, receiver O capable of detecting the transmitted sound pulse and transforming it back into electrical form, and a gate G either for recycling the output from 0 to the input J, o for permitting the insertion of data from an external source. es i i ! o Figure 12.16 Sedge It is clear that if n\ is the delay between insertion of the sonic pulse at J and its transmission and reception at 0, n binary digits separated by time intervals /\ can be stored in the line. In the simple form described the device would be unsuitable for incorporation in a calculating machine, but a practical design is shown in Figure 12.17. Here the delay medium is usually mercury, this has the advantages of a relatively low velocity of propagation (145 em/msec), of good acoustic match with the quartz transducers used for input/output, and of freedom from the unwanted modes of transmission found in solid media. Input and output are nia quartz crystals Q, and Q; usually tuned to from 10 to 20 Mc/s. On the input side the crystal Q, is driven from an impedance matching network P and the output from Q> is amplified by means of a tuned amplifier A. Since dispersion and attenuation occur in the delay line an input 173i STORAGE DEVICES pulse of the type shown in Figure 12.18 (a) appears, after trans- mission and amplification, blunted and broadened as shown in Figure 12.18 (8). In consequence of this, data would be lost after ‘one or two passages down the line if no reshaping were applied. Reshaping is performed by applying the amplified pulse to the input WeiteT Write’o" Figure 12.17. Delay line of a gate G, to the other input of which is applied a standard clock pulse shown in Figure 12.18 (c). ‘The gate output then has the form Input f @ oA ) mer Tl @ 1 Figure 12.18. Input and output waveforms of the clock pulse and not that of the distorted input, so that the data in the line are regenerated at each cycle. In order to obtain the output of a particular digit or group of digits from the line a gate G is provided which can be opened at given times from an external source. In a like manner, to insert data into the line an inhibitory gate G, is provided. If ‘1° is 174 DIELEGTRIG STORAGE desired in a given position this may be inserted directly to the input of G, where, if no ‘1? is already arriving from A and G it will insert one, whereas if ‘1’ is already arriving its effect will be merely redundant. Similarly G, is inhibited if the insertion of ‘0° is required. Lines have been constructed of mercury, aqueous alcohol, quartz and vanadium permendure or nickel wire. The usual length is 1,024 digits corresponding to a delay of from 1 to 2 msec and a physical length of from 1-2 m according to the inter-digit interval used. The chief source of trouble lies in temperature variation, since the velocity of propagation is sharply dependent upon this factor. Mercury delay lines are usually enclosed in a thermosta- tically controlled constant temperature container. It is important to ensure good acoustic contact between the quartz transducer and the mercury; this can be achieved by first filling the outer envelope with absolute alcohol and then displacing it with the mercury. On applying the end quartz crystal the residual alcohol is squeezed out and a good quartz-mercury contact remains. Numerous devices have been suggested for the elimination of reflections in delay lines and also for their external adjustment for total delay, but as delay lines are now obsolescent it is not worth describing them. DIELECTRIC STORAGE The observation that a condenser will hold a charge of electricity for a relatively long period, depending only upon the leakage characteristics of the system, suggests that dielectric media might be used asa computer storage device. In principle, at least, charge could be deposited upon the surface of a rotating dielectric drum and detected later in a similar manner to that used in the magnetic drum storage system. This clementary storage system seems never to have received practical trial, but several others, depending on dielectric storage but operating by means of electron beams in vacw, have been extensively developed. Before entering into details it is necessary to consider possible means of rendering the storage permanent over any desired period of time, and two general methods suggest themselves. In the first the data stored atany point of the medium are examined andare then regenerated. In the second direct use is made of the secondary emission properties of the dielectric storage surface under electron bombardment. 175STORAGE DEVICES Consider the physical situation pictured in Figure 12.19. An electron gun g generates an electron beam 6 which is focused upon a dielectric screen d. A mesh screen s is placed in front of d. When primary electrons are incident upon a dielectric in vacuo several courses of action are possible: (i) The surface may emit more electrons than it receives. (ii) It may emit the same number. (iii) It may emit fewer electrons than it receives. In these circumstances it is said to have a secondary emission coefficient greater, equal or less than one. eX 4 (0) J Eectron beam 9) Electron ‘gan 0) sactie ‘surface Figure 12.19. Schematic of dielectric storage device (a) With the physical situation of Figure 12.19 the variation of secondary emission coefficient of d with potential of d is shown in Figure 12.20. SEC HE a Potential of (a) Figure 12.20. Secondary emission cogficient v. potential of (d) For low potential differences between g and d electrons striking d have low energies and eject few secondaries, corresponding to points between land mon the curve. As the potential of dis increased the secondary emission coefficient rises with increasing incident electron energy and becomes greater than unity at m. For further increase in the potential of d the coefficient first increases and then starts to 176 CRYOTRON STORAGE drop owing to the ability of d to recapture the electrons liberated by the initial bombardment; this corresponds to the curve m, m, 0. It has been assumed throughout that the grid s of Figure 12.19 is able to capture and remove all ‘free” electrons from the system, It follows from the above qualitative argument that the system of Figure 12.19 can exist in two stable states corresponding to m and n on the curve of Figure 12.20, thus all of the conditions for a binary storage device are present. Secondary emission storage systems were produced by Forrester and Haeff, Rajchman, and at Manchester University, all have now vanished from the computer scene and do not merit description. CRYOTRON STORAGE ‘The original Dudley Buck cryotron was considered as the unit for a large-scale store, but was at once rejected on grounds of com- plexity, soon afterwards the Crowe cell, a thin-film device, entered the field and enjoyed a certain popularity. In recent years, how- ever, it has been realized that the strength of cryogenic storage lies in the ease with which cryotron circuits can be made to perform Jogical functions, ‘This, in conjunction with their small size and ease of fabrication, has led to considerable development of highly sophis- ticated store elements each of which contains many cryotrons. ‘One attractive possibility is the construction of a so-called associ- ative store. That is, one which can automatically locate data stored within it and which can, on demand, cause such data to be output. Associative storage elements are quite complex and may contain from 5 to 12 cryotrons per bit stored according to the com- plexity of their logical possibilities. To illustrate some of the principles involved in the more complex associative store, Figure 12.21 (a) shows a cryotron storage loop and Figure 12.21 (b) indicates how such a loop can form the basis of a word-orientated store. To store information in the loop abcd [Figure 12.21 (a)] the following sequence of operations is performed : (1) An input current, J, is applied across (ad), this current divides according to the inductances of the superconducting paths (ad) (abed) so that I= Jay +Iotea- (2) A write current is applied to the gate W. ‘The input now flows exclusively through (abcd). (3) The write current is removed, no current flows in (ad) and I continues in (abed). (4) The input current, J, is removed. 12—av.c. 177STORAGE DEVICES The current in (abcd) now finds a continuous path a-b-c-d-a and is stored. This stored persistent current can be detected by its effect on the read gate cryotron, R. The way in which this storage loop can form a part of a complete store is shown in Figure 12.21 (8). To insert data the current J is applied to the input lines of any digit whose value is required to be Output Output 1 # Write We Read tt 2 le ie | Input current, (@) hy th Write a Read th f oe Input Sense’ “Input ) Figure 12.21. (a) Gppotron storage loop; (B) word orientated store ‘I’, The ‘write’ line for the required word is energized and then de-energized and then the input currents are removed. ‘The input data are thus stored in the loops associated with the given word. To read data from the given word location the associated ‘read? line is energized and current is then applied to the ‘sense’ lines for each digit. Only for those digit positions where ‘0° is stored will any zero resistance path occur between sense and output. OTHER FORMS OF STORE ‘Two other forms of storage device are worthy of mention, the first is the diode-capacitor store of Holt and the second is the neon store of Couffignal. The diode-capacitor store makes use of condensers as the storage elements; these are arranged as shown in Figwe 12.22 so that, in the quiescent state, any condenser, C, may have a potential between 178 OTHER FORMS OF STORE 4+4V and —4 V without the diodes D,, Dz conducting. If, how- ever, the terminal voltages of the diodes are suddenly reduced to zero by means of the driving transformers, the capacitor will be discharged and a voltage pulse will occur across the resistance R. In practice the voltage on any condenser is restricted to the range 42 V, and under these circumstances it is possible to regenerate the contents of the capacitor after read-out by feeding R with the amplifier output (or rather a fraction of it equal to 2 V) and arranging for the clamping voltages across D,, D, to be restored to Mord 2 Word 10 Figure 12.22, Diode eapacitor store -4V, and +4 V before the input to R is removed. ‘The limita tions on this system depend upon the diode characteristics, but, if silicon junction diodes are used, it appears that a single output amplifier can serve some thousands of words, and that a read-out and regenerate time of about 10 psec can be associated with a storage time between regeneration periods of 2 or 3 sec. ‘The use of neon difference diodes for digit storage has already been described (page 118), they may also be combined with semi- conducting diode buffers to form a large matrix store and in this application they have the advantage that the read-out operation does not necessarily destroy the stored data. Because of the difference between the striking and the burning voltages, difference diodes can be used in a matrix in a manner which is almost identical 179STORAGE DEVICES with that described in connection with the co-incident current magnetic core matrix, at least as far as data insertion is concerned. Readout is obtained by using the conducting elements of the store to transmit a pulse which is so short that it cannot cause extinction of the discharge. Experimental work on difference-diode storage matrices suggests that a difficulty may be caused by unequal ageing characteristics of the individual elements, a feature which does not arise in other forms of matrix store. ‘THE SIZE OF AN ADEQUATE STORE. ‘The answer can be given to this question in a trivial manner, by the one word ‘infinite.’ It is perhaps a more adequate question to ask ‘what is the minimum storage acceptable in a high speed computer?” In 1947, before any high speed computer possessing storage facilities had been actually completed, a survey made at Princeton had suggested that 4,096 words of about 10-12 decimal (i.e, 35-45 binary) digit accuracy might be appropriate as the high speed internal storage for a machine. ‘This should, of course, be backed up by a slower speed storage on some such medium as magnetic wire or tape, capable of completely evacuating or replenishing the main store in from +1 to 1 sec and having a capacity of 105-106 words. Events have shown the wisdom of this analysis and many of the ‘most recent machines have hierarchies of storage in just about these proportions. Developments in core fabrication have made it pos- sible to produce single level stores of very high speed and with capacities of up to 105 words; however, it is questionable if the small increase in overall speed which they produce justifies the enormous increase in cost. 180 13 DEFINITION OF A CODE AND DISCUSSION OF ITS FORM AND CONTENTS ‘Tur code of an automatic computer is simply the list of instructions or orders, arithmetic and otherwise, which it is possible to make the machine obey. The sequence of such orders appropriate to a cal- culation will generally be stored in the memory, together with any numerical data necessary, and it is therefore convenient to ex] them in coded numerical form, whence the use of the word ‘code’ in this context. The set of operations necessary to solve any particular problem is also sometimes referred to as the code, but the less ambiguous term ‘programme’ is more generally used; the process of preparing the set of orders is known as coding or programming, ‘THE PHYSICAL FORM OF A CODE Before attempting to define the basic operations necessary for a complete code it is convenient to discuss the physical form of the orders. All instructions contain a function or operation code and reference to one or more memory locations or addresses. The number of memory locations referred to in each instruction may vary from one to four, but is usually one or two. ‘Thus a typical instruction from a one-address code is: ‘Add the number in memory position (x) into the accumu- lator.” ‘The corresponding instruction in a two-address code might be: ‘Add the number in position (x) to the number in position (3), storing the result in position (s).’ In both these examples the set of instructions forming the pro- gramme would normally be stored in consecutive positions in the memory, the control of the machine being constructed to select the next instruction from the position following that in which the pre- vious one was stored. Most computers today have codes of one of 181DEFINITION OF A CODE these types, and they are certainly the simplest to use; however, a third variant sometimes found when the main store of the computer is of the circulating type, should be mentioned. This is a two- address code in which the second address specifies the location of the next instruction to be followed, viz.: ‘Add the number in position (x) into the accumulator and go to position (9) for the next instruction.’ _ This type of code enables the programmer to dispose the instruc- tions and numbers strategically around the store so that the least possible time is wasted in waiting for them to be read in or out; how= ever, it places an unwelcome additional load on the programmer, and as it seems certain that eventually all machines will have an ‘immediate access’ store of the magnetic core, thin film or similar type, we may expect that this variant of code will disappear. A function code, defining the particular operation to be carried out, and at least one address are the basic contents of any instruc- tion, but some machines have additional specifications to assist the process of programming. ‘The most notable of these is the ‘modifier register’ or B-box, the contents of which are added to the address specified in an instruction each time the instruction is obeyed. ‘This facility is of particular use in iterative loops where the addresses of several instructions have to be altered each time the loops are tra- versed. Usually several modifier registers are provided, and the instruction code then specifies which is to be used. ‘Thus an instruction might read: ‘Add the contents of location (x) to the accumulator, (x) being increased by the contents of modifier register (b) before carrying out the instruction.” Note that the actual number (x) remains unaltered in the memory during this process, ‘THE CONTENTS OF A BASIC CODE ‘The choice of an order code requires careful consideration since on it depend, on the one hand, the engineering difficulties encountered in constructing the ‘hardware’ of the computer, and, on the other, the ease with which a problem can be programmed for the machine. Although it is interesting to note that it is possible to perform all the four basic arithinetic operations of addition, subtraction, multi- plication and division on a machine provided only with facilities for 182 THE CONTENTS OF A BASIC CODE shifting numbers, this is quite impractical since about 30 instructions would be needed merely to add two binary digits together. Many of the earlier machines were provided only with addition, subtraction and multiplication instructions, division being pro- grammed from these, but most computers today perform all four arithmetic operations automatically. These instructions, together with instructions enabling data to be moved to and from the memory and arithmetic unit form the basis of any code. Every machine must also, however, possess at least two ‘control’ instructions govern- ing the sequence in which orders are obeyed. The reason for this is that practically all calculations which occur in real life involve a great deal of repetition, or iteration, in which the same instructions are followed, using different data at each repetition. Indeed if this were not so, automatic computers would be uneconomic since the time to prepare a programme would exceed the time to do the cal- culation by hand, ‘To take a simple example, suppose that it is required to add to- gether 100 numbers which are stored in locations 1-100 of the mem- ory. A programme which would accomplish this might consist simply of 100 addition instructions (assuming that the accumulator was initially empty): Add contents of location (1) to accumulator ‘Add contents of location (2) to accumulator ‘Add contents of location ... to accumulator Add contents of location (100) to accumulator However, it is evident that this is somewhat uneconomic from the point of view of storage space, and if the operation to be repeated contained many instructions instead of only one, and had to be re- peated 1,000 times instead of 100, such repetition might easily use up the available storage space. ‘A much more satisfactory arrangement would be to use the same section of programme over and over again, making modifications to the addresses of instructions as necessary each time, but in order to do this we must have some method of counting the number of repeti- tions, and of causing the machine to switch to the next section of programme when the required number is completed. ‘This is done quite simply by an instruction called the ‘branch’ instruction (con- ditional control transfer is another name for it) which has the follow- ing property. “The contents of the accumulator are examined and if the number there is >0 the next instruction is taken from the following location 183DEFINITION OF A CODE as usual; if it is <0, however, the next instruction is taken from the address specified in the branch instruction. ‘Thus, if it is desired to go through a set of instructions exactly n times, and then to switch to another section of programme it is merely necessary to store a number, initially equal to (n-1), and to subtract | from it and examine it by a ‘branch’ instruction after cach repetition of the set. After exactly n repetitions the number will have been reduced to ~1, and the branch instruction will initi- ate a switch to the next part of the programme as required. The number used to ‘count down’ in this way is called an iteration index and a detailed example of the use of such an index is given in the next chapter. ‘One other important use of the branch instruction must be mentioned; this occurs when a process of successive approximation is used to calculate a quantity—the roots of a polynomial or the square root ofa number, for example. In calculations of this kind it is sometimes difficult to determine beforehand how many steps of the approximation will be necessary, and the use of an iteration index asdescribed above is therefore impossible. A much better method is available, however, for, suppose that x, and *,,; are two successive values of the approximation, and that %,,;>%,._ If, after each step the value of s,—%,, is calculated, the result will be negative until 4 = 4,4, and the branch can be used to determine when this occurs. ‘When this point is reached, of course, the approximation has proceed- ed as far as possible within the range of accuracy of the machine, and the control is transferred to the next part of the programme. The exact form of the branch instruction varies from one computer to another; thus on some machines more than one instruction is provided and it is possible to distinguish between <0, =0 and >0 while on others the comparative size of two numbers in the memory is used as a basis for decision; the variations in usage are, however, trivial. As well as the conditional transfer of control made possible by the branch instruction, it is sometimes necessary to effect an uncondi- tional transfer to some location for the next instruction, instead of going to the next location in sequence as usual. For this purpose an absolute control transfer, or jump instruction of the form: Control to instruction in location (x) is always provided. In a two-address code, where the second address specifies the next instruction, this is of course redundant. Finally, it is obviously necessary to have at least two instructions, enabling data to be read into and emitted from the machine. The 184 A PRACTICAL CODE exact form of these depends very much on the type and extent of input-output apparatus on the machine, but typical instructions might be: ‘Read the next number on the tape into location (x) of the memory.’ “Punch the contents of location (x) onto the tape.’ A PRACTICAL CODE The basic operations discussed above are essential in any practical code, but the introduction of other orders depends on the individual machine. In particular, the engineering difficulties likely to be encountered, the importance of reducing overall operating time and of economizing in the use of memory space by reducing the number of orders needed for a calculation must be considered. Thus, the inclusion of a division order, although not essential, is certainly desirable; the argument in favour of a square-root order is. less strong, however, since it is an operation of much less frequent occurrence in general computing. Most codes also include certain non-arithmetical operations concerned with transferring numbers, or portions of numbers, from one part of the machine to another. These are introduced for convenience in coding and their form varies with the particular machine concerned. Another type of instruction sometimes found is the ‘logical’ instruction of which the following are examples: (1) and B=C. A number C is generated whose digits C, are one if both A, and B, are one and zero otherwise, (2) AVB=C. G,iszero if A, and B, are both zero, but is other- wise one, (3) ~A=C. G,=1-A, (G, is therefore the digital comple- ‘ment of A,). (4) A#B=C. C,=1if 4,#B,, C,=0if A, =B,. ‘The last of these, used in conjunction with the conditional transfer order, enables the equality, or otherwise, of two numbers to decide which of two courses the calculation shall follow. Similarly, the order A and B=C can be used to discriminate on any digit of a number. It can also be used to isolate a particular group of digits from a number by comparing the number with another containing unity in each position of the digits required, and zero elsewhere, 185DEFINITION OF A CODE It has been found, after many years experience of teaching pro- gramming, that the basic ideas in the subject are most readily acquired using simple codes of about 20 instructions. Thus, al- though the programme for a given calculation may contain more instructions than if it were written using a more elaborate code, (some codes contain as many as 70 different instructions), the student becomes familiar with a restricted code more quickly, and familiarity is the key to facility in writing programmes. In practice, of course, probably 99 per cent of actual programming is done using some form of compiler, and these are discussed in a later chapter. Neverthe- less it has been found worthwhile to introduce the topic of program- ming via a basic machine code, and the code of the M.4 computer is very suitable for the purpose since it is logically complete but simple. A brief résumé of the physical properties of the machine is appro- priate here. The M.4 is a one-address computer operating in the binary scale, with numbers of 92 bits in length. It is a fixed point machine and numbers are normally regarded as lying in the range =1 O next order taken from (A) Branch register. Same as BA but contents of register used. Left shift. Contents of accu- mmulator and register shifted left NV places. Most signifi- cant end of accumulator transfers to least significant end of register and vice versa Rightshift. Accumulator andFunction Code 20 21 22 23 24 DV MP AC sc AD SU DM TR DEFINITION OF A CODE Counter V Description register shifted right places. Sign digit of accu- mulator propagates. Least significant end of accumula tor transfers to most signifi- cant end of register. Least significant end of register lost Division, Number in accu- mulator divided by number in(A). Result in accumula- tor. Remainder in register Multiplication, Multiply the number in register by the number in (4). 32 most significant digits of product are in accumulator and 31 least significant in register (1-31) Clear accumulator and add contents of (4) to accumu- lator Clear accumulator and sub- tract (4) from accumulator Add contents of (4) to accu mulator Memory to drum. ‘Transfer (W) tracks from memory, starting at location 0 in track (4) to location 0 in track (B) of drum Subtract the contents of (4) from accumulator Drum to memory. ‘Transfer (WN) tracks from drum to memory, starting at location 0 track (B) of drum to loca- tion 0 track (4) of memory Transfer contents of (4) to register. Register is auto- matically cleared before the transfer oe A PRACTICAL CODE Function Code F Counter V 25 cr - Description Control transfer. ‘The next instruction is taken from (A) Register record. The con- tents of register are recorded in (A). After recording register contains 0's or 1’s according as the original contents were +ve or—ve Accumulator partial record. The left hand 10 digits of accumulator are recorded in the left hand 10 digits of (4), ‘The remaining digits of (4) are unchanged and the con- tents of accumulator are un- changed by recording Accumulator record. Con- tents of accumulator are recorded in (4). Accumu- lator remains unchanged 26 RR - 27 RP - 28 RA - ‘The only instruction whose function is not obvious here is the ‘accumulator partial record’ number 27. ‘This is provided to make it possible to alter only the (4) digits of an instruction, leaving the rest unchanged, and as will be seen in subsequent programmes, is an essential feature, 18914 THE TECHNIQUE OF PROGRAMMING ‘Tuz programming of a problem can be divided into three parts: (a) Mathematical formulation. (b) Schematic programme. (c) Detailed programme. The first of these will not be considered further except to remark that the methods used must involve only arithmetic operations, so that, for example, a differential coefficient must be replaced by its finite difference approximation. An investigation into the effect of such approximations, and of rounding off errors, on the accuracy of the final result is also necessary; furthermore, all quantities must be adjusted so that they do not grow or diminish beyond the range of the machine. The latter can be quite a serious problem, since it is by no means always possible to foresee the magnitude of numbers derived in the course of a computation, and this matter will be discussed later. The difficulty can, of course, be avoided if the machine is constructed or programmed to work with a ‘floating’ binary or decimal point; that is, each number has associated with it an index to indicate the position of the point, and the arithmetic unit of the machine takes account of these when operating upon the num- bers. Such machines are, however, more complex and essentially slower than fixed point machines. ‘The complexity of the schematic programme depends chiefly on the number of iterative processes involved in the computation. ‘The flow diagram, sometimes called a block diagram, introduced by Goldstine and von Neumann is often useful at this stage and it will now be described briefly. FLOW DIAGRAMS ‘The most straightforward type of calculation is that which involves no iteration or decision on the part of the machine; the programme then duplicates those operations which a human computer would follow, and the coding process can be represented by a single line as shown in Figure 14.1. 190 FLOW DIAGRAMS Ee] Operations {o-] Figure 14.1 Suppose, for example, that itis desired to calculate the expression: ax? +x +e er ihre) for one set of values of x, a, 6, ¢, ete. The sequence of operations will be as shown in Figure 14.2. Renee in ;ofarre be [otroxre PY eens out dive Figure 14.2 As mentioned before, this type of operation is unsuited to a high speed computer, since the time required for formulating the pro- gramme and feeding it into the machine will probably be at least equal to that required for manual computation of the problem. A more realistic problem would be the evaluation of y for n values of x at intervals Ax, the values of y to be printed out. This could be achieved by using an iteration index J, initially equal to (n-1), to count the number of terms calculated. The branch instruction In Printery Out xextx Figure 14.3 ‘would be used to determine when J became negative, thus indicating that a sufficient number of terms had been evaluated. This process involves a simple loop and the flow diagram is shown in Figure 14.3. This is, of course, a very simple example. Most ‘real life” prob- lems involve many branch points and loops, and the flow diagram 191THE TECHNIQUE OF PROGRAMMING is then of very considerable value in enabling the overall scheme of the calculation to be decided before embarking on detailed pro- gramming. Other examples are given in later chapters, but Figure 14.4 lists the most useful items of notation which have been generally adopted for flow diagrams. Rectangular box. Any processing except decisions and input= output Oval box. input-output © Diamond, Decision or branch points Square box, Starting or stopping point Small circle. Connecting points in the flow diagram. Symbols inside the circle indicate corresponding points — > Arrows indicate the direction of flow Figure 14.4 ‘THE DETAILED PROGRAMME When the flow diagram is complete the next stage is to write out the detailed programme which will contain: (a) A fall list of all orders. (b) Detailed memory locations for orders. (c) Detailed memory locations for numbers and for transient storage required during the computation. Itis naturally impossible to lay down inviolable rules of procedure for coding; methods will vary with the type of problem in hand, the characteristics of the machine to be used, and the experience of the programmer. There are, however, many problems which have to be faced whatever method is used, and some of these are discussed below. The detailed process of programming is best illustrated by examples, and some techniques which have been evolved for use 192 SOME TEDIOUS BUT NECESSARY DETAIL with existing machines will be apparent from those given below. ‘These techniques are not regarded as permanent, but may be varied with the problem under consideration, and with increased experi- ence. SOME TEDIOUS BUT NECESSARY DETAIL Before giving a programme there are a few details on the exact lay- out of instructions and numbers which must be discussed. It was mentioned earlier that the physical layout of an instruction is as follows: Digits - 1-10 11-15 16-21 22-31 32 Contents A F N B — When the word is regarded as a number, as distinct from an instruc- tion, digit 1 is the sign digit, digit 2 represents 2-1, digit 3, -2and so on, with the final digit 32 representing 2-*1. ‘Thus the‘units’ digit of the A address, digit 10, is numerically equal to 2-8, and that of the B address is 2-30. Almost all programmes make use of the technique of modifying the address of one or more instructions so as to make them refer to successive locations in the memory as a section of the programme is repeated. On M4 this can be achieved by adding 2-9 or 2-30 to the instruction in question to modify the A and B addresses respectively. The use of iteration indices has already been described. Since M.4 is built to work essentially with numbers less than 1, these indices must be actually stored as fractions and the usual technique is to store an index J, say, as [x29 The reason for this is that the “units? digit which must be used to subtract from J at each cycle is then 2-8, and this quantity will normally be present in the store anyway, because of its use in modifying the A address. Naturally this is quite arbitrary and indices can just as well be stored as J x2-* where n lies between I and 31. ‘The two points mentioned above are both illustrated in the pro- gramme below. For convenience of reference we give in Figure 14.5 an abbreviated form of the M.4 code which is given in full on pp. 187— 189. Finally, given below is the code of the teleprinter and punch used for input and output. 1 represents a punching and 0 no punching. ‘Thus, for example, if the first six digits in register are 001001 an OT instruction will result in typing ‘9°. Similarly, the depression of the “9° key on the punch will produce a punching 001001 on tape. 1B—aD.c. 193THE TECHNIQUE OF PROGRAMMING Brief M.4 Code See Figure 14.5 HT 16 AG sw 18 sc IN 20 AD oP. 21 MD or 22 su BA 23 DM BR 24 TR is Nv. 25 cr RS ON 26 RR DV 27 RP MP 28 RA Decimal Code Symbol Equivalent Code 10000000 28 0011100 0000011 29 1011101 0000102 30 1011110 10000113 310011111 ooog100 4 32 0100000 10001015 33 1100001 10001106 34 1100010 ool 7 35 0100011 0001000 «8 36 1100100 1001001 9 37 0100101 1001010 38 0100110 0001011 39 1100111 1001100 40 1101000 oooliol = + 41 0101001 ooolli0 = $ 42 0101010 lool #f 43 1101011 0010000 44 0101100 1010001 45 1101101 1010010 & 46 1101110 oololl = * 47 O101111 1010100 | 48 1110000 0010101 49 0110001 0010110 50 0110010 1010111 511110011 1011000 52 0110100 0011001 53 ‘1110101 0011010 54 1110110 1011011 55110111 Symbol SVGHERH VOL EN RUN RO DHOIWBA’ A PROGRAMME Decimal ‘Decimal Equivalent Code Symbol Equivalent Code Symbol 56 0111000 x 60 1111100 Space 37 1111001 x. 61 0111101 - 5811010. 62 0111110 59 Oll1011 CR, LF 63 di Error Note: Blank spaces in ‘Symbol’ column have no teleprinter symbol. Left-hand column of ‘Code’ is the parity digit. Actually, 7-hole tape is used, the seventh hole being reserved as a parity checking bit arranged so that the sum of the digits in each code is odd. Parity checking is done automatically on input, the parity bit not normally being read into the computer. Simi- larly, in punched output a parity bit is provided where needed. A PROGRAMME We now examine the complete coding of a problem, and as an example consider the calculation pictured in Figure 14.3, with the difference that instead of printing out the values of.y as they are cal- culated (this would involve a binary decimal conversion programme) we shall store them in consecutive memory locations starting at location 100, and calculate values corresponding to x=O(Ax)nAx. ‘The flow diagram then becomes: in Peper es ecation 1 2 { out are i 100 iutioy Alter ( (0 161} ad gag ee Figure 14.5 The programme is written with instructions stored in location 0 onwards (storage systems usually number from 0 rather than 1 as this reduces the length of addresses by one digit). This is arbitrary, but gives a convenient starting point. ‘The programme is then as follows: Location Contents Explanation 0 TR 27 dtransferred to register 1 MP 32 Giving dx in accumulator 195Location NauRen 15 16 17 18 19 20 21 23 24 25 26 a7 28 29 ‘THE TECHNIQUE OF PROGRAMMING Contents AD 28 RA 33 TR. 24 MP 32 AD 25 RS 32 MP 32 AD 26 DV 33 RA 100 AC 31 su 30 BA 16 HT RA 31 AG 32 AD 29 RA 32 4c i AD 30 RA ll CT Oo a b c ad é ax Explanation dete dx +e placed in temporary storage a to register ax in accumulator ax+b Right shift 32 places, This transfers contents of accumulator to register, the contents of register being lost. As these were the least significant 31 digits of the multiplication in location 5, this does not matter. ax? +bx ax? +be+e = (ax? +x +0)/(dx +6) in accumula- tor First value of y stored Iteration index J to accumulator 1-2-9 Branch on accumulator. If contents ofaccumulator >0, next instruction is taken from location 16, if <0 from location 15 Halt ~2- substituted for ready for next cycle x to accumulator xthx New value of x stored Instruction which stores y 2-9 added to address of instruction. Instruction now reads: ‘RR 101’, Next value of y to be stored in next location of table Modified instruction recorded Control returns to beginning of cycle 196 ‘A PROGRAMME Location Contents Explanation 30 a7 31 i I=nx2-9 initially since (n +1) values of y are to be calculated 32 x »=0 initially 33 ‘Temporary storage for dx +e -100+n Values of y For ease of comprehension, the instructions in this programme have been written in their mnemonic form; before they can be inter- preted by the computer they must, of course, be turned into num cal form and this is done by an input programme. Each instruction is punched on tape, preceded by the address in the memory where it is to be stored, and followed by ‘carriage return line feed’ punch- ings (CRLF). ‘Thus the first few instructions would appear as: 0, TR, 27, CRLF, 1, MP, 32, CRLF, 2, AD, 28, CRLF, etc. The ‘carriage return line feed’ punchings serve two purposes. ‘They act as an indicator to the input programme that the end of an instruction has been reached, and more important, they cause the instructions to be typed in tabular form as they are punched, thus making checking easy. (Most punches incorporate or can be plugged to a typewriter.) The input programme takes each component of the instruction, converts it to binary scale, assembles the instruction in the correct form (see p. 186) and stores it away in the location indicated. Thus the first instruction, TR27, would actually appear in location 0 of the store as: 190000110111 100090000000000000000 vinary 27 f 27 [binary 24 not used in this instruction ie. (4) lie. TR So far nothing has been said of the way in which the numbers a, 6, x, ele. are placed in the store. In areal calculation it is possible that some of them might be generated in an earlier section of programme and placed in the appropriate location ready for the calculation of the y values, Alternatively it might be required to insert them in the programme together with the instructions. Two methods are available here. If the numbers are known in binary form they can be punched on tape together with the instructions. _In this case the code ‘B7’ is punched immediately before the number. Thus the value 2-9 in location 30 would appear as: 30,B7,00000000010000000000000000000000 197THE TECHNIQUE OF PROGRAMMING This method is only useful for numbers, such as powers of 2, which are more conveniently expressed in binary scale, and for normal data itis necessary to punch in decimal scale and make use of a decimal— binary conversion programme. Similarly, when results are to be printed or punched at the end, a binary-decimal routine would be used and these programmes are given in the next chapter. Such decimal data would normally be punched on a separate tape from the programme, and read in by the programme itself. The machine is made to start on the execution of a programme by punching “ST” followed by the location of the first instruction, after the last piece of binary data on the tape. Thus, suppose in the ex- ample above that the numbers contained in locations 24-32 had already been placed in position by a previous programme, so that only instruction had to be inserted. ‘The end of the programme tape would appear as: 22, CT, 0, CRLF, 23, HT, CRLF, ST, 0 and the computer would automatically go to location 0 and start to execute the calculation. 198 15 SUBROUTINES ‘Tue programme in the preceding chapter would probably, in any real problem, form only a small part of the complete calculation, which might involve hundreds of instructions. Fortunately for the programmer, however, it is a rare calculation which has no features in common with problems already solved, and by making use of sections of programme written and tested previously it is often pos- sible to piece together a programme involving hundreds of instruc- tions by writing only a few linking orders. These pre-programmed sections are called subroutines, and examples are the programmes for decimal-binary and binary-decimal conversion which were men- tioned in the last chapter, and which are considered in detail later inthis chapter. Other programmes which will obviously forma part of any library, as a collection of subroutines is called, are those for square root, sine, exponential function, solution of simultaneous equations, and soon. This use of subroutines is of great importance in coding since it reduces both the labour required to programme a problem, and the chance of errors occurring in the programme, since subroutines may be assumed to be error-free, having been checked by previous usage. Of course, autocodes and compilers, dealt with in the next chapter, still further reduce the onerous nature of programming; however, even there subroutines are useful and their application is therefore considered in some detail. ‘Any programme may be a subroutine for a larger programme, and the calculation coded in the previous chapter can be taken as an example of a subroutine in our discussion. Four points should be noticed when considering this programme as a subroutine: (1) As written, the subroutine is only valid if stored in the specified memory locations, viz. locations 0-33. (2) The quantities a, 8, c,d, ¢, and Ax will need to beredefined each time new values are to be used. (3) The quantities J, x, and the instruction 11, which stores away the values of y need to be reset each time the subroutine is 199SUBROUTINES used, since they are altered in the course of running the sub- routine. (4) Arrangements must be made to link the subroutine in with the main programme. With regard to the first of these points it is possible to arrange a subroutine to be stored anywhere in the memory. In order to do this a special input programme is used which modifies the addresses referred to in the instructions as the subroutine is read in. Thus, for example, if the programme of the previous chapter were to be stored in locations 100-133, instead of 0-33, instruction 20 would actually be in location 120 and would read ‘AD 130°. Instruction 7, however, would need no modification apart from storing in loca- tion 107, since it does not refer to an address within the subroutine. This method of dealing with subroutines, while allowing the programmer considerable flexibility, does involve a complicated, and therefore comparatively slow, input programme. An alterna- tive approach is to fix the location of each subroutine and require the programmer to arrange the rest of his instructions around them, This is not as restricting a process as might be imagined, in view of the large memories generally available today, and this is, in fact, the method we adopt on M.4. Thus, the programme in the last chap- ter would always be stored in the locations indicated, and if the pro- grammer wished to make use of it as a subroutine he would have to avoid using these locations in his main programme. Naturally when not using the subroutine the locations would be free for other use. Reference to the index of the library of subroutines would indicate which routines occupy which locations. Points (2) and (3) indicate the necessity for supplying the subrou- tine with the data which it needs to operate upon; these data are usually called the parameters of the routine. Thus a, b, ¢, d, e, Ax, and x are the parameters of the subroutine to calculate 7. ‘These would normally be set by the main programme. If, as often hap- pens, the same subroutine is used several times in one main pro- gramme, the values of a, b, ¢, d, ¢, and Ax would only need resetting after the first time if they were to be changed. The quantities x and J, however, need to be reset each time as they are ‘spoiled’ by the programme. ‘The instruction 11, RA100, is also ‘spoiled’, but in a normal subroutine this would usually be reset by the routine itself, and one point to bear in mind in writing subroutines is that, as far as possible, they should be self-setting. On the fourth point, linking the subroutine to the main pro- gramme, we easily arrange the first stage of the link by having in the main programme a ‘GT” instruction transferring to the first instruc- 200 SUBROUTINES tion of the subroutine at the appropriate time. In order to rejoin the main programme at the end of the subroutine we have to make the final instruction of the subroutine a ‘CT’ back again. In the example of the last chapter this instruction would appear in location 23 in place of the Halt instruction. Immediately before transferring to the subroutine we would place in the register an instruction ‘CT M’ where M is the address of the next instruction to be obeyed in the main programme after the subroutine is com- pleted. The first instruction of the subroutine would then record this instruction in the appropriate location within itself, thus completing the link. All these points are illustrated by an example later in this chapter. Consideration is now given to a second programme which illustrates several points of interest and serves as a very practical example of a subroutine—the extraction of the square root using the well-known iterative formula: 1 6 cat =3(% +2) where Lgsco y= Vb ‘The programme for this calculation is one of the more frequently used subroutines, particularly in x-ray crystallography and ballistics. Tt also serves as an illustration of the way in which calculations must sometimes be rearranged in order to avoid the introduction of quantities greater than unity. First the magnitude of the term 6/x, must be examined. If e is the error in the nth approximation, it can be shown that the error in the (n+1)th is 2/26. If b<1 it follows that: Xyi> Vb>d and therefore 6/x,:1<1 and is within the range of the machine. The first approximation will be taken as (b+1)/2 and this is no exception to the rule. The term (x, +5/x,) may, however, be >1 but this difficulty can be avoided by calculating: jb een This form is chosen rather than 201SUBROUTINES since the rounding-off errors are less. Moreover, the value of sa en can be used to decide whether the approximation has reached the limits of accuracy of the machine since it is equal to x,+1 —%,._ When this point is reached (x,+ —x,) will change from a negative quantity to zero. In fact, a slightly modified procedure is followed, for if the criterion outlined above were used, the result would always be calculated to the full accuracy of the machine’s capacity, i.e. about decimals. This is not always necessary and might result in wasted time. The calculation can, however, be stopped when any pre- determined accuracy is reached by adding 2-# to (4:1 —%,) after the calculation of each term, where k defines the accuracy required, and discriminating upon the result. This programme also illustrates a situation where the machine might be said to be exercising a certain amount of independent judgement, Thus, for a given value of 6, it is impossible to predict beforchand exactly how many iterations will be needed to give the result to a certain accuracy, and it would therefore be impossible to arrange the programme as one in which a fixed number of cycles were run using an iterative index to count the number of cycles. By the device described above, the machine is able to determine when to end the iteration, although the programmer could not foresee exactly when this would occur. It will be assumed that the number , the square root of which is required, has already been checked to make sure that it lies in the range 0<4<1, and that 6 is in the accumulator at the start of the subroutine. The starting approximation for x,, x1, will be taken as (b+1)/2. The flow diagram is shown in Figure 15.1, and the pro- gramme is as follows: Location Contents Explanation 100 RR 115 Link with main programme 101 RA 118 — brecorded 102 RS 1 right shift 1 place, giving b/2 in accumulator 103 AD 16 (b+1)/2—% 104 RA 117 xy, and in general x, recorded 105 AC 118 6 to accumulator 106 DV 117 Bfy 107 SU 117 bjz,-x, 108 RS 1 (Olt, —#,)/2 = 2041 202 SUBROUTINES Location Contents Explanation 109 AD 119 2-F4+a41-% 110 BA 114 — If accumulator >0 next instruction from location 114 i su 19 2 AD 117 — Giving x,,1 in accumulator 113 CT 104 Back to new iteration 14 AC 117 Vb in accumulator 115 CT ( ) Link with main programme 116 7 7 fe 118 6 119 Q-k inf 4S#°re, 2] ot (FA) xn fe, fo ace]——{Our] cacy ns] initially Replace x, <0 DY Koa Figure 15.1 Parameters of the programme are b, which must be in the accumu- lator at the start of the programme, and 2~* which must be in loca- tion 119. Values of & and the corresponding accuracy obtained are given in Table 15.1. The final linking instruction must be set in the register initially. Thus to branch back to location M at the end of the subroutine, the register must contain an instruction CT M at the start of the subroutine. Table 15.1 Kr Approximate number of decimal places 10 3 4 4 7 5 20 6 24 7 27 8 30 9 The value of Vb is in the accumulator at the end of the pro- gramme. The number of iterations required for any given accuracy depends 203SUBROUTINES on the size of 6, increasing as b decreases. Thus, suppose that the result is required correct to 6 decimal digits. In the worst possible case, when 6 =0, 31 iterations are needed; on the other hand, when bis large (=0-9, say) 3 iterations suffice. It follows that if a large number of square roots are required much time will be saved if the numbers are adjusted, either before insertion into the computer, or by the programme itself, to make them as large as possible. CONVERTING NUMBERS TO AND FROM THE BINARY SCALE Many computers, the M.4 included, operate in the binary scale and subroutines to convert numbers to and from this scale will normally be used in every calculation First the process of decimal to binary conversion of a number x in the range 00 Codes for punching ‘Imaginary’ to register and accumu lator Sign digit of register remains ~ve until word is finished Ito accumulator I-29 Halt, calculation complete Back to start of cycle Link instruction Branch to square root subroutine VD, recorded ~B, to accumulator ~B,/2 ~B,2—WD, Divide by 4,, giving S, Record S, —B2+VD, giving R, Link instruction To binary—decimal subroutine con- verts and prints R, ‘space’ symbol Link instruction S, Binary-decimal prints 5, “CRLF? symbol aulLocation 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 SUBROUTINES Contents Explanation CT 229 CT 208 CT 2i1 CT 214 | Link instructions which are recorded CT 237 in subroutines CT 249 CT 255 108/31 5x29 ga 10100110110110000110011110100110 ) codes. for punching ‘Imaginary 11101000011100101110011110110000 } CREF? 9x2-9=T 29 11110000... Space symbol for punch 11101100... CRLF symbol for punch B, G, and 4,C, and VD 5, 212 16 AUTOMATIC PROGRAMMING ‘Tue final programme in the preceding chapter performed a fairly simple calculation but it contained 57 instructions and used a further 19 locations for storage, quite apart from three subroutines. If M4 operated in decimal scale instead of binary, it would have been pos- sible to do without two of the subroutines (the conversions) and to reduce the number of instructions by about one dozen, but, even so, the programme is still non-trivial in length. Moreover, the assump- tion was made that there would be no spill-over of numbers during. the calculation, and in real-life problems it is usually necessary to guard against this, either by careful scaling beforehand, or by pro- gramming checks during the calculation. In view of this itis not surprising that ‘ getting programmes right? ‘was a considerable bottleneck in the early days of computers, and that methods had to be developed to make the process of program- ming more rapid and easier to learn. The first step in this direction was the use of ‘pseudo-codes’, designed to remove some of the more awkward features of the real machine codes. ‘Thus, M4 was provided with a pseudo-codewhich enabled the user effectively to programme a machine operating in decimal scale, and with floating-point numbers. ‘Typical instruc- tions in this code were: x+ytoz ie. Add number in location x to number in location y and record result in location z xaptoz Vito z Square root of number x recorded in z Ttoz Input next number on tape, convert and record in z In each of these instructions the arithmetic involved would be carried out in floating-point mode, the position of the binary point being automatically adjusted by the programme, thereby relieving the programmer of the necessity of worrying about spill over. It will be noticed that the pseudo-instructions are three-address, unlike the real machine’s one-address code, and that operations such as square root, which do not exist at all in the basic machine code, 213AUTOMATIC PROGRAMMING have been introduced; this illustrates the point that there is no restriction on the form of the pseudo-code and it is in no way tied to the structure of the real machine code. It is interesting to consider, at this point, how the computer is made to interpret and obey these pseudo-instructions. First, it must be clearly understood that the only operations which the machine can actually perform are those laid down in the basic code, and any form of automatic coding or pseudo-code must be trans- lated into basic machine instructions before the computer can carry out a programme written in this form. The exact form of the M.4 pseudo-instructions is as follows: Digits 1-5 6-14 15-23 24-32 Function x address y address z address (+= ete.) and the instructions comprising the programme in pseudo-code are stored in the memory and interpreted and carried out one by one, normally in sequence, by an interpretive programme. ‘This pro- gramme splits each pscudo-instruction into its component parts, recording the x, y and z addresses into the addresses of machine instructions which extract or record data in the appropriate memory locations. The function part of the pseudo-instruction is recorded in the address of a control transfer (CT) instruction and thereby causes the interpretive programme to branch into a number of sub- routines one for each pseudo-instruction. The subroutines carry out the operation specified in the pseudo-instruction, working in floating-point arithmetic. It is not proposed to describe in detail the processes involved for this, but only to remark that when work- ing in this mode numbers written by the machine are expressed in ‘standard form’, in this case so that they lie in the range ¢<|x| <4, and are accompanied by an exponent which indicates the power of 2 by which they should be multiplied (if positive) or divided (if negative). Thus, before adding or subtracting numbers it is neces- sary to compare their exponents and shift down the number with the smaller one so that the two numbers are lined up correctly. The subroutine to interpret the pseudo-instructions for addition and sub- traction contains about 40 instructions and the complete programme to interpret the 17 pseudo-instructions provided, together with space for storage, takes up about 480 memory locations. In the early days of computers, memories commonly contained only about 1,000 locations, and it was obviously impossible to attempt anything much more elaborate in the way of automatic coding since 214 AUTOMATIC PROGRAMMING no space would be left for the programme in pseudo-code itself. Now, however, computers have virtually unrestricted stores and it has been possible to develop much more elaborate systems of aids to the programmer. Before describing these in detail, however, mention is made of some of the disadvantages of the M.4 pseudo code. First, it is still essentially a code in which one instruction initiates one arithmetic or control operation and the programmer has to arrange for looping operations, modification of instructions and so on, asin basic machine code, He also has to allocate specific storage locations to the numbers used in a calculation, and this is a frequent source of error. Finally, there is the technical objection that since cach pseudo-instruction is interpreted immediately before execution, the pseudo-instructions in a programme loop will be interpreted over and over again cach time the loop is traversed, whereas it should only be necessary to do this once, thus saving time. The last of these objections is overcome by using a ‘compiler’ to interpret the pseudo-codes. This is a programme which runs through the entire pseudo-code programme, translating each instruc- tion into real machine instructions but not actually carrying out these instructions. When this process is complete two choices are nor- mally available: either the compiler can be made to punch out the real-order programme, which can then be reinserted in the com- puter and run in the same way as a handwritten programme, or the machine can be instructed to run the compiled programme without first punching it out. ‘The latter course is often the best since, even with sophisticated programming aids, mistakes are still made and it is best to prove the correctness of a programme before spending time on punching out in real code. Naturally if the programme in question is only to be run once there is no point in punching it out anyway. ‘The compiler method is now used in most automatic programming systems and these also lighten the programmer’s burden consider ably by enabling him to write in a language which fairly closely resembles the original mathematical formula of his problem, and by taking care of the ‘red tape” operations of programming, such as iteration indices and address modification. No computer manufacturer would succeed in selling his machines without an auto-programming system, and consequently there are a number of such systems currently in use. About 5 years ago, an attempt was made to bring order into this chaos by defining an international automatic programming system ALGOL (Algorithmic Language) in the hope that it would be adopted by all manufacturers, 215AUTOMATIC PROGRAMMING so that, in theory anyway, a programme written for machine A could be run on machine B using an ALGOL compiler. However, the leading computer manufacturers, I.B.M., have not taken up ALGOL because their own system FORTRAN (Formula Transla- tor) was well established, and it is probably true to say that today there are more users of FORTRAN than of any other single system. For this reason a brief description of FORTRAN is given in the next chapter as an example of automatic programming. However, first one or two general remarks are made on the subject. ‘The efficiency of a compiler must be judged partly by the quality of the ‘real-order’ machine programme it produces, and it is prob- ably true to say that, while most compilers cannot outdo an experi- enced programmer in this respect, they are at least as good as the majority of machine users. ‘There will always be computer applica- tions for which the compiler is unsuited, because new and more exotic uses for the computer are constantly emerging. Examples of this type are linguistic processes such as machine translation, textual analysis and the compilation of glossaries and concordances. How- ever, if such problems become frequent, a special compiler will usu- ally be written to deal with them, as has happened with linguistic processing and COMIT. ‘The machine programme which constitutes the compiler is usually an elaborate affair with some thousands of instructions and this may occasionally impose an undesirable limitation on the size of store available for the user’s programme, but with the increasing size of computer memories this is no real problem. ‘The time taken to compile the user’s programme must, of course, be added to the total running time in assessing the efficiency of such systems and there is the disadvantage that if a fault is found in the programme it is usually necessary to start from the beginning again and recompile the whole programme. However, despite these minor disadvantages there is no doubt that compilers have so re- duced programme ‘debugging’ time as to transform the art. 216 17 A COMPILER SYSTEM In Ts chapter the FORTRAN compiler system developed for use on the 1.B.M, series of digital computers is described. It is not intended that this should be a complete description as this can be obtained from one of the many publications on the subject, but it is hoped to give the reader an idea of the scope and advantages of such a programming system. In order to understand and use the system itis unnecessary to know anything about the basic instruction codes of the I.B.M. machines D Leenet de fate99 eae ee Ti Figure 17.1 themselves, which vary considerably in detail, some operating in binary scale and some in decimal with words of variable length. ‘The only physical feature which needs to be mentioned is the input and output which is normally on punched cards instead of the punched tape discussed in earlier chapters. A standard FORT- RAN card is shown in Figure 17.1 and consists of 80 columns each of which can be punched in 12 different positions. For numerical punching lines 0-9 are used as indicated, the top two lines being used for the sign, + or ~. Provision is also made for alphabetic 217A COMPILER SYSTEM data by double punching in columns, thus A is represented by ( +1,) T by (03) and so on. The name Alphameric is used to include the alphabetic, numerical and certain punctuation and mathematical signs which can be used. Reading and punching operations are on a complete card each time, thus it is possible to read in or punch out as many as 80 digits with a single instruction, although it is not, of course, necessary to use the full card if this is not convenient. The programme to be compiled is called the Source Programme and is written in FORTRAN language, in the manner described below. It is translated into real-machine instructions by a com- piler, called the processor, and the resulting programme, which is called the object programme, may either be run directly or punched onto cards, and run when these are reinserted inthecomputer. The source programme consists of a series of statements directing the computer to read data in or out, perform arithmetic operations, re- peat a set of instructions a certain number of times, and so on. ‘These statements are normally obeyed in sequence except where the programme indicates a branch back or a jump forward at any point. NUMERICAL DATA ‘The numerical quantities upon which the computer operates during a calculation may be either constants, or variables. For example, in the final programme of Chapter 15 the quantity 2-9 would be a constant, and the coefficients 4, B, and C, variables. ‘The variables may be subscripted if required. Before describing the rules for defining these quantities, however, the idea of the mode of calculation must be introduced. In FORTRAN, arithmetic may be performed in either floating-point or integer mode. Floating-point mode is the more usual, and uses ordinary decimal numbers, the only restriction being that a decimal point must be present. Thus 0-312, - 26-581, 234-arcalll acceptable numbers in floating-point mode, but 284 is not. Floating-point numbers may also be expressed in exponent form, as this is some- times more convenient. The exponent indicates the power of 10 by which the number is multiplied or divided thus: +0:123E +10 means 0-123 x 1010 +1-230E - 10 means 1-230 x 10-10 When operating in integer mode only whole numbers must be used, and no fractions are retained. Thus the statement J=6/3 will give the correct result J=2, but the statement J=7/3 will also give I=2, ignoring the fractional part of the quotient. Except in 218 NUMERICAL DATA certain specific situations it is important not to mix floating-point and integer numbers in statements. Variables Variables are quantities which will assume numerical values, either integer or floating-point, during a calculation. A particular variable may take several different values in the course of a pro- gramme, or it may merely change in value for different runs of the programme. In the programme variables are referred to by ‘names’ which consist of a number of alphameric characters, the first of which must be a letter of the alphabet. Floating-point and integer variables are distinguished by this initial letter. ‘Thus integer variables must begin with one of the letters: Lj, K,L,M,N and floating point variables with one of the remaining letters. ‘These are possible integer variables: J, MIN, INDEX, 22, LIST and these floating point variables: ADD, TAX, X, ¥, Z, TOTALS, R1024 ‘The facility of naming variables in this way is useful as it is pos- sible to choose names indicative of the quantities which the variables represent, and this makes a programme easier to follow. ‘Thus, for example, in the quadratic equation programme of chapter 15, the two roots might have been called ROOT 1 and ROOT 2. Note that they could not have been ROOT + and ROOT -, however, as only the letters of the alphabet and the 10 numerals are allowed in variable names. Subscripts Very often the variables in a calculation fall naturally into groups and it is useful to be able to refer to them using the same name, but with different subscripts. This is allowable in FORTRAN, the subscript being written in brackets immediately after the name since no lower-case type isavailable. For example, in the first programme in Chapter 14, if 100 different values of y were to be calculated these might be called Y(1), 1(2)...1(99), ¥(100). Similarly, if the 219A COMPILER SYSTEM elements of a 10 x 10 matrix were to be handled, these might be named: AGA), = Po A(1,10) aie tee ae A(2,10) 2 (Uh peseeap peed (10,10) Suffices can be integer variables as well as integer constants, and even combinations of these such as (I+3, 7+2). ‘Thus the matrix ele- ments would probably be named A(/,,7) where I and J were made to assume the values 1-10 as appropriate. Both integer and float- ing-point variables can be subscripted, but the subscript must always be an integer. ARITHMETIC STATEMENTS ‘The basic element of any FORTRAN programme (the arithmetic statement) can now be described. ‘These statements are con- cerned with the actual calculation which it is required to do, and take the form of equations in which the left-hand side (in which there must be one variable only) is the quantity which we wish to calculate, and the right-hand side (virtually unlimited in length) defines the process of calculation. ‘The five operations of addition, subtraction, multiplication, division, and exponentiation are avail- able, and are indicated by the symbols +, —, *, /, **. Thus, the evaluation of the quantity ax2+bx +e deve would appear as Ya (A*X**2 +B*X+C)|(D*X+E) This is an arithmetic statement in floating-point mode, all the vari- ables being floating-point, and it is important not to mix integer and floating-point constants or variables in these statements. The only exceptions to this are that suffices and exponents may be integers in an otherwise floating-point expression. ‘Thus the power 2 in the statement above is quite valid, and integer suffices could be introduced into any of the variables on either side of the equation. ‘The other rule to be observed is that two operators must not follow each other consecutively. ‘Thus 4* ~ B is incorrect and should be written 4*(—B), 220 CONTROL STATEMENTS ‘As the name implies, these statements are concerned with controlling the flow of the calculation, and causing branching and looping where required. The simplest of these is the ‘GOTOn’ statement which is equivalent to the CT instruction of M.4 code, and which causes statement number n to be executed next. Statements are normally executed consecutively in the order in which they are written, but to allow for branching, any statement may be numbered by placing an integer, usually between 1 and 9999, on the left-hand side of the statement. Corresponding to the ‘Branch’ instructions of M.4 is the ‘IF? statement in FORTRAN. This takes the form: TE (@)ny,ta,n3- ‘The quantity ‘¢” represents an expression that is a combination of constants, variables and operands, which must have the same struc- ture as the right-hand side of an arithmetic statement, and ny, , ny are statement numbers. The effect of the IF statement is to cause statements n, nz, oF m3 to be executed next, according to the expres sion e being negative, equal to zero, or positive. ‘As an example of the use of this statement, suppose that 100 numbers x(1), x(2)...*(100) are already in the store, and we wish to form the sum of these numbers, 2X and the sum of their squares EX2. These quantities will be called SUMNUM and SUMSQU. ‘The FORTRAN programme might be SUMNUM =0. SUMSQU =0. I=1 3 SUMNUM =SUMNUM + X(J) SUMSQU =SUMSQU +X(1)*#2 TF(I—100)1,2,2 1I=I+1 GOTO3 2STOP The IF statement is particularly useful when it is necessary to use the result of a calculation as a basis for decision; for example, one might wish to switch to another part of the programme if some quan- tity, Q, being calculated exceeded a certain limit, MAX. The IF statement would then be used in the form IF(Q-MAX)1,1,2, where statement 1 is in the main programme, and statement 2 in the branch. In the programme above, J is really being used as an iteration 221A COMPILER SYSTEM index, and a more convenient means for doing this is provided by the ‘DO’ statement. This takes the form: DO ni=m,m,my and causes the programme to loop on the sequence of statements from the ‘DO? up to statement number 2, the integer variable i taking the values m, my -+m3,m;+2m3...m, successively. When this is completed, the control passes on to the statement immediately following that numbered n. Very often m3 will have the value 1, and in this case it may be omitted, since if only m, and m, are speci- fied, the processer automatically supplies the value 1 for ms. ‘Thus the example above could more concisely be programmed as: SUMNUM =0 SUMSQU =0 DOI=1,100 SUMNUM =SUMNUM + X(/) 1 SUMSQU =SUMSQU +X(i)**2 STOP INPUT-OUTPUT STATEMENTS ‘The basic imput-output statements are READ and PUNCH, al- though depending on the particular installation others such as PRINT, PUNCH TAPE, READ TAPE, etc., may be available. It is possible to initiate the input or output of a number of pieces of data with just one statement, for example one could say: Read n, X(1), X(2), X(3), ALPHA, INDEX and assuming that these quantities were correctly punched on the next card available to the card reader, this would cause the five quantities X(1), X(2), etc., to be read in and stored. It is, however, necessary to indicate to the computer the size of the numbers and this is done by means of a FORMAT statement, which must always be numbered. Thus in the READ statement above, reference is made to FORMAT statement number 7 for information on the lay- out of the variables on the punched card. The FORMAT state- ment tells the machine the type of number it is dealing with and the number of digits and position of the decimal point. ‘The three types of number are floating point (F), floating point with exponent (E) and integer (I), and the size is indicated by specifying the total number of digit spaces occupied (including the sign, decimal point and exponent if appropriate) and the number of digits to the right 222 INPUT-OUTPUT STATEMENTS of the decimal point. Thus the number 10.651 would appear as F6.3, where the 6 indicates the total field width and the 3 the number of fractional digits. The integer 1024 would be simply /4, since’ it is unnecessary to fix a decimal point here. ‘Thus suppose that in the ‘READ’ statement above each of the three x values has a total field width of 10 digits with 4 to the right of the point, ALPHA has a field width of 6 digits with 2 to the right of the point, and INDEX has 4 digits, the appropriate FORMAT would be: nFORMAT(F10.4,F10.4,F 10.4,F6.2,/4) This could actually be written more concisely as: nFORMAT (3F10.4,F'6.2,14) The programme for forming SUMNUM and SUMSQU could be completed by adding read and write statements as follows: © FORM TOTAL AND SUM SQUARES DIMENSION X(100) READ 1, (X(J),=1,100) 1 FORMAT(@F10.4) SUMNUM =0 SUMNUM =SUMNUM + X(J) 2 SUMSQU =SUMSQU +.X(J)*#2 PUNCH 3, SUMNUM, SUMSQU 3 FORMAT (F12.4,4X,F17.4) STOP END ‘This programme illustrates several new features of FORTRAN; the first line is the title which does not affect the actual machine programme, but which will be punched out at the head of the com- piled programme for reference. The DIMENSION statement is needed whenever subscripted variables are used and enables the processor to allot sufficient space for these variables. In the READ statement, instead of writing out X(1),X(2)... X(100), use has been made of the fact that a ‘DO’ type loop can be included in input and output statements as shown, thereby making the reading or punching of indexed variables simpler. The associ- ated FORMAT statement (number 1) specifies only 8 numbers. Actually the X values would be punched 8 to a card, and the pro- gramme would simply use this FORMAT over and over again until 223A COMPILER SYSTEM all the values specified in the READ statement had been read in. Results are punched out with 4 spaces between (indicated by 4 in the second FORMAT). Finally a STOP statement indicates the end of this particular programme, and an END statement indicates that no other pro- grammes or subroutines follow, so that the processor begins to com- pile the machine programme. LIBRARY FUNCTIONS AND SUBROUTINES Most FORTRAN | processors allow the use of several common mathe- matical functions in programmes. These include the natural loga- rithm (LOG F), sine (SINF) exponential (EXPF) and square root (SQRTE) and are included in a programme by writing the func- tion name followed by the argument in brackets. Thus to calculate VX+r one could write: Z=SQRTE(X) +7 The argument is not confined to a single variable and can be any arithmetic statement, and the programmer has the further facility of defining his own arithmetic functions, which are used in the same way. Finally, subroutines can also be used with FORTRAN, ‘These are treated as separate programmes when processing, and are indi- cated by their heading: SUBROUTINE NAME (¥,,%,45...) where the programmer supplies an appropriate name, and x4, 0, are the arguments of the subroutine, that is the data which will be used by the subroutine from the main programme, and the results of the subroutine which the main programme will subsequently call upon. The final statement of every subroutine must be ‘RETURN’ and a subroutine is brought into use in the main programme by a statement of the form: CALL NAME(),,y.).--) where 5,92, etc., are the values to be assumed by the arguments in this particular application of the subroutine. Table 17.1 gives a list of statements of which only some are avail- able with every computer and not all have been described here, since this chapter is intended as an introduction to the idea of auto- matic programming rather than a guide to the use of this particular system. 224 —_— ERROR DETECTION Table 17.1. 1 (0) mys Map ma 1 (Guna HOW 2) my mp 1» (guna srr) yy hp PAUtE air my List puncH n, List PUNGH TAPE n, List DO nimmy, mp, enn (Ii, J, Tay he 1s) END FILE 7 BQUIVALENGE (a, b, ¢, PORMAT (61,52 FREQUENCY mj mi oe deee ruserios Name (a1, @2, ‘i G0 To.” 0 70 1, (1p ay» hn) ©0 70 (1,2. -25 Ma)st 0 NVERELOW hy 2 I DIVIDE. CHECK my, 1 QUOTIENT OVERYLOW my, m2 wrtre TAPE i, List ERROR DETECTION Even using a sophisticated system like FORTRAN, programming errors are stil ily frequent, and itis important to note that the exact form and punctuation §j the programme must be used, otherwise the processor cannot interpret statements correctly. Thus, for example, the commas and brackets must be present in the statement: TE(@)myttasts but an extra comma must not be inserted between (e) and ny. Error detection is made fairly easy, however, because when an error is found on input, the processor prints out the statement in question together with a code number indicating the type of error. Thus error 36 indicates that the left-hand side of an arithmetic statement is incorrect, error 6 indicates that the same number has been used for more than one statement, and error | indicates that the statement is wrongly formulated. Although this checking is not completely foolproof, for example, a zero suffix is not permitted but will not be detected by the processor, all the common errors in a programme will be located, and getting programmes right is usually fairly simple. 15—a.v.c, 225A COMPILER SYSTEM A FORTRAN PROGRAMME Finally, to enable a comparison to be made between the program- ming effort required in basic machine code and FORTRAN, a FORTRAN programme is given for the quadratic equation prob- Jem at the end of Chapter 15, It is assumed that each set of values of the coefficients A,B,C, in the equation Ax? +Bx+C=0 is punched on a separate card in format 36.4 and that there are 10 such sets. ‘These are preceded by the value of x, punched on the leading card also in format F6.4. As before, we wish to calculate the roots of each equation, punching out the message ‘IMAGI- NARY? for those that are not real. ‘To do this the following FORTRAN programme is used: C QUADRATIC EQUATION ROOTS READ 1,X 1 FORMAT(3F6.4) 2 DO8I=1,10 READI,4,B,C D=B*B~4.0¥4"C IF(D)3,5,6 3 PUNCH 4,4,B3,C 4 FORMAT(3(F6.4,2X),9HIMAGINARY) GOTO7 6 ROOTD =SQRTF(D) 7 ROOTI =(~B+ROOTD)/(2.0*4) ROOT? =(-B-ROOTD)|(2.0*A) 8 PUNGH9,4,B,C,ROOT!,ROOT2 9 FORMAT(3(F76.4,2X),2(E15.8,2X)) sTOP END This programme is actually more ambitious than the one in M4 code since it discriminates between the three alternatives <0, =0 and >0 for the value of D, and avoids taking VD unnecessarily when Dis zero. It also punches out the values of A, B and C with their corresponding roots. The FORMAT statement number 4 includes the punch out of the comment ‘IMAGINARY’. Alphameric punching is done by specifying ‘n#’ followed by the message to be punched, where 2 is the number of characters in the message. 226 18 SOME APPLICATIONS OF COMPUTING MACHINES PRELIMINARY REMARKS ‘Tu reader, from his perusal of the preceding chapters, will be familiar not only with the way in which a modern automatic digital calculator works, but also with some of the purely mathematical techniques which are applicable to such machines. It is evident that any problem whose solution is reducible to a set of arithmetic operations can, in principle, be solved on a digital calculator. In this chapter it is proposed to examine only one problem of an immediately mathematical nature and then, in order to exhibit the scope of digital calculators, to consider briefly some other applications to situations whose relation to numerical mathematics is by no means obvious. X-RAY CRYSTAL STRUCTURE ANALYSIS The electronic computer has revolutionized the science of x-ray crystallography. From the relatively simple structures containing less than 20 crystallographically distinct atoms which marked the limit of practical computation up to about 1950, themodern crystallo- grapher has examined structures whose complexity varies from 100 to 1,000 atoms. Probably the high water marks of modern achievement are the structures of Vitamin By, and those of the haemoglobins and myo- globins where, without the computer, it has been estimated that some hundreds of years of human calculating would have been in- volved and where, even with modern highspeed machines, up to 12 months of computer time has been needed. Briefly, the problem may be stated as follows; quantities MFo(t, &, 2)| may be derived from the x-ray diffraction spectra of a crystal. A crystal is known to be composed of a vast number of identical building blocks or unit cells. ‘The density of electrons, 0(%,, z) at any point in this unit cell is given by: lt te +. omy zap EEE [Fells kN] cos (O-au) . « - . (1) 227SOME APPLICATIONS OF COMPUTING MACHINES where V is the volume (in suitable units) of the unit cell, ome{ ie rip 18h seen) (a, 6, c) being the lengths of the cell edges. A, k, J are integers and it will be realized that the limits -- co applied to the above summa- tion are replaced, in practice, by finite integers governed by the range of available experimental data. It is required to produce a set of ‘maps’ showing the way in which @ varies with sy, <. At this stage, it is necessary to mention the complications, In the first place the quantities ayy (phase angles) are initially un- known and are not, in general, derivable from experiment. Secondly g is a function of three variables so that the best pictorial representation which can be hoped for is a set of contour maps at different levels of z, say. Finally, the information often required by the crystallographer is not a pictorial map at all, but consists of a set of detailed and accurate values of the co-ordinates of the centres Figure 18.1 of the atoms filling the unit cell, and coinciding with the maxima of o(%,.9, 2). To illustrate these points, Figure 18.1 gives a view of the molecule of penta-erythritol tetranitrate C - (CH,ONO,) in the form ofsuper- imposed contour maps viewed normal to the x,y plane. The superposition is necessary since all of the atoms are not at the same z level, as will be seen in Table 18,1. ‘The contours of Figure 18,1 are drawn at intervals of unit electron density and the process of deriving them is another example of a simple though tedious calculation. The method of approach is to calculate the sum of the series (1) at the required value of z (e.g. 0-124 for the C; of our example), for a fixed value of y and for a range of values of x in the interval (00 to the accuracy of (x,9,2,) return to (a) and repeat the above process using (1% 1Jrs1%){r=1... a} in place of the original (x,,7,, z,)- If D=0 print the resulting (:% 419, 1%,){r=1 . . . 2} which represent the required parameters. It is not possible here to enter more deeply into the numerical pro- cesses involved in the above cyclic refinement technique, but it may be mentioned that, for the substance penta-erythritol tetranitrate discussed above, the application of the method by hand required about 12 months’ work, whereas today a high-speed machine could attain the same result in as many minutes. As a final example of a machine application to crystallography there is the solution of the above problem by a minimization process. Such methods are widely applicable to many problems both of pure and of applied science and the electronic computer has produced a great increase in their use. For the crystallographic example the process depends upon the fact that as the trial co-ordinates (x,, »,, z,)[r=1... . n] approach more and more nearly the true co-ordinates, the values of |Fy(hkl)| and |F,(4ki)| will tend to equality. This may be expressed mathematically in the statement that: REET (olhll| —|FH)? ——- .. 8) 230 COMPUTERS AND LINGUISTIC PROCESSING tends to a minimum, and it may be shown that if (xy 2) [r=1....n] are trial co-ordinates giving a particular value of R (say Rg), then a lower value of R is produced by the co-ordinates: (%, +61) (%, + G2) (Z +83) where: ~ [3(@R/2x,)7].0R 2x, &." S(GRanon) OR, Oy, +) oe and, for simplicity 4 =%, 42 =Ins 3 = 0 return to (a) and repeat the above process using 1%, =, + &4,, ele. If D =0’print the original (xy,2,){r=1 ...n} which are the required co-ordinates. It will be seen that, conceptually at least, this process is con- siderably simpler than that originally described, although the expressions (6) are not so clementary in character as the straight- forward trigonometrical summations involved in (1) and (4). 3 fel...3} from trial COMPUTERS AND LINGUISTIC PROCESSING An interesting example of a computer application which at first sight seems non-numerical, is in the field of linguistic processing. Under this heading is included glossary and concordance making, stylistic analysis and machine translation. ‘These topics are enumerated in ascending order of difficulty. ‘Thus glossary and concordance making, although making large demands on storage space, are fairly simple, from the programming point of view. A glossary consists of an alphabetic list of all the words occurring in a text together with the number of occurences ofeach word. ‘The text must first be punched onto the appropriate input medium, tape or cards, with suitable reference marks to indi- cate page and line endings. The text is then fed into the machine, and a dictionary of words together with a word count, is built up. ‘As each new word of the text is read, the existing dictionary is examined to see whether it is already present. If so, one is added to the word count, and if not the new word is inserted at the appro- priate point, the words below being moved down to make room. 231SOME APPLICATIONS OF COMPUTING MACHINES The only problem here is to divide the dictionary into suitable seg- ments for ease of handling as it will usually be necessary to store it in the backing memory. Reference to this is always a compara tively slow operation and it is desirable to minimize the transfer of data between it and the fast memory. One scheme is to identify words by their initial letter pair and to allocate sections of the back- ing store to the different letter pairs, having previously made an estimate of the space required for each. If this estimate is incorrect, any words which cannot be fitted in will be punched out as an ‘over- flow’ text and subsequently dealt with separately. A more satis- factory scheme is to make the computer itself allocate blocks of storage as needed, keeping an index of the blocks occupied by each letter pair. Assuming that sufficient space is available, it is then possible to compile the whole glossary in one run through of text. A concordance is a glossary to which page and line references to each occurrence of the words have been appended, Sometimes the complete line containing each reference of the word is also printed, Ineither case, a glossary of the text must first be compiled. This is then used to portion out the store among the words, to allow space for the references for each word to be accumulated. " This prelimin- ary process is done by the computer, using the glossary as input. The text is then placed in the computer input and the concordance compilation begins. As cach word is read in its page and line reference is recorded in the appropriate section of the store allocated toit. Ifspace allows, the complete text is processed in one pass, but if not the alphabetically first part is treated first, the computer ignoring words which are outside the range under consideration. These processes are fairly obvious, a slightly more subtle applica- tion of computers is to the process of stylistic analysis. Here such criteria as vocabulary, type of sentence structure or frequency of use of certain words or constructions are used as a basis for deciding the date or authenticity of literary works. The validity of such deci- sions must be left to the literary experts, but the computer mechanics are fairly simple. If one wishes to look for grammatical construc- tion it is, of course, necessary to provide the computer with gram- matical information on the relevant words, and this is usually done when punching the text, the words of the text being followed by code numbers indicating their grammatical form. ‘A more complex application is that of machine translation. That this would be possible with almost any modern computer, was first suggested by the authors in 1947, and since that date consider- able progress has been made both semantically and from the engi- neering points of view. 232 COMPUTERS AND LINGUISTIC PROCESSING In the first place it must be stated, quite clearly, that what is envisaged by the present authors at least, is a translation which is adequate for accurate technical interpretation but makes no pre- tence to ‘literary’ quality. The original idea was to set up, in the store of the machine, a dictionary of foreign language (F.L.) words and their equivalents in the base or target language (7.L.). Mechanical translation (M.T-) would then consist of supplying the message to be translated to the machine via a teleprinter, one word at a time, Input words would then be compared with the F.L, entries and the T-L. equivalent (or equivalents) would be typed out. ‘This process is obviously un- satisfactory in a number of particulars; for example, a dictionary of enormous size would be required and even this would be unlikely to contain enough variants to interpret a simple A greatly improved version of the process was suggested by R. H. Richens; this depends upon the observation that, in translating scientific prose at least, a vocabulary limited to about 1,000 words of technical jargon, specific to the field of reference of the paper, together with a further 1,000-5,000 words of common usage, will provide an adequate translation of most material of this type. To ‘overcome the semantic problems of multiple words (e.g. German) and of syntax, it was proposed that the dictionary should consist of two parts, the first containing stems with their translations, and the second containing endings. ‘The Richens process, which produced only a crude output with grammatical notes, was modified by Booth, Brandwood and Cleave in 1955, and the basic process of translation is now as follows Each word of the JL. text is compared with the stem dictionary; the longest stem common to the F.L. word and to the dictionary is located and the stem of the equivalent is transferred to a temporary storage position. The remainder of the F.L. word is then com- pared with the ending dictionary and a prefix (or prefixes) and an affix is thus produced. ‘The association of this prefix and affix to the stem results in the ‘translation’. ‘Thus, for the latin word amo, the machine would find the stem am and the associated ‘ translation’ —lov—. The ending, o, would have a dictionary entry which gave the prefix and the affix e. Association of the two sets ofinformation thus gives I love. Ie will be observed that although the short stem a (=alas) occurs in the stem dictionary, the longer stem am is also present, but the complete amo does not appear. This simple example shows only the most elementary principles of machine translation. A vast amount of human time and money 233SOME APPLICATIONS OF COMPUTING MACHINES has been spent on research in the subject during the past decade and modern programmes normally process information sentence by sentence rather than word by word. The advent of dise stores and of multiple magnetic tapes has enabled very large dictionaries to be stored, and, at the present time, adequate translations can be pro- duced for the language pairs French—>English, Russian-English and English-Russian. GAMES ‘A somewhat surprising application of automatic digital calculators is that of opponent in various games. Possibly the simplest game which has been programmed for a computer is noughts and crosses. This is a game in which the result, with skilled players at least, is not indoubt. Itisadraw. The programme adopted depends largely upon the available storage space, the simplest method is first to tabulate all of the possible games, observing that the ordinary square x|x| 1o|1 ooo Oo) eojo1}oo O eefoofor Came Code Scon pattern 107000, 00070000, ono Figure 18.2 and its contents can be regarded as aternarynumber, For example, let the contents of each square be represented by: 00 if no play has occurred 01 if occupied by a ‘0° 10 if occupied by a ‘x” Then the situation shown in Figure 18.2 would be represented by the 18 digit array 101000,0001,0000,00,01. ‘This can be regarded as the first part of a normal 32 binary digit word the remainder of which is zero, All stages of all possible games are embraced in this scheme and the technique of coding is as follows. All possible game code numbers (previously worked out) are stored in consecutive locations. Each of the stored game code numbers has 14 spare digits and 9 of these can be used to represent the optimum machine move (the ternary numbers used above are not required since only two actions can take place, either the machine is'to mark a given 254 GAMES square or it is not to mark it). In the above example let it be assumed that the machine is to move next and that it is ‘0.’ The above code number would then be found in the store as: 101000,0001,0000,00,01]00000, 001,00,00,0,0 ee ee es machine move and the situation after play would be as shown in Figure 18.3. The code number representing the state of play is fed to the machine, it 701001, 0001, 0000,00,01 Figure 18.3 is compared—by subtraction—with each of the stored code numbers starting with that of least numerical value. As soon as the result of the subtraction becomes positive (indicated by a conditional transfer instruction) it is known, from the above discussion, that the number standing in the accumulator is simply the last digits of the stored code number which represent the machine move. It is simple at this stage, either to print by means of a suitable sub- routine the required machine move, or to display it on a set of nine neons attached to the machine accumulator. (The reader may like to convince himself that the termination of the game shown in Figures 18.2 and 18.3 is given by: 101001,1001,0000,00,01|00000 000,00,01,0,0 or 101001,0001,0010,00,01|00000 000,10,00,0,0 both leading to a win for *0’—the machine!) There are several sets of games which are both complete, that is, contain all possible opponent’s moves which follow the prescribed machine moves, and optimum in the sense of guaranteeing that the machine will never lose. One such sct contains 512 games each having four machine moves and, in the case of a careless opponent, produces 360 wins. It follows that to contain all of these games the high speed store would require to have a capacity of 2,048 words to which must be added the space occupied by the programme, 235SOME APPLICATIONS OF COMPUTING MACHINES This can be reduced, however, by observing that the noughts and crosses square has considerable symmetry; for example, there is a fourfold rotation axis through its centre and mirror planes at angles of nz/4 through the same point. All of these elements are not independent but it can be seen that to each ‘basic’ game correspond seven more obtained by the symmetry operations. It follows that the above 512 games may be divided by 8 so that only 4 x 64=256 states of play have to be stored. When this is done the programme must necessarily contain a set of operations which reduce the input configuration to one of the standard forms, and likewise re-orientate the machine moves to suit the actual game. This is the reason for the spiral scanning array in which the configuration number has been formed, and from which symmetry re-orientation can be obtained by simple shift operations in a machine register. The second method of play is by the use of a standard machine strategy or set of rules of play which will never lead to a lost game. Several sets of this type are applicable to noughts and crosses, one is: (a) Machine [0] has first move (1) Places *0” at centre. (2) Scans all allowable rows, columns and diagonals, (8) If ‘0° has two marks in any row, column or diagonal having vacant site, place ‘0’ there to win game. (4) If*x’ has two marks in any row, column or diagonal hav- ing vacant site, place ‘0’ there. (Assuming (3) does not hold.) 5) Place 0 in corner and next to x if possible, ‘Next to’ is interpreted as applying also to diagonals. (6) Otherwise place ‘0” next to any ‘x.? (b) Opponent [x] has first move (1) Place ‘0’ in centre if possible. (2) Otherwise place ‘0’ in left-hand upper corner. (3) Exactly as in (2) . . . (6) of previous scheme. It is clear that a set of rules of this type lends itself to machine use and that, by their use, the storage of large numbers of standard games is avoided. The game of draughts, or checkers, provides a half-way house between a very elementary game such as noughts and crosses, and chess, which is possibly the most difficult. Machines have several times been programmed to play reasonable games of draughts, the first programme being written by Strachey; but the most complete investigation of the problem has been made by Samuel, who was 236 GAMES interested in using it as a basis for testing learning procedures on a computer. He used the so-called minimax procedure which is the basis of most programmes for draughts and chess. This makes use of the idea of evaluating the position at any stage of the game by assigning numerical values to the pieces and to the positions on the board, and combining these by an arbitrary formula, called by Samuel the evaluation polynomial, to give numerical value to the strength of the player’s position at that stage. In order to play a reasonable game it is, of course, necessary to look ahead for several moves test ing all possible moves and assuming that the opponent will always seek to maximize his position. ‘Thus the programme alternately maximizes the machine’s position when investigating the machine move, and minimizes it when investigating the opponent's, hence the name minimax. The difficulty in this process is the very large number of possible moves, even in the comparatively simple game of draughts. Samuel investigated two methods of making the computer ‘learn’ to improve its game. The first consisted of storing new board posi- tions together with their evaluation as they wereencountered. ‘Thus a ‘dictionary? of situations was gradually built up, to which the machine could refer for advice when planning moves ahead. In the second method, the programme modified itself by altering the evaluation polynomial at each stage so as to give more pe to positive terms when the machine’s position was improving, and more weight to negative terms when it was deteriorating, It was found that the first method gave good beginning and end games, but indifferent mid-game play, while the second was stronger on mid- and end-game play but tended to give weak opening games. As a final example of the playing of a game by an automatic calculating machine brief mention will be made of the game of chess. Here, again, there are two principles of approach, in the first standard games and openings could be recorded in the store and typed out in any given situation. This would be quite im- practicable with any machine at present in existence as the capacity is far too small; on the other hand, it is well to remember that a technique much akin to this is often used by human players skilled in the game. The second approach depend upon the existence of so-called position strength formulae. In these, by considering th position, type and environment of any piece on the board, a reat indicating its value is derived. Suppose that the game is in any stage and that the machine (black, say) is to play. The position strengths for both black and white are calculated and their ratio R 237SOME APPLICATIONS OF COMPUTING MACHINES evaluated. The machine now moves each of its own pieces (com- putationally only, of course) and examines the resulting value of R. A simple game results from then taking that move which maximizes R._ This would be exceedingly bad and uninteresting play, a better state of affairs results if the machine computes the matrix of R values which is obtained by making each possible move of its own pieces and then evaluating after each possible retaliatory move by white, where it is assumed that white selects that move which maximises his position. The move giving the maximum element over all white’s countermoves is then selected. ‘This process, known as ‘minimaxing’, can be continued, in theory at least, for several moves and might lead to a passable game; on the other hand it is salutary to examine the storage capacity and time requirements of the process. Very approximately it may be assumed that at any stage 10 pieces can be moved, and that only one move is possible to each piece. Furthermore, allow the possibility of 10 additions to compute the position strength after each move (a gross under estimate). Then the elementary game will require 100 addition times per move and storage for some 100 positions and quantities. With an addition time of | usec (about the fastest in any available machine) this implies -1 msec per move, a very reasonable figure. The next order of sophistry, when white’s countermoves are also considered, will require 100 extra storage positions and 1,000 addi- tion times or 1 msec for computation, still a reasonable figure. However, it is now evident that the computing time and storage requirements increase by a factor of 10 at each level of the process so that if 17 minutes ~ 1,000 sec is assumed to be the longest allow- able time between moves, the fastest machine now available could not hope to plan more than three or four moves ahead and this would strain the resources of any existing storage device. It is clear that some improvement in this situation might be pro- duced by limiting the machine computations to those paths of high initial R value, on the other hand this might lead to a failure to recognize potentially good moves of the sacrificial type. MACHINE LEARNING AND INTELLIGENCE To conclude this book it is proposed to give a brief account of the status of the two qualities mentioned in the heading and to discuss the extent to which they may be associated with automatic digital calculators. In the first place, when considering the subject of learning by experience, it is necessary to distinguish between two distinct pro- 238 MACHINE LEARNING AND INTELLIGENCE, cesses. The first is better described as the formation ofa conditioned reflex, and is distinguished by the fact that the learner is not told the response to be learned but has to deduce it from the behaviour of the teacher. For example, a hoop is placed in front of a dog, if he jumps through it he is praised and rewarded with food, if he turns away he is beaten and re-directed towards the object. This type of learning is associated with unintelligent or uneducated subjects, and does not pre-suppose any understanding on the part of the latter of the object of the teacher’s activities. ‘The second type of learning occurs when the learner is aware of the desires of the teacher and is required to memorize or acquire a skill. Exam- ples of this are, the learning ofa multiplication table or a poem, and the execution of a pianoforte sonata. Now it must be realized, from the start, that an arithmetical machine is limited in its response to the emission of letters or figures at its output and that, similarly, the only awareness which it can have of conditioning or teaching activity is via its input. With these limitations the behaviour of an automatic digital calculator under these two types of instruction can now be investigated. ‘The second process is the easier to consider, it corresponds to a partially educated child so that it may be assumed that the machine is capable of receiv- ing a programme. All that is necessary is to insert first a read-out programme and secondly the numerical data to be learned and repeated; thereafter each time the machine is invited to ‘recite’ the table or other data—by means of an instruction to start at the first order of the read-out programme—a completely correct version will be typed. In this respect a machine is much superior to a human being, since only one insertion of data is necessary, and (assuming that it is operating correctly) the machine will never for- get or make mistakes. More elaborate learning tasks of the same type may be set to the machine; for example, the problem of shop- ping in which certain articles, represented by code numbers, are to be obtained from various shops, again code numbers. On receipt of an article code number the machine outputs the shop code numbers in sequence. The shopkeeper (the human machine operator) indicates to the machine that the goods are in stock or otherwise; if the latter, the machine proceeds to the next shop, if the former, it records an association in such a way that whenever asked for the particular article again the same shop is immediately patronized. A slight extension will enable a further search to be made if at any future time an article becomes ‘out of stock.’ The problem of producing a conditioned reflex in a digital calcu- lator is much more complicated. To be fair in the process it is not 239SOME APPLICATIONS OF COMPUTING MACHINES strictly permissible to insert any programme whatever into the store (corresponding to the disordered state of a newly born animal). On the other hand, animals are constructed so as to have certain inborn reflexes and these make possible their further education (for example, a desire for food and a reaction against pain). In ‘educating’ a machine the desired characteristics would be of the type: after insertion of the number 1, say, at the input the machine produces a random output, this is not the desired number, so dis- approval is indicated in some way, the 1 is re-inserted and the machine again reacts. This process is continued until the machine emits the number x =3-14 etc, say. This is probably too ideal a situation and a more realistic procedure would be to insert the digits of afier the ‘punishment’ and hope that the machine would realize what was required of it. Naturally, it is not permitted that a recording programme be used as this would make the problem trivial, neither is the shopping type of programme acceptable. ‘A possible line of approach is the following, when the machine is first switched on (corresponding to ‘birth’), but not started up, its storage and register units will be filled with random numbers. (In the magnetic drum type of calculator it will be assumed that the drum is ‘clean,’ that is having neither 0's or 1’s recorded upon its surface. In this event the output from the amplifiers will be purely random.) The conditioner applies a stimulus, for example, the instruction to start on the instruction held in storage position 1. At this stage various things may happen, for instance, the random contents may, in fact, correspond to the programme required to produce the desired output; more probably the machine will either refuse to start at all (the random order is undecodable), or else execute a few operations and then stop. ‘The problem at this stage is to decide on an appropriate form for the approval or disapproval stimulus and here, again, the problem is not hopeless. If the machine refuses to start an appropriate ‘punishment’ would be to momentarily interrupt its power supply, thus changing the random contents of store and registers, and repeated use of this technique will eventually produce a result. On the other hand some activity may have taken place and this must be greeted with ‘encourage- ment’, If it is assumed that the machine has started and stopped without printing an output and that the sequence of operations ‘executed is known (‘observing the student’), it is possible to restart the machine at the original place and stop it again at the most un- desirable operation, this could then be altered to a better variant by local shock treatment to the control register. (Again paralleled ‘by common situations in the education of the young.) The aim of 240 MACHINE LEARNING AND INTELLIGENCE these somewhat crude processes is, of course, the setting up of genu- ine learning programmes inside the machine so that its memory faculty and elementary reasoning powers (e.g. shopping) could be used effectively to speed up the education, and it seems that some, pethaps more elaborate, version of the foregoing may constitute a valid reason for asserting that a machine can learn from experience. Itis interesting to note that since the Ist edition of this book was written in 1952, a practical trial has been made of this method on a large I.B.M. machine. The experiment showed that, although the ‘education’ process was a very slow one, it was, in fact, possible. An interesting extension of this idea arises when the response patterns of the young of the human species are considered. Certain fundamental characteristics are always present, among them the desire for food, the instinct for selfpreservation, and the avoidance of pain. These are often made the basis of educational technique and suggest a more appropriate means of educating a machine. It is assumed that we know the ‘instincts’ of the machine, namely the fact that it is designed to store numbers and do arithmetic. On the other hand we do not know how to communicate with it except through the input and output organs of the computer. The prob- lem is then to apply different stimuli to the input and to deduce from the output what action the machine is taking. When the machine reaction to all possible individual input stimuli has been found, it would then be easy to insert any desired programme or data for storage in the normal manner. Should the reader think that this is a rapid and trivial process, it may be pointed out that even assuming the word length of a computer to be known (which it would not be initially) for a control word of 32 binary digits nearly 10? input combinations would be possible and it would take the most seasoned designer some time to find, by trial, which groups of digits referred to orders, which to positions, and so on, let alone the exact details of the code. All of this is not without its implications in ordinary educational technique and it is quite pos- sible that if the code were known the elementary instruction of the very young could be greatly speeded up. It should be mentioned, before leaving this subject, that elemen- tary programmes can be devised so that the actions of a machine under given stimuli will simulate an animal with any desired inbred behaviour characteristics. Finally, consider the question—can an automatic digital calcu- lator be considered intelligent? In the strict sense any answer to this question is a matter of taste, since intelligence would mean two entirely different things to, say, a dock labourer and a university 16—A.c. 241SOME APPLICATIONS OF COMPUTING MACHINES professor. Since, within the range of its accumulated programme material, a computer is completely accurate and has perfect memory faculties most ordinary tests would indicate its superiority to almost any human, On the other hand, the present authors would prefer to define relative intelligence by relative capacity for creative work. It appears that human creative activity is of two kinds: (1) Deduction of new conclusions from existing facts. (2) Production of completely new ideas not deducible from known data. In principle, any creative activity of the first kind can be achieved (though not, perhaps, in the quickest way) by an analysis of existing data by the processes of symbolic logic. Binary calculators are particularly suitable for this type of work, and there appears to be no reason to doubt that in time, such will be well within the scope of activity of these machines. Creative work of the second type is extremely rare, and it appears, on examination, that it is usually, if not always, a result of random processes. For example, at ran- dom, one may make the statement ‘the moon is made of green cheese,’ the un-original mind might either not have this fancy at all, or reject it as absurd without further trial. ‘The genius, how- ever, would consider it in detail and thus possibly discover a funda- mental natural law. There appears no reason, in principle, why an automatic digital calculator, fitted with a source of random numbers, should not examine these (considering them to represent coded propositions) by the processes of mathematical logic, and in relation to all of the known facts of nature contained in its store. It would then either reject them on logical grounds, or call on its human ancillaries to investigate the subsidiary consequences of the main proposition which would either collapse or take its place as a new law of nature. The purely binary choice as to whether this constitutes machine intelligence we leave to the reader. 242 BIBLIOGRAPHY “a ra pro lors of hs book ntsc akin snap lloras eee 1956, this ayllieg Wisc comple Eicpiapley worbd be taponibloss er pret Time because of the vast growth of the qutject and also of fs lnerature, For example, the number of published books listed in the 1956 bibliography, was just a number which has now increased to about 300 Many of the subjects surveyed in the previous bibliography have now received extendel treatment in book form, for example, transistor circuit and logic design, ¢ systems, semi-conductor theory, analogue digital conversion and so on. reason we are providing only a fist of the more significant books and serial ublications within the subject together with some key references with extensive oo ‘to specific topics. ACCUMULATIVE READING ‘BOOKS General Arwex, H. H, (Ed.), ‘A manual for the operation of the A.S4 Harvard University Press, Harvard, 1946 iKex, H. H., ‘Description of a relay calculator, Mk. 2', Anuals XXIV, Harvard i Unies Press, 1949 a Aiwex, H. H. ,' Proceedings of a symposium on large-scale computing machinery’, Annals XVI, Harvard University Press, Harvard, 1948 Anke, H. HL, ‘Proceedings of a second symposium’, Aunals XXVI, Harvard Uni- ‘versity Press, |, 1951 Aur, F. L., Electronic Digital Computers, Academic Press, Washington, 1958 ‘Aur, F. Ly (Bd.), Adsances in Computers, Vol. 1, 1960; Vol. 2, 1961; Vol. 8, 19625 ‘Vol. 4, 1963, Academic Press, Ws Anon, B. Ws in Introduction to ‘Digital ing, Adison-Wesley, Cambridge, ‘Mass, Banoace, é. Bases fom th 14 fe Plier, Longa Gres, London, 1064 Engines, Spon, London, 1889) Dig Compal Pendant ‘New York, 1960 et al, eens ane ‘McGraw-Hill, New Baxaxpatt, D., ‘Galeulating machines’, Ency. Brit, 14th edn, 4 (1929), 551 Baxanpatt, D Calculating Machines and Insiruments’, Science Museum, London, Basmzvn, Y. Y., The They of Mathematical Mochns, Pergamon Press, Oxford Bercy, E. C., Giant Brains, Wiley, New York, 1949 Benxetey, E. C:, The Computer Revolution, Doubleday, London, 1962 Bennntzy’ E: G” and Weeewntonr, be Conpates, Ther Operation and Appiains, Reinhold, New York, 1956 7 Booms, A. in Xoray Organic Structure Analysis, Cambridge Univesity Pres, Cambridge, 1948 a Born, A. D., Automation and Computing, Staples Press, London, Be cavemen cote atten aera ty Boru, A. D. Compiters in Action, Pergamon Press, Oxford, 1965 Bowne BV. (El), ast ten Thue, Pitman, London, 1958 Braun, E, L., Digital Computer Design, Academic Press, New York, 1963 , Annals 1, 243BIBLIOGRAPHY Baume AH. Praca bet es Cleaver Hume Bre, London, 1959 ajo 4 Hy of Maat oe, 48, Macs, London, 1919 — Cxeane, i 6. G,, Dechente Dent Prose fe tasta’y tat Tose Wane Nee on Gaxwtso, R. G., Installing Electronic Data Processing Systems, Wiley, New York, 1957 Cuarry, Ni. An Introduction to Automatic Comps, Van, Nowrana, , New York, 1955 ers, Control and’ Measuring, i six Janguages, levir, Amsterdam, Cousmnone, HM. (Ed), “hutmatt Digi Computation, HLM. Stationery fice, Gazaten, H., Probleme der entwicklung, Aachen, 1953 Gourmiaieat, L., Les Machines d calculer, Gauthier-Villars, Paris, 1933 Gournianat, 1, Les Machines a penser, Les Editions de minuit, Paris, 1952 Gnownrn, N. A., The Arithnetic of Computers, 2nd edn, English Universities Press, London, 1960 » Real Time Data Process (Card Methods in Scienti stems, Prentice Hall, London, 1964 ‘omputing, McGraw-Hill, New York, Eoxerr, W. J., and Joes, R., Faster, Faster. McGraw-Hill, New York, 1955 Eoxaan, D. P.’ (Ed.), Systems: Research and Design, Wiley, New York, 1961 E.R. A. Stave, High Speed Computing Devices, McGraw-Hill, New York, 1950 Eva, A. D., Engineering Data Procsing Ssten Design, Van’ Nostrand, New York, Guissuxo, S., Introduction to Mathematical Machine Addison-Wesley, bridge, Mass, 1962 eng eer Gorums, C. C,, and Howe, J. N. P., High Speed Data Procesing, McGraw-Hill, New York, 1958 S., Digital Computing Technology, Chapman and Hall, Gout, I. H,, ‘and Buus, F. London, 1962 fete ae oa cee g ne ee eh te inane, E, M., ot ‘Automation, tion ley, New York, 1998-961 — x Gnaayannons, M, (Ed), Manogenent andthe Computer of te Futur, Wiley, New fork, Grucony, R. H., and van Hoan, R. L., Auomatie Data Processing Systems, Chatto and Windus, London, 1960 - Haas, G., undaetals and Components of Electronic Digital Computers, Ceaver-Hume Hatacy, uiers, Harper and Row, New York, 1962 Hanper, P. Electronic , Springer-Verlag, Berlin, 1961 Haxrari, D. R., Colelatng Mackins, Cambridge University Pres, Cambridge, Hagrere, D.R., Instruments and Machines, Cambridge University Pi ‘Cambridge, 1949. Ba ey Hens, L, W., An Introduction 10 Electronic Data Processing for Business, Van Nostrand, New re 1961 Humwioto, J. (Ed.), Fachegrife dir brogramnicrargstechit, Oldenbourg, Munich, Hensen, E. H.W. Simple Aoroah to Elatronie Canpulr, Blackie, Glasgow, 1959 Howuiwopace, 8. (Conputing, English Universities Pres, London, 1959 Hoos, R, donation ete Ofer Pubic Alas Dros Wahioca, ee Honsnuncn, E. H., Modern Insiruments of Calculation, London, 191 ‘An Introduction to Engineering Analysis for rs, LB.M., London, 1961 Ios Mera 7057090 Dae Pring sen, LBM, London, 1960 Tawin, W. C, ‘Van Nostrand, New York, 1960 Wau TE (Ea) icons Cnty mputers bn edn Tf, London, 196 am, A, ‘sntnge, ©. (is), Behan, ‘Toponaion Hendling, Mace milla, London, 1965 F oe 244 ‘BIBLIOGRAPHY Kamov, A, Ty and Kanara N. Ay Bernie Compuirs, Pe Oxford, 1962 ee a pee cemre goees ae woes, Ge ters L icGraw-Hill, New York, 1956 Lants Pony This iy Mashing Sidgwiek and Jackson, London, 1956 Luptey, R. §., Digital cand Control Enginsering, McGraw-Hill, New York, Levin, H. S., Office Work and Automation, Wil jew York, 1956 Loman, Re Iodcion “dromate Dig! Onsen, Cambridge Univer- ty Pres, Cambridge, Leite A., and Sinxo, G. J., Modem Digital Computers, Prentice-Hall, London, Maxrty, E. W., Electronic Data Processing, Irwin, Ulinois, 1961 Maxot, M., Findamenas of Dig! Capa, Prentice Hall, New York, 1958 eC eH Digital Primer, MeGraw-Hill, New York 1958 a6, MoNenwey, Hing and Using an Automatic Data Processing System, Bailey Tron and Swinton Lotdon, 1908 Mexennea, L. F., Scientific Memoirs, Vol. 13, London, 1842 Mever zun Garerien, W., Mathematische ees 5, 1 Mowtoownni, G. A., Digial Caleating Machin, B 1956 Morcax, B., Total to Date, ‘Machines,’London, 1953 Monury, D_W, dein Dele Peeing BM Station Se ey mRREON, P., and Morrison, E. (Ed.), Charles Babbage and His Dover Publications, London, 1961 Murray, J. S., Basies of Electronic Computers, 3 vols, Rider, New York, 1958 Murray, F. J, The ea ‘Machines, 2nd edn, 2 vois, Columbia ‘Univeniny Pres, New York, 1961 Nasux, P., Neale weeaw oucel eet a? Oxford, 1963, ‘automatiques, Dunod, Paris, 1958 in von Neumann, 6 vols, Pergamon, Orretr, W:, von Rickenmaschinen bei der Berechmung Regeloorgdingen, Olden ‘bourg, Munich, 1958 ‘Raymonn, F. N., L'aulomatique des informations, Masson et Cie, Paris, 1957 Sore, N:R., Analg and Digital Computer Teciology, MeGraw-Hil, New Yor, Snanyon, C. Eo and Weaven, W., Mathonatical Theory of Communication, ins, Sumaut, P., Understanding Digital *, Wiley, New York, 1961 Seamer Ey races ce ea saNov, G. D., ers, Sura, CG. V. 1, Blectronie Computers, McGrav’-Fill, New York, 1959 Surn, J o oe Mane “Approach to Electronic Digital’ Computers, Macdonald Soecmowmmon! WW. (ed), Automatic Coto and Computer Engineering, 2 vols, Pergamon, Oxy 196 ‘Sramavort, K., saeat an haa, -Verlag, Berlin, 1961 Sea OF ae Daeven EA Tatas end Cmaps, MaCeaw Hil, New 0 Varusixix, A. G., Theory of Transmission and Processing of Information, Pergamon, Ontong, get”? = Wattace, E. L., Management Influence on the Design of Data Processing Systems, Bailey, Bros. and Swinfen, London, 1961 Wanr, W. H., Digit "Computer Technology and Design, 2 vols, Wiley, New York, Moses. BA th Bee Sly V2 Chee WY Tahoe 18 Warxsr, N., ies, 2nd ee Wrenn, N’, The Human 5, Wi. New York, 1950 Wruxes, M.'V., Auiomatic aes London, 1956 Winans, F. A\; Practical Crepe and Marcel Mathes, New York, 148 245BIBLIOGRAPHY Mss set ing my ry oat 08 ce Ba ey es St Publications, London, 1960 Woopsury, D. O., Let ERMA do it, Harcourt Brace, New York, 1956 Computers In Praising ‘and Stores Deparlments, Purchasing Officers’ Association, Bletvonts a Banting, The Insite of Bankess, London, 1959 “Information Procesing’, Report of « UNESCO Conference, Buterworths, London, Teed ener niga tenet Coe XXXVI, Paris, 1953 Th Some of Eleni Computers in the Offce, Office Management Association, Lon- Woges Accounting by Electronic Computer, H.M. Stationery Office, London, 1957 t. Cont, natn Rech. Scien. Progranming Axpansoy, D. M., Basic Computer Progremoning (I.B.M, 1620), Appleton-Century- ‘Grofts, New York, 1960 i a Anome BW aly He MAD Moma, University of Michigan Pres, Michigan, pee oe “» ae eset pags Prentice Hall, London, i or, K. Hi. V.. Programming for an Avtomatc Digilal Calculator, Butterworths, London, i958 Burnetr-] HALL, D. G., et al., Gompuder Programming and Aulocodes, English Universi- ties Press, London, 1963 Cua, Ni Pr ‘Programming Computers for Business Applications, McGraw-Hill, New Cnonoras, D.N., Programing Systems for Electronic Computers, Butterworths, London, Cotman, H. L., and Smatiwoon, C., Computer Language (FORTRAN), MeGraw- Till, New York, 1963 Comman, H. L., et al, Computer McGraw-Hill, New York, 1962 Dawmgr:J- Fy Popo for Mer Diguel Coops Beton Pusbetioos London, Darra, E, Wey A Priner of ALGOL 60 Programming, Academie Pret, New York, Exrwistt, D. R., Auloprimer in Computer Pri Blackie, Glasgow, 1963 Enmioy, A. P., rogramming “ingame for te BESME Computers Pergatson, Oster, vse, G. Mand Pass: C. Le Preraning and Coding for Autmatic Digital New Yor Gata, B.A., The Language of Computers, McGraw-Hill, New York, 1962 Grrasiarn, C. By, Peeranming be .B-M. 1620, Prentice Hall, ‘London, 1964 Gongs, RCo) Annual Revie in Aulomatic Programming, Pergatnon, Oxford, Vol. 1, 1960; Vol. 2, 1961; Vol. 3, 1962; Vol. 4, 1964 Gnuwmenéen, F. J., and McCracten, D. D., Introduction to Electronic Compuers Problem Solving with the I.B.M. 1620, Wiley, New York, 1963 Hausman, M. HL, Machine inapendent Computer Programming, Spartan, New York, Hormuaxx, W. (Ed), Digital Information Processors (FORTRAN, ALGOL, etc), Wiley, New York, 1 7% i E., A Programming Language, Wiley, New York, 1962 Jor Digital Computes, McGraw-Hill; New York, 1959 and Gitprastzave, ‘T, Systems Design for Computer Applications, Wiley, New York, 1964 Lupiey, R. S., Programming and Utilizing Digital Computers, McGraw-Hill, New York, 1962 246 BIBLIOGRAPHY Luens, H. D., and Werwneno, G. M., Computer Programming Fundamentals, MeGraw- a aoe dl, Simsrip: A Stmuation Prgranoing Languge, P Maxxownrz, H. M. al 4 ing entice Hall, London, 1968 Compute , Wiley, New York, 1957 ide to FORT! rarinmi ‘Wiley, New York, 1961 4 Guide to ALGOL Programming, Wiley, New York, 1962 4 Gilde to 18.M, 1401 Programming, Wiley, New York, 1962 » A Gude to COBOL Programming, Wiley, New York, 1964 Ds and Dons, WS. Nmaral Matiads and FORTRAN Program. New York, 1964 ean? ing Business Computers, Wiley, New York, 1959 Computer Programming Handbook, Prentice-Hall, new LES, main Png Lge Me, 2 edn, Prentice Onoanick, E. 1, A FORTRAN Primer, Addison-Wesley, Cambridge, Mast, 1963 'B., and Russet, L. J., ALGOL-60 eae eras Press, New a axon, As Prepramning te -B-M. 7090, Prentice Hall, London, 1963 Scand; A GORGE, Prentice Hall Londons 1068 Saxosy J, A. and Parte, W. S.y Programming the IBM. 1401, Prentice Hall, saxcny JAY, and Sanseuas, R. W., Prpranming and Wiring the UNIVAG 1004, Prentice Hall, London, 1964 Sumas, P.M,’ Programning and Coding Distal Computers, Wiley, New York, Sma, M. Land Munno, W. D., Gmputer Preranming, Academic Pres, New or} Wanna, 2 Brodin Sim eres eer Press, New York, 1964 MV. Preparation of Programs for an Electronic Digital Computer, ati etn, Addisdn-Wesley, Cambridge, Mass, 1857 Yaney, E i al, poms Comme enfant Dro Nowe York 1961 ‘ansnov, A. B, ef guage System of Automatic Programming, Academic res, New York, (668 Numerical Analysis Bennerr, A. A., et aly Nuaerical Integration of Diferentiat Equations, Dover Publica tions, London, 1356 Brreziy, 1. ,, and Zinpuov, N. P., Computing Methods, 2 vols, Pergamon, Oxford, ee ee rg et era 1959 Boorn, A. D., Numerical Methods, 3rd edn, Butterworths, London, 1965 BuckmncHam, R. A., Niwmerical Methods, Pitman, London, 1957 Pliers bags gee fash er Pitman, London, 1962 Contra, La, Zhe Nenerical Treatment of Differential Equations, 3rd edn, Springer- pes P. J., Interpolation and Approximation, Blackie, Glasgow, 1963 ‘Fappezv, D. K., and Favpsrva, V. N., ‘Methods of Linear Algebra, ‘Freeman, San Francisco and London, 1 Furrcuer, A., et al., Index of Mathematical Tables, 2 vols, Scientific Computing Service, ‘London, 1962 Forsyrne, | G.E., and Wasow, W. R.., Finite Difference Methods for Partial Differential ,, Wiley, New York, 1960 Font, Ty Finite 5, Oxford University Press, London, 1948 247BIBLIOGRAPHY Fon, Ley Numerical Seaton of Teoprnt Boundary Vale Problems, Oxford University ‘Press, London, 195 Fox, Le (4), Manerial, Seaton of Ordinary and Partial Diferntial Equations, ‘Pergamon, Oxford, 1 Parana, Hy tetera! Motenaic, Cambridge University Press, Cambridge, 1931 Hasna, Wn Numer Methods for Slt nd Exgiers, McGraw-Hl, New ‘ol Hantuse, D. R., Namerial Analyst, 2nd edn Oxford University Pres, London, Hastinos, Cet ly Abtroximatins for Digital Computers, Princeton University Press, Princeton, I mseue, F Dinrle Verable Matias in Ordinary Diftrential Equations, Wiley, New Hupuanano, F. B., Inoduction to Nunerial Analysis, McGraw-Hill, New York, 156 Hoursnotoen, A. 8, Principles of Numerical Analysis, McGraw-Hill, New York, a ani Meena Aas Mace, egy, 1064 Hovssuouoen, A. 8” (Ed.), ‘Monte Carlo Method", Natn ‘Appl. Math, Ser. No. 12 Jonna, Cae of Foi Difirna, Calaea, New York, 1947 -Aty Zon Nanerical Ana ‘and Hall, London, 1955 Roney hy Sy Mariel dab, McGaw Fill New Work, 1987 Lance, G. Nu, Numerical os for High-speed Computers, liffe, London, 1960 oy raat a VY, Hoy EB. Ay Studies in. Diferential . ‘Watts, London, 1954 MeComacs, ig and Sauvanon, M. G., Numerical Methods in FORTRAN, Prentice Mux, W. E., Numerical Calculus, Princeton University Press, Princeton, 1949 Mune, WE Mameral Solution of Diferoiel Equations, Wiley, New York, 1953 Muxs-Tuonsox, L. M., The Calculus of Finite Differences, Macmillan, London, 1951. Nuetsen, K. L., Methods in Numerical. Macmillan, London, 1956 ee a Ocacxs, M.v', Traite de Paros, L. J., and Tavssxy, O. (Eds), ‘Simultaneous ‘Linear Equations and the ‘Betcrnination of Eigenvalue’, Naim Bur Sten, Wasknglon, Appl. Maths Ratsrox, A., and Way, H. 8, (Eds), Mathematical Methods for Digital Computers, gy, New ort, f966 oo ; Rani, I Ay Itditon to Computational Mads, Boglish Universities Pres, Scansoxovsin, J. R. Dumercal Mathonatical Anais, 5th edn, Johns Hopkins Baltimore, 1962 Suaw, F.8., An Introduction to Relaxation Methods, Dover Publications, London, 1953 Stvozk, J., Fundamentals of Numerical Analysis, Academic Press, New York, 1964 Se Ri Vo Relation Methods in Bngiuering Science, Oxford University Scone RV Eatin Methods in Theoretical Physics, 2 vols, Oxford Univer- stamens Rey Numerical Methods in Science and Engineering, Prentice Hall, London, ei . Interpolation, Williams and Williams, Baltimore, 1927 Some EL ‘An Introduction to Numerical Mathematics, Academic Press, New ‘Tavssxy, O. (Ed.), ‘Contributions to the Solution of Systems of Linear tions and the Determination of Bigenvalucs', Nain Bur. Stond., Wasingon, No. $8, ‘Toon: J (Ed), Suey of Numerical Analysis, McGraw-Hill, New York, 1962 248 BIBLIOGRAPHY ‘Vanoa, R. S., Matrix lerative Analysis, McGraw-Hill, New York, 1962 Warrraxer, E, T., and Rosnson, G., The Caleulus of Obsercations, 4th edn, Blackie, Wuxnseos, HL, Rounding Evers in Alecbrae Processes, Prentice Hall, London, 1963 Tena Tog En Hemahon ef oma Shot the Seaton of Euston, Perga- ai i tnd lid Tables, HLM. Stationery Office, London, 1956 ‘Gonputing Methods, 2nd edn, H.M. Stationery Office, London, 1962 ee Brrxstey, E. C., i and Ineligent Macs, Reinhold, New Yorks, 1959 Boous, G, Gallced Lagad Works Val 20 1940 Catpwatt, 8. He Sele Gircuits and "Derg, Wiley, Neve York, 1958 Cutnsensox, J. nunrsoi, Jt, Mathoatcs and Logic for Digital Dees, Van Nostrand, New ‘ork, Comer HL Ay A New Apbroach tthe Deion of Shing Gress, Van Nostrand, ‘ew Davis, M. Conpulbiliy ond Soleailiy, McGraw-Hill, New York, 1958 Rroase, 1a Comper Lagi Ernie Hall, London, 1960 Ganoxzr, M., rams, McGraw-Hill, New York, 1958 Gauss A Sarodin te Thor of Pesta Machin, Mra Zit, New York, Hr Sr lest Wiley, New York, 1961 Howraey, W. 8. ing Geet Mraw Bil, Now York, 1958 Kussren, W., ef al, Cirewits, Wan Nostrand, New York, 1951 Naneun MP. Sodetie hing Ciel fo neers, Prentice Hall, » 1962 Perersox, W. W., Error-corvecting Codes, Wiley, New York, 1961 Romenavn, L.A. et aly Signal Flaw Graphs and Applian, Prentice Ball, London, Roogaer, NaN» The Grihs of Raley Sockig Chest, Van Nostrand, New Sesuu, S., and Ruxp, M. B., Linear Graphs and Electrical Natworks, Addison-Wesley, ‘Cambridge, Mass., 1961 Suanwon, C. B., and McCarniry, J. (Ed.), Aulomatic Studies, Princeton University Prem, Frndston, 1998 Warrzsrt, J. E- Biolean Algeira and ls Applications, Addison-Wesley, Cambridge, Mass., Wricox, R. H., and Maxx, W. C., Redundangy Toclnigques for Computing Systems, Spartan, Ney York, 1962 Worescnart, J. M., and Retrren, B., Sequential Decoding, Wiley, New York ‘Synthesis of Electronic Computing’ and Control Circuits’, “Annals XXVII, Pivcelig an rt ain The They of Switching, 2 vos, Harvard 8 of on on 7 University Press, Harvard, 1960 Logical and System Design of Digital Computers ena bie Lope ae etn me Rea a “Arete Onatons & Digial Cogpuisn, Var Nevtrand, New Tong He Gy Lovet Din of Seithing Sem, Adon: Wey, Cambria, Wants | Ny Pring of Lape Design Ginn, London, 1968 Technology of Digital Computers and Systems Broun, S. J., Magnetic Recording, Murray Hill Books, New York, 1948 Bars, RF, (Bd), State Relays for Hlctronle Cres Chapman and Hall, London, anc. 249BIBLIOGRAPHY Baumswa, A. H., Multicibrator Circuits, Cleaver-Hume, London, 1959 Duin K. Jy"An'tnvodatin Guning Tecan ent i Ke Juy An to Count ‘ansistor Circuit Logie ated deities aid Bowens, G. W. A. (Ea), Mcwominiatrization, Pergamon, Oxford, 1962 Dunwen, Ae toe Gasser, J. Wy Minis end Miominatire lt, ‘ew Yor! Grav It J Cimpuler Engnering, Prentice Hall Landon, 1963 "Piet af Tate Fins ‘endemic Press, New York, 1963 Howhato, Ar. Dig Mapua fevordie, Wieyy New York, 1964 Hottaxp, L., Vacwaon Deposition of Thin Films, Wiley, New York, 1958 Horsey, Fs “and Smencats, LO. (8e,), Smpasum on Micrminiatrizton of Ele- tronic Assemblies, Haydon, New York, Huntey, R. B., Transistor Logic Gireits, Wiley, New York, 1956 furtey, R. B, Function Transistor Electronics, Wiley, New York, 1958 Kontr, §.A., Eltron and Nuclear Counters, Van Nostrand, New York, 1946 Lavr, V..N., and Lyusovictt, L. A., The Cathode Ray Tube Memory ofthe High Speed Electronic of the USSR deadeny of Scie, Pergamon, Oxford, 1960 Engineering, Oxford, I Lenepey, 8. A., ari eee meet Hol, Renchart and Winston, Law, W, B. Hletrial Coating, Unlvery Room: Camnkshige, 1948 Maney, GA, Tae Lage Dusen of Tracer Dig tice lll London oe Mauvennorr, Ac}, Digial Appleton of Magne Dele, Wiley, New York, 1960 Mec yh a pr at eae Newoenaun O; A. tal (Bs), Shute and Properties of Thin Fins, Wiley, New Panes, AL, Design of Trnsstorizad Cris for Digial Computers, Rider, New Paurron, M., Thin Ferromagnetic Films, Butterworths, London, 1964 Pavwes, N. S. (Ed.), Amplier and Memory Devices with Films and Diodes, McGraw- ck, Ws Digi Sovage Sse, Spon, London, 1964 a rage Systems, Spon, Ricuaros, C. E., and Lywen, A. C. (Edi), Soft Materials for Tolecommunications, Pergamon, Oxford, 1953 Rican, H, Kill Cenptr Omponmts end Crit, Van Nostrand, New Wrote, § (Bd), Maden Digial Crus, Mcraw-Hil, New York, 1964 Yours, M,C Large Capac Menory Tenis for Computing sens, Macrillan, Tubes for Computers, Cleaver-Hume, London, 1957 Reliability Bazovaxy, I., Reliability Theory and Practice, Prentice Hall, London, 1961 Lorar, f., RADC Reliability Notebook, McGraw-Hill, New York, 1959 Somes, (Bs oem nla, eeoetog scsi New jersey, Analogue Gomputers and Analogue-Digital Techniques Amuxr, [debit Ase Comet, Wier, New Yor 1958 Evang, B. 8, Findamanals of Digital Insraneniation, atts, London, Evaxs, D. 8., Digital Data, Interscience, New York, 1961 Haxruzy, M: G.s dn Iacono Electrons Analog Computers, Wiley, New York, 250 BIBLIOGRAPHY ee Analog Computers, 2nd edn, McGraw-Hill, Mackay, D. M., and Frstter, H. HL Ey Analgue Computing at Ura High Speed, Chap- Mownoe, A, Dial Presa a Sampled Data Syms, Wiley, New Yor, 1982 i Stans, Wiley, New Yor Say, M. G. (Ed.), pie and Digital rs, Newnes, London, 1960 Sostan AK. Notes on Anlo-DigialComerion Techiq, Wiley, New York, Towouie, Rand Kanoivs, W. J High Spd dnsiog Comput, Wiley, New York, 1 ‘Tou, J. T., Digital and Sampled-data Control Systems, McGraw-Hill, New York, 1959 ‘The Computer and the Brain Asuny, W. R., Design of « Brain, 2nd edn, Wiley, New York, 1960 Gsonce, F.H., The Brain as a Computer, Addison-Wesley, Cambridge, Mass., 1962 Neowans, J Vox, The Computer and the Brain, Yale University Press, ‘Connecticut, Stanger, K, M. (Bd), Proasing Minot Dota, Massachusets Institute of ‘Technology, I ‘Tocuen, W. 1)., The Art of Simulation, English Universities Press, London, 1963 Warrer, W.G., The Living Brain, Duckworth, London, 1953 Wootpriner, D.E., The Machinery of the Brain, McGraw-Hill, New York, 1963 Computer Applications Auper, B., et al, Methods in onal Plysics, Vol. 1, 1963; Vol. 2, 1964; Abbie Pian Nee Sabie Covisox, J.B. Pogammes Laaming nd Gaputrbased Inston, Wiley, New York, Boors, A. Diet ly Makara, Relation of Linguistic Problens, Duterworts, Londen, 19: Boon AD D., and Levisox, M., An Introduction to Machine Translation, Pergamon, ford, 1965 Devavexac, Ey dn Inrdntin to Machine Trawlation, Thames and Hudson, Lon- n, 1 Desuoxbe, W. H., Computers and ther Uses, Prentice Hall, London, 1964 Deswoxne, W. H., Real Time Data Processing Systens, Prentice Hall, London, 1964 Epwonpsox, H. P. (Ed. Nat Spe Mes Trantton Prentice al, London, 1901 Fremercer, W., and PRacun, W., Applications of Digital Computers, Blaisdell, New York, 1963 Ganvns, B. La, Natal and the Computer, McGraw-Hill, New York, 1964 Han J. 4B TS” a Ea m, Oxford, 1962 Bou 1 iL, Mc, Experimental Music Composition with an Electronic Compr Metirawctull, New York 1959 Horse 8. nad Mitten Bs Ganpaer Applization—1961, Macmillan, Lon- and Its Mathematical Aspects, American don, 1964 Jaxonsox R. (Ed.), Structure o Mathematical Society, Providence R. 1961 Kenr, A., Advances in Documentation, Vol. 11, parts 1 and 2, Information Retreoal ‘and Machine Translation, Interscience, New York, 1961 Ket, Ay Tetbook of Mechanized lforatin Rion: Interscience, New York, 1962 Keer, AC (28), Byrnes Reba Ase, Wesien Reserve ‘University Press, leveland, | Loox, W. Ni, fund Boor, A. D. (Bas), Machin Transation of Langwege, Wiley, ‘New Yori, I Orrnxonn, A. G., Auiomatc Langnge Translation, Harvard University Pres Harvard, 1960 Oncanice, E. I. (Bd.), Use of Computers in Engineering Education, University of Houston Press, Texas, 251BIBLIOGRAPHY Panov, D. ¥., Automatic Translation, Pergamon, Oxford, 1960 Se eee ‘Machine Literature Searching, Wiley, New York, 1956 ma nis me Tele neey Lies ‘Searching, Wiley, New cs ied Suis in Automatic Fraulein, 2 vol Rem atvenly of Watkingion Press Seat, 1900 Somucez, L, Digle! Preeti: A Srlen Or Prentice Hall, London, 1963 ‘Tauns, M., Emerging Solutions or Mechanizing the Storage and Retrieval of Gonformat Docuchentade ney, Washington, 198 eet Touma S.$., and Mastin, 8, Compulr Simulation of Pevonaliy, Wiley, New York, Mechanization of Thought Processes, 2 vols, HLM. Stationery Office, London, 1960 Inderonl Cafes on ‘Machine Translation, 2 vols, H.M. Stationery’ Office, Magnetic Thin Films Cuaxo, H., and Fert, G. C., ‘Bibliography of thin magnetic films’, Trans, A.L.E.E. Paper CP-62-1068 (Sept. 1962) a2) Thin Magnatic Film Properties Anpra, W., Phys. Slat. Solid, 2 (1962) 99 Beps, HB, L.B.M. RS Res, Dev., 6 (1962) 456 Benxwpt, K. J., and FS, 3. pet Ph, 30 (1959) 2768 Bion, M.S. op. Pe, 2 Poe Be Ch 26 (i9ss) 978 Bomeny te, ead tants, Pi 165 (1961) 176 Booonadu! Bret a LBM, Rex Bet, 6 (0382) 407 ‘Brabuey, E. M., and Prurrox, M., J. Blctron. Gontral, 6 (1959) 81 Brabury, EM, fee cee Meee vee Guano, H., LBM. 7, inane “1965) 41 Garo, WW yt 7p J Bp 30 (1880) 2728 Gam Ne Soph Bip $08 (1962) 2968 Coxorr, R. 1 8. Rev., 109 (1956) 915, Corciovm, A., Czech. J. ‘Sips Hid (1960) 817 Gonex, R-'L.,’and Joreracscx, H. 5. Rev., 126 (1962) 1378 Gnrrrexpex, E. C.; and Horrwax, R.'W., J. Plys. Radium, 17 (1956) 270 Gurrrenpex, E. C. ef al, Re. si. Isirum., 22 (1952) 872 5. Rep, 51-2 (1 °F. Res. Deo. $ (1960) 189 31 (1960) 2815, Ree Den (1962) 368 Phin, $3 (1962) 17 in 33 (1962) 1163 Natu, 109 S61) 110 Bones Me ge Meare Proc. LE.E., 105B (1958) 532 Fevpxeter, B., Naturwiss, 48 (1961) 474 Eupentian, E., Httron Receoal, 9 (1961) 167 FRUDKELLER, ee ‘Lins, W., Bae 14 (1962) 195 Ford, N.C, 7. cy BL Ci Fowize, C. pk Rat 104 (1986) 685 Fowtrr, C. A, ta Bo ha t. Rev., 100 (1955) 746 Fowien, © AY and Baven, EM Per, 18 (180) 352 ., 13 (1 1961) 157, rae "dion 20 (1983) $10 252 BIBLIOGRAPHY Bovazs, HL Wand Has MB 7, oth He 31 (1960) 258 phys. Soe. Japan, 17 (Suppl. B-1) (1962) ol Grass, 8. J., and Kus, M. Reo., 109 (1958) 228 Gees, AY, ‘and Prurrox, oa a 1962) 244 Gervnunke MEG. and Mitte, We er LBS 9. Ress Dez, 7 (1968) 278 Hate, M. E., et al 9. Phys.» 30 (1959) 789 ‘ "ys, 31 (1960) 283% ray Wey Q- Pring 151 (1958) 421 Horruas, HL, Zangew Piss, 13 (1961) 149 Honwrstent, R.'M., J. appl. Piys., 34 (1963) 1071 Hover, E. &., ot al, J. appl. Phys., 29 (1958) 294 Huwpuey, F. B., and Gyoxcy, E. M., 7. appl. Pipys., 30 (1959) 935 IoxATBHENKO, V. A., J. exp. thor. Phyi.y 40 (1961) 1328 Konszey, V,'V., and Korsunsxir, A. A., Izv. Akad. Nauk. SSSR, Phys. Ser. 25 (1961) 628 Kana, J and Dascuser, WZ Pires 150 (1958) 682 Krein, C. J. etal, J. appl. Piys., 30 (1959) 2628 Leaver, K. D., Nature, Lond, 196 (1962) 158 Leaver, K. Di, “The behaviour of thin ferromagnetic films in inhomogeneous “felis, PAD. Thess University of Landon (I Leaver, K. D., and Prurrox, M., J. appl. Plys., 33 (1962) 1095 Leaver, KC D., and Paurrox, M. Gonirol, 15 (1963) 173 Mate, Z., and Scnurpst, W., Phys. Stat. Soli., 2 (1962) 136 Moons, 2, and Sram, D, ‘Nats sided Sa 277 Merumisset, S., ef, al, 5. ioe aaa, ee 960) 96 Meruvesset, 8. etal Sai ‘hae, 32 isl) 2948, 1959 Merumesset, S., et 17 (Suppl. B-1) (1962) 607 Marzponr, W... ead ood) 413) OE) Miboeunote, $< “Ferromagietic ‘domains in thin ni-Fe films," Ph.D. Thesis, ‘University of Amsterdam, 1961 Minonutonx, 8.2: ange, Pi 14 (1962) 191 Mippetiton, 82 5: apdl, Pysy 38 (1962) {111 Moox, R. M., 7. appl. Phys. 30 (1959) 835 Nezt, L., GR. Acad. Seng Paris, 238 (1954) 305 Nuex, Ly, J. pigs. Radium, 15 (1954) 225 Neet, L, CR, Acad. Sei, Pars, 241 (1955) 523 Nuet, L,, J. piys, Radiwn, 17 (1956) 250 Nauceaaun, C. A., Séructre and Properties of Thin Films, Wiley, New York, 1959 ‘Ousox, C. B., and Pou A. V., 7. appl. Phys., 29 (1958 274 Beacoes, RV and Wason, ers Lad 193 (1962) 76 frome tb Raat ad Paurros, M2 Trans. 9H Notional Vacuum Symposia, Amer Ya. See (1962) 59 Paurrox, M., Thin Ferromagnetic Films, Butterworths, London, 1 Ponuros, M, and Asrwoon, P> Br 7. ai Pot 14 (1968) ‘on Porton, My and Leavin, K Lett, 6 (1963) 15 Rowson, 6 Gs, pe eben) Supls By (1982) 208 ‘bie: Tes A863; 42, (a 288 Rovers 1 eal. J. apple Pb, $1 (1960) 487 Scnozmto, L., and Batre, A.. J. appl. Plog, 99 (1962) 442 Sour, 7. app, Pi 38 (i ) 1848 Scuversi, W, and Kasmensky, Vip Pips. Sit. Solid., 2 (1962) 345 Samu, DQ. J. ap Phys 29 1938) Surrut, D: O27. appl. Pips, 80 (1959) 2658 Sam, D- Ou. pl Php 52 (61) 18 ere, K. J, J. appl. Phys., 33 (1962) 1399 253BIBLIOGRAPHY Sutra, D. O., et. al, J. apple Phys. 30 (1959) 789 Summit, D. O., et al, J. appl. Pips.» 31 (1960) 2958 Seats, Jn ppt Sty Jaan, 17 (Suppl. B-1) (1962) 625, ‘Taxsavort, 8. Sei. Rep. Ris. Inst. Tohuiku Unio., A7 (1955) 269 See ef me Pra tae S Vatenta, Lo) Phys: Sat, Soli, 2 (1962) 112 Wruuias, HJ, and Suenwooo, R. C., J. aphl. Pips, 28 (1957) 548 Witttaus, M.3 J, sci Insirum., 42 (1965) 163 Thin Insulating Films Novice, M. A., Sci. Insinam. Res. Assoc. (U.K.) Reps. NES A89 and A103 (1962) Prrest, A., ot a, Vaca, 12 (1962) 301 Megnetic Thin Fil Storage Brrruax, E. Exp Trans, Inst. Radio Engrs, N.Y, EC-8 (1959) 92 Brann, G. Fy LBM. J. Res. Deon, 7 (1963) 252 Boxvitan, B. 1, ‘Some applications of ferromagnetic thin films in digital com- puters, Pi.D., Thess, University of London, 1963 Buaptey, B. M., J. Brit. Insin Radio Engrs, 20 (1962) 765 Braptey, E. M.7. Appi. Pips., 33 (1962) 105) Baononse, Ki ly Pro, Was at, Cmputr Cn (1960) 97 ass, J. Bo aly Poe, Wes Jt, Computer Conf (1988) 2 jurzt, W., Proc. Instn elect. Engrs (Correspondence), 52 (1964) 875 woPMANS, B, A. and Hasnoxo, J. S., Trans. Jasin elect. Engrs, BC-12 (1963) 282 ) Kowm, Gy stat Tro, at ce eg C14 (1969). In pres Koon, DH, Boronia (Aug 1961) 31 Perscuaur, R7J., and Torxguisr, R.D., Proc. West. Jat. Computer Conf. (1961) 411 Pouu, A. V., and Mrroweit, E. N., Trans, Inst. Redio Engrs, N.Y, EC-S (1960) 308 Poum, A. V., and Runens, S. M., Proc. Hast. Jnt. Conf. 36) 120 Prorsstin, W. E., et al., UNESGO Paris Conference (1959) Pap. No. ICIP/K2 Rares, J. 1, J. appl. Pips, 30 (1959) 608 ) Rare, J. L,vand Growrime, T. S., Trans, Inst. elect. Engrs, EO-13 (1964) 611 Rarmay Jo and Samra, D. 0, "UNESCO, Paris Cayenne (1959) Pap. No. Rarrat JL lay Brow I. Radio Buys, NT 49 (1961) 155 Sarrzen, D.,"Trans. Inst. elect. Engriny EO-13 (1964) 722 ‘Turnguist, R. D., et al, Jnst. Radio Engrs. Con. Rec. Pt. 4 (1962) 63 Magnetic Thin Film Shift Registers Bautantyne, J. M., J. appl. Phys., 33 (1962) 1067 Baonbment, Dn Pratt int Radio Eager 7, EC-9 (1960) 921 Raga Foe al Ted of information trnsr in thin films Lita La. cr. Rae Reap, Av A., Tran. inst, Radio Engrs, BC-12 (1963) 517 } Scatutie, J. appl. Pips, 38 (1962) 1848 Saar, DQ Tram Hs, Reg Bags, N., EC-10 (1961) 708 Wittiaws, M., Bletronies (Feb. 1968) Twwistor and Tensor Storage Barnerr, W. A., ¢t al, Trans, Inst, Radio Engrs, N.Y, BO-10 (1961) 451 Boruzox, J. H.. Bell Sjst, Tech. 7., 36 (1957) 1319 Busne, J. J. px, ef al Proc, West. Jat. Gonf. (1959) 41 Guaxota, U. F., J. appl. Pisin, 29 (1958) 849 Grav, Ri L., Trans, Inst. Radio Engrs, N.Y., BC-9 (1960) 451 Kou, H. J, and Ganexe, J. G., LB.M. J, Res. Dev., 7 (1968) 130 254 BIBLIOGRAPHY Loowey, D. H., Proc. West. nt. f (1959) 36 SGmwanon, Sj. rand SacaS"y Setanta Burs, NX, BC (1959) 465 Transfusors and Magnetic Logic Batowns, J. A.y Trans. Inst. Radio Engrs, N.Y, EC-11 (1962) 218, 664 Benton, D. R., ef al. Trans. Inst, Radio Engrs, N.Y, EC-10 (1961) 203 Garant, H. D., Proc. Inst, Radio Engrs, N.Y., 47 (1959) 63 (Gaayg, H. Ds and Rr, EK va, Poe, Dnt. Radi Engrs, N.1, EC-10 (1961) 0 Guaxota, U. F.,J. appl. Plys., 2 (1961) 278 Ghawoca, UB aneh Grow, fl Ball Sue Tock, J 98 (1959) 45 Hanacer, D. G., et al., Proc. West. jut. Computer Conf. (1959) 14 Hoare J. Loy Trans! Int Radi Brgrs. NT, EC-10 (1961) 191 Monoax, W. L., Trans. Inst. Radio Engrs, N.¥., ED-B (1961) 155 Morris, D. j., 9. Br. Instr. Redio Engrs, 27 (1964) 153 Morris D. J, Blecron Engng, 36 (1964) 440 Rajommuan, J A., Proc, Bast. Jnt. Computer Conf, (1956) 107 Rajermian, J. A., Proc. Inst. Radio Bngrs, N.Y. 45 (1957) 325 Rajouman, J. A., and Lo, A. W., Proc. Inst. Radio Engrs, N.1., 44 (1956) 321 Rowe, I. H., and Sumo, G. R., Communs. Electron, Lond, Pap. No, 61 (1961) Runs, WG. and Wantme, C-B, Pr Was Jn. Compl Cn (1950) 02 ‘Waxtast, C. 1) and WANLASs, 8. D., Proc. West. jnt. Computer Conf. (1959) 40 Magnetic Computer Elements ‘Moraax, W. L., ‘Bibliography of digital magnetic circuits and materials’, Trans. Inst. Radio Fingrs, N.Y, EC-8 (1959) 148 Newnatts PE, Digest of 1964 Intemational Solid Sate Get Confort, LELE.E.» New York, p. I 7 Srmoeme, H., and Zscmenret, R., ‘Stability of shift registers with ferrite cores’, Arch. Elokt. Ubertr, 18 (1964) 249 Bluctron Equip, Engng, 12 (1964) 36 Sonic Delay Lines Rormarr, An, “Bibli ‘of magnetostrictive delay lines’, Trans, Inst. Radio ages MY, BO-TO (OGD) 285 © Cryogenics I.B.M. J. Res. Dev., Superconduetivity issue, 6 (1) (Jan 1962) ina Pe tats Bago, P21 (1968) 1009 .F., and Ruopenick, E. HBr. 7. appl. Pips. 11 (1960) 292 Buex, D. A., Proc. Inst. Radio Rngrs, N.Y, #4 (1956) 482 Burns, L. Li, etal, Solidt. Electron, 1 (1960) 343 Bows, L: Ln, et al Trans. inst. Radio Bngrs, N. Y., BC-10 (1961) 438 Curciax, P. M., Proc. Inst. Radio Engrs, N. Y.. 49 (1961) 1326 and 1574 Proc. Inst, Radio Engrs, N.Y, 48 (1961) 371 . Cas etal *Structre and Properties of Thin Films, Wiley, New York, Cnerrexpex, E. Cet al, Proc Inst. Radio Engrs, N.¥., 48 (1960) 1283 'M. J. Res. Det 1 (1957) 294 Davies Pi Me, Pro. Srne fer Conf., San Francisco (1962) 79 DRanohi, K.'E., et al, LBM. J. Res, Deo. 7 (1964) 13, Epwaros, H. H., Solid-st. Electron, 1 (1960) 65 Sree ene | (8 a x Lk, . fouxstox, R. G., Trans. Inst. Radio Engrs, N.Y., EC-10 (1961) 712 yan, T., Electronics, 24 (1961) 45 Marrutai, By T., IBM. 7. Res. Deo, 6 (1962) 250 . Se ae cae aed Computer Conf, San Francisco, 255BIBLIOGRAPHY Newnousr, V. Ly etal, Proc. East, Fut. Compuler Conf. (1959) 255 Bonsai Gg 5180) 65, Reap, A: A., Trans. Inst. Radio Bngrs, N.Y, BC-12 (1963) 517 Ruooknioe,E. TL Br. J. apt: Pps 10 (1959) 199 Ri, Proc. Bast. jt Gon, (1960) 179 RU and Langit Ac By LBM 9. Ra, Dex, 6 (1962) 126 - Ev ro, Is. Radio Engrs N.Y 90 (1962) 81 E., and McManon, H., Prec. Hast. jnt. der Conf, (1956) 115 » Trans, Inst, Radio Engrs, N.T-g EC-11 (1962) 200 1 E Ry J Se crm. 2 (i965) 188 [- C.J. appl. Phys, 32 (1961) 461 5. Bie fae Rade Bere 38 (1963) 387 ‘Yousa, A. P., Br. J. appl. Phys., 12 (1968) 359 Tunnel Diode Circuits and Properties Aurxsanpen, T., and Soarr, R. W. A., J. Br. Instn Radio Engrs, 23 (1962) 177 Avooat Jai Bums J Re CA er 24 (1968) $95 Awovet, J. J., and Kozoxdoxy, W. F., R.C.A. Reo. 22 (1961) 669 Axeunop, M.S. etal, LB.M. 7. Res. Deo., 6 (1963) 158 Beavros, R. and Wulzovcnpy, R., Trans, Iut, Ratio Engrs, NP, BO-12 (1963) Gane, W.N., and Muses, A. G., Trans. Inst. Radio Engrs, N.¥., EC-11 (1962) 773 Guow, P., and Cunsrs, J., Electronics, 46 (1963) 42 Gonnoto, R. 8. C., and Mauavata, N. W., Proc, Ins elect. Engrs, 110 (1968) 51 Gooprawax, M., Trans. IEEE, BC-13 (1968) 18 Daty, W. G., and Kevy, J. F., Trans. Inst, Radio Engrs, EC-12 (1963) 503, Eanwinaw, J.B, Trans LEE, EC-13 (1964) 710 Epwanvs, D.B. G., and Laxtoax, M. J., 7., Br. insin Radio Engrs, 26 (1963) 359 Goro, Eu. etal, Trans Inst. Radio Engrs, NT, EC-9 (1960) 25 Matutn, H. S., RCA. Reo., 24 (1963) 47 Rasmovicr, B., and Crapper, J., Blecromies, 35 (1962) 46 Renton, C. A’and Ranovici, B., Proc. Jastn ect. Engrs, 50 (1962) 1648 Retox, C. A., Trans. Inst. Radio Engrs., N.Y, BC-11 (1962) 213 Rvax, W. D., and Wittiass, H. B., 7. Inst. Electron Radio Engrs, 27 (1964) 293 Sn, R. G., et al, Proc. Inst, Radio Bngrs, 49 (1961) 136 Swern, W. R., and Pons, A. V., Trans. Int. Radio Engrs., EC-11 (1962) 658 Srmott, P., Reo. si, Istram., 31° (1960) 754 ‘Swasry, M.N. S., J. Franklin Inst, 274 (1962) 444 Yourke, H. 8, ef al., Trans. Inst. Radio Baers, BC-10 (1961) 183 The Field Effect Transistor Dacey, G. G., and Ross, I. M., Proc. Inst. Radio Engrs, 41 (1953) 970 Dacey, G. G., and Moss, I. M., Bell Syst. uch. 7., 34 (1955) 1149 Horna, J. A., and Wer, B., Proc. KEELE. 51 (1963) 10 Larnay, D. G,, ef al, Proc. LEE.E., 51 (1963) 226 Mupournroox, R. D., and Riciter, T, Proc. LE.E-B., 51 (1963) 1145 Suocktey, W., Proc. Inst. Radio Engrs, N.Y, 40 (1958) 1965 Electron Equip. Engng, 11 (1963) 78 Switching Circuits and Logie Hust, BH Tran. Jt, Radio Erar, N.Y, BC-10 (1961) 688 ‘Toop, C. D., Trans, Inst. Radio Engrs, N.Y, EC-12. (1963) 462 Cooks, 8. A°G., and Winoan, R. O, Trans Inst, Radio Engrs, 2. EC-13 (1964) SERIAL PUBLICATIONS ‘The principal journals in the field of computer science are: Association for Computing Machinery, Joumal, Computing Reviews 256 BIBLIOGRAPHY Automatic Programming Information Centre, Brighton (England), Aulomatie wr decay, Jornal, Procadigs British ter Society, , Proceedings Baitsh Institution of Radio Enginecs, Jounal [Now Institution of Electronic & Radio Engineers, VERE) Computers and Automation Datamation Digital Computer Newsletter 1.BM, Joumal of Research and Development I (U,S.A.), Transactions of the professional LEE. (U.K.), The ‘Proceedings, ‘Journal’ and‘ papers within this field 5 ‘Mathematics of Computation, National Academy of Sciences, Washington Ministry of Aviation (U.K.), Bibliography on Seroomechanisms LBM, Systems Journal up on electronic computers ly’ contain occasional 257NAME INDEX Only those names mentioned in the text are included, other names will be found in the bibliography. Page numbers set in bold type denote most important reference. Arex, H.H. 13 Bauaaoz, C. 10, 12, 13, 17, 18 Bampace, H. P. 13 Batpwix, FS. 9 Boeck, A.” 127 Boom, A.D. 233 Broapbent, K.D. 146 Boox, D. A. i15, 195, 177 Bunxs, A. “20 Fry, D.” 85 Fornssten, J.W. 21, 17 Giaxoua, UF. "128 Goupstive, Hl. HL 20, 52, 190 Goonsmxe, RL. 97 Goro, E. “ii, ist Hater, A.V. "177 Havnivo, RW. 6 Houma, H. "11 Hour, A. W. 178 jorpan, F.W. 16 rz, J. ‘50 Krause, A. 142 Lupxrrz, G.W. 5, 9, 10 Mavounty, J.W. ‘17, 20 Moony, N.” 137 Moran, 5. 9 Monier, J. H. 10 NevMann, J. vox 17, 52, 115, 190 Oupxer, 9 Sanvrt, A.L. 236, 237 Sousvrz, G. “11 Somapr, O. H. 120 259SUBJECT INDEX Only those subjects mentioned in the text are included, other wil be found in the bibli Page numbers set in bold type denote most important reference. Absolute transfer of control, 37, 38 ‘Acces time, 19, 26,28, 158, 182 ‘computers, AGE, 19, 107 Adder, 43, 45, 46 hall, 48, 46, 99 ALGOL, 215’ 215 AND gate, 99 rica io, 165 Aust ootacseece i, $8 APE(X)G, 22 ARG, 15, 165 ‘Atithinede unit, 1 25,28, 34 asco's Associative store, 17 ATLAS, 23, 41 ‘Atomic scattering factor, 230 ‘Automatic programming, 213 Ballistic tables, 16 BARK, I¢ Base, gptimum, @ Bell laboratories computer, 13 Bebox, 39 Bicivectional guts, 108 Blaary counting clemeat, deimal conversion, 195, 207 element, 34 scale, 5, 28, 42 Beka Botable 121 Boolean ain 9 Branch, point, order, Branching order, 4, 32 British Tabulating Machine Computer, Cathode coupled, anode output gate, 106, we ose Cathode ray tube store, 16, 21, 199 ‘output gate, 105 hain carry, 12 Ghain printer, 89 Gharacter recognition, 74, 82-85 Charactron, 8; hess, 236, 237 ‘Girel? computer, 28 lear, operations, Glock pulses, 163 Code, 3 19,31, 181 Goineldence senser, 158 unit, 49, 50 Collation, 71, 72 Compiler'system, 216, 218 Complement notation, 4, 5, 42 OMIT, 216 Conditional transfer, 4, 12, 32, 38, 235 Conditioned reflex, 238, 240 Contour plotting, 228 Control, 28, 31 counter, 29, 31, 33, 34 of magnitudes, 201 order, 26, 29, 31, 36 register, 29 transfer, 4 Gontrolied rete, 119 storage, single digit, 126 type register, Counter, 12 ring, 60, 136 Geese ores, 138 ‘cyetron, Growe cell, 177 Gryogenicy shift register, 147 storage, 132, 17 Gryotron, 115; 132 jon table, 152 Gyelie code, 6 DOTL, 125 Decimal arithmetic, 58 -binary conversion, 204 Decoder, 29, 32, 1 260 SUBJECT INDEX Dekatron, 195, 136 Deltamax,'112 Dictocary, stags of 240 onary, 3 Dielectric 175 storage, Diflerence diode, 118, 19 Difference engine, 9 Dilereatial gate 113 git sum, 8 Digital computers, 2 Diode-gate, 100, 103 “matrix function table, 149 ide opel 78, ‘capacitor store, 1 Dise pack, 74,79 Divider, 41, 88 BO lsstution, 222 Draught, oa Duty cycle, 23, Electronic track selection, 162 Elusive ‘I’, 51 E.M.L. character reader, 8¢ Encouragement, 240 ENIAG, 17, 18, 20 ERA, ‘/10/", 23 Error, correcting code, 6 detecting code, Errors, ero of, 2 on Esaki diode, 130 Ferranti computer, Ferre, 112,113: 101,168, 170 Ferro resonant flip-flop, 128 Field effect transistor, 34 Filler, 64 Film, 74 Floating. point arithmetic, 65, 213, Be 82, 34, 119 ‘rein language (F.L.), 233 FORTRAN Ji Function table, 38, 149, 227 adder, 51 muburtcio, 31 many-one, 33, one-many, 33, 148 Games, 234 Gamma 60, 40 Gaussian roundoff, 69 Gate, 29, 34, 35, 96 ‘and’, 99, 103 diode, 100, 102 magnetic, 112 multigid, 108, 109 ‘not’ 98, 99 ‘or’, 99, 103 Rosi, 104 series triode, 107 General purpste compute, 1 Germanlum erytal diode, 22,101 Glossary, 231 Goto pair, 131, 141 Half-adder, 45, 99 ~subtractor, 50, 51 Hlaleing and enbtng multiplier, 63 1,13 we ME. 3, 23 Mk. 4, 23 HGR. alloy, 112 HEC 2M, 22, 23 le storage, Hollerith tabulator, 11, 74 IBM computers, 13, 14 IBM typewriter, 87 ICCE, 14 IF ate a nae ao 133 re eo , 30, 161, 185 on TEESE A ct ay tat Int ition, 1: fae 1, 3, a 184, 191 8 index, 4, 191 Jacquard loom, 11, 12 Key switches, 74, 75 LADDIG, 115 Learning, 238 £3.4. orders, 203, 211 Hing ont, 216 ‘Logic of drum store, 163, 164 261SUBJECT INDEX Logical addition, 72, 73 Logical delay, single digit store, 123, Loop, 181 M4, 186, 193, 204, 213, 214, 215 MAG, 23 Machingtansaton, 216 4, 9g ic, acoustic’ store, 126, 128, woeres, 168 disc store, 165, 166 drum store, 14, 16, 24, 74, 157, 240 gates, 112, tape, 74, 80, 180 thin im storage, 171 ‘Magneto striction, 126, Majority logie, 132 Matrix printer, 87 ‘Mechanical translation (M.T-), 72,233 Memory, 26, 34, 155 Monestabsle multvibrator, 120 ‘Multi-grid, gate, 109, 110 ulplcation, 25 92, 42, 52 ‘Multipliers, 43 halving and doubling, 62 matrix, 62 ‘Multivibrator, monostable, 119 “Musical output, 93 el NAND gate, 97, 110 National Accounting Machine, 11 Negative snumbers, 205 Ay anys, 86, 119 178, 235 Nickel ‘wire, 126 ‘Noise cancellation in core stores, 167 NOR gate, 97, 110 NOT, gate, 96 order, 185 Noughts and crosses, 234, 235 Numeroscope output, 74 Object programme, 218 Octal seale, 207 One-address code, 181, 186 OBtimum codfag, 20, 181, 182 timum coding, Order, 26— OR gate, 98, 103, 115 ORDVAG, 32 Output, musical, 94 veal, 93, 94 Overpunching, 207 Parallel operation, 28 Parity bit, 7 Partial substitution, 70, 72 Pencil follower, 91 Penta-erythritol tetranitrate, 228 Permailoy F, 112, 144 PERT, 93 Phase angle, 228, 229 Photoelectric tape reader, 75 in store, 156 Pluggable sequence relay calculator, 14 Potter printer, 89 Powers calculator, 11 Precision control, 202 Procesor, 218 fs Programmed notation, Programming, 3, 181, 190-198, 213 Preudo-ordels 21S, 216 jo-orders, 2 Punched, cards, 74, 78, 217 tape, 74, 75, 83, 185, 208 Punishment, 240 Ramey magnetic amplifier, 130 Random numbers, 242 Read/record head, 157, 161 Reading, 26 Reger 48,146, 11 ‘tore, 144 shifting, 139, 182 Relay, 32, 96, 117 ‘tree, 148, 149 Remanence, Serromagnetic, 21 Resistance matrix, | ing counter 60,196,137 Rossi gate, 104 off, 68 Rounding off, 2 Saturable reactor function table, 152 Seale of two, 5 Schmidt tigger, 120 SEAC, 20, SEG, 32 Secondary emission, 21, 175 ‘coeficient, 176 Selectron, 20, 21 Selenium matrix, 121, 150 262 SUBJECT INDEX Serial operation, 27, 35 Serio Sete peat wy 28 ‘parallel operation, SETOON, 8 Shift instractions, 44 Shifting register, 139, 182 Shopping: rt tank, 139 Silicon dees 101 Simple induction loop, 191 Single digit store, 117 Size of store, 180 Slide rule, 2 Special purpose computer, 1 ‘Spoken word input/output, 74 Square root, $8,185,201 8. T. C-tron, 135, 137 Sterling, 62 ‘Storage, 7, 12, 18, 180 Store, 12, ss STRE- Se oan Subscripts, 319 Subtraction, 25, As 50 Subtractor, 43, 50 ea. ae ae a" Tables, storage of, 78 ‘punched, 74, 75, 88, 185, 203 Feaders, 79) Target ge (TL), 298 Teletype, | ne, 74, 1,86, 196 Tepe, oi yh7 In I Tenical = 3, 30, 32, 74 Tetrode, 109 ‘Textual analysis, 216 Thin film, cryotron, 193 shift register, 146 store, 24, 171 Three-address code, 213 Three state storage device, 114 Thyratron, 118 ‘Time sharing, 41 TTRANSAG, 126 ‘Transfluxor, 114 ‘Transfer order, 184 re 24, 108, 109, 125 computer, TREAG, 8 Treo, relay, 149 ‘Trigger tube, 137 103 Frochotron, 135, 136 Tunnel diode, 24, 130 counter, 138 Twistor, 127 ‘Tworadidress code, 19, 22, 181, 182, 184 Unit cell, 227, 290, UNIVAG, 20° UGG, 22 Variables, 219 Vocal output, 98, 94 Vocoder, bt Voice operation, 74, 84 Wetting of relay contacts, 99 Wire” Printer, 87 store, 156 Writing, 26, 42 Word ordered store, 172, 178 Heroerphic pint, 87 % * Galen eats, 227 ‘Ziise computer, 14 263‘The publishers will be pleased to send you information on new books. Please write mentioning your special interest to BUTTERWORTHS 88 KINGSWAY LONDON, W.C.2 Printed in Great BritainAutomatic Digital , Calculators Reviews of the first two editions “*.., should be indispensable to the electronic engineer wishing to enter the field of digital computers, or, for that matter, to anyone wishing to know more about this fascinating subject." —Electronic Engineering “*,.. a very good and compact book . . .”’—Nature ““... this book is a ‘must’. . . a first-class book of reference.”” —Office Management “The book has already become a recognized handbook on its subject . . . It is highly commended.”"—The Engineer