Pterra Report
Pterra Report
Assessment of Inverter-based
Distributed Generation Induced
Ground Fault Overvoltage on Delta-
Wye Substation Transformers
Submitted to
NYSERDA
January 3rd, 2016
1
Normally, the three winding voltages of a transformer add vectorially to zero. When ground
faults occur, the voltage that appears corresponds to 3 times the zero-phase-sequence component of any
one of the three phase-to-ground voltages at the potential-device location. This voltage is referred to as
"3V0 " and is the basis for certain types of protective relaying schemes.
FINDINGS:
The following is a summary of the findings of this study based on the
observed results of simulations.
While inverters can potentially cause overvoltage on the delta side of
the substation transformer, some inverter designs can detect a single-
line-to-ground fault condition and trip instantaneously. Time domain
simulation is a potential tool for evaluating the fault detection
capability of inverters for this purpose.
According to ANSI/IEEE C62.92, the GFOV for an effectively grounded
system is to be limited to 138%. This value can also be used to limit
the overvoltage for ungrounded systems. Simulation results indicate
that overvoltage on the delta side of the study substation transformer
peaks at 1.38 PU as the PV/load ratio approaches 65%. At
penetration levels below 65%, no overvoltage is observed. Two
important notes relate to this finding:
a. The calculation for the load should account for those connected
to the transmission side as well as the distribution side of the
isolated system.
b. Though this ratio seems close to the threshold proposed by
National Grid (i.e. 67%), there is possibility of under counting
the load if only the distribution side load is considered.
The 65% penetration limit (based on 1.38 PU overvoltage threshold)
can be relaxed if:
FUTURE WORK:
As noted earlier, this study is phase 1 of an overall effort to provide technical
clarity on the issue of GFOV. A future aspect of study is:
Investigation of less expensive countermeasures for 3V0 requirement
to alleviate a potential GFOV issue. Such countermeasures could
include, but not limited to, protective relaying detection on the
distribution side, detection by the inverter, application of a grounding
switch on distribution feeder, and addition of a grounding bank on the
transmission side.
PT
Distributed Generation(DG)
Figure 1-1. Illustration of the 3VO Requirement with Potential Transformer (PT) on the
Transmission Side
Figure 1-2. (a)Voltages Prior to Single-line-to-ground Fault (SLG), (b)During SLG with Breaker
Close, and (c)During SLG with Breaker Open
Methodology
Time domain simulation software (PSCAD™)2 is used for the assessment. Figure 2-1
shows a test circuit considered in this report for evaluation of ground fault
overvoltage in an islanded circuit. After DG (i.e. PV) reaches steady state condition,
a permanent single line to ground fault is initiated on delta side of substation
transformer. In five cycles, circuit breaker connected on faulted side of transformer
opens to clear the fault from the grid. The operation of the circuit breaker forms an
island with local loads and existing PVs. Single line to ground fault together with the
lack of grounding source makes delta side of transformer vulnerable to high
overvoltage.
Figure 2-1: Single Line Diagram of Studied Circuit with Single Inverter
A total of 28 Scenarios were identified, developed and tested for the study. The
scenarios are summarized in three tables, as follows:
1. Table 3-1 (Scenario 1 through 15). The objective of these scenarios is to
illustrate critical penetration level for different inverters, load locations, and
DG to load ratio.
Three inverters used for the study are commercially available; however,
manufacturer names and model numbers are replaced using arbitrary
designations for confidentiality.
Inverter#1: 250 kW, three-phase, UL-1741 certified
Inverter#2: 250 KW, three-phase, UL-1741 certified
Inverter#3: 1 MW, three-phase, UL-1741 certified
2
PSCAD/EMTDC is a commercial software package developed by the Manitoba HVDC Research Center.
Assumptions
The following assumptions apply to the modeling of scenarios and the simulations
conducted:
To obtain conservative results, active anti-islanding protections in inverters
and non-linearity of transformers (magnetizing and saturation) were
deactivated in all scenarios.
The external grid is modeled as an ideal source. This assumption also leads
to conservative results as infinite short circuit capability of the grid tends to
mask the fault for inverters.
The reactive portion of the load is tuned to minimize reactive power
mismatch in the island. This is likewise a conservative assumption. Note
that Pterra has studied many inverter models developed by leading vendors.
A common pattern observed in all studied models indicates that even small
amount reactive power mismatch is sufficient for such inverters to detect
islanding conditions.
The current chopping limit for the circuit breaker is at zero amps.
For clarity, simulation results are presented and discussed based on the group of
scenarios as summarized in Table 3-1, Table 3-2, and Table 3-3. All the simulation
plots are provided in Appendix 1.
QL QC
Q
PR
Where:
Q= Load’s quality factor
QL: Inductive power of the load
QC: Capacitive power of the load
PR: Resistive power of the load
It is generally more difficult to detect islanding condition when islanded load has a
high-quality factor and resonates close to the fundamental frequency. IEEE P1547.1
and IEEE Std.929, respectively, recommended islanding test procedure based on
load quality factors of unity and 2.5. The test requirement of Q<2.5 has been
determined to cover all reasonable distribution line configurations.
24 100 1 Inverter#2 12
25 100 2.5 Inverter#2 12
26 100 N/A1 Inverter#1 + Inverter#2 1.23
27 100 1 Inverter#1 + Inverter#2 1.183
28 100 2.5 Inverter#1 + Inverter#2 1.113
1) Load with high-quality factor is not in service in scenario#26. The load is modeled similar to scenarios in
Table 3-1 or Scenario 1-15
2) Inverter trip following islanding; No overvoltage was observed.
3) In scenario#26,27 and 28, inverter#2 trip almost instantaneously after islanding. Inverter#1 trip within .6s
after inverter#2.
b) Scenario 4 with Inverter#2, Permanent SLG fault initiates at t=1.2 s; circuit breaker opens after 5
cycles
c) Scenario 26 with Inverter 1 & 2, Permanent SLG fault initiates at t=1.2 s; circuit breaker opens after
5 cycles
Conclusions
Time domain simulations were performed for three commercial inverter models to
illustrate potential GFOV on delta side of delta-wye substation transformers due to
penetration of inverter based DG on wye side of transformer feeding distribution
feeders.
The following is a summary of the findings of this study based on the observed
results of simulations.
While inverters can potentially cause overvoltage on the delta side of the
substation transformer, some inverter designs can detect a single-line-to-
ground fault condition and trip instantaneously. Time domain simulation is a
potential tool for evaluating the fault detection capability of inverters for this
purpose.
According to ANSI/IEEE C62.92, the GFOV for an effectively grounded
system is to be limited to 138%. This value can also be used to limit the
overvoltage for ungrounded systems. Simulation results indicate that
overvoltage on the delta side of the study substation transformer peaks at
1.38 PU as the PV/load ratio approaches 65%. At penetration levels below
65%, no overvoltage is observed. Two important notes relate to this
finding:
a. The calculation for the load should account for those connected to the
transmission side as well as the distribution side of the isolated
system.
b. Though this ratio seems close to the threshold proposed by National
Grid (i.e. 67%), there is possibility of under counting the load if only
the distribution side load is considered.
The 65% penetration limit (based on 1.38 PU overvoltage threshold) can be
relaxed if:
a. Damage to equipment connected to delta side of the substation
transformer is the reason for requiring 3VO protection; and
b. Surge arresters connected to delta side of the substation transformer
are taken into account
Simulations conducted in this study with station class surge arresters
indicate that arresters can safely operate for penetration levels of up to
100%.
This report is not intended to impose pass-fail criteria for GFOV nor does it provide
basis for requiring 3VO protection due to GFOV. The intention is to add to the body
of knowledge on this topic and contribute to future pass-fail criteria that may be
Future Work
This study is phase 1 of an overall effort to provide technical clarity on the issue of
GFOV. A future aspect of study is:
Investigation of less expensive countermeasures for 3V0 requirement to
alleviate a potential GFOV issue. Such countermeasures could include, but
not limited to, protective relaying detection on the distribution side, detection
by the inverter, application of a grounding switch on distribution feeder, and
addition of a grounding bank on the transmission side.
4.2.1. Scenario#1
4.2.2. Scenario#2
4.2.4. Scenario#4
4.2.6. Scenario#6
4.2.8. Scenario#8
4.2.10. Scenario#10
4.2.12. Scenario#12
4.2.14. Scenario#14
4.2.16. Scenario#16
Delta Side Voltage with Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 29KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 24.4KV MCOV Surge Arrester -AE 250 KW
4.2.18. Scenario#18
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 29KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 24.4KV MCOV Surge Arrester -AE 250 KW
4.2.20. Scenario#20
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 29KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 24.4KV MCOV Surge Arrester -AE 250 KW
4.2.22. Scenario#22
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 29KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 22KV MCOV Surge Arrester -AE 250 KW
Delta Side Voltage with 24.4KV MCOV Surge Arrester -AE 250 KW
4.2.24. Scenario#24
Delta Side Voltage with Inverter#2; Load Quality Factor Equal to 2.5
4.2.26. Scenario#26
Delta Side Voltage with Combination of Inverter#1 and Inverter#2; Load with High
Quality Factor is Out of Service
4.2.27. Scenario#27
Delta Side Voltage with Combination of Inverter#1 and Inverter#2; Load Quality
Factor Equal to 1
4.2.28. Scenario#28
Delta Side Voltage with Combination of Inverter#1 and Inverter#2; Load Quality
Factor Equal to 2.5