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First Reset Signal On Computer Circuit

The document discusses the power and reset signals on a computer motherboard. It describes the sequence of signals needed for the system to power on and reset components. The RSMRST# signal indicates when the power, BIOS, and EC are ready. All power rails like +V_RTC need to be stable before components like the EC and chipset can function. Clock signals from the crystal oscillator and clock generator are enabled once power is stable to allow the CPU to start reading BIOS code and boot the system.

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Leth ComputerRepair
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92 views2 pages

First Reset Signal On Computer Circuit

The document discusses the power and reset signals on a computer motherboard. It describes the sequence of signals needed for the system to power on and reset components. The RSMRST# signal indicates when the power, BIOS, and EC are ready. All power rails like +V_RTC need to be stable before components like the EC and chipset can function. Clock signals from the crystal oscillator and clock generator are enabled once power is stable to allow the CPU to start reading BIOS code and boot the system.

Uploaded by

Leth ComputerRepair
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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FIRST RESET SIGNAL ON COMPUTER CIRCUIT

RSMRST#
When the Power,Bios,Ec are OK, the RSMRST# will go Hi. In the other word,this
pin go Low only when the systemreset.If BIOSdata is error,RSMRST# won’t go HI.
When SIO(EC) get +V_RTC
thecrystal will work.
1. RTC have to be oscillating(32.768KHz).
2. RTCRST# have to be high.
3. RSMRST# have to be inactive (high).
4. PWRBTN# have a trigger.
5. LOW_BAT# have to be inactive (high).
If this 5 present, then EC will recieve SLP_S3# / SLP_S5 from ICH/PCH, in the old
ICH or some deferent circuirity SLP_S3 and SLP_S5 will generate directly from
ICH,or both EC and PCH having this signal also.
When All+V?S/+V? powers are ready, PWR_GOOD will tie to high to turn on CPU
powers(+VCCP and +VCC_CORE).
SB/PCH Power good--->SB/PCH pwr_btn--->PCH RUN
SUSB# from PCH toSIO pull up the signal SLP_S3# The signal is used to shut
power off /on through logic gate transistor or IC
SUSC# from PCH to SIO pull up the signal SLP_S5# The signal is used to shut
power off /on through logic gate transistor or IC
ICH/SB,MCH & CPU Signal Checking
IMVP_PWRGD => CLK_ENABLE# => RESET_OUT#=> ICH_PWRGD => PLTRST# =>
PCI_RST=> H_PWRGOOD
CPU generate the first cycle to read the BIOS code
CPU bus DMI LPC SPI
CPU ===> GMCH===> ICH===>SIO ===> BIOS
CPU MASTER POWER
VR_ON Enable--->+VCCORE 08VS to 1,5VS
Memory +VTT and +V1.5VS (DDR3) is ok, the PGOOD VTT_PWRGD pull high to
CPU first than ICH will tie H_PWRGD to high ,then NB will tie CPURST# to reset
CPU.
Crystal clock Oscilator CLOCK SUMMARY
(1) 32.768KHz to SIO Required +V_RTC and to ICH(chipset) also Required +V_RTC
(2) 49.152MHz to (audio controller) Required +V3S
(3) 27MHz to Graphic chip (video controller )Required +V3S
(4) 14.318MHz to (clock Generator) Required +V3S
Make sure crystal is oscillating for EC(SIO),SB/ICH/PCH and VGA or it will no post
Clock Generator
Elementary required
1) Power : +V3S
(2) Crystal : 14.318MHz
(3) Control : PCISTOP# , CPUSTOP#_ is HI
When +VCC_CORE is ready, CLKEN#will go high to enable clock-Generator and
turn all clock.
PCI_STOP# and CPU_STOP# must beat high otherwise some clocks will be turned
off.
Clock out -->SIO(EC)-->PCH/SB-->NB-->CPU
LPC_Frame-->SB output signal is high
Note High signal can be identified by measuring 3.3V available
Power by experiences of adiedkhaz

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