Department of Electrical Engineering: First Year E.T. Lab EXP. NO. - 4
Department of Electrical Engineering: First Year E.T. Lab EXP. NO. - 4
OBJECTIVES:
BALANCED LOAD
CIRCUIT DIAGRAM
(A) Resistive Circuit:
Fig.1
PROCEDURE:
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OBSERVATION TABLE – 1 (Three phase power in a balanced resistive load)
Fig.2
PROCEDURE:
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OBSERVATION TABLE – 2 (Three phase power in a balanced capacitive load)
Sl. VL I1 I2 I3 W1 W2
No. Error=
(V) (A) (A) (A) (W) (W)
(W1 + W2)
UNBALANCED LOAD
CIRCUIT DIAGRAM
(A) Resistive Circuit:
Fig.3
PROCEDURE:
6. For any one above situation, measure the voltage between neutral and the star point of
the rheostat connection and note it down.
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OBSERVATION TABLE – 3 (Three phase power in an unbalanced resistive load)
(B)Capacitive Circuit:
Fig.4
PROCEDURE:
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OBSERVATION TABLE – 4 (Three phase power in an unbalanced load with capacitor)
70uF
35uF
DISCUSSION:
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