FAN7340 — LED Backlight Driving Boost Switch

April 2012

FAN7340
LED Backlight Driving Boost Switch
Features Description
 Single-Channel Boost LED Switch The FAN7340 is a single-channel boost controller that
integrates an N-channel power MOSFET for PWM
 Internal Power MOSFET for PWM Dimming:
dimming using Fairchild’s proprietary planar Double-
RDS(on) = 3.4Ω at VGS=10V, BVDSS=400V diffused MOS (DMOS) technology.
 Current Mode PWM Control The IC operates as a constant-current source for driving
 Internal Programmable Slope Compensation high-current LEDs.
 Wide Supply Voltage Range: 10V to 35V
It uses Current Mode control with programmable slope
 LED Current Regulation: ±1% compensation to prevent subharmonic oscillation. The IC
 Programmable Switching Frequency provides protections including: open-LED protection,
 Analog and PWM Dimming over-voltage protection, and direct-short protection for
high system reliability.
 Wide Dimming Ratio: On Time=10µs to DC
 Cycle-by-Cycle Current Limiting The IC internally generates a FAULT signal with delay if
 Thermal Shutdown: 150°C an abnormal LED string condition occurs. PWM dimming
and analog dimming functions can be implemented
 Open-LED Protection (OLP)
independently. Internal soft-start prevents inrush current
 Over-Voltage Protection (OVP) flowing into output capacitor at startup.
 Over-Current Protection (OCP)
 Error Flag Generation (for External Load Switch)
 Internal Soft-Start
 16-Lead SOIC Package

Applications
 LED Backlight for LCD TV
 LED Backlight for LCD Monitor
 LED Lighting

Ordering Information
Operating
Packaging
Part Number Temperature Package
Method
Range
FAN7340M Rail
-40°C to +125°C 16-Lead, Small-Outline Integrated Circuit (SOIC)
FAN7340MX Tape & Reel

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 FAN7340 — LED Backlight Driving Boost Switch
Block Diagram

Figure 1. Internal Block Diagram

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 FAN7340 — LED Backlight Driving Boost Switch
Pin Assignments

Figure 2. Package Diagram

Pin Definitions
Pin # Name Description
1 VCC This pin is the supply voltage of the IC.
2 DRV This pin is the gate drive signal of the boost switch.
3 GND This pin is the ground of the IC.
This pin is for sensing the current flowing through an external MOSFET. It includes a built-in
300ns blanking time. The peak of the current flowing through the MOSFET is limited to this
4 CS
pin voltage. Slope compensation of the boost controller can be programmed through the
series resistor of this pin.
5 REF This pin is the 5V reference voltage pin. Maximum current capability is 3mA.
This pin is for indicating the fault signal. This pin is connected to the open drain. When OLP
6 FAULT
protection is occurred, the FAULT pin is pulled HIGH.
7 RT Oscillator frequency set of the boost switch (50kHz ~ 300kHz).
This pin is for sensing the current flowing through the LEDs. A sensing resistor is connected
8 SENSE from this pin to ground. This pin is connected to the negative input of the internal error
amplifier.
9, 10 DRAIN Drain pin of PWM dimming power MOSFET.
Enable input pin. If voltage of this pin is higher than 1.22V, IC is starting to operate. If the
12 ENA
voltage of this pin is lower than 1.15V, the IC stops operating.
Over-voltage protection input pin. Output voltage of the boost circuit is connected to this pin
13 OVP
through a resistor divider circuit. If this pin voltage is higher than 3V, OVP is triggered.
This pin is the error amplifier output. Typically, a compensation capacitor and resistor are
14 CMP
connected to this pin from the ground.
This pin is for setting the current flowing through the LEDs. This pin is connected to the
15 ADIM
positive inputs of the internal error amplifier. Linear voltage range of ADIM is 0.3V~3.0V.
This pin is for the burst dimming signal. If this pin voltage is HIGH, the internal dimming
16 BDIM
MOSFET is turned on. If this pin voltage is LOW, the dimming MOSFET is turned off.
Note:
1. Pin 11 is a “No Connect” pin (not shown in Figure 2).

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com

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 FAN7340 — LED Backlight Driving Boost Switch
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In
addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.

Symbol Parameter Min. Max. Unit

VCC Supply Voltage 10 35 V
TA Operating Temperature Range -40 +125 C
TJ Junction Temperature +150 C
TSTG Storage Temperature Range -65 +150 C
(2, 3)
ӨJA Thermal Resistance Junction-to-Ambient 120 C/W
PD Power Dissipation 0.9 W
Notes:
2. Thermal resistance test board; size 76.2mm x 114.3mm x 1.6mm (1S0P); JEDEC standard: JESD51-2, JESD51-3.
3. Assume no ambient airflow.

Pin Breakdown Voltage

Pin # Name Value Unit Pin # Name Value Unit
1 VCC 35 V 9 DRAIN 400 V
2 DRV 20 V 10 DRAIN 400 V
3 GND V 11 N/A V
4 CS 6 V 12 ENA 6 V
5 REF 6 V 13 OVP 6 V
6 FAULT 35 V 14 CMP 6 V
7 RT 6 V 15 ADIM 6 V
8 SENSE 6 V 16 BDIM 6 V

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com

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 FAN7340 — LED Backlight Driving Boost Switch
Electrical Characteristics
For typical values, TA = 25°C and VCC = 15V unless otherwise specified. Specifications to -40°C ~ 125°C are
guaranteed by design based on final characterization results.

Symbol Parameter Condition Min. Typ. Max. Unit

Supply Voltage Section
VCC Input DC Supply Voltage Range(4) 10 35 V
ISD Shutdown Mode Supply Current BDIM Connected to GND 2 4 mA
Under-Voltage Lockout Section
Vth Start Threshold Voltage 8.3 9.0 9.7 V
Vth,hys Start Threshold Voltage Hysteresis 0.5 1.0 1.5 V
Ist Standby Current VCC=Vth-0.2 200 300 μA
ON/OFF Section
Von On-State Input Voltage 2 5 V
Voff Off-State Input Voltage 0.8 V
Error Amplifier Section
Gm Error Amplifier Transconductance(4) VADIM=1V 100 300 500 µmho
(4)
AV_ro Error Amplifier Output impedance 20 MΩ
AV Error Amplifier Open-Loop Gain(4) 60 dB
Voffset Input Offset Voltage VADIM=1V -10 10 mV
Isin CMP Sink Current VADIM=1V, VSENSE=2V 100 200 300 µA
Isur CMP Source Current VADIM=1V, VSENSE=0V 100 200 300 µA
VIDR Input Differential Voltage Range 0 3 V
VO Output Voltage Range 0.7 4.0 V
Oscillator Section
Min. 50 kHz
fosc Boost Oscillator Frequency RT=100kΩ 190 200 210 kHz
Max. 300 kHz
(4)
Dmax Maximum Duty Cycle 86 90 94 %
Reference Section
VREF 5V Regulation Voltage 4.9 5.0 5.1 V
VREF,Line 5V Line Regulation 25 mV
VREF,Load 5V Load Regulation 0<I5<3mA 25 mV
PWM Dimming Section
VPDIM,L PWM Dimming Input Low Voltage 0.8 V
VPDIM,H PWM Dimming Input High Voltage 2 5 V
RPDIM PWM Dimming Pull-Down Resistance 100 160 220 kΩ
FET Section (for Dimming)
BVDSS Drain-Source Breakdown Voltage(4) VCC=0V, ID=250μA 400 V
IDSS Zero-Gate-Voltage Drain Current(4) VDS=250V, TA=25°C 1 30 µA
RDS(ON) Drain-Source On-State Resistance VGS=10V, ID=1A 3.4 Ω
(4)
CISS Input Capacitance VDS=25V, VGS=0V, f=1MHz 173 225 pF
COSS Output Capacitance(4) VDS=25V,VGS=0V, f=1MHz 30 40 pF
Continued on the following page…

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 FAN7340 — LED Backlight Driving Boost Switch
Electrical Characteristics (Continued)
For typical values, TA = 25°C and VCC = 15V, unless otherwise specified. Specifications to -25°C ~ 85°C are
guaranteed by design based on final characterization results.

Symbol Parameter Condition Min. Typ. Max. Unit

Output Section (Boost / Dimming)
VDRV Gate Output Voltage VCC=15V 10.8 11.8 12.8 V
Vuv Gate Output Voltage Before Startup -0.5 0.5 V
Idsur Gate Output Drive Source Current(4) 80 180 280 mA
Idsin Gate Output Drive Sink Current(4) 80 180 280 mA
(4)
trh Gate Output Rising Time (Boost) CL=2.0nF 200 ns
(4)
tfl Gate Output Falling Time (Boost) CL=2.0nF 120 ns
Current Sense Section
tblank Leading-Edge Blanking(4) 150 300 450 ns
Delay to Output of Current-Limit
tdelay,cl 180 ns
Comparator(4)
Offset Voltage of Current-Limit
Voffset,clc -20 20 mV
Comparator(4)
Slope Compensation Section
Islope Ramp Generator Current 36 45 54 µA
(4)
Rslope Slope Compensation Resistor 5 kΩ
Soft-Start Section
tss Soft-Start Period(4) fosc=200kHz 3 ms
Protection Section
Delay for Triggering Over-Voltage
td,ovp.tr 15 20 25 µs
Protection(4)
Delay for Releasing Over-Voltage
td,ovpr 10 14 18 µs
Protection(4)
td.ocp Delay for Over-Current Protection(4) 1 µs
Auto-Restart Time for Over-Current
tAR fosc=200kHz 640 µs
Protection(4)
td,olpi Delay for Triggering Open-LED Protection(4) 3 5 7 µs
td,olp Delay for Open-LED Protection fosc=200kHz 40.96 ms
Vth,ovp Over-Voltage Protection Threshold Voltage 2.85 3.00 3.15 V
Vhys,ovp Over-Voltage Protection Voltage Hysteresis 0.1 V
Boost Switch Current Limit Threshold
Vth.csocp 0.45 0.50 0.55 V
Voltage
1.4 4.0
LED Over-Current Protection Threshold
Vth,ocp (Min. 4.0xVADIM (Max. V
Voltage
Clamp) Clamp)
Vth,olp Open-LED Protection Threshold Voltage(4) 0.15 0.20 0.25 V
(4)
TSD Thermal Shutdown Temperature 140 150 160 °C
(4)
THYS Thermal Shutdown Hysteresis 20 °C
Notes:
4. These parameters, although guaranteed, are not tested in production.

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 FAN7340 — LED Backlight Driving Boost Switch
Typical Performance Characteristics

9.9 1.7

9.7 1.5
9.5
1.3
9.3

Vth.hys, [V]
1.1
Vth, [V]

9.1
8.9 0.9
8.7
0.7
8.5
0.5
8.3
8.1 0.3

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 3. Start Threshold Voltage vs. Temperature Figure 4. Start Threshold Voltage Hysteresis
vs. Temperature

350 4.5

4
300
3.5
250
3
ISD, [mA]
Ist, [uA]

200 2.5

2
150
1.5
100
1

50 0.5

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 5. Standby Current vs. Temperature Figure 6. Shutdown Mode Supply Current vs.
Temperature

1.4 1.3

1.35 1.25
1.3
1.2
1.25
Voff, [V]
Von, [V]

1.15
1.2
1.1
1.15

1.1 1.05

1.05 1

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 7. On-State Input Voltage vs. Temperature Figure 8. Off-State Input Voltage vs. Temperature

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 FAN7340 — LED Backlight Driving Boost Switch
Typical Performance Characteristics (Continued)

600 14

500 10

6
400

Voffset, [mV]
Gm, [umho]

2
300
-2
200
-6
100
-10

0 -14
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]

Figure 9. Error Amplifier Transconductance Figure 10. Input Offset Voltage vs. Temperature
vs. Temperature

350 350

300 300

250 250
Isur, [uA]
Isin, [uA]

200 200

150 150

100 100

50 50

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 11. CMP Sink Current vs. Temperature Figure 12. CMP Source Current vs. Temperature

215 96

210 94

205 92
fOSC, [KHz]

Dmax, [%]

200 90

195 88

190 86

185 84
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]

Figure 13. Boost Oscillator Frequency vs. Temperature Figure 14. Maximum Duty Cycle vs. Temperature

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Typical Performance Characteristics (Continued)

5.15 1.8

5.1 1.7

5.05 1.6

VPDIM,H, [V]
VREF, [V]

5 1.5

4.95 1.4

4.9 1.3

4.85 1.2

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 15. 5V Regulation Voltage vs. Temperature Figure 16. PWM Dimming Input High Voltage
vs. Temperature

1.7 240

220
1.6
200
1.5
RPDIM, [Kohm]

180
VPDIM,L, [V]

1.4 160

140
1.3
120
1.2
100

1.1 80

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 17. PWM Dimming Input Low Voltage Figure 18. PWM Dimming Pull-Down Resistance
vs. Temperature vs. Temperature

13.5 300

13
250

12.5
Idsin, [mA]

200
VDRV, [V]

12
150
11.5

100
11

10.5 50

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 19. Gate Output Voltage vs. Temperature Figure 20. Gate Output Drive Sink Current
vs. Temperature

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Typical Performance Characteristics (Continued)

55 0.85

0.8
51
0.75

0.7
47
Islope, [uA]

tAR,[mS]
0.65
43 0.6

0.55
39
0.5

35 0.45

-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125

Temperature, [℃] Temperature, [℃]

Figure 21. Ramp Generator Current vs. Temperature Figure 22. Auto-Restart Time for OCP
vs. Temperature

3.2
0.2
3.15

3.1 0.16
3.05
Vhys,ovp,[V]
Vth,ovp,[V]

0.12
3

2.95 0.08
2.9
0.04
2.85

2.8 0
-50 -25 0 25 50 75 100 125 -50 -25 0 25 50 75 100 125
Temperature, [℃] Temperature, [℃]

Figure 23. OVP Threshold Voltage vs. Temperature Figure 24. OVP Hysteresis Voltage vs. Temperature

55

50

45
td,olp,[mS]

40

35

30

25

-50 -25 0 25 50 75 100 125

Temperature, [℃]

Figure 25. Delay for Over-Current Protection vs. Temperature

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Functional Description

The FAN7340 operates as a constant-current source for

driving high-current LEDs. It uses Current-Mode control
with programmable slope compensation to prevent sub-
harmonic oscillation.
The IC provides protections such as open-LED
protection, over-voltage protection, and over-current
protection for improved system reliability. The IC
internally generates a FAULT OUT signal with a delay in
case an abnormal LED string condition occurs. PWM
dimming and analog dimming functions can be
implemented independently. Internal soft-start prevents
inrush current flowing into output capacitor at startup.
Circuit operation is explained in the following sections. Figure 26. Soft-Start Waveforms
VCC Under-Voltage Lockout (UVLO) LED Current Setting
An internal regulator provides the regulated 5V used to During the boost converter operating periods, the output
power the IC. The Under-Voltage Lockout (UVLO) turns LED current can be set by equation:
off the IC in the event of the voltage dropping below the
specific threshold level. The UVLO circuit inhibits ADIM V
I (3)
powering the IC until a voltage reference is R 60mΩ
established ,up to predetermined threshold level.
where ADIM(V) is
Enable ADIM pin applied voltage and, RSENSE is the sensing
Applying voltage higher than 1.22V (typical) to the ENA resistor value. An additional 60mΩ comes from an
pin enables the IC. Applying voltage lower than 1.15V internal wire bonding resistor. To calculate LED
(typical) to the ENA pin disables the IC. If ENA pin current precisely, consider the wire bonding resistor.
voltage is higher than 1.22V (typical) and VCC is higher
than 9.0V (typical.), the IC starts to supply 5V reference Analog Dimming and PWM Dimming
voltage from VCC. Analog dimming is achieved by varying the voltage level
Oscillator (Boost Switching Frequency) at the ADIM pin. This can be implemented either with a
potentiometer from the VREF pin or from an external
Boost switching frequency is programmed by the value voltage source and a resistor divider circuit. The ADIM
of the resistor connected from the RT pin to ground. RT voltage level is adjusted to be the same as the feedback
pin voltage is set to 2V. The current through the RT pin level (VSENSE). A VADIM range from 0.3V to 3V is
resistor determines boost switching frequency according recommended.
to formula:
PWM dimming (BDIM) helps achieve a fast PWM
f kHz (1) dimming response in spite of the shortcomings of the
.
boost converter. The PWM dimming signal controls three
Soft-Start Function at Startup nodes in the IC; gate signal to the switching FET, gate
signal to the dimming FET, and output connection of the
During initial startup, the switching device can be trans-conductance amplifier. When the PWM dimming
damaged due to the over-current coming from the input signal is HIGH, the gates of the switching FET and
line by the negative control. This can result in the initial dimming FET are enabled. At the same time, the output
overshoot of the LED current. Therefore, during initial of the transconductance ap-amp is connected to the
startup, the soft-start control gradually increases the duty compensation network. This allows the boost converter
cycle so that the output voltage can rise smoothly to to operate normally.
control inrush current and overshoot.
FAN7340 adapts the soft-start function in the boost
Dynamic Contrast Ratio
converter stage. During soft-start period, boost switch The Dynamic Contrast Ratio (DCR) means the maximum
turn-on duty is limited by clamped CMP voltage. The contrast ratio achievable by adjusting the amount of light
soft-start period is dependent on boost switching (dimming) of the screen instantaneously using the
frequency, which is decided by the RT resistor (Equation backlight during the extremely short period of time.
1). Soft-start period is set to be cumulative time when the FAN7340 can normally drive the LED backlight under
BDIM (PWM dimming) signal is HIGH: 0.1% dimming duty cycle at 200Hz dimming frequency.
Even operating at 5µs-dimming FET turn-on time and
T 600 / f sec (2) extremely low dimming duty, FAN7340 can operate
LEDs with normal peak current level.

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 FAN7340 — LED Backlight Driving Boost Switch
Internal Dimming MOSFET
A dimming MOSFET (400V N-channel MOSFET; such
as FDD3N40) is incorporated in the FAN7340. The
power transistor is produced using Fairchild’s
proprietary, planar stripe, DMOS technology. This
advanced technology is tailored to minimize on-state
resistance (RDS(on)=3.4), to provide superior switching
performance. This device is suited for high-efficiency
SMPS and shows desirable thermal characteristic during
operation. To prevent initial LED current overshoot at low
VADIM levels, gate resistance of the internal dimming FET
is designed as 5kexperimentally. Figure 27. Slope Compensation Block Diagram

Feedback Loop Compensation Cycle-by-Cycle Over-Current Protection

Stable closed-loop control can be accomplished by In boost topology, the switch can be damaged in
connecting a compensation network between COMP and abnormal conditions (inductor short, diode short, output
GND. The compensation needed to stabilize the short). It is always necessary to sense the switch current
converter can be either a Type-I circuit (a simple to protect against over-current failures. Switch failures
integrator) or a Type-II circuit (and integrator with and due to excessive current can be prevented by limiting Id.
additional pole-zero pair). The type of the compensation
circuit required is dependent on the phase of the power
stage at the crossover frequency.
FAN7340 adopts a Type-II compensator circuit.

Programmed Current Control

FAN7340 uses a Current-Mode control method. Current-
Mode control loops: an outer feedback loop that senses
output voltage (current) and delivers a DC control
voltage to an inner feedback loop, which senses the
peak current of the inductor and keeps it constant on a
pulse-by-pulse basis. One of the advantages of the Figure 28. Cycle-by-Cycle OCP Circuit
Current-Mode control is line/load regulation, which is When the voltage drops at R1 and RS exceed a
corrected instantaneously against line voltage changes threshold of approximately 0.5V, the power MOSFET
without the delay of an error amplifier. over-current function is triggered after minimum turn-on
Programmable Slope Compensation time or LEB time (300ns).
When the power converter operates in Continuous The peak voltage level at CS terminal:
Conduction Mode (CCM), the current programmed
controller is inherently unstable when duty is larger than V _ 45μ R R DT i R (4)
50%, regardless of the converter topology. The Choose the boost switch current-sensing resistor (RCS):
FAN7340 uses a Peak-Current-Mode control scheme 0.25
with programmable slope compensation and includes an R (5)
i _
internal transconductance amplifier to accurately control
the output current over all line and load conditions.
Open-LED Protection (OLP)
An internal Rslope resistor (5kΩ) connected to sensing After the first PWM dimming-HIGH signal, the feedback
resistor RS and an external resistor R1 can control the sensing resistor (RSENSE) starts sensing the LED
slope of VSC for the slope compensation. Although the current. If the feedback voltage of the SENSE pin drops
normal operating mode of the power converter is DCM, below 0.2V, the OLP triggers to generate an error flag
the boost converter operates in CCM in the case of rapid signal. Because OLP can be detected only in PWM
LED current increase. As a result, slope compensation dimming-HIGH; if OLP detecting time is over 5μs, PWM
circuit is an important feature. dimming signal is pulled HIGH internally regardless of
The value of an external series resistor (R1) can be external dimming signal. If OLP signal continues over
blanking time, an error flag signal is triggered.
programmed by the user. In normal DCM operation, 5kΩ
is recommended. OLP blanking time is dependent on boost switch
frequency per Equation 6. FAULT OUT signal is made
through the FO pin, which needs to be connected 5V
reference voltage through a pull-up resistor. In normal
operation, FO pin voltage is pulled down to ground. In
OLP condition, FO pin voltage is pulled HIGH.
t . 8192 / f sec (6)

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 FAN7340 — LED Backlight Driving Boost Switch
In system operation, OLP is triggered in only direct-short
condition. Direct short means that some point of the LED LED Over-Current Protection (OCP)
string is shorted to set ground. In direct-short condition, The primary purpose of the over-current protection
the boost controller cannot control the LED current and a function is to protect the internal dimming MOSFET from
large current flows into the LED string directly from input excessive current. The OCP is triggered when the
power. To prevent this abnormal condition, the FO signal feedback voltage meets the clamping level (1.4V ~ 4V)
is used to turn off input power or the total system. FO of the ADIM voltage x4. At 1μs delay after the OCP is
signal is only triggered in OLP condition. triggered, the IC turns off both the boost FET and
dimming FET and restarts the gate signal every tAR
automatically. tAR can be calculated as:

128 / f sec (7)

1. When VADIM=0.3V (VADIMx4=1.2V).

2. OCP threshold level is set to 1.4V.
3. OCP is triggered at feedback voltage level = 1.4V.

VSENSE=1.4V
VSENSE

VADIM=0.3V
Figure 29. Open-LED Protection
In LED open load condition, OVP is triggered ahead of GATE
OLP.

Over-Voltage Protection (OVP) Figure 32. OCP Waveforms at VADIM=0.3V

Over-voltage protection is triggered when the voltage of
the external output voltage trip point meets 3V. After 1. When VADIM=0.8V (VADIMx4=3.2V).
triggering OVP, the dimming switch and boost switch are 2. OCP threshold level is set to 3.2V.
turned off. The protection signal is recovered when the
output voltage divider is below 2.9V. 3. OCP is triggered at VSENSE = 3.2V.

Figure 33. OCP Waveforms at VADIM=0.8V

Figure 30. Over-Voltage Trip Point 1. When VADIM=1.2V (VADIMx4=4.8V).
2. OCP threshold level is set to 4.0V.
3. OCP is triggered at VSENSE = 4.0V.

Figure 31. OVP Trigger and Release

GATE

Figure 34. OCP Waveforms at VADIM=1.2V

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FAN7340 • 1.0.0 13
 SLC1012C — LED Backlight Driving Boost Switch
Typical Application Circuit (Boost Topology for LED Backlight)
Output current
Application Input Voltage Range Rated Output Power LED
(Rated Voltage)
LED Backlight TV 120VDC 10% 250mA (230V) 72-LEDs/1-String

Features
 High Efficiency
 Constant Current Boost Converters
 High-Voltage, High-Current LED Driving

Typical Application Circuit

D1 CN2
CN1 L1
1 200uH/PC44 1
Vin 2 2 N.C
Vin 3 C1 3 N.C
Vin 4 22uF/160V FFD04H60S 4 VLED
GND 5 5 VLED
GND 6 C2 6 LED1
GND DSP LED2
R1 10R
CON6 47uF/400V R2 CON6
R21 300k
330k Q1 D2 1SS355 R9 0R
FPDF7N50NF 0
R4 R5
100K IC1 300k
R22
330k VCC 1 16 R6
VCC BDIM BDIM
ENA 300k
R7 OVP
C12 R23 D3 5.1k
2 15
1.2n
FAN7340
0.2R/1W

10k 1N4148 DRV ADIM ADIM

C13 R10
R8

1.2n 11k
3 14
GND CMP
On/Of f
C5
CN3 0 open 4 13 OVP R11
1 CS OVP C6
VCC VCC 15k
2 6.8n
GND 3 C3 C4
FO 4 FO 5 12
1u C7
BDIM 5 10uF/50V REF ENA
ADIM 100n
6 C8 R19
On/Of f 10n 10k
CON6 6
FO FO ENA

TP1 R12
On/Of f 100K 7 10
RT DRAIN
ADIM
R13 3.9K R14 R20
TP 20K 100k 8 9
R15 C10 SENSE DRAIN
220K 1.2n

R16
2.7R/1W FAN7340
BDIM
R17 3.9K
Vin : 120V
R18 C11 Vout : 230V
220K 1.2n
Output current : 250mA
Switching frequency : 200kHz
0

Figure 35. Typical Application Circuit

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7340 • 1.0.0
 FAN7340 — LED Backlight Driving Boost Switch
Physical Dimension

10.00
9.80 A

8.89

16 9
B 1.75

6.00 4.00 5.6

3.80

1 8
PIN ONE
INDICATOR 1.27 0.51
0.35 1.27 0.65
(0.30) 0.25 M C B A LAND PATTERN RECOMMENDATION

1.75 MAX
1.50 SEE DETAIL A
1.25
0.25 0.25
C
0.10 0.19
0.10 C

0.50
0.25 X 45°
NOTES: UNLESS OTHERWISE SPECIFIED
(R0.10)
GAGE PLANE A) THIS PACKAGE CONFORMS TO JEDEC
(R0.10) MS-012, VARIATION AC, ISSUE C.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD
8° 0.36
FLASH AND TIE BAR PROTRUSIONS
0° D) CONFORMS TO ASME Y14.5M-1994
E) LANDPATTERN STANDARD: SOIC127P600X175-16AM
F) DRAWING FILE NAME: M16AREV12.

0.90 SEATING PLANE

0.50
(1.04)

DETAIL A
SCALE: 2:1

Figure 36. 16-Lead, Small Outline Integrated Circuit (SOIC)

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/packaging/.

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7340 • 1.0.0 15
 FAN7340 — LED Backlight Driving Boost Switch

© 2012 Fairchild Semiconductor Corporation www.fairchildsemi.com

FAN7340 • 1.0.0 16