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HP Pavilion DV5 DV5-1200 DV5-1222ER - QUANTA QT8G - REV 1A

1. This document is a system diagram for the QT8G system. It shows the 8 layer PCB stack up and location of key components. 2. The main components include an AMD Lion Sabie Griffin 638P processor, DDR2 memory, RX781 northbridge, M86-ME southbridge, video outputs like HDMI and VGA, audio ports, and connectivity ports like USB, LAN, and mini PCI-E slots. 3. The diagram also outlines the location of components like the CPU thermal sensor, clock generators, SATA ports, and docking connectors across the 8 PCB layers.

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Roberto Moura
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0% found this document useful (0 votes)
183 views46 pages

HP Pavilion DV5 DV5-1200 DV5-1222ER - QUANTA QT8G - REV 1A

1. This document is a system diagram for the QT8G system. It shows the 8 layer PCB stack up and location of key components. 2. The main components include an AMD Lion Sabie Griffin 638P processor, DDR2 memory, RX781 northbridge, M86-ME southbridge, video outputs like HDMI and VGA, audio ports, and connectivity ports like USB, LAN, and mini PCI-E slots. 3. The diagram also outlines the location of components like the CPU thermal sensor, clock generators, SATA ports, and docking connectors across the 8 PCB layers.

Uploaded by

Roberto Moura
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 46

1 2 3 4 5 6 7 8

PCB STACK UP
QT8G SYSTEM DIAGRAM 01
DDRII-SODIMM1 DDRII 667/800 MHz
LAYER 1 : TOP AMD Lion CPU THERMAL
LAYER 2 : SGND PAGE 7,8 Sabie SENSOR
A LAYER 3 : IN1 Griffin 14.318MHz A
S1G2 Processor PAGE 5
LAYER 4 : IN2 DDRII-SODIMM2 DDRII 667/800 MHz
638P (uPGA)/35W
LAYER 5 : VCC PAGE 7,8 PAGE 3,4,5,6 CPU_CLK
LAYER 6 : IN3 NBGFX_CLK CLOCK GEN
LAYER 7 : SGND1 NBGPP_CLK ICS9LPRS476AKLFT-->HP
LAYER 8 : BOT SBLINK_CLK SLG8SP626VTR-->HP
HT3 RTM880N-795 -->HP
PAGE 2
PCI-Express 16X
PCI-E 10 PCI-E WLAN Card x1
PAGE 36
Cable VGA X1 X1 X3 NORTH BRIDGE HDMI
Docking RJ-45 PAGE 23 11 TV-TUNER Card x1
LAN Express Mini PCI-E
RX781 A13
CIR/Pwr btn Realtek Card Card
PAGE 36

SPDIF Out PCIE-LAN CRT 7


(NEW CARD) M86-ME Express Card x1
Stereo MIC RTL8102E/8111C (Wireless LAN/TV
21mm X 21mm, 528pin BGA
PAGE 24 PAGE 33
TUNNER)
B B

Headphone Jack (10/100/GagaLAN) 64 Bit,DDR2*4


4
USB Port PAGE 31,32 PAGE 33 PAGE 36 LVDS PAGE 17,18,19
Cable Docking x1
VOL Cntr PAGE 8,9,10,11, PAGE 23
20,21,22,23
PAGE 37
PAGE 37
RJ45 SBSRC_CLK
ALINK X4
PAGE 31
SYSTEM CHARGER(ISL6251A) USB2.0
PAGE 44
TWO SATA - HDD
SATA0,1 150MB 1,8,9 5 2 6 3
USB2.0 Ports Blueflame Webcam Fingerprint Flash Media Touch Screen
PAGE 33 SOUTH BRIDGE for UMA only for Discrete
SYSTEM POWER ISL6236IRZA-T X3 PAGE 30 PAGE 30 X1 PAGE 30 PAGE 30
RTS5158 only
PAGE 38 SB700 A12
SATA - CD-ROM
SATA0 150MB PAGE 25

DDR II SMDDR_VTERM PAGE 33


21mm X 21mm, 528pin BGA PCIE BUS JMICRON
4.5W(Ext) JMD380 for
1.8V/1.8VSUS(TPS51116REGR)
Discrete
C PAGE 41
E-SATA
SATA4 150MB 4.3W(Int)
only C
Azalia
PAGE 30 PAGE 12,13.14.15.16 PAGE 27
VCCP +1.1V AND +1.2V(MAX8717)
SMBUS
PAGE 39
Accelerometer
IDT
LIS3LV02DL PAGE 28 LPC 92HP61B7
VGACORE(1.1V~1.2V)Oz8118 MDC CONN PAGE 27
PAGE 42 Keyboard PAGE 34
PAGE 29
Touch Pad PAGE 34 ENE KBC IEEE1394 Memory
connect for CardReader
Discrete
CPU CORE ISL6265A CIR (AUDIO CONN) KB3926 Cx AUDIO
only
PAGE 40 PAGE 27 Amplifier
TPA6017A2 PAGE 26 PAGE 25

SMBUS TABLE Capacitive Sense PAGE 35


PAGE 28
Clock gen/Robson/TV tuner SW PAGE 34
SB--SCL0/SD0 /DDR2/DDR2 thermal/Accelerometer +3V
D D
Digital MIC AUDIO CONN Audio
epress card (Phone/ MIC) Conn
Wlan Card +3VS5 PAGE 30 PAGE 27 PAGE 28
FAN SPI PROJECT : QT8
EC --SCL/SD Battery charge/discharge +3VPCU Quanta Computer Inc.
EC--SCL2/SD2 VGA thermal/system thermal +3V
PAGE 37 PAGE 35 Size Document Number Rev
Custom 1A
Block Diagram
NB5/RD5
Date: Friday, August 29, 2008 Sheet 1 of 46
1 2 3 4 5 6 7 8
5 4 3 2 1

+1.2V L61

600 ohms@100Mhz
60 ohm, 0.5A
BLM18PG181SN1D(180,1.5A)_6

C535
10U/6.3V_8
C530
0.1U/10V_4
C508
0.1U/10V_4
C538
+1.2V_CLKVDDIO

C533
0.1U/10V_4 0.1U/10V_4
C486
0.1U/10V_4
C527
0.1U/10V_4
CLOCKS name

NBGFX_CLKP
NBGFX_CLKN
RX780

RP64 STUFF
RS780

RP64 STUFF
Clock pin function

to NB for VGA reference clock 02


EXT_GFX_CLKP RP66 STUFF RP66 NC to M82-S external reference clock -RX780 only
EXT_GFX_CLKN

DCR: 0.5 ohm NBGPP_CLKP to NB for RX780 for PCIEX2 interface reference clock only
D +3V_CLKVDD D
600 ohms@100Mhz NBGPP_CLKN RP70 STUFF RP70 NC RS780 is internal share with AC-LINK clock,RS780 not need
60 ohm, 0.5A
L63 +3V_CLKVDD
+3V
BLM18PG181SN1D(180,1.5A)_6
SBLINK_CLKP to NB for AC-LINK reference clock
C554 C480 C481 C524 C534 C520 C501 C483 C479 C477 SBLINK_CLKN RP72 STUFF RP72 STUFF
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

CLK_VGA_27M_SS R653,R656,R612 R653,R656,R612 To M82-S 27Mhz - RX780 only


Place very CLK_VGA_27M_NSS STUFF NC
+3V_CLKVDD close to
C/G
L54 +3V_CLK_VDDA Place within 0.5" R208 *261_4
BLM18PG181SN1D(180,1.5A)_6 U13A
of CLKGEN
C471 C493 49 56 CPUCLKP RP30 4 3 *0_4P2R_4 CPUCLKP
VDDA CPUKG0T_LPRS CPUCLKP 3
10U/6.3V_8 0.1U/10V_4 48 55 CPUCLKN 2 1 CPUCLKN
GNDA CPUKG0C_LPRS CPUCLKN 3
+3V_CLK_VDDA 62 33 NBGFX_CLKP RP38 4 3 *0_4P2R_4 NBGFX_CLKP to NB for external Graphics
VDDREF ATIG0T_LPRS NBGFX_CLKP 10
66 32 NBGFX_CLKN 2 1 NBGFX_CLKN
GNDREF ATIG0C_LPRS
31 EXT_GFX_CLKP RP37 4 3 *0_4P2R_4 EXT_GFX_CLKP
NBGFX_CLKN 10 reference clock
ATIG1T_LPRS EXT_GFX_CLKP 17
C478 69 30 EXT_GFX_CLKN 2 1 EXT_GFX_CLKN to M82-S -RX780 only
VDD48 ATIG1C_LPRS EXT_GFX_CLKN 17
0.1U/10V_4 29 26
VDDATIG ATIG2T_LPRS
54 VDDCPU ATIG2C_LPRS 25
61 VDDHTT
38 40 PCIE_MINI2_CLKP RP34 4 3 *0_4P2R_4 PCIE_MINI2_CLKP
VDDSB_SRC SB_SRC0T_LPRS PCIE_MINI2_CLKP 37
17 39 PCIE_MINI2_CLKN 2 1 PCIE_MINI2_CLKN to TV TUNER CARD
VDDSRC SB_SRC0C_LPRS PCIE_MINI2_CLKN 37
C +3V_CLKVDD 44 35 CLK_PCIE_CARD RP39 4 3 *0_4P2R_4 CLK_PCIE_CARD C
VDDSATA SB_SRC1T_LPRS CLK_PCIE_CARD 27
3 34 CLK_PCIE_CARD# 2 1 CLK_PCIE_CARD# to PCIE-CARD READER
VDDDOT SB_SRC1C_LPRS CLK_PCIE_CARD# 27
53 VDDCPU_IO SRC0T_LPRS 23
28 VDDATIG_IO SRC0C_LPRS 22
37 21 PCIE_NEW_CLKP RP36 4 3 *0_4P2R_4 PCIE_NEW_CLKP
VDDSB_SRC_IO SRC1T_LPRS PCIE_NEW_CLKP 34
12 20 PCIE_NEW_CLKN 2 1 PCIE_NEW_CLKN to EPRESS CARD
VDDSRC_IO1 SRC1C_LPRS PCIE_NEW_CLKN 34
+1.2V_CLKVDDIO 18 16 PCIE_MINI1_CLKP RP35 4 3 *0_4P2R_4 PCIE_MINI1_CLKP
VDDSRC_IO2 SRC2T_LPRS PCIE_MINI1_CLKP 37
15 PCIE_MINI1_CLKN 2 1 PCIE_MINI1_CLKN to WLAN
SRC2C_LPRS PCIE_MINI1_CLKN 37
14 SBLINK_CLKP RP33 4 3 *0_4P2R_4 SBLINK_CLKP
SRC3T_LPRS SBLINK_CLKP 10
C474 33P/50V_4 CG_XIN 72 13 SBLINK_CLKN 2 1 SBLINK_CLKN to NB for AC-LINK reference clock
GND48 SRC3C_LPRS SBLINK_CLKN 10
27 10 SBSRC_CLKP RP32 4 3 *0_4P2R_4 SBSRC_CLKP
GNDATIG1 SRC4T_LPRS SBSRC_CLKP 12
2

6 9 SBSRC_CLKN 2 1 SBSRC_CLKN to SB
GNDDOT SRC4C_LPRS SBSRC_CLKN 12
Y2 52 8 PCIE_LAN_CLKP RP31 4 3 *0_4P2R_4 PCIE_LAN_CLKP
GNDCPU SRC5T_LPRS PCIE_LAN_CLKP 32
14.318MHZ 58 7 PCIE_LAN_CLKN 2 1 PCIE_LAN_CLKN to PCIE-LAN
GNDHTT SRC5C_LPRS PCIE_LAN_CLKN 32
47 46
1

C473 33P/50V_4 CG_XOUT GNDSATA SRC6T/SATAT_LPRS


36 GNDSB_SRC SRC6C/SATAC_LPRS 45 SI-1 Modified --remove to ROBSON
11 5 CLK_VGA_27M_SS R231 33_4 OSC_SPREAD
GNDSRC1 SRC7T_LPRS/27Mhz_SS CLK_VGA_27M_NSS OSC_SPREAD 18
19 4 R228 75/F_4 SSIN - for M82 - 3.3V level input
GNDSRC2 SRC7C_LPRS/27Mhz_NS EVGA-XTALI 18
R227 100/F_4 X_TALIN --for M82 -1.8V level input
HTT0T/66M_LPRS 60
CG_XIN 67 59 NBHTREFCLK0P RP41 4 3 *0_4P2R_4 NBHTREFCLK0P
X1 HTT0C/66M_LPRS NBHT_REFCLKP 10
CG_XOUT 68 71 NBHTREFCLK0N 2 1 NBHTREFCLK0N
X2 48MHz_0 NBHT_REFCLKN 10
70 CLK_48M_CR_L R212 33_4 CLK_48M_CR
48MHz_1 CLK_48M_CR 26
CLK_PD# 57 CLK48MUSB R203 33_4 CLK_48M_USB Ra
PD# CLK_48M_USB 13
can remove MOSFET level shift 65 SEL_HT66 R194 158/F_4
REF0/SEL_HTT66 SEL_SATA R200 *82.5/F_4
SB/clock gen / DDR2 is 3.3V/S0 REF1/SEL_SATA 64 EXT_SB_OSC 12
PCLK_SMB 1 63 SEL_27 R201 1 2 *130/F_4 R192 1 2 90.9/F_4
power level 6,7,13,29,37 PCLK_SMB PDAT_SMB SMBCLK REF2/SEL_27 T40 EXT_NB_OSC 10
6,7,13,29,37 PDAT_SMB 2 SMBDAT 1.2V
24 CLKREQ0# PV stage Change to RP Rb
B CLKREQ0# EXT_NWD_CLK_REQ# B
CLKREQ1# 51 EXT_NWD_CLK_REQ# 34
50 CLKREQ2#
SB_SRC_SLOW# CLKREQ2# CLKREQ3#
14 CHIPSET_PCIE_SLOW_SB# 1 2 41 SB_SRC_SLOW# CLKREQ3# 43 RX780 RS780
D17 *CH501H-40PT L-F 42 CLKREQ4#
CLKREQ4#
1.8V 1.1V

when driven lowSB_SRC clocks slow only supported with SLG8SP626VTR


Clock chip has internal serial Ra 82.5R 158R
to reduced setpoint custom CG IC 73 THERMAL GND 77
terminations
eGND73 eGND77
74 eGND74 eGND76 76 for differencial pairs, external resistors Rb 130R 90.9R
75 eGND75 eGND78 78 are
+3V reserved for debug purpose. RES CHIP 130 1/16W +-1%(0402)L-F -->CS11302FB15
U13B RES CHIP 158 1/16W +-1%(0402) -->CS11582FB00
C885 *10P/50V_4 EXT_NB_OSC R260 *8.2K_4 CLKREQ0# SLG8SP626VTR RES CHIP 90.9 1/16W +-1%(0402) -->CS09092FB15
R240 *8.2K_4 CLKREQ2# +3V_CLKVDD RES CHIP 82.5 1/16W +-1%(0402) -->CS08252FB11
C472 *10P/50V_4 CLK_48M_USB R250 *8.2K_4 CLKREQ3#
R253 *8.2K_4 CLKREQ4# ICS ICS9LPR476BKLFT--AJRS4760000
C476 *10P/50V_4 CLK_48M_CR
if use clock SLG SLG8SP626VTR--AJ006260000
C482 *10P/50V_4 EVGA-XTALI +3V
request pin , need
to pull Hi for
RTL RTM880N-795-- AJ008800000
C488 *10P/50V_4 OSC_SPREAD
default sttting * default R204 R206 EXT_NWD_CLK_REQ# 8.2K_4 R233
*8.2K_4 8.2K_4
66 MHz 3.3V single ended HTT clock CLK_PD# 8.2K_4 R217
1 SEL_27
SEL_HTT66 SEL_SATA SB_SRC_SLOW# 8.2K_4 R255
A 0* 100 MHz differential HTT clock SEL_HT66 A

100 MHz non-spreading differential SRC clock


SEL_SATA 1 R214 R213
*8.2K_4
0* 100 MHz spreading differential SRC clock *8.2K_4

SEL_27 1* 27MHz non-spreading singled clock


PROJECT : QT8
0 100 MHz spreading differential SRC clock
Quanta Computer Inc.
RS780M/RX780M
Size Document Number Rev
Custom Clock Generator 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 2 of 46
5 4 3 2 1
5 4 3 2 1
PV stage delete R480,R481

03
BLM21PG221SN1D(220,100M,2A)_8 W/S= 15 mil/20mil CPU_THERMDC
+CPUVDDA CPU_THERMDA H_THRMDC 5
PV change to use +2.5V H_THRMDA 5
L45 CPU CLK
short pad CPU_LDT_RST# 300_4 R158
+1.2V +1.2V_VLDT +1.8V
C429 LS0805-100M-N C397 C392 C377 CPUCLKP CPU_LDT_STOP# 300_4 R156
2 CPUCLKP CPUCLKN CPU_PWRGD
10U/6.3V_8 4.7U/6.3V_6 0.22U/6.3V_4 3300P/50V_4 300_4 R160
2 CPUCLKN CPU_LDT_REQ#_CPU
R414 *0_8/S 300_4 R478
Keep trace from resisor to CPU within 0.6"
R413 *0_8/S +1.2V_VLDT +CPUVDDA
keep trace from caps to CPU within 1.2" U32D
U32A W/S= 15 mil/20mil
+CPUVDDA F8 M11
C732 4.7U/6.3V_6 +1.2V_VLDT +1.2V_VLDT 4.7U/6.3V_6 C857 CPUCLKIN R153 169/F_4 CPUCLKIN# +CPUVDDA VDDA1 KEY1
D1
VLDT_A0 HT LINK VLDT_B0
AE2 F9
VDDA2 KEY2
W18
C733 4.7U/6.3V_6 +1.2V_VLDT D2 AE3 +1.2V_VLDT 0.22U/6.3V_4 C844
D C735 0.22U/6.3V_4 +1.2V_VLDT VLDT_A1 VLDT_B1 +1.2V_VLDT 180P/50V_4 C854 CPUCLKP C420 3900P/25V_4 CPUCLKIN CPU_SVC_R D
D3 AE4 A9 A6
C734 180P/50V_4 +1.2V_VLDT VLDT_A2 VLDT_B2 +1.2V_VLDT CPUCLKN C421 3900P/25V_4 CPUCLKIN# CLKIN_H SVC CPU_SVD_R
D4 AE5 A8 A4
VLDT_A3 VLDT_B3 CLKIN_L SVD
HT_NB_CPU_CAD_H0 E3 AD1 HT_CPU_NB_CAD_H0 CPU_LDT_RST# B7
L0_CADIN_H0 L0_CADOUT_H0 12 CPU_LDT_RST# RESET_L
HT_NB_CPU_CAD_L0 E2 AC1 HT_CPU_NB_CAD_L0 CPU_PWRGD A7
HT_NB_CPU_CAD_H1 L0_CADIN_L0 L0_CADOUT_L0 HT_CPU_NB_CAD_H1 12 CPU_PWRGD CPU_LDT_STOP# PWROK CPU_THERMTRIP_L#
E1 AC2 10,12 CPU_LDT_STOP# F10 AF6
HT_NB_CPU_CAD_L1 L0_CADIN_H1 L0_CADOUT_H1 HT_CPU_NB_CAD_L1 CPU_LDT_REQ#_CPU LDTSTOP_L THERMTRIP_L CPU_PROCHOT_L#
F1 AC3 C6 AC7
HT_NB_CPU_CAD_H2 L0_CADIN_L1 L0_CADOUT_L1 HT_CPU_NB_CAD_H2 LDTREQ_L PROCHOT_L CPU_MEMHOT_L#
G3 AB1 AA8
HT_NB_CPU_CAD_L2 L0_CADIN_H2 L0_CADOUT_H2 HT_CPU_NB_CAD_L2 CPU_SIC MEMHOT_L
G2 AA1 5 CPU_SIC AF4
HT_NB_CPU_CAD_H3 L0_CADIN_L2 L0_CADOUT_L2 HT_CPU_NB_CAD_H3 CPU_SID SIC
G1
L0_CADIN_H3 L0_CADOUT_H3
AA2 SideBand Temp sense I2C 5 CPU_SID AF5
SID
HT_NB_CPU_CAD_H[15..0] HT_NB_CPU_CAD_L3 H1 AA3 HT_CPU_NB_CAD_L3 CPU_ALERT AE6 W7 CPU_THERMDC
8 HT_NB_CPU_CAD_H[15..0] L0_CADIN_L3 L0_CADOUT_L3 5 CPU_ALERT ALERT_L THERMDC
HT_NB_CPU_CAD_H4 J1 W2 HT_CPU_NB_CAD_H4 W8 CPU_THERMDA
HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_L4 L0_CADIN_H4 L0_CADOUT_H4 HT_CPU_NB_CAD_L4 R116 44.2/F_4 CPU_HTREF0 THERMDA
K1 W3 R6
8 HT_NB_CPU_CAD_L[15..0] HT_NB_CPU_CAD_H5 L0_CADIN_L4 L0_CADOUT_L4 HT_CPU_NB_CAD_H5 R152 44.2/F_4 CPU_HTREF1 HT_REF0
L3 V1 +1.2V_VLDT P6
HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_L5 L0_CADIN_H5 L0_CADOUT_H5 HT_CPU_NB_CAD_L5 place them to CPU within 1.5" HT_REF1
L2 U1
8 HT_NB_CPU_CLK_H[1..0] HT_NB_CPU_CAD_H6 L0_CADIN_L5 L0_CADOUT_L5 HT_CPU_NB_CAD_H6
L1 U2 41 CPU_VDD0_RUN_FB_H F6 W9
HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CAD_L6 L0_CADIN_H6 L0_CADOUT_H6 HT_CPU_NB_CAD_L6 VDD0_FB_H VDDIO_FB_H
M1 U3 41 CPU_VDD0_RUN_FB_L E6 Y9
8 HT_NB_CPU_CLK_L[1..0] HT_NB_CPU_CAD_H7 L0_CADIN_L6 L0_CADOUT_L6 HT_CPU_NB_CAD_H7 VDD0_FB_L VDDIO_FB_L
N3 T1
HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_L7 L0_CADIN_H7 L0_CADOUT_H7 HT_CPU_NB_CAD_L7
N2 R1 41 CPU_VDD1_RUN_FB_H Y6 H6 CPU_VDDNB_RUN_FB_H 41
8 HT_NB_CPU_CTL_H[1..0] HT_NB_CPU_CAD_H8 L0_CADIN_L7 L0_CADOUT_L7 HT_CPU_NB_CAD_H8 VDD1_FB_H VDDNB_FB_H
E5 AD4 41 CPU_VDD1_RUN_FB_L AB6 G6 CPU_VDDNB_RUN_FB_L 41
HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_L8 L0_CADIN_H8 L0_CADOUT_H8 HT_CPU_NB_CAD_L8 VDD1_FB_L VDDNB_FB_L
F5 AD3
8 HT_NB_CPU_CTL_L[1..0] HT_NB_CPU_CAD_H9 L0_CADIN_L8 L0_CADOUT_L8 HT_CPU_NB_CAD_H9 CPU_DBRDY
F3 AD5 G10
HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_L9 L0_CADIN_H9 L0_CADOUT_H9 HT_CPU_NB_CAD_L9 CPU_TMS DBRDY CPU_DBREQ# R149 300/F_4
F4 AC5 AA9 E10
8 HT_CPU_NB_CAD_H[15..0] HT_NB_CPU_CAD_H10 L0_CADIN_L9 L0_CADOUT_L9 HT_CPU_NB_CAD_H10 CPU_TCK TMS DBREQ_L
G5 AB4 AC9 +1.8VSUS
HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_L10 L0_CADIN_H10 L0_CADOUT_H10 HT_CPU_NB_CAD_L10 CPU_TRST# TCK
H5 AB3 AD9 AE9 CPU_TDO
8 HT_CPU_NB_CAD_L[15..0] HT_NB_CPU_CAD_H11 L0_CADIN_L10 L0_CADOUT_L10 HT_CPU_NB_CAD_H11 CPU_TDI TRST_L TDO
H3 AB5 AF9
HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_L11 L0_CADIN_H11 L0_CADOUT_H11 HT_CPU_NB_CAD_L11 TDI
H4 AA5
8 HT_CPU_NB_CLK_H[1..0] HT_NB_CPU_CAD_H12 L0_CADIN_L11 L0_CADOUT_L11 HT_CPU_NB_CAD_H12 R67 300/F_4 CPUTEST23 CPUTEST28H
K3 Y5 AD7 J7 T25
HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_L12 L0_CADIN_H12 L0_CADOUT_H12 HT_CPU_NB_CAD_L12 TEST23 TEST28_H CPUTEST28L
K4 W5 H8 T26
8 HT_CPU_NB_CLK_L[1..0] HT_NB_CPU_CAD_H13 L0_CADIN_L12 L0_CADOUT_L12 HT_CPU_NB_CAD_H13 CPUTEST18 TEST28_L
L5 V4 T24 H10
C HT_CPU_NB_CTL_H[1..0] HT_NB_CPU_CAD_L13 L0_CADIN_H13 L0_CADOUT_H13 HT_CPU_NB_CAD_L13 CPUTEST19 TEST18 CPUTEST17 C
M5 V3 T29 G9 D7 T33
8 HT_CPU_NB_CTL_H[1..0] HT_NB_CPU_CAD_H14 L0_CADIN_L13 L0_CADOUT_L13 HT_CPU_NB_CAD_H14 TEST19 TEST17 CPUTEST16
M3 V5 E7 T32
HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_L14 L0_CADIN_H14 L0_CADOUT_H14 HT_CPU_NB_CAD_L14 R123 *510/F_4 CPUTEST25H TEST16 CPUTEST15
M4 U5 E9 F7 T28
8 HT_CPU_NB_CTL_L[1..0] HT_NB_CPU_CAD_H15 L0_CADIN_L14 L0_CADOUT_L14 HT_CPU_NB_CAD_H15 R157 *510/F_4 CPUTEST25L TEST25_H TEST15 CPUTEST14
N5 T4 +1.8VSUS E8 C7 T36
HT_NB_CPU_CAD_L15 L0_CADIN_H15 L0_CADOUT_H15 HT_CPU_NB_CAD_L15 TEST25_L TEST14
P5 T3
L0_CADIN_L15 L0_CADOUT_L15 R109 300/F_4 CPUTEST21 AB8 C3
HT_NB_CPU_CLK_H0 HT_CPU_NB_CLK_H0 R55 300/F_4 CPUTEST20 TEST21 TEST7
J3 Y1 AF7 K8
HT_NB_CPU_CLK_L0 L0_CLKIN_H0 L0_CLKOUT_H0 HT_CPU_NB_CLK_L0 R425 300/F_4 CPUTEST24 TEST20 TEST10
J2 W1 AE7
HT_NB_CPU_CLK_H1 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CPU_NB_CLK_H1 CPUTEST22 TEST24
J5 Y4 AE8 C4
HT_NB_CPU_CLK_L1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CPU_NB_CLK_L1 +1.8VSUS CPUTEST12 TEST22 TEST8
K5 Y3 T17 AC8
L0_CLKIN_L1 L0_CLKOUT_L1 R420 300_4 CPUTEST27 TEST12
AF8
HT_NB_CPU_CTL_H0 HT_CPU_NB_CTL_H0 TEST27 CPUTEST29H
N1 R2 C9 T34
HT_NB_CPU_CTL_L0 L0_CTLIN_H0 L0_CTLOUT_H0 HT_CPU_NB_CTL_L0 R464 *0_4/S TEST29_H CPUTEST29L
P1 R3 C2 C8 T38
HT_NB_CPU_CTL_H1 L0_CTLIN_L0 L0_CTLOUT_L0 HT_CPU_NB_CTL_H1 TEST9 TEST29_L
P3 T5 AA6
HT_NB_CPU_CTL_L1 L0_CTLIN_H1 L0_CTLOUT_H1 HT_CPU_NB_CTL_L1 TEST6
P4 R5
L0_CTLIN_L1 L0_CTLOUT_L1
PV stage change to short pad A3
RSVD1 RSVD10
H18
FOX PZ63826-284R-41F A5
RSVD2 RSVD9
H19
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN B3 AA7
RSVD3 RSVD8
MLX 47296-4131 B5 D5
RSVD4 RSVD7
C1 C5
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) RSVD5 RSVD6
TYC 4-1903401-2
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN

CNTR_VREF

C868 0.1U/10V_4
CNTR_VREF 5
+3V
Serial VID VFIX MODE VID Override Circuit
B R162 *2.2K_4 B
SVC SVD Voltage Output
+3V R484 20K/F_4 R485 34.8K/F_4 PV change to remove R159 R476 1K/F_4
R477 1K/F_4 PV stage change to short pad
+1.8VSUS 0 0 1.4V
CNTR_VREF R486 CPU_SVC_R R465 *0_4/S CPU_SVC
1K/F_4 CPU_SVD_R R466 *0_4/S CPU_SVD
CPU_SVC 41 0 1 1.2V
CPU_PWRGD CPU_PWRGD_SVID_REG CPU_SVD 41
R163 *0_4/S
CPU_PWRGD_SVID_REG 41 1 0 1.0V
2

Q47 *BSS138_NL/SOT23 R473 *220_4


CPU_LDT_REQ#_CPU 1 3 CPU_LDT_RST# 1 3 CPU_LDT_RST_HTPA# R468 *220_4 1 1 0.8V
CPU_LDT_REQ# 10
Q48
BSS138_NL/SOT23 C26 *0.1U/10V_4
PV stage
1

R482 *0_4/S G1
change to *SHORT_ PAD1
short pad
2

+1.8VSUS R54 10K/F_4


for debug only
2

+1.8VSUS R61 300_4 Q10


MMBT3904 CPUTEST22 R60 300/F_4
CPU_MEMHOT_L# 3 1 CPU_MEMHOT# CPUTEST12 R106 *300/F_4
CPU_MEMHOT# 7,13
HDT Connector CPUTEST15
CPUTEST14
CPUTEST19
R122
R150
R119
*300/F_4
*300/F_4
*300/F_4
+1.8VSUS CPUTEST18 R121 *300/F_4
+1.8VSUS R56 10K/F_4
1 2
3 4
A R419 300_4 A
+1.8VSUS 5 6
2

R418 10K/F_4 Q9 CPU_DBREQ# 7 8


+1.8VSUS
MMBT3904 CPU_DBRDY 9 10
5 CPU_THERMTRIP_L# CPU_THERMTRIP_L# 1 3 CPU_TCK 11 12
CPU_THERMTRIP# 13 CPU_TMS
+1.8VSUS R417 300_4 13 14
2

Q37 CPU_TDI 15 16
CPU_PROCHOT_L#
CPU_TRST#
CPU_TDO
17 18 PROJECT : QT8
Quanta Computer Inc.
1 3 CPU_PROCHOT# 12 19 20
MMBT3904 21 22
C54 *0.1U/10V_4 23 24 CPU_LDT_RST_HTPA#
KEY 25
Size Document Number Rev
Custom S1G2 HT,CTL I/F 1/3 1A
CN6 *HDT CONN NB5/RD5
Date: Friday, August 29, 2008 Sheet 3 of 46
5 4 3 2 1
A B C D E

PLACE THEM CLOSE TO


CPU WITHIN 1"
+0.9VSMVTT

D10
C10
B10
U32B

VTT1
VTT2
VTT3
MEM:CMD/CTRL/CLK VTT5
VTT6
VTT7
W10
AC10
AB10
+0.9VSMVTT

750 mA
+1.8VSUS 6 MEM_MB_DATA[0..63]

+0.9VSMVREF 6,42
Processor Memory Interface
MEM_MB_DATA0
U32C
MEM:DATA
MEM_MA_DATA0
MEM_MA_DATA[0..63] 6
04
AD10 VTT4 VTT8 AA10 C11 MB_DATA0 MA_DATA0 G12
A10 R104 R105 Reserved MEM_MB_DATA1 A11 F12 MEM_MA_DATA1
R424 39.2/F_4 M_ZP VTT9 MEM_MB_DATA2 MB_DATA1 MA_DATA1 MEM_MA_DATA2
AF10 MEMZP *0_4 A14 MB_DATA2 MA_DATA2 H14
+1.8VSUS R423 39.2/F_4 M_ZN AE10 Y10 CPU_VTT_SENSE 2K/F_4 MEM_MB_DATA3 B14 G14 MEM_MA_DATA3
MEMZN VTT_SENSE CPU_VTT_SENSE 42 MB_DATA3 MA_DATA3
MEM_MB_DATA4 G11 H11 MEM_MA_DATA4
MEM_MA_RESET# H16 MB_DATA4 MA_DATA4
T27 RSVD_M1 MEMVREF W17 MEMVREF_CPU MEM_MB_DATA5 E11 MB_DATA5 MA_DATA5 H12 MEM_MA_DATA5
MEM_MB_DATA6 D12 C13 MEM_MA_DATA6
4 MB_DATA6 MA_DATA6 4
6,7 MEM_MA0_ODT0 T19 MA0_ODT0 RSVD_M2 B18 MEM_MB_RESET# T37
MEM_MB_DATA7 A13 MB_DATA7 MA_DATA7 E13 MEM_MA_DATA7
V22 MEM_MB_DATA8 A15 H15 MEM_MA_DATA8
6,7 MEM_MA0_ODT1 MA0_ODT1 MB_DATA8 MA_DATA8
U21 W26 R97 MEM_MB_DATA9 A16 E15 MEM_MA_DATA9
MA1_ODT0 MB0_ODT0 MEM_MB0_ODT0 6,7 MB_DATA9 MA_DATA9
V19 W23 2K/F_4 C200 C179 MEM_MB_DATA10 A19 E17 MEM_MA_DATA10
MA1_ODT1 MB0_ODT1 MEM_MB0_ODT1 6,7 MB_DATA10 MA_DATA10
Y26 0.1U/10V_4 1000P/50V_4 MEM_MB_DATA11 A20 H17 MEM_MA_DATA11
MB1_ODT0 MEM_MB_DATA12 MB_DATA11 MA_DATA11 MEM_MA_DATA12
6,7 MEM_MA0_CS#0 T20 MA0_CS_L0 C14 MB_DATA12 MA_DATA12 E14
U19 V26 MEM_MB_DATA13 D14 F14 MEM_MA_DATA13
6,7 MEM_MA0_CS#1 MA0_CS_L1 MB0_CS_L0 MEM_MB0_CS#0 6,7 MB_DATA13 MA_DATA13
U20 W25 MEM_MB_DATA14 C18 C17 MEM_MA_DATA14
MA1_CS_L0 MB0_CS_L1 MEM_MB0_CS#1 6,7 MB_DATA14 MA_DATA14
V20 U22 MEM_MB_DATA15 D18 G17 MEM_MA_DATA15
MA1_CS_L1 MB1_CS_L0 MEM_MB_DATA16 MB_DATA15 MA_DATA15 MEM_MA_DATA16
D20 MB_DATA16 MA_DATA16 G18
J22 J25 MEM_MB_DATA17 A21 C19 MEM_MA_DATA17
6,7 MEM_MA_CKE0 MA_CKE0 MB_CKE0 MEM_MB_CKE0 6,7 MB_DATA17 MA_DATA17
J20 H26 MEM_MB_DATA18 D24 D22 MEM_MA_DATA18
6,7 MEM_MA_CKE1 MA_CKE1 MB_CKE1 MEM_MB_CKE1 6,7 MB_DATA18 MA_DATA18
MEM_MB_DATA19 C25 E20 MEM_MA_DATA19
MEM_MB_DATA20 MB_DATA19 MA_DATA19 MEM_MA_DATA20
N19 MA_CLK_H5 MB_CLK_H5 P22 B20 MB_DATA20 MA_DATA20 E18
N20 R22 MEM_MB_DATA21 C20 F18 MEM_MA_DATA21
MA_CLK_L5 MB_CLK_L5 MEM_MB_DATA22 MB_DATA21 MA_DATA21 MEM_MA_DATA22
6 MEM_MA_CLK1_P E16 MA_CLK_H1 MB_CLK_H1 A17 MEM_MB_CLK1_P 6 B24 MB_DATA22 MA_DATA22 B22
F16 A18 MEM_MB_DATA23 C24 C23 MEM_MA_DATA23
6 MEM_MA_CLK1_N MA_CLK_L1 MB_CLK_L1 MEM_MB_CLK1_N 6 MEM_MB_DATA24 MB_DATA23 MA_DATA23 MEM_MA_DATA24
6 MEM_MA_CLK7_P Y16 MA_CLK_H7 MB_CLK_H7 AF18 MEM_MB_CLK7_P 6 E23 MB_DATA24 MA_DATA24 F20
AA16 AF17 MEM_MB_DATA25 E24 F22 MEM_MA_DATA25
6 MEM_MA_CLK7_N MA_CLK_L7 MB_CLK_L7 MEM_MB_CLK7_N 6 MB_DATA25 MA_DATA25
P19 R26 MEM_MB_DATA26 G25 H24 MEM_MA_DATA26
MA_CLK_H4 MB_CLK_H4 MEM_MB_DATA27 MB_DATA26 MA_DATA26 MEM_MA_DATA27
P20 MA_CLK_L4 MB_CLK_L4 R25 G26 MB_DATA27 MA_DATA27 J19
MEM_MB_DATA28 C26 E21 MEM_MA_DATA28
6,7 MEM_MA_ADD[0..15] MEM_MA_ADD0 MEM_MB_ADD0 MEM_MB_ADD[0..15] 6,7 MEM_MB_DATA29 MB_DATA28 MA_DATA28 MEM_MA_DATA29
N21 MA_ADD0 MB_ADD0 P24 D26 MB_DATA29 MA_DATA29 E22
MEM_MA_ADD1 M20 N24 MEM_MB_ADD1 MEM_MB_DATA30 G23 H20 MEM_MA_DATA30
MEM_MA_ADD2 MA_ADD1 MB_ADD1 MEM_MB_ADD2 MEM_MB_DATA31 MB_DATA30 MA_DATA30 MEM_MA_DATA31
N22 MA_ADD2 MB_ADD2 P26 G24 MB_DATA31 MA_DATA31 H22
MEM_MA_ADD3 M19 N23 MEM_MB_ADD3 MEM_MB_DATA32 AA24 Y24 MEM_MA_DATA32
MEM_MA_ADD4 MA_ADD3 MB_ADD3 MEM_MB_ADD4 MEM_MB_DATA33 MB_DATA32 MA_DATA32 MEM_MA_DATA33
M22 MA_ADD4 MB_ADD4 N26 AA23 MB_DATA33 MA_DATA33 AB24
MEM_MA_ADD5 L20 L23 MEM_MB_ADD5 MEM_MB_DATA34 AD24 AB22 MEM_MA_DATA34
MEM_MA_ADD6 MA_ADD5 MB_ADD5 MEM_MB_ADD6 MEM_MB_DATA35 MB_DATA34 MA_DATA34 MEM_MA_DATA35
M24 MA_ADD6 MB_ADD6 N25 AE24 MB_DATA35 MA_DATA35 AA21
3 MEM_MA_ADD7 L21 L24 MEM_MB_ADD7 MEM_MB_DATA36 AA26 W22 MEM_MA_DATA36 3
MEM_MA_ADD8 MA_ADD7 MB_ADD7 MEM_MB_ADD8 MEM_MB_DATA37 MB_DATA36 MA_DATA36 MEM_MA_DATA37
L19 MA_ADD8 MB_ADD8 M26 AA25 MB_DATA37 MA_DATA37 W21
MEM_MA_ADD9 K22 K26 MEM_MB_ADD9 MEM_MB_DATA38 AD26 Y22 MEM_MA_DATA38
MEM_MA_ADD10 MA_ADD9 MB_ADD9 MEM_MB_ADD10 MEM_MB_DATA39 MB_DATA38 MA_DATA38 MEM_MA_DATA39
R21 MA_ADD10 MB_ADD10 T26 AE25 MB_DATA39 MA_DATA39 AA22
MEM_MA_ADD11 L22 L26 MEM_MB_ADD11 MEM_MB_DATA40 AC22 Y20 MEM_MA_DATA40
MEM_MA_ADD12 MA_ADD11 MB_ADD11 MEM_MB_ADD12 MEM_MB_DATA41 MB_DATA40 MA_DATA40 MEM_MA_DATA41
K20 MA_ADD12 MB_ADD12 L25 AD22 MB_DATA41 MA_DATA41 AA20
MEM_MA_ADD13 V24 W24 MEM_MB_ADD13 MEM_MB_DATA42 AE20 AA18 MEM_MA_DATA42
MEM_MA_ADD14 MA_ADD13 MB_ADD13 MEM_MB_ADD14 MEM_MB_DATA43 MB_DATA42 MA_DATA42 MEM_MA_DATA43
K24 MA_ADD14 MB_ADD14 J23 AF20 MB_DATA43 MA_DATA43 AB18
MEM_MA_ADD15 K19 J24 MEM_MB_ADD15 MEM_MB_DATA44 AF24 AB21 MEM_MA_DATA44
MA_ADD15 MB_ADD15 MEM_MB_DATA45 MB_DATA44 MA_DATA44 MEM_MA_DATA45
AF23 MB_DATA45 MA_DATA45 AD21
R20 R24 MEM_MB_DATA46 AC20 AD19 MEM_MA_DATA46
6,7 MEM_MA_BANK0 MA_BANK0 MB_BANK0 MEM_MB_BANK0 6,7 MB_DATA46 MA_DATA46
R23 U26 MEM_MB_DATA47 AD20 Y18 MEM_MA_DATA47
6,7 MEM_MA_BANK1 MA_BANK1 MB_BANK1 MEM_MB_BANK1 6,7 MB_DATA47 MA_DATA47
J21 J26 MEM_MB_DATA48 AD18 AD17 MEM_MA_DATA48
6,7 MEM_MA_BANK2 MA_BANK2 MB_BANK2 MEM_MB_BANK2 6,7 MB_DATA48 MA_DATA48
MEM_MB_DATA49 AE18 W16 MEM_MA_DATA49
MEM_MB_DATA50 MB_DATA49 MA_DATA49 MEM_MA_DATA50
6,7 MEM_MA_RAS# R19 MA_RAS_L MB_RAS_L U25 MEM_MB_RAS# 6,7 AC14 MB_DATA50 MA_DATA50 W14
T22 U24 MEM_MB_DATA51 AD14 Y14 MEM_MA_DATA51
6,7 MEM_MA_CAS# MA_CAS_L MB_CAS_L MEM_MB_CAS# 6,7 MEM_MB_DATA52 MB_DATA51 MA_DATA51 MEM_MA_DATA52
6,7 MEM_MA_WE# T24 MA_WE_L MB_WE_L U23 MEM_MB_WE# 6,7 AF19 MB_DATA52 MA_DATA52 Y17
MEM_MB_DATA53 AC18 AB17 MEM_MA_DATA53
MEM_MB_DATA54 MB_DATA53 MA_DATA53 MEM_MA_DATA54
AF16 MB_DATA54 MA_DATA54 AB15
SOCKET_638_PIN MEM_MB_DATA55 AF15 AD15 MEM_MA_DATA55
MEM_MB_DATA56 MB_DATA55 MA_DATA55 MEM_MA_DATA56
AF13 MB_DATA56 MA_DATA56 AB13
MEM_MB_DATA57 AC12 AD13 MEM_MA_DATA57
MEM_MB_DATA58 MB_DATA57 MA_DATA57 MEM_MA_DATA58
AB11 MB_DATA58 MA_DATA58 Y12
MEM_MB_DATA59 Y11 W11 MEM_MA_DATA59
MEM_MB_DATA60 MB_DATA59 MA_DATA59 MEM_MA_DATA60
AE14 MB_DATA60 MA_DATA60 AB14
MEM_MB_DATA61 AF14 AA14 MEM_MA_DATA61
MEM_MB_DATA62 MB_DATA61 MA_DATA61 MEM_MA_DATA62
AF11 MB_DATA62 MA_DATA62 AB12
MEM_MB_DATA63 AD11 AA12 MEM_MA_DATA63
MB_DATA63 MA_DATA63
6 MEM_MB_DM[0..7] MEM_MA_DM[0..7] 6
MEM_MB_DM0 A12 E12 MEM_MA_DM0
2 +0.9VSMVTT Place close to socket MEM_MB_DM1 B16
MB_DM0 MA_DM0
C15 MEM_MA_DM1 2
MEM_MB_DM2 MB_DM1 MA_DM1 MEM_MA_DM2
A22 MB_DM2 MA_DM2 E19
MEM_MB_DM3 E25 F24 MEM_MA_DM3
MEM_MB_DM4 MB_DM3 MA_DM3 MEM_MA_DM4
AB26 MB_DM4 MA_DM4 AC24
C35 C257 C28 C170 C214 C263 C167 C186 MEM_MB_DM5 AE22 Y19 MEM_MA_DM5
4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 0.22U/6.3V_4 MEM_MB_DM6 MB_DM5 MA_DM5 MEM_MA_DM6
AC16 MB_DM6 MA_DM6 AB16
MEM_MB_DM7 AD12 Y13 MEM_MA_DM7
MB_DM7 MA_DM7

6 MEM_MB_DQS0_P C12 MB_DQS_H0 MA_DQS_H0 G13 MEM_MA_DQS0_P 6


6 MEM_MB_DQS0_N B12 MB_DQS_L0 MA_DQS_L0 H13 MEM_MA_DQS0_N 6
6 MEM_MB_DQS1_P D16 MB_DQS_H1 MA_DQS_H1 G16 MEM_MA_DQS1_P 6
+0.9VSMVTT C16 G15
6 MEM_MB_DQS1_N MB_DQS_L1 MA_DQS_L1 MEM_MA_DQS1_N 6
6 MEM_MB_DQS2_P A24 MB_DQS_H2 MA_DQS_H2 C22 MEM_MA_DQS2_P 6
6 MEM_MB_DQS2_N A23 MB_DQS_L2 MA_DQS_L2 C21 MEM_MA_DQS2_N 6
6 MEM_MB_DQS3_P F26 MB_DQS_H3 MA_DQS_H3 G22 MEM_MA_DQS3_P 6
C262 C205 C169 C189 C188 C192 C264 C171 E26 G21
6 MEM_MB_DQS3_N MB_DQS_L3 MA_DQS_L3 MEM_MA_DQS3_N 6
1000P/50V_4 1000P/50V_4 1000P/50V_4 1000P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 180P/50V_4 AC25 AD23
6 MEM_MB_DQS4_P MB_DQS_H4 MA_DQS_H4 MEM_MA_DQS4_P 6
6 MEM_MB_DQS4_N AC26 MB_DQS_L4 MA_DQS_L4 AC23 MEM_MA_DQS4_N 6
6 MEM_MB_DQS5_P AF21 MB_DQS_H5 MA_DQS_H5 AB19 MEM_MA_DQS5_P 6
6 MEM_MB_DQS5_N AF22 MB_DQS_L5 MA_DQS_L5 AB20 MEM_MA_DQS5_N 6
6 MEM_MB_DQS6_P AE16 MB_DQS_H6 MA_DQS_H6 Y15 MEM_MA_DQS6_P 6
6 MEM_MB_DQS6_N AD16 MB_DQS_L6 MA_DQS_L6 W15 MEM_MA_DQS6_N 6
6 MEM_MB_DQS7_P AF12 MB_DQS_H7 MA_DQS_H7 W12 MEM_MA_DQS7_P 6
Close to CPU within 1500 mils 6 MEM_MB_DQS7_N AE12 MB_DQS_L7 MA_DQS_L7 W13 MEM_MA_DQS7_N 6
MEM_MA_CLK7_P
MEM_MB_CLK7_P SOCKET_638_PIN
C738
C739 1.5P/50V_4
1 1.5P/50V_4 1
MEM_MA_CLK7_N
MEM_MB_CLK7_N
MEM_MA_CLK1_P
MEM_MB_CLK1_P
C378
C376
1.5P/50V_4
1.5P/50V_4
PROJECT : QT8
MEM_MB_CLK1_N
MEM_MA_CLK1_N Quanta Computer Inc.
Size Document Number Rev
Custom S1G2 DDRII MEMORY I/F 2/3 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 4 of 46
A B C D E
5 4 3 2 1

+VCORE0 U32E +VCORE1


AA4
AA11
AA13
U32F

VSS1
VSS2
VSS66
VSS67
J6
J8
J10 +VCORE0
05
G4 P8
AA15
AA17
VSS3
VSS4
VSS68
VSS69 J12
J14
BOTTOM SIDE DECOUPLING
VDD0_1 VDD1_1 VSS5 VSS70
H2 VDD0_2 VDD1_2 P10 AA19 VSS6 VSS71 J16
J9 VDD0_3 VDD1_3 R4 AB2 VSS7 VSS72 J18
J11 R7 AB7 K2 C304 C320 C319 C318 C298 C303 C314
VDD0_4 VDD1_4 VSS8 VSS73 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4
J13 VDD0_5 VDD1_5 R9 AB9 VSS9 VSS74 K7
D
J15 VDD0_6 VDD1_6 R11 AB23 VSS10 VSS75 K9 D
K6 VDD0_7 VDD1_7 T2 AB25 VSS11 VSS76 K11
K10 VDD0_8 VDD1_8 T6 AC11 VSS12 VSS77 K13
K12 VDD0_9 VDD1_9 T8 AC13 VSS13 VSS78 K15
K14 T10 AC15 K17 +VCORE1
VDD0_10 VDD1_10 VSS14 VSS79
L4 VDD0_11 VDD1_11 T12 AC17 VSS15 VSS80 L6
L7 VDD0_12 VDD1_12 T14 AC19 VSS16 VSS81 L8
L9 VDD0_13 VDD1_13 U7 AC21 VSS17 VSS82 L10
L11 VDD0_14 VDD1_14 U9 AD6 VSS18 VSS83 L12
L13 U11 AD8 L14 C239 C282 C283 C277 C695 C235 C694 C241
VDD0_15 VDD1_15 VSS19 VSS84 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.01U/16V_4 180P/50V_4 0.01U/16V_4
L15 VDD0_16 VDD1_16 U13 AD25 VSS20 VSS85 L16
M2 VDD0_17 VDD1_17 U15 AE11 VSS21 VSS86 L18
M6 VDD0_18 VDD1_18 V6 AE13 VSS22 VSS87 M7
M8 VDD0_19 VDD1_19 V8 AE15 VSS23 VSS88 M9
M10 VDD0_20 VDD1_20 V10 AE17 VSS24 VSS89 AC6
N7 V12 AE19 M17 +CPUVDDNB +1.8VSUS
+CPUVDDNB VDD0_21 VDD1_21 VSS25 VSS90
N9 VDD0_22 VDD1_22 V14 AE21 VSS26 VSS91 N4
N11 VDD0_23 VDD1_23 W4 AE23 VSS27 VSS92 N8
3A VDD1_24 Y2 B4 VSS28 VSS93 N10
K16 VDDNB_1 VDD1_25 AC4 B6 VSS29 VSS94 N16
M16 AD2 +1.8VSUS B8 N18 C275 C240 C296 C253 C297 C321 C252 C771 C805
VDDNB_2 VDD1_26 VSS30 VSS95 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 22U/6.3V_8 0.22U/6.3V_4 0.22U/6.3V_4 180P/50V_4 180P/50V_4
P16 VDDNB_3 B9 VSS31 VSS96 P2
T16 VDDNB_4 VDDIO27 Y25 B11 VSS32 VSS97 P7
+1.8VSUS V16 V25 B13 P9
VDDNB_5 VDDIO26 VSS33 VSS98
2A VDDIO25 V23 B15 VSS34 VSS99 P11
H25 VDDIO1 VDDIO24 V21 B17 VSS35 VSS100 P17
J17 VDDIO2 VDDIO23 V18 B19 VSS36 VSS101 R8
K18 VDDIO3 VDDIO22 U17 B21 VSS37 VSS102 R10
K21 VDDIO4 VDDIO21 T25 B23 VSS38 VSS103 R16
K23 VDDIO5 VDDIO20 T23 B25 VSS39 VSS104 R18
C K25 VDDIO6 VDDIO19 T21 D6 VSS40 VSS105 T7 C
L17 T18 D8 T9
M18
M21
VDDIO7
VDDIO8
VDDIO18
VDDIO17 R17
P25
D9
D11
VSS41
VSS42
VSS106
VSS107 T11
T13
DECOUPLING BETWEEN PROCESSOR AND DIMMs
VDDIO9 VDDIO16 VSS43 VSS108
M23 P23 D13 T15
M25
N17
VDDIO10
VDDIO11
VDDIO15
VDDIO14 P21
P18
D15
D17
VSS44
VSS45
VSS109
VSS110 T17
U4
PLACE CLOSE TO PROCESSOR AS POSSIBLE
VDDIO12 VDDIO13 VSS46 VSS111
D19 VSS47 VSS112 U6
D21 U8 +1.8VSUS
SOCKET_638_PIN VSS48 VSS113
D23 VSS49 VSS114 U10
D25 VSS50 VSS115 U12
+1.8VSUS E4 U14
VSS51 VSS116
F2 VSS52 VSS117 U16
F11 U18 C772 C808 C806 C770 C114 C255
VSS53 VSS118 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 0.22U/6.3V_4 0.22U/6.3V_4
3 CNTR_VREF F13 VSS54 VSS119 V2
F15 VSS55 VSS120 V7
R173 R174 R175 F17 V9
390_4 390_4 1K/F_4 VSS56 VSS121 +1.8VSUS
F19 VSS57 VSS122 V11
F21 VSS58 VSS123 V13
F23 VSS59 VSS124 V15
2

F25 VSS60 VSS125 V17


Q15 H7 W6
MBCLK2 CPU_SIC VSS61 VSS126 C164 C784 C773 C807 C791
18,36 MBCLK2 3 1 CPU_SIC 3 H9 VSS62 VSS127 Y21
H21 Y23 0.22U/6.3V_4 0.22U/6.3V_4 0.01U/16V_4 0.01U/16V_4 180P/50V_4
VSS63 VSS128
2

*BSS138_NL/SOT23 H23 N6
Q16 VSS64 VSS129
J4 VSS65
MBDATA2 3 1 CPU_SID
18,36 MBDATA2 CPU_SID 3
SOCKET_638_PIN
2

*BSS138_NL/SOT23
Q14
B B
SMBALERT# 3 1 CPU_ALERT
CPU_ALERT 3
*BSS138_NL/SOT23
PROCESSOR POWER AND GROUND
+3V +3V
+VCORE0 +VCORE1

R483 +1.8VSUS EC13 0.01U/16V_4 +3VPCU C68 0.01U/16V_4

200/F_6 R177 *0_4 SYS_SHDN# C75 0.01U/16V_4


SYS_SHDN# 39,45
R165 R166 R164 +1.8V EC6 0.01U/16V_4 +3VPCU
reserve for C64 0.01U/16V_4
1

10K/F_4 10K/F_4 10K/F_4


power shutdown D35 EC7 0.01U/16V_4 C61 0.01U/16V_4
( if can ) +1.8V +3V
C870
*CH500H
0.1U/10V_4
+3VPCU EC9 0.01U/16V_4
2

+3V
U37 PV stage change to short pad
+1.8VSUS EC5 0.01U/16V_4 +5V
18,36 MBCLK2 8 1 +5V EC1 *0.01U/16V_4
SCLK VCC H_THRMDA 3 +3V
R176 *0_4/S 3920_RST#
3920_RST# 36,45
18,36 MBDATA2 7 2 C869 EC2 *0.01U/16V_4 +5V EC8 0.01U/16V_4 +3VPCU
SDA DXP 1000P/50V_4 Q17
3

6 3 MMBT3904 D34
ALERT# DXN ECPWROK EC11 0.01U/16V_4
H_THRMDC 3 2 2 1 ECPWROK 16,36 +VGA_CORE +1.8V
13 PM_THERM# 4 OVERT# GND 5
EC12 0.01U/16V_4 For fix HyperTransport nets
1

A MSOP CH501H-40PT A
across plane splits
G786P8 SMBALERT# R179 10K/F_4
+3V
I2C ADDRESS: 98H
3

R472 *10K/F_4 +3VS5 +3VS5 +3V +1.8V


PROJECT : QT8
+1.8VSUS
R98 *10K/F_4

PQ60 2 TEMP_FAIL 18 Quanta Computer Inc.


2

Q46 EC10 EC4 EC14 EC3


*MMBT3904 *2N7002E-G ADD VGA TEMP_ FAIL function
CPU_THERMTRIP_L# 1 3 SMBALERT# Size Document Number Rev
3 CPU_THERMTRIP_L# M8X is active Hi , M7X acvite Low Custom 1A
S1G2 PWR & GND 3/3
1

*0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 NB5/RD5


Date: Friday, August 29, 2008 Sheet 5 of 46
5 4 3 2 1
5 4 3 2 1

06
+1.8VSUS +1.8VSUS

103
104
111
112
117
118

103
104
111
112
117
118
81
82
87
88
95
96

81
82
87
88
95
96
4,7 MEM_MA_ADD[0..15] MEM_MA_DATA[0..63] 4 4,7 MEM_MB_ADD[0..15] MEM_MB_DATA[0..63] 4
CN27 CN28
MEM_MA_ADD0 102 5 MEM_MA_DATA0 MEM_MB_ADD0 102 5 MEM_MB_DATA4

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11

VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
MEM_MA_ADD1 A0 DQ0 MEM_MA_DATA1 MEM_MB_ADD1 A0 DQ0 MEM_MB_DATA5
101 A1 DQ1 7 101 A1 DQ1 7
MEM_MA_ADD2 100 17 MEM_MA_DATA2 MEM_MB_ADD2 100 17 MEM_MB_DATA2
MEM_MA_ADD3 A2 DQ2 MEM_MA_DATA3 MEM_MB_ADD3 A2 DQ2 MEM_MB_DATA3
99 A3 DQ3 19 99 A3 DQ3 19
MEM_MA_ADD4 98 4 MEM_MA_DATA4 MEM_MB_ADD4 98 4 MEM_MB_DATA0
MEM_MA_ADD5 A4 DQ4 MEM_MA_DATA5 MEM_MB_ADD5 A4 DQ4 MEM_MB_DATA1
97 A5 DQ5 6 97 A5 DQ5 6
MEM_MA_ADD6 94 14 MEM_MA_DATA6 MEM_MB_ADD6 94 14 MEM_MB_DATA6
MEM_MA_ADD7 A6 DQ6 MEM_MA_DATA7 MEM_MB_ADD7 A6 DQ6 MEM_MB_DATA7
92 16 92 16
MEM_MA_ADD8 A7 DQ7 MEM_MA_DATA8 MEM_MB_ADD8 A7 DQ7 MEM_MB_DATA13
93 23 93 23
D MEM_MA_ADD9 A8 DQ8 MEM_MA_DATA9 MEM_MB_ADD9 A8 DQ8 MEM_MB_DATA12 D
91 25 91 25
MEM_MA_ADD10 A9 DQ9 MEM_MA_DATA10 MEM_MB_ADD10 A9 DQ9 MEM_MB_DATA11
105 35 105 35
MEM_MA_ADD11 A10 DQ10 MEM_MA_DATA11 MEM_MB_ADD11 A10 DQ10 MEM_MB_DATA10
90 37 90 37
MEM_MA_ADD12 A11 DQ11 MEM_MA_DATA12 MEM_MB_ADD12 A11 DQ11 MEM_MB_DATA8
89 20 89 20
MEM_MA_ADD13 A12 DQ12 MEM_MA_DATA13 MEM_MB_ADD13 A12 DQ12 MEM_MB_DATA9
116 22 116 22
MEM_MA_ADD14 A13 DQ13 MEM_MA_DATA14 MEM_MB_ADD14 A13 DQ13 MEM_MB_DATA14
86 36 86 36
MEM_MA_ADD15 A14 DQ14 MEM_MA_DATA15 MEM_MB_ADD15 A14 DQ14 MEM_MB_DATA15
4,7 MEM_MA_BANK[0..2] 84 38 4,7 MEM_MB_BANK[0..2] 84 38
A15 DQ15 MEM_MA_DATA16 A15 DQ15 MEM_MB_DATA16
43 43
MEM_MA_BANK0 107 DQ16 MEM_MA_DATA17 MEM_MB_BANK0 DQ16 MEM_MB_DATA17
45 107 45
MEM_MA_BANK1 106 BA0 DQ17 MEM_MA_DATA18 MEM_MB_BANK1 BA0 DQ17 MEM_MB_DATA18
55 106 55
MEM_MA_BANK2 85 BA1 DQ18 MEM_MA_DATA19 MEM_MB_BANK2 BA1 DQ18 MEM_MB_DATA19
4 MEM_MA_DM[0..7] 57 4 MEM_MB_DM[0..7] 85 57
BA2 DQ19 MEM_MA_DATA20 BA2 DQ19 MEM_MB_DATA20
44 44
MEM_MA_DM0 DQ20 MEM_MA_DATA21 MEM_MB_DM0 DQ20 MEM_MB_DATA21
10 46 10 46
MEM_MA_DM1 DM0 DQ21 MEM_MA_DATA22 MEM_MB_DM1 DM0 DQ21 MEM_MB_DATA22
26 56 26 56
MEM_MA_DM2 DM1 DQ22 MEM_MA_DATA23 MEM_MB_DM2 DM1 DQ22 MEM_MB_DATA23
52 58 52 58
MEM_MA_DM3 DM2 DQ23 MEM_MA_DATA24 MEM_MB_DM3 DM2 DQ23 MEM_MB_DATA24
67 61 67 61
MEM_MA_DM4 DM3 DQ24 MEM_MA_DATA25 MEM_MB_DM4 DM3 DQ24 MEM_MB_DATA25
130 63 130 63
MEM_MA_DM5 DM4 DQ25 MEM_MA_DATA26 MEM_MB_DM5 DM4 DQ25 MEM_MB_DATA26
147 73 147 73
MEM_MA_DM6 DM5 DQ26 MEM_MA_DATA27 MEM_MB_DM6 DM5 DQ26 MEM_MB_DATA27
170 75 170 75
MEM_MA_DM7 DM6 DQ27 MEM_MA_DATA28 MEM_MB_DM7 DM6 DQ27 MEM_MB_DATA28
185 62 185 62
DM7 DQ28 MEM_MA_DATA29 DM7 DQ28 MEM_MB_DATA29
64 64
DQ29 MEM_MA_DATA30 DQ29 MEM_MB_DATA30
4 MEM_MA_DQS0_P 13 74 4 MEM_MB_DQS0_P 13 74
DQS0 DQ30 MEM_MA_DATA31 DQS0 DQ30 MEM_MB_DATA31
4 MEM_MA_DQS1_P 31 76 4 MEM_MB_DQS1_P 31 76
DQS1 DQ31 MEM_MA_DATA36 DQS1 DQ31 MEM_MB_DATA37
4 MEM_MA_DQS2_P 51 123 4 MEM_MB_DQS2_P 51 123
DQS2 DQ32 MEM_MA_DATA37 DQS2 DQ32 MEM_MB_DATA36
4 MEM_MA_DQS3_P 70 125 4 MEM_MB_DQS3_P 70 125
DQS3 DQ33 MEM_MA_DATA35 DQS3 DQ33 MEM_MB_DATA34
4 MEM_MA_DQS4_P 131 135 4 MEM_MB_DQS4_P 131 135
DQS4 DQ34 MEM_MA_DATA39 DQS4 DQ34 MEM_MB_DATA35
4 MEM_MA_DQS5_P 148 137 4 MEM_MB_DQS5_P 148 137
DQS5 DQ35 MEM_MA_DATA38 DQS5 DQ35 MEM_MB_DATA33
4 MEM_MA_DQS6_P 169 124 4 MEM_MB_DQS6_P 169 124
DQS6 DQ36 MEM_MA_DATA32 DQS6 DQ36 MEM_MB_DATA32
4 MEM_MA_DQS7_P 188 126 4 MEM_MB_DQS7_P 188 126
DQS7 DQ37 MEM_MA_DATA33 DQS7 DQ37 MEM_MB_DATA38
134 134
C DQ38 MEM_MA_DATA34 DQ38 MEM_MB_DATA39 C
4 MEM_MA_DQS0_N 11 DQS0 DQ39
136 4 MEM_MB_DQS0_N 11 DQS0 DQ39
136
29 141 MEM_MA_DATA40 29 141 MEM_MB_DATA40
4 MEM_MA_DQS1_N DQS1 DQ40 MEM_MA_DATA41 4 MEM_MB_DQS1_N DQS1 DQ40 MEM_MB_DATA45
4 MEM_MA_DQS2_N 49 DQS2 DQ41
143 4 MEM_MB_DQS2_N 49 DQS2 DQ41
143
68 151 MEM_MA_DATA46 68 151 MEM_MB_DATA47
4 MEM_MA_DQS3_N DQS3 DQ42 4 MEM_MB_DQS3_N DQS3 DQ42
129 153 MEM_MA_DATA47 129 153 MEM_MB_DATA46
4 MEM_MA_DQS4_N DQS4 DQ43 MEM_MA_DATA44 4 MEM_MB_DQS4_N DQS4 DQ43 MEM_MB_DATA44
4 MEM_MA_DQS5_N 146 140 4 MEM_MB_DQS5_N 146 140
DQS5 DQ44 MEM_MA_DATA45 DQS5 DQ44 MEM_MB_DATA41
4 MEM_MA_DQS6_N 167 142 4 MEM_MB_DQS6_N 167 142
DQS6 DQ45 MEM_MA_DATA42 DQS6 DQ45 MEM_MB_DATA43
4 MEM_MA_DQS7_N 186 152 4 MEM_MB_DQS7_N 186 152
DQS7 DQ46 MEM_MA_DATA43 DQS7 DQ46 MEM_MB_DATA42
154 154
DQ47 MEM_MA_DATA52 DQ47 MEM_MB_DATA52
157 157
DQ48 MEM_MA_DATA49 DQ48 MEM_MB_DATA53
4 MEM_MA_CLK1_P 30 159 4 MEM_MB_CLK1_P 30 159
CK0 DQ49 MEM_MA_DATA54 CK0 DQ49 MEM_MB_DATA50
4 MEM_MA_CLK1_N 32 CK0 DQ50
173 4 MEM_MB_CLK1_N 32 CK0 DQ50
173
164 175 MEM_MA_DATA55 164 175 MEM_MB_DATA51
4 MEM_MA_CLK7_P CK1 DQ51 MEM_MA_DATA53 4 MEM_MB_CLK7_P CK1 DQ51 MEM_MB_DATA48
4 MEM_MA_CLK7_N 166 CK1 DQ52
158 4 MEM_MB_CLK7_N 166 CK1 DQ52
158
160 MEM_MA_DATA48 160 MEM_MB_DATA49
DQ53 MEM_MA_DATA51 DQ53 MEM_MB_DATA54
4,7 MEM_MA_CKE0 79 174 4,7 MEM_MB_CKE0 79 174
CKE0 DQ54 MEM_MA_DATA50 CKE0 DQ54 MEM_MB_DATA55
4,7 MEM_MA_CKE1 80 176 4,7 MEM_MB_CKE1 80 176
CKE1 DQ55 MEM_MA_DATA61 CKE1 DQ55 MEM_MB_DATA56
179 179
DQ56 MEM_MA_DATA60 DQ56 MEM_MB_DATA60
4,7 MEM_MA_RAS# 108 181 4,7 MEM_MB_RAS# 108 181
RAS DQ57 MEM_MA_DATA63 RAS DQ57 MEM_MB_DATA58
4,7 MEM_MA_CAS# 113 189 4,7 MEM_MB_CAS# 113 189
CAS DQ58 MEM_MA_DATA62 CAS DQ58 MEM_MB_DATA59
4,7 MEM_MA_WE# 109 WE DQ59
191 4,7 MEM_MB_WE# 109 WE DQ59
191
MEM_MA_DATA56 MEM_MB_DATA61
SO-DIMM

4,7 MEM_MA0_CS#0 110 S0 DQ60


180 4,7 MEM_MB0_CS#0 110 S0 DQ60
180
115 182 MEM_MA_DATA57 115 182 MEM_MB_DATA57
4,7 MEM_MA0_CS#1 S1 DQ61 4,7 MEM_MB0_CS#1 S1 DQ61
(Normal)

192 MEM_MA_DATA58 192 MEM_MB_DATA62


DQ62 DQ62

(REVERSE)
114 194 MEM_MA_DATA59 114 194 MEM_MB_DATA63
4,7 MEM_MA0_ODT0 ODT0 DQ63 4,7 MEM_MB0_ODT0 ODT0 DQ63
4,7 MEM_MA0_ODT1 119 ODT1 4,7 MEM_MB0_ODT1 119 ODT1
50 MEMHOT_SODIMM#_1 R125 *0_4/S 50 MEMHOT_SODIMM#_2 R120 *0_4/S MEMHOT_SODIMM#
NC1 MEMHOT_SODIMM# 7 NC1

SO-DIMM
DIM1_SA0 198 69 DIM2_SA0 198 69
DIM1_SA1 SA0 NC2 DIM2_SA1 SA0 NC2
200
SA1 NC3
83 PV change to use short pad 200
SA1 NC3
83
B NC4 120 NC4 120 PV change to use short pad B
PDAT_SMB 195 163 PDAT_SMB 195 163
2,7,13,29,37 PDAT_SMB SDA NC/TEST SDA NC/TEST
PCLK_SMB 197 PCLK_SMB 197
2,7,13,29,37 PCLK_SMB SCL SCL

+3V 199 +3V 199


C706 VDDspd C707 VDDspd

+0.9VSMVREF_DIMM 0.1U/10V_4 1 196 +0.9VSMVREF_DIMM 0.1U/10V_4 1 196


VREF VSS56 VREF VSS56
VSS55 193 VSS55 193
2 190 2 190
VSS0 VSS54 C858 C409 C402 VSS0 VSS54
3 VSS1 VSS53 187 o3
VSS1 VSS53 187
C859 8 184 2.2U/6.3V_6 0.1U/10V_4 1000P/50V_4 8 184
C398 1000P/50V_4 VSS2 VSS52 oVSS2 VSS52
9 VSS3 VSS51 183 9 VSS3 VSS51 183
C391 0.1U/10V_4 12 178 12 178
VSS4 VSS50 VSS4 VSS50
2.2U/6.3V_6 15 VSS5 VSS49 177 15 VSS5 VSS49 177
18 172 18 172
VSS6 VSS48 +1.8VSUS VSS6 VSS48
21 VSS7 VSS47 171 21 VSS7 VSS47 171
24 168 24 168
VSS8 VSS46 VSS8 VSS46
27 VSS9 VSS45 165 27 VSS9 VSS45 165
28 162 28 162
VSS10 VSS44 R154 VSS10 VSS44
33 VSS11 VSS43 161 33 VSS11 VSS43 161
34 156 2K/F_4 34 156
VSS12 VSS42 +0.9VSMVREF_DIMM VSS12 VSS42
39 VSS13 VSS41 155 39 VSS13 VSS41 155
40 150 40 150
VSS14 VSS40 VSS14 VSS40
41 VSS15 VSS39 149 41 VSS15 VSS39 149
42 145 42 145
VSS16 VSS38 VSS16 VSS38
47 144 47 144
VSS17 VSS37 R155 *0_4 +0.9VSMVREF_DIMM VSS17 VSS37
48 139 48 139
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33

VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS18 VSS36 4,42 +0.9VSMVREF VSS18 VSS36
53 138 53 138
GND
GND

GND
GND
VSS19 VSS35 VSS19 VSS35
54 133 54 133
VSS20 VSS34 VSS20 VSS34
DDR SO-DIMM SOCKET 1.8V
201
202

59
60
65
66
71
72
77
78
121
122
127
128
132

201
202

59
60
65
66
71
72
77
78
121
122
127
128
132
A Only for reserved R151 A

2K/F_4
H=9.2
DDR SO-DIMM SOCKET 1.8V
H=5.2
DIM2_SA0
DIM2_SA1
R35
R29
10K/F_4
10K/F_4
+3V PROJECT : QT8
R33
R36
10K/F_4
10K/F_4
DIM1_SA0
DIM1_SA1
Quanta Computer Inc.
SMbus address A2
SMbus address A0 Size Document Number Rev
Custom DDR2 SODIMMS: A/B CHANNEL 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 6 of 46
5 4 3 2 1
5 4 3 2 1

4,6 MEM_MA_ADD[0..15]

4,6 MEM_MA_BANK[0..2]
MEM_MA_ADD[0..15]

MEM_MA_BANK[0..2]
4,6 MEM_MB_ADD[0..15]

4,6 MEM_MB_BANK[0..2]
MEM_MB_ADD[0..15]

MEM_MB_BANK[0..2]
07
+0.9VSMVTT +0.9VSMVTT

MEM_MA_CKE0 RP28 4 3 47_4P2R_4 MEM_MB_CKE0 RP25 4 3 47_4P2R_4


4,6 MEM_MA_CKE0 4,6 MEM_MB_CKE0
MEM_MA_BANK2 2 1 C178 0.1U/10V_4 MEM_MB_BANK2 2 1 C163 0.1U/10V_4
+1.8VSUS +1.8VSUS
MEM_MA_ADD12 RP24 4 3 47_4P2R_4 MEM_MB_ADD12 RP21 2 1 47_4P2R_4
D D
MEM_MA_ADD9 2 1 C260 0.1U/10V_4 MEM_MB_ADD9 4 3 C248 0.1U/10V_4
MEM_MA_ADD8 RP18 2 1 47_4P2R_4 MEM_MB_ADD8 RP17 4 3 47_4P2R_4
MEM_MA_ADD5 4 3 C232 0.1U/10V_4 MEM_MB_ADD5 2 1 C210 0.1U/10V_4
+1.8VSUS +1.8VSUS
MEM_MA_ADD3 RP16 2 1 47_4P2R_4 MEM_MB_ADD3 RP15 4 3 47_4P2R_4
MEM_MA_ADD1 4 3 C109 0.1U/10V_4 MEM_MB_ADD1 2 1 C102 0.1U/10V_4
MEM_MA_ADD10 RP11 4 3 47_4P2R_4 MEM_MB_ADD10 RP9 4 3 47_4P2R_4
MEM_MA_BANK0 2 1 C216 0.1U/10V_4 MEM_MB_BANK0 2 1 C139 0.1U/10V_4
+1.8VSUS +1.8VSUS
MEM_MA_WE# RP8 4 3 47_4P2R_4 MEM_MB_WE# RP7 4 3 47_4P2R_4
4,6 MEM_MA_WE# 4,6 MEM_MB_WE#
MEM_MA_CAS# 2 1 C98 0.1U/10V_4 MEM_MB_CAS# 2 1 C95 0.1U/10V_4
4,6 MEM_MA_CAS# 4,6 MEM_MB_CAS#
MEM_MA0_ODT1 RP2 4 3 47_4P2R_4 MEM_MB0_ODT1 RP1 4 3 47_4P2R_4
4,6 MEM_MA0_ODT1 4,6 MEM_MB0_ODT1
MEM_MA0_CS#1 2 1 C145 0.1U/10V_4 MEM_MB0_CS#1 2 1 C193 0.1U/10V_4
4,6 MEM_MA0_CS#1 +1.8VSUS 4,6 MEM_MB0_CS#1 +1.8VSUS
MEM_MA_ADD15 RP27 4 3 47_4P2R_4 MEM_MB_CKE1 RP26 2 1 47_4P2R_4
4,6 MEM_MB_CKE1
MEM_MA_CKE1 2 1 C274 0.1U/10V_4 MEM_MB_ADD15 4 3 C94 0.1U/10V_4
4,6 MEM_MA_CKE1
MEM_MA_ADD7 RP22 4 3 47_4P2R_4 MEM_MB_ADD7 RP23 4 3 47_4P2R_4 C157 0.1U/10V_4 +1.8VSUS
MEM_MA_ADD14 2 1 C149 0.1U/10V_4 +1.8VSUS MEM_MB_ADD14 2 1
MEM_MA_ADD6 RP19 4 3 47_4P2R_4 C268 0.1U/10V_4
MEM_MA_ADD11 2 1 C103 0.1U/10V_4 MEM_MB_ADD6 RP20 4 3 47_4P2R_4
MEM_MB_ADD11 2 1 C177 0.1U/10V_4 +1.8VSUS
C209 0.1U/10V_4 +1.8VSUS
MEM_MA_ADD2 RP14 4 3 47_4P2R_4 MEM_MB_ADD2 RP13 4 3 47_4P2R_4 C269 0.1U/10V_4
MEM_MA_ADD4 2 1 C104 0.1U/10V_4 MEM_MB_ADD4 2 1
C129 0.1U/10V_4 +1.8VSUS
MEM_MA_BANK1 RP12 2 1 47_4P2R_4 MEM_MB_BANK1 RP10 4 3 47_4P2R_4
MEM_MA_ADD0 4 3 C115 0.1U/10V_4 +1.8VSUS MEM_MB_ADD0 2 1
C267 0.1U/10V_4
4,6 MEM_MA0_CS#0 MEM_MA0_CS#0 RP6 4 3 47_4P2R_4 C245 0.1U/10V_4 4,6 MEM_MB0_CS#0 MEM_MB0_CS#0 RP5 4 3 47_4P2R_4
4,6 MEM_MA_RAS# MEM_MA_RAS# 2 1 4,6 MEM_MB_RAS# MEM_MB_RAS# 2 1 C181 0.1U/10V_4 +1.8VSUS
C143 0.1U/10V_4 +1.8VSUS
C MEM_MA_ADD13 RP4 4 3 47_4P2R_4 MEM_MB0_ODT0 RP3 2 1 47_4P2R_4 C110 0.1U/10V_4 C
4,6 MEM_MB0_ODT0
MEM_MA0_ODT0 2 1 C278 0.1U/10V_4 MEM_MB_ADD13 4 3
4,6 MEM_MA0_ODT0

PLACE CLOSE TO PROCESSOR PLACE CLOSE TO PROCESSOR


WITHIN 1.5 INCH WITHIN 1.5 INCH

+1.8VSUS +1.8VSUS

C123 C119 C254 C246 C776 C251 C122 C229 C194 C798 C187 C768
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

PLACE CLOSE TO SOCKET( PER EMI/EMC) PLACE CLOSE TO SOCKET( PER EMI/EMC)

B B
+3VS5

+3V R402
*10K/F_4

R403
CPU_MEMHOT# 3,13
*10K/F_4
3

Close DDR2 socket


+3V
U1 R401 *33_4 2
3

7 8 C31 0.1U/10V_4 Q35


A0 +VS *2N7002E-G
+3V 6 A1
5
1

A2 MEMHOT_SODIMM#
O.S 3 2
PDAT_SMB 1 Q36
2,6,13,29,37 PDAT_SMB SDA
PCLK_SMB 2 4 *2N7002E-G
2,6,13,29,37 PCLK_SMB SCL GND
1

Address:92h
*DS75U+T&R

A R400 10K/F_4 MEMHOT_SODIMM# A


+3V MEMHOT_SODIMM# 6

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
DDR2 SODIMMS TERMINATIONS
NB5/RD5
Date: Friday, August 29, 2008 Sheet 7 of 46
5 4 3 2 1
5 4 3 2 1

08
U30A
HT_CPU_NB_CAD_H0 Y25 D24 HT_NB_CPU_CAD_H0
HT_CPU_NB_CAD_L0 HT_RXCAD0P HT_TXCAD0P HT_NB_CPU_CAD_L0 HT_CPU_NB_CAD_H[15..0]
HT_CPU_NB_CAD_H1
Y24 HT_RXCAD0N PART 1 OF 6 HT_TXCAD0N D25
HT_NB_CPU_CAD_H1 HT_CPU_NB_CAD_H[15..0] 3
V22 HT_RXCAD1P HT_TXCAD1P E24
HT_CPU_NB_CAD_L1 V23 E25 HT_NB_CPU_CAD_L1 HT_CPU_NB_CAD_L[15..0]
HT_CPU_NB_CAD_H2 HT_RXCAD1N HT_TXCAD1N HT_NB_CPU_CAD_H2 HT_CPU_NB_CAD_L[15..0] 3
V25 HT_RXCAD2P HT_TXCAD2P F24
HT_CPU_NB_CAD_L2 V24 F25 HT_NB_CPU_CAD_L2 HT_CPU_NB_CLK_H[1..0]
HT_CPU_NB_CAD_H3 HT_RXCAD2N HT_TXCAD2N HT_NB_CPU_CAD_H3 HT_CPU_NB_CLK_H[1..0] 3
U24 HT_RXCAD3P HT_TXCAD3P F23
HT_CPU_NB_CAD_L3 U25 F22 HT_NB_CPU_CAD_L3 HT_CPU_NB_CLK_L[1..0]
HT_CPU_NB_CAD_H4 HT_RXCAD3N HT_TXCAD3N HT_NB_CPU_CAD_H4 HT_CPU_NB_CLK_L[1..0] 3
T25 HT_RXCAD4P HT_TXCAD4P H23
HT_CPU_NB_CAD_L4 T24 H22 HT_NB_CPU_CAD_L4 HT_CPU_NB_CTL_H[1..0]
HT_CPU_NB_CAD_H5 HT_RXCAD4N HT_TXCAD4N HT_NB_CPU_CAD_H5 HT_CPU_NB_CTL_H[1..0] 3

HYPER TRANSPORT CPU I/F


P22 HT_RXCAD5P HT_TXCAD5P J25
HT_CPU_NB_CAD_L5 P23 J24 HT_NB_CPU_CAD_L5 HT_CPU_NB_CTL_L[1..0]
HT_CPU_NB_CAD_H6 HT_RXCAD5N HT_TXCAD5N HT_NB_CPU_CAD_H6 HT_CPU_NB_CTL_L[1..0] 3
D
P25 HT_RXCAD6P HT_TXCAD6P K24 D
HT_CPU_NB_CAD_L6 P24 K25 HT_NB_CPU_CAD_L6 HT_NB_CPU_CAD_H[15..0]
HT_CPU_NB_CAD_H7 HT_RXCAD6N HT_TXCAD6N HT_NB_CPU_CAD_H7 HT_NB_CPU_CAD_H[15..0] 3
N24 HT_RXCAD7P HT_TXCAD7P K23
HT_CPU_NB_CAD_L7 N25 K22 HT_NB_CPU_CAD_L7 HT_NB_CPU_CAD_L[15..0]
HT_RXCAD7N HT_TXCAD7N HT_NB_CPU_CAD_L[15..0] 3
HT_CPU_NB_CAD_H8 AC24 F21 HT_NB_CPU_CAD_H8 HT_NB_CPU_CLK_H[1..0]
HT_CPU_NB_CAD_L8 HT_RXCAD8P HT_TXCAD8P HT_NB_CPU_CAD_L8 HT_NB_CPU_CLK_H[1..0] 3
AC25 HT_RXCAD8N HT_TXCAD8N G21
HT_CPU_NB_CAD_H9 AB25 G20 HT_NB_CPU_CAD_H9 HT_NB_CPU_CLK_L[1..0]
HT_CPU_NB_CAD_L9 HT_RXCAD9P HT_TXCAD9P HT_NB_CPU_CAD_L9 HT_NB_CPU_CLK_L[1..0] 3
AB24 HT_RXCAD9N HT_TXCAD9N H21
HT_CPU_NB_CAD_H10 AA24 J20 HT_NB_CPU_CAD_H10 HT_NB_CPU_CTL_H[1..0]
HT_CPU_NB_CAD_L10 HT_RXCAD10P HT_TXCAD10P HT_NB_CPU_CAD_L10 HT_NB_CPU_CTL_H[1..0] 3
AA25 HT_RXCAD10N HT_TXCAD10N J21
HT_CPU_NB_CAD_H11 Y22 J18 HT_NB_CPU_CAD_H11 HT_NB_CPU_CTL_L[1..0]
HT_CPU_NB_CAD_L11 HT_RXCAD11P HT_TXCAD11P HT_NB_CPU_CAD_L11 HT_NB_CPU_CTL_L[1..0] 3
Y23 HT_RXCAD11N HT_TXCAD11N K17
HT_CPU_NB_CAD_H12 W21 L19 HT_NB_CPU_CAD_H12
HT_CPU_NB_CAD_L12 HT_RXCAD12P HT_TXCAD12P HT_NB_CPU_CAD_L12
W20 HT_RXCAD12N HT_TXCAD12N J19
HT_CPU_NB_CAD_H13 V21 M19 HT_NB_CPU_CAD_H13
HT_CPU_NB_CAD_L13 HT_RXCAD13P HT_TXCAD13P HT_NB_CPU_CAD_L13
V20 HT_RXCAD13N HT_TXCAD13N L18
HT_CPU_NB_CAD_H14 U20 M21 HT_NB_CPU_CAD_H14 signals RS780 RX780
HT_CPU_NB_CAD_L14 HT_RXCAD14P HT_TXCAD14P HT_NB_CPU_CAD_L14
U21 HT_RXCAD14N HT_TXCAD14N P21
HT_CPU_NB_CAD_H15 U19 P18 HT_NB_CPU_CAD_H15
HT_CPU_NB_CAD_L15 HT_RXCAD15P HT_TXCAD15P HT_NB_CPU_CAD_L15
U18 HT_RXCAD15N HT_TXCAD15N M18 HT_TXCALP RES CHIP 1.21K 1/16W +-1%(0402)
R641 R641 P/N : CS21212FB18
HT_CPU_NB_CLK_H0 T22 H24 HT_NB_CPU_CLK_H0 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CLK_L0 HT_RXCLK0P HT_TXCLK0P HT_NB_CPU_CLK_L0
T23 HT_RXCLK0N HT_TXCLK0N H25 HT_TXCALN
HT_CPU_NB_CLK_H1 AB23 L21 HT_NB_CPU_CLK_H1
HT_CPU_NB_CLK_L1 HT_RXCLK1P HT_TXCLK1P HT_NB_CPU_CLK_L1
AA22 HT_RXCLK1N HT_TXCLK1N L20
HT_RXCALP RES CHIP 301 1/16W +-1%(0402)
HT_CPU_NB_CTL_H0 M22 M24 HT_NB_CPU_CTL_H0 R655 R655 P/N : CS13012FB14
HT_CPU_NB_CTL_L0 HT_RXCTL0P HT_TXCTL0P HT_NB_CPU_CTL_L0
M23 HT_RXCTL0N HT_TXCTL0N M25 301 ohm 1% 1.21k ohm 1%
HT_CPU_NB_CTL_H1 R21 P19 HT_NB_CPU_CTL_H1 HT_RXCALN
HT_CPU_NB_CTL_L1 HT_RXCTL1P HT_TXCTL1P HT_NB_CPU_CTL_L1
C R20 HT_RXCTL1N HT_TXCTL1N R18 C
R655 R641
R455 301/F_4 HT_RXCALP C23 B24 HT_TXCALP R454 301/F_4
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25

RS780(RX780)

This block is for side port memory only

U30D
PAR 4 OF 6
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
B
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20 B
AD15 AD19

SBD_MEM/DVO_I/F
MEM_A9(NC) MEM_DQ9/DVO_D5(NC)
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22
AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 MEM_BA1(NC)
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W18
W12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 MEM_WEb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W17
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
V14 MEM_ODT(NC)
IOPLLVDD18(NC) AE23 +1.8V
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 +1.1V
W14 MEM_CKN(NC)
IOPLLVSS(NC) AD23
AE12 MEM_COMPP(NC)
AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18

RS780(RX780)

IOPLLVDD18 - memory PLL


not applicable to RX780
IOPLLVDD- memory PLL
A not applicable to RX780 A

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom RS740/RS780-HT LINK I/F 1/5 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 8 of 46
5 4 3 2 1
5 4 3 2 1

PEG_RX15
PEG_RX#15
PEG_RX14
PEG_RX#14
PEG_RX13
PEG_RX#13
D4
C4
A3
B3
C2
U30B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
PART 2 OF 6
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
A5
B5
A4
B4
C3
C_PEG_TX15
C_PEG_TX#15
C_PEG_TX14
C_PEG_TX#14
C_PEG_TX13
C_PEG_TX#13
C845
C855
C837
C840
C829
C831
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
PEG_TX15
PEG_TX#15
PEG_TX14
PEG_TX#14
PEG_TX13
PEG_TX#13
17 PEG_RX#[15:0]

17 PEG_RX[15:0]
PEG_RX#[15:0]

PEG_RX[15:0]

Close to North Bridge


PEG_TX#[15:0]

PEG_TX[15:0]
PEG_TX#[15:0] 17

PEG_TX[15:0] 17 09
C1 GFX_RX2N GFX_TX2N B2
PEG_RX12 E5 D1 C_PEG_TX12 C826 0.1U/10V_4 PEG_TX12
PEG_RX#12 GFX_RX3P GFX_TX3P C_PEG_TX#12 C827 0.1U/10V_4 PEG_TX#12
F5 GFX_RX3N GFX_TX3N D2
PEG_RX11 G5 E2 C_PEG_TX11 C824 0.1U/10V_4 PEG_TX11
PEG_RX#11 GFX_RX4P GFX_TX4P C_PEG_TX#11 C821 0.1U/10V_4 PEG_TX#11
G6 GFX_RX4N GFX_TX4N E1
PEG_RX10 H5 F4 C_PEG_TX10 C820 0.1U/10V_4 PEG_TX10
PEG_RX#10 GFX_RX5P GFX_TX5P C_PEG_TX#10 C818 0.1U/10V_4 PEG_TX#10
H6 F3
D PEG_RX9 GFX_RX5N GFX_TX5N C_PEG_TX9 C817 0.1U/10V_4 PEG_TX9 D
J6 F1
PEG_RX#9 GFX_RX6P GFX_TX6P C_PEG_TX#9 C816 0.1U/10V_4 PEG_TX#9
J5 F2
PEG_RX8 GFX_RX6N GFX_TX6N C_PEG_TX8 C814 0.1U/10V_4 PEG_TX8
J7 H4
PEG_RX#8 GFX_RX7P GFX_TX7P C_PEG_TX#8 C815 0.1U/10V_4 PEG_TX#8
J8 H3

PCIE I/F GFX


PEG_RX7 GFX_RX7N GFX_TX7N C_PEG_TX7 C813 0.1U/10V_4 PEG_TX7
L5 H1
PEG_RX#7 GFX_RX8P GFX_TX8P C_PEG_TX#7 C811 0.1U/10V_4 PEG_TX#7
L6 H2
PEG_RX6 GFX_RX8N GFX_TX8N C_PEG_TX6 C802 0.1U/10V_4 PEG_TX6
M8 J2
PEG_RX#6 GFX_RX9P GFX_TX9P C_PEG_TX#6 C809 0.1U/10V_4 PEG_TX#6
L8 J1
PEG_RX5 GFX_RX9N GFX_TX9N C_PEG_TX5 C799 0.1U/10V_4 PEG_TX5
P7 K4
PEG_RX#5 GFX_RX10P GFX_TX10P C_PEG_TX#5 C796 0.1U/10V_4 PEG_TX#5
M7 K3
PEG_RX4 GFX_RX10N GFX_TX10N C_PEG_TX4 C800 0.1U/10V_4 PEG_TX4
P5 K1
PEG_RX#4 GFX_RX11P GFX_TX11P C_PEG_TX#4 C803 0.1U/10V_4 PEG_TX#4
M5 K2
PEG_RX3 GFX_RX11N GFX_TX11N C_PEG_TX3 C795 0.1U/10V_4 PEG_TX3
R8 M4
PEG_RX#3 GFX_RX12P GFX_TX12P C_PEG_TX#3 C792 0.1U/10V_4 PEG_TX#3
P8 M3
PEG_RX2 GFX_RX12N GFX_TX12N C_PEG_TX2 C790 0.1U/10V_4 PEG_TX2
R6 M1
PEG_RX#2 GFX_RX13P GFX_TX13P C_PEG_TX#2 C788 0.1U/10V_4 PEG_TX#2
R5 M2
PEG_RX1 GFX_RX13N GFX_TX13N C_PEG_TX1 C783 0.1U/10V_4 PEG_TX1
P4 N2
PEG_RX#1 GFX_RX14P GFX_TX14P C_PEG_TX#1 C787 0.1U/10V_4 PEG_TX#1
P3 N1
PEG_RX0 GFX_RX14N GFX_TX14N C_PEG_TX0 C780 0.1U/10V_4 PEG_TX0
T4 P1
PEG_RX#0 GFX_RX15P GFX_TX15P C_PEG_TX#0 C782 0.1U/10V_4 PEG_TX#0
T3 P2
GFX_RX15N GFX_TX15N
PCIE_RXP0 AE3 AC1 PCIE_TXP0_C C774 0.1U/10V_4
34 PCIE_RXP0 PCIE_RXN0 GPP_RX0P GPP_TX0P PCIE_TXN0_C PCIE_TXP0 34
AD4 AC2 C769 0.1U/10V_4 TO EPRESS CARD
34 PCIE_RXN0 PCIE_RXP1 GPP_RX0N GPP_TX0N PCIE_TXP1_C PCIE_TXN0 34
AE2 AB4 C127 0.1U/10V_4
37 PCIE_RXP1 GPP_RX1P GPP_TX1P PCIE_TXP1 37
PCIE_RXN1 AD3 AB3 PCIE_TXN1_C C126 0.1U/10V_4 TO WLAN
37 PCIE_RXN1 GPP_RX1N GPP_TX1N PCIE_TXN1 37
PCIE_RXP6_LAN AD1 AA2 PCIE_TXP6_C C106 0.1U/10V_4
32 PCIE_RXP6_LAN PCIE_RXN6_LAN AD2 GPP_RX2P GPP_TX2P PCIE_TXN6_C PCIE_TXP6_LAN 32
PCIE I/F GPP AA1 C105 0.1U/10V_4 TO PCIE-LAN
32 PCIE_RXN6_LAN PCIE_RXP3 GPP_RX2N GPP_TX2N PCIE_TXP3_C PCIE_TXN6_LAN 32
V5 Y1 C777 0.1U/10V_4
37 PCIE_RXP3 PCIE_RXN3 GPP_RX3P GPP_TX3P PCIE_TXN3_C PCIE_TXP3 37
W6 Y2 C775 0.1U/10V_4 TO TV TUNNER
37 PCIE_RXN3 GPP_RX3N GPP_TX3N PCIE_TXN3 37
T15 PCIE_RXP4 U5 Y4 PCIE_TXP4_C
C PCIE_RXN4 GPP_RX4P GPP_TX4P PCIE_TXN4_C T12 C
T18 U6 Y3
GPP_RX4N GPP_TX4N T10
PCIE_RXP5 U8 V1 PCIE_TXP5_C C125 0.1U/10V_4
27 PCIE_RXP5 PCIE_RXN5 GPP_RX5P GPP_TX5P PCIE_TXN5_C PCIE_TXP5 27
U7 V2 C124 0.1U/10V_4 TO PCIE CARD READER
27 PCIE_RXN5 GPP_RX5N GPP_TX5N PCIE_TXN5 27
AA8 AD7 A_TX0P_C C764 0.1U/10V_4 PCIE_NB_SB_TX0P 12
12 PCIE_SB_NB_RX0P SB_RX0P SB_TX0P A_TX0N_C C765
Y8 AE7 0.1U/10V_4 PCIE_NB_SB_TX0N 12
12 PCIE_SB_NB_RX0N SB_RX0N SB_TX0N
AA7 AE6 A_TX1P_C C763 0.1U/10V_4
12 PCIE_SB_NB_RX1P SB_RX1P SB_TX1P PCIE_NB_SB_TX1P 12
Y7 AD6 A_TX1N_C C762 0.1U/10V_4
12 PCIE_SB_NB_RX1N SB_RX1N SB_TX1N PCIE_NB_SB_TX1N 12
AA5 PCIE I/F SB AB6 A_TX2P_C C107 0.1U/10V_4
12 PCIE_SB_NB_RX2P SB_RX2P SB_TX2P PCIE_NB_SB_TX2P 12
AA6 AC6 A_TX2N_C C108 0.1U/10V_4
12 PCIE_SB_NB_RX2N SB_RX2N SB_TX2N PCIE_NB_SB_TX2N 12
W5 AD5 A_TX3P_C C760 0.1U/10V_4 PCIE_NB_SB_TX3P 12
12 PCIE_SB_NB_RX3P SB_RX3P SB_TX3P
Y5 AE5 A_TX3N_C C761 0.1U/10V_4
12 PCIE_SB_NB_RX3N SB_RX3N SB_TX3N PCIE_NB_SB_TX3N 12
AC8 NB_PCIECALRP R436 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R437 2K/F_4
AB8 +1.1V
PCE_CALRN(PCE_BCALRN)
RS780(RX780)

RX780/RS740/RS780 difference table (PCIE LINK) RS780 Display Port Support (muxed on GFX)
RS740 RX780/RS780
GFX_TX0,TX1,TX2 and TX3
NB_PCIECALRP 562R (GND) 1.27K (GND) DP0
AUX0 and HPD0

GPP4 NC GPP4
GFX_TX4,TX5,TX6 and TX7
DP1
B GPP5 NC GPP5 AUX1 and HPD1 B

A A

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom RS740/RS780-PCIE I/F 2/5 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 9 of 46
5 4 3 2 1
5 4 3 2 1

10
U30C
+3V_AVDD_NB F12 A22
AVDD1(NC) TXOUT_L0P(NC)
E12
AVDD2(NC)
PART 3 OF 6 TXOUT_L0N(NC)
B22
+1.8V_AVDDDI_NB F14 A21
AVDDDI(NC) TXOUT_L1P(NC)
G15 B21
+1.8V_AVDDQ_NB AVSSDI(NC) TXOUT_L1N(NC)
H15 B20
AVDDQ(NC) TXOUT_L2P(NC)
H14 A20
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0)
A19
S-CD1 TXOUT_L3P(NC)
E17 B19

CRT/TVOUT
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17
Y(DFT_GPIO2)
F15 B18
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
A18
TXOUT_U0N(NC)
G18 A17
RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3)
G17 B17
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
E18 D20
GREEN(DFT_GPIO1) TXOUT_U2P(NC)
F18 D21
GREENb(NC) TXOUT_U2N(NC)
D E19 D18 D
BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5)
F19 D19
BLUEb(NC) TXOUT_U3N(NC)
HSYNC_INT A11 B16
T81 DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
VSYNC_INT B11 A16
T78 DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3)
DDCDATA_INT E8 D16
T35 DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4)
DDCCLK_INT F8 D17
T39 DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1)
R135 *715/F_6 DAC_RSET_NB G14
DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
A13
+1.1V_PLLVDD VDDLTP18(NC)
A12 B13
+1.8V_PLLVDD18 PLLVDD(NC) VSSLTP18(NC)
D14

LVTM
PLLVDD18(NC) +1.8V_VDDLT_18_NB
B12 A15
PLLVSS(NC) VDDLT18_1(NC)

PLL PWR
B15
+1.8V_VDDA18HTPLL VDDLT18_2(NC) +3V_VDLT33_NB
H17 A14
VDDA18HTPLL VDDLT33_1(NC)
B14
+1.8V_VDDA18PCIEPLL VDDLT33_2(NC)
D7
VDDA18PCIEPLL1
PV stage change to short pad E7
VDDA18PCIEPLL2 VSSLT1(VSS)
C14
D15
R128 *0_4/S NB_RST#_IN VSSLT2(VSS)
12 NB_PLTRST# D8 C16
NB_PWRGD_IN SYSRESETb VSSLT3(VSS)
16 NB_PWRGD_IN A10 C18
NB_LDT_STOP# POWERGOOD VSSLT4(VSS)
C10 C20

PM
NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
C12 E20
ALLOW_LDTSTOP VSSLT6(VSS)
C22
NBHT_REFCLKP VSSLT7(VSS)
2 NBHT_REFCLKP C25
NBHT_REFCLKN HT_REFCLKP
2 NBHT_REFCLKN C24
HT_REFCLKN I
PV stage delete R127
NB_REFCLK_P E11
2 EXT_NB_OSC REFCLK_P/OSCIN(OSCIN)

CLOCKs
NB_REFCLK_N F11 I E9
REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP)
+1.1V F7
R144 NBGFX_CLKP LVDS_BLON(PCE_RCALRP)
RS780 RS780 R126 T2
GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2)
G12
4.7K_4 4.7K_4 NBGFX_CLKN T1 I/O
GFX_REFCLKN
2 NBGFX_CLKP
NBGPP_CLKP U1
2 NBGFX_CLKN GPP_REFCLKP
NBGPP_CLKN U2 I/O
T7 GPP_REFCLKN
C T6 C
SBLINK_CLKP V4
2 SBLINK_CLKP GPPSB_REFCLKP(SB_REFCLKP)
SBLINK_CLKN V3
2 SBLINK_CLKN GPPSB_REFCLKN(SB_REFCLKN)
NB_I2C_DATA A9
T79 I2C_DATA
NB_I2C_CLK B9 D9 PV change to short pad
T84
B8
I2C_CLK MIS. TMDS_HPD(NC)
D10
T77 DDC_DATA/AUX0N(NC) HPD(NC)
T80 A8
DDC_CLK/AUX0P(NC) SUS_STAT#_NB R146 *0_4/S
B7 D12 SUS_STAT# 13
AUX1P(NC) TVCLKIN(PWM_GPIO5)
A7
AUX1N(NC)
AE8
STRP_DATA THERMALDIODE_P
B10 AD8
STRP_DATA THERMALDIODE_N
G11 D13 TEST_EN
RSVD TESTMODE
selects Loading of straps from RS780_AUX_CAL C8 R456
T82 AUX_CAL(NC)
EPROM 1.82K/F_4
1 : use default vaule , default RS780(RX780)
0 : I2C Master can load strap
values from EEPROM
if connected, or use default
values if not connected
RX780 --RS780_AUX_CAL RX780 RX780 -->NC / RS780 --- ADD +1.1V_PLLVDD
+1.1V
RS780 -- SUS_ATAT +3V L42 +3V_AVDD_NB L86
RS780_AUX_CAL R459 3K_4 *BLM18PG181SN1D(180,1.5A)_6 *BLM18PG181SN1D(180,1.5A)_6 R629 PLLVDD - Graphics PLL +1.8V
not applicable to
AVDD-DAC Analog R630 0_6 *BLM18PG181SN1D(180,1.5A)_6
RX780 +1.8V_VDDLTP18_NB
not applicable to RX780
0_6 L87
R631 0_6 VDDLTP18 - LVDS or DVI/HDMI PLL
+1.8V
not applicable to RX780
Enables Debug Bus acess
B through memory T/O pads and GPIO. RS780 +1.8V
B
*BLM21PG221SN1D(220,100M,2A)_8
0 : Enable RS780 , Default VSYNC_INT R140 3K_4 L40 +1.8V_PLLVDD18 R118 *0_6 +1.8V_AVDDDI_NB AVDDI-DAC Digital +1.8V_VDDLT_18_NB
1 : Disable RS780 +3V
*BLM18PG181SN1D(180,1.5A)_6 not applicable to RX780 L89
(RS780 use VSYNC#) R632 R633 0_6 R634 0_6 VDDLT18 - LVDS or
DVI/HDMI digital
0_6
not applicable to
RX780
*BLM18PG181SN1D(180,1.5A)_6 AVDDQ-DAC Bandgap Reference
PLLVDD18 - Graphics PLL +1.8V_AVDDQ_NB not applicable to RX780
L41
Indicates if memory Side port RS780 not applicable to RX780
R635 0_6
is available or not
HSYNC_INT R145 3K_4 +3V PV change capacitor to resistor and short to GND
0: available RS780 , Default
1: Not available RS780 R148 *3K_4
( RS780 use HSYNC#)
+3V R471 *0_6/S
RS780 +VDDG_NB
+1.8V
VDDA18PCIEPLL -PCIE PLL +1.8V +VDDG_NB PV change to short pad
For extrnal EEPROM Debug only 20mils width
RS780/RX780 L39 +1.8V_VDDA18PCIEPLL RS780
Q45 R463 RS780
2

STRP_DATA R458 *3K/F_4 +VDDG_NB BLM18PG181SN1D(180,1.5A)_6 *BSS138_NL/SOT23 *4.7K_4

C359 1 3 NB_LDT_STOP# L88


3,12 CPU_LDT_STOP#
R460 2K/F_4 2.2U/6.3V_6 +3V +3V_VDLT33_NB
PV stage
*BLM21PG221SN1D(220,100M,2A)_8 C836
R462 *0_4/S change to
VDDA18HTPLL -HT LINK PLL short pad *2.2U/6.3V_6
A RX780 A
20mils width
L35 +1.8V_VDDA18HTPLL +VDDG_NB
Enables Debug Bus acess RX780 +1.8V
RS780 VDDLT33 - LVDS or DVI/HDMI ANALOG
through memory T/O pads and GPIO. BLM18PG181SN1D(180,1.5A)_6 RS780 RS740 only
PV change to R461
1 : Enable RX780 , Default S-CD1 R124 *3K_4 C353 Q44 4.7K_4
reomve R474
2

0 : Disable RX780 2.2U/6.3V_6 BSS138_NL/SOT23

Reserved only 3 CPU_LDT_REQ# 1 3 NB_ALLOW_LDTSTOP


PROJECT : QT8
Quanta Computer Inc.
R467 *0_4 Size Document Number Rev
12 ALLOW_LDTSTOP Custom
RX780 RS740/RS780-SYSTEM I/F 3/5 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 10 of 46
5 4 3 2 1
5 4 3 2 1

11

AE14
AC3
AC4

M11
AA4
AB5
AB1
AB7

AE1
AE4
AB2

D11

E14
E15

K14

L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4

G8
D3
D5

H7

R7

N4

R1
R2
R4

U4
A2
B1

E4

P6

V7

V8
V6

Y6
RX780/RS780 POWER DIFFERENCE TABLE

L1
L2
L4
L7
J4
U30F

VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
PIN NAME RX780 RS780 PIN NAME RX780 RS780
VDDHT +1.1V +1.1V IOPLLVDD NC +1.1V

VDDHTRX +1.1V +1.1V AVDD NC +3.3V


PART 6/6

D D
GROUND VDDHTTX +1.2V +1.2V AVDDDI NC +1.8V

VDDA18PCIE +1.8V +1.8V AVDDQ NC +1.8V

VDDG18 +1.8V +1.8V PLLVDD NC +1.1V


VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VDD18_MEM NC +1.8V PLLVDD18 NC +1.8V
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9

VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VDDPCIE +1.1V +1.1V VDDA18PCIEPLL +1.8V +1.8V

VDDC +1.1V +1.1V VDDA18HTPLL +1.8V +1.8V


A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25

L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
VDD_MEM NC +1.8V/1.5V VDDLTP18 NC +1.8V

VDDG33 NC +3.3V VDDLT18 NC +1.8V

IOPLLVDD18 NC +1.8V VDDLT33 NC NC

PV change from Ohm to Bead


+1.1V PV change from Ohm to Bead
VDDHT - HT
C LINK digital
+1.1V 2A for RS780M C
U30E
I/O for 0.6A +1.1V_VDDHT +1.1V_VDD_PCIE
0.7A
L81 J17 A6 R457 +1.1V VDDPCIE - PCIE-E Main power
RX780/RS780 BLM21PG221SN1D(220,100M,2A)_8 VDDHT_1 VDDPCIE_1
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6
L16 C6 BLM21PG221SN1D(220,100M,2A)_8
C758 C213 C284 C230 VDDHT_3 VDDPCIE_3 C217 C345 C289 C336 C843
M16 VDDHT_4 VDDPCIE_4 D6
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 P16 E6 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 4.7U/6.3V_6
VDDHT_5 VDDPCIE_5
VDDHTRX - HT R16 VDDHT_6 VDDPCIE_6 F6
LINK RX I/O for T16 VDDHT_7 VDDPCIE_7 G7
RX780/RS780 0.45A +1.1V_VDDHTRX VDDPCIE_8 H8
L84 H18 J9
VDDHTRX_1 VDDPCIE_9
G19 VDDHTRX_2 VDDPCIE_10 K9
BLM21PG221SN1D(220,100M,2A)_8 F20 M9
C842 C347 C838 C832 VDDHTRX_3 VDDPCIE_11
E21 VDDHTRX_4 VDDPCIE_12 L9
VDDHTTX - HT PV change from Ohm to Bead 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 D22 VDDHTRX_5 VDDPCIE_13 P9
LINK TX I/O for B23 VDDHTRX_6 VDDPCIE_14 R9
A23 VDDHTRX_7 VDDPCIE_15 T9
RX780/RS780
0.5A +1.2V 2A for RS780M+SB700 +1.2V_VDDHTTX VDDPCIE_16 V9
+1.2V L24 AE25 U9
VDDHTTX_1 VDDPCIE_17
AD24 VDDHTTX_2 7A VDDC - Core Logic power
BLM21PG221SN1D(220,100M,2A)_8 AC23 K12 +1.1V
C113 C131 C173 C191 C142 VDDHTTX_3 VDDC_1
AB22 VDDHTTX_4 VDDC_2 J14
4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 AA21 U16
VDDHTTX_5 VDDC_3 C199 C247 C259 C272 C749
Y20 VDDHTTX_6 VDDC_4 J11
W19 K15 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8

POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 M15
B +1.8V 1A for RS780M+SB700 M17
VDDHTTX_12
VDDHTTX_13
VDDC_10
VDDC_11 N12
B

600mA +1.8V_VDDA18PCIE VDDC_12 N14


+1.8V L21 J10 P11 C231 C227 C198 C766
VDDA18PCIE_1 VDDC_13 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
P10 VDDA18PCIE_2 VDDC_14 P13
BLM21PG221SN1D(220,100M,2A)_8 K10 P14
C146 C138 C201 C159 C271 C184 VDDA18PCIE_3 VDDC_15
VDDA18PCIE - M10 VDDA18PCIE_4 VDDC_16 R12
PCIE TX stage 4.7U/6.3V_6 4.7U/6.3V_6 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 L10 R15
VDDA18PCIE_5 VDDC_17
I/O for W9 VDDA18PCIE_6 VDDC_18 T11 VDD_MEM For UMA RS780 only
H9 T15
RX780/RS780 T10
VDDA18PCIE_7 VDDC_19
U12
Not applicable to RX780
VDDA18PCIE_8 VDDC_20
R10 VDDA18PCIE_9 VDDC_21 T14 memory I/O transform PV change --
Y9 VDDA18PCIE_10 VDDC_22 J16 if not
PV change to short pad AA9 VDDA18PCIE_11 1.8V(0.15A)
AB9 AE10 +1.8V_VDD_MEM L22 +1.8V
support side
VDDA18PCIE_12 VDD_MEM1(NC)
0.005A AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11 port ,those
VDD18 - RS780 I/O +1.8V R142 *0_6/S AE9 Y11 R636 0_6 *BLM21PG221SN1D(220,100M,2A)_8
VDDA18PCIE_14 VDD_MEM3(NC) pin need to
transform U10 VDDA18PCIE_15 VDD_MEM4(NC) AD10
C286 AB10 tied to GND
1U/10V_4 +1.8V_VDDG18_NB VDD_MEM5(NC)
F9 VDDG18_1(VDD18_1) VDD_MEM6(NC) AC10
G9 RS780 3.3V(0.03A)
VDDG18_2(VDD18_2) +3V_VDDG33 R143 *0_6/S
0.005A AE11 VDD18_MEM1(NC) VDDG33_1(NC) H11 +3V PV remove L22 and capacitor
PV change -- +1.8V R435 *0_6 +1.8V_VDD18_MEM AD11 H12
VDD18_MEM2(NC) VDDG33_2(NC) C341 C337
if not VDD33 - 3.3V I/O
VDD18_MEM For UMA RS780 only R637 RS780(RX780) 0.1U/10V_4 0.1U/10V_4
support side 0_6 PV change to Not applicable to RX780
port ,those Not applicable to RX780
memory I/O transform short pad
pin need to
tied to GND
A A

PV delete C130 , remove R435


PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom RS740/RS780-POWER5/5 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 11 of 46
5 4 3 2 1
5 4 3 2 1

10
17
NB_PLTRST#
PCIE_RST#
R568
R604
R572
33_4
33_4
33_4
12
27 CARD_PLTRST#
32 LAN_PLTRST# R589 33_4 U39A
R586 33_4
34 EPRESS_PLTRST#
R602 33_4 A_RST#_SB N2
SB700 P4
37 MINI_PLTRST# A_RST# PCICLK0 T65
Part 1 of 5 P3

PCI CLKS
PCICLK1 T89
C893 0.1U/10V_4 A_RX0P_C V23 P1 PCI_CLK2_R
9 PCIE_SB_NB_RX0P PCIE_TX0P PCICLK2 PCI_CLK_TPM 16
C892 0.1U/10V_4 A_RX0N_C V22 P2 PCI_CLK3_R
D 9 PCIE_SB_NB_RX0N PCIE_TX0N PCICLK3 PCI_CLK3 16 D
PLACE THESE C886 0.1U/10V_4 A_RX1P_C V24 T4 PCI_CLK4_R
9 PCIE_SB_NB_RX1P PCIE_TX1P PCICLK4 PCI_CLK4 16
C887 0.1U/10V_4 A_RX1N_C V25 T3 PCI_CLK5_R
PCIE AC 9 PCIE_SB_NB_RX1N PCIE_TX1N PCICLK5/GPIO41 PCI_CLK5 16
C895 0.1U/10V_4 A_RX2P_C U25
9 PCIE_SB_NB_RX2P PCIE_TX2P

To RS780
COUPLING CAPS C894 0.1U/10V_4 A_RX2N_C U24
9 PCIE_SB_NB_RX2N PCIE_TX2N
C889 0.1U/10V_4 A_RX3P_C T23
9 PCIE_SB_NB_RX3P PCIE_TX3P
CLOSE TO U600 9 PCIE_SB_NB_RX3N C888 0.1U/10V_4 A_RX3N_C T22 N1 PCIRST#_L R575 33_4 PCIRST#
PCIRST# 36
PCIE_TX3N PCIRST#

PCI EXPRESS INTERFACE


PCIE_NB_SB_TX0P U22
9 PCIE_NB_SB_TX0P PCIE_RX0P
PCIE_NB_SB_TX0N U21 U2
9 PCIE_NB_SB_TX0N PCIE_RX0N AD0
PCIE_NB_SB_TX1P U19 P7
9 PCIE_NB_SB_TX1P PCIE_RX1P AD1
PCIE_NB_SB_TX1N V19 V4
9 PCIE_NB_SB_TX1N PCIE_RX1N AD2
PCIE_NB_SB_TX2P R20 T1 +3V
9 PCIE_NB_SB_TX2P PCIE_RX2P AD3
PCIE_NB_SB_TX2N R21 V3
9 PCIE_NB_SB_TX2N PCIE_RX2N AD4
PCIE_NB_SB_TX3P R18 U1
9 PCIE_NB_SB_TX3P PCIE_RX3P AD5
PCIE_NB_SB_TX3N R17 V1 PE_GPIO1 R300 8.2K_4
9 PCIE_NB_SB_TX3N PCIE_RX3N AD6
AD7 V2
R497 562/F_4 PCIE_CALRP_SB T25 T2 R307 *8.2K_4
R499 2.05K/F_4 PCIE_CALRN_SB PCIE_CALRP AD8
+1.2V_PCIE_VDDR T24 PCIE_CALRN AD9 W1
AD10 T9
L55 BLM18PG181SN1D(180,1.5A)_6 +1.2V_PCIE_PVDD P24 R6 SB_GPIO65 R285 *100K/F_4
+1.2V PCIE_PVDD AD11
40mA AD12 R7
PCIE_PVDD-- PCIE PLL POWER P25 PCIE_PVSS AD13 R5
C496 C514 U8
10U/6.3V_8 1U/10V_4 AD14 R294 10K/F_4
AD15 U5 +3V
AD16 Y7
AD17 W8
AD18 V9
AD19 Y8
AD20 AA8
C
AD21 Y4 C

AD22 Y3
Y2 AD23
AD23 AD23 16
AA2 AD24
AD24 AD24 16
AB4 AD25
AD25 AD25 16
SBSRC_CLKP N25 AA1 AD26
2 SBSRC_CLKP PCIE_RCLKP/NB_LNK_CLKP AD26 AD26 16
SBSRC_CLKN N24 AB3 AD27
2 SBSRC_CLKN PCIE_RCLKN/NB_LNK_CLKN AD27 AD27 16
AB2 AD28
AD28 AD28 16
RTC_X1

PCI INTERFACE
K23 NB_DISP_CLKP AD29 AC1
Y7 K22 NB_DISP_CLKN AD30 AC2
AD1 D21
AD31 RB500V-40
3 2 M24 NB_HT_CLKP CBE0# W2
+AVBAT
M25 NB_HT_CLKN 100MHZ CBE1# U7 +3VPCU
CBE2# AA7 All the PCI bus has
4 1 RTC_X2
P17
M18
CPU_HT_CLKP CBE3# Y1
AA6
build-in Pull-UP/Down 20MIL R606 499/F_4 +3VRTC_1 R603 10_4 +3VRTC
CPU_HT_CLKN FRAME#
R565
DEVSEL# W5 resistors
D20
M23 AA5
20MIL 20MIL

+VCCRTC_2
32.768KHZ SLT_GFX_CLKP IRDY# RB500V-40
M22 SLT_GFX_CLKN TRDY# Y5
*20M_6 R559 20M_6 U6 C933
PAR C934
J19 GPP_CLK0P STOP# W6
J18 W4 1U/10V_4
C929 C928 GPP_CLK0N PERR#
V7 SERR#
SERR# 36
1U/10V_4
20MIL
18P/50V_4 18P/50V_4 SERR#
L20 GPP_CLK1P REQ0# AC3
L19 GPP_CLK1N REQ1# AD4 PV stage chagne to short pad

CLOCK GENERATOR
PV Reserve for SB700 A14 ASIC REQ2# AB7 PV stage delete R305
M19 AE6 R547 *0_4/S RF_OFF# 37
GPP_CLK2P REQ3#/GPIO70
M20 GPP_CLK2N REQ4#/GPIO71 AB6 D3E GPIO# 27
AD2

+BAT
GNT0#
B
FOR A13 chip
N22
P22
GPP_CLK3P GNT1# AE4
AD5 PV stage delete R564 20MIL B
R638 *0_4 GPP_CLK3N GNT2# PE_GPIO1
GNT3#/GPIO72 AC6
L18 25M_48M_66M_OSC GNT4#/GPIO73 AE5 LCD_BK 25

1
AD6 CLKRUN#_R R562 *0_4/S
CLKRUN# CLKRUN# 36
V5 BT1
LOCK# T57
EXT_SB_OSC J21
2 EXT_SB_OSC 25M_X1
AD3 INTE# PV stage chagne to short pad BAT_CONN
T92

2
INTE#/GPIO33 INTF#
INTF#/GPIO34 AC4 T68
R259 AE2 INTG#
INTG#/GPIO35 T90
0_4 J20 AE3 INTH#
25M_X2 INTH#/GPIO36 INTH# 29
LPC_CLK0 16
LPC_CLK1 16
LPC_CLK0 R251 22_4
FOR A12 chip LPCCLK0 G22
E22 LPC_CLK1 R501 10_4
PCLK_LPC_DEBUG 37
LPCCLK1 PCLK_LPC_KB3920 36
RTC_X1 A3 H24 LAD0
RTC XTAL

X1 LAD0 LAD0 36,37


H23 LAD1
LAD1 LAD1 36,37
J25 LAD2 C890
LAD2 LAD2 36,37
J24 LAD3
LPC

LAD3 LAD3 36,37


RTC_X2 B3 H25 LFRAME# 5.6P/50V_6 C512
X2 LFRAME# LFRAME# 36,37
H22 LDRQ0#_SB 22P/50V_4
LDRQ0# T42
AB8 LDRQ1#_SB
LDRQ1#/GNT5#/GPIO68 T53
AD7 SB_GPIO65
BMREQ#/REQ5#/GPIO65 T63
R498 10K/F_4 V15 SERIRQ
+3VS5 SERIRQ SERIRQ 36
ALLOW_LDTSTOP F23
10 ALLOW_LDTSTOP ALLOW_LDTSTP
CPU_PROCHOT# F24 C3 RTC_CLK
3 CPU_PROCHOT# CPU_PWRGD PROCHOT# RTCCLK INTRUDER_ALERT# RTC_CLK 16
3 CPU_PWRGD F22 C2 R584 *1M/F_4 +AVBAT
LDT_PG
RTC

INTRUDER_ALERT#
CPU

CPU_LDT_STOP# G25 B2 +AVBAT


3,10 CPU_LDT_STOP# LDT_STP# VBAT +AVBAT
CPU_LDT_RST# G24
3 CPU_LDT_RST# LDT_RST#
INTRUDER_ALERT# Left not connected (Southbridge
A
20MIL 1
G3 has 50-kohm internal pull-up to VBAT).
A

SB700 *SHORT_ PAD1 C931


IC CTRL(528P) SB700 A11(218S7EALA11FG) 0.1U/10V_4
P/N : AJALA110T00
2

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
SB700-PCIE/PCI/CPU/LPC 1/4
NB5/RD5
Date: Friday, August 29, 2008 Sheet 12 of 46
5 4 3 2 1
5 4 3 2 1

+3VSUS

R304

R249
NC only ,Can't be install
*2.2K_4

*2.2K_4
SB_TEST0

SB_TEST1
NEWCARD_DETECT
PV stage change to short pad

R284 *0_4/S NEWCARD_DETECT_R


U39D

SB700 Part 4 of 5
13
34 NEWCARD_DETECT E1 PCI_PME#/GEVENT4#
RI# E2 C8 CLK_48M_USB
SB_TEST2 T91 SLP_S2 RI#/EXTEVNT0# USBCLK/14M_25M_48M_OSC CLK_48M_USB 2
R293 *2.2K_4 H7 CLK_48M_USB
T60 SLP_S2/GPM9#
R273 *0_4 SUSB# F5 G8 USB_RCOMP_SB R269 11.8K/F_6

USB MISC
36 SUSB# SLP_S3# USB_RCOMP
R209 *0_4 SUSC# G1
36 SUSC# SLP_S5#

ACPI / WAKE UP EVENTS


R241 *0_4 DNBSWON# H2
+3VSUS 36 DNBSWON# PWR_BTN#
SB_PWRGD_IN H1
D 16 SB_PWRGD_IN SUS_STAT# PWR_GOOD D
K3 C566
10 SUS_STAT# SUS_STAT#
R296 *10K/F_4 SWI# SB_TEST2 H5 E6 USB_FSD13P *2.2P/50V_4
TEST2 USB_FSD13P T67
SB_TEST1 H4 E7 USB_FSD13N
TEST1 USB_FSD13N T88
SB_TEST0 H3 TEST0

USB 1.1
GATEA20 Y15 F7 USB_FDS12P
+3V SCL0/SDATA0 36 GATEA20 GA20IN/GEVENT0# USB_FSD12P T54
is 3V tolerance Clock gen/Robson/TV RCIN# W15 E8 USB_FSD12N
36 RCIN# KBRST#/GEVENT1# USB_FSD12N T59
AMD datasheet define it tuner SCI# K4
36 SCI# LPC_PME#/GEVENT3#
KBSMI# K24 H11
/DDR2/DDR2 36 KBSMI# LPC_SMI#/EXTEVNT1# USB_HSD11P USBP11+ 37
R254 2.2K_4 PCLK_SMB GEVENT5# F1 J10 TV Min-Card
T69 S3_STATE/GEVENT5# USB_HSD11N USBP11- 37
thermal/Accelerometer SYS_RST# J2
R256 2.2K_4 PDAT_SMB PCIE_WAKE# R47 *0_4/S PCIE_WAKE#_R SYS_RESET#/GPM7#
32,37 PCIE_WAKE# H6 WAKE#/GEVENT8# USB_HSD10P E11 USBP10+ 37
36 SWI# R224 *0_4 SWI# F2 F11 WLAN Min-Card
BLINK/GPM6# USB_HSD10N USBP10- 37
R211 *0_4/S SB_THERMTRIP# J6
3 CPU_THERMTRIP# SMBALERT#/THRMTRIP#/GEVENT2#
WD_PWRGD W14 A11
16 WD_PWRGD NB_PWRGD USB_HSD9P USBP9+ 31
+3VS5 USB_HSD9N B11 USBP9- 31 USB Connector
SCL1/SDATA1 is 3V/S5 tolerance R268 *0_4 RSMRST# D3
36 RSMRST# RSMRST#
AMD datasheet define it USB_HSD8P C10 USBP8+ 31
USB_HSD8N D10 USBP8- 31 USB Connector
R581 10K/F_4 SB_SMBCLK1 PV stage change to short pad
R590 10K/F_4 SB_SMBDATA1 AE18 G11
T43 SATA_IS1 SATA_IS0#/GPIO10 USB_HSD7P USBP7+ 34
T85 AD18 CLK_REQ3#/SATA_IS1#/GPIO6 USB_HSD7N H12 USBP7- 34 NEW CARD
R234 *0_4 LAN_DISABLE#_SB AA19
32,36 LAN_DISABLE# SMARTVOLT/SATA_IS2#/GPIO4
remove pull hi W17 CLK_REQ0#/SATA_IS3#/GPIO0 USB_HSD6P E12 USBP6+ 31
( chip internal SB_NWD_CLK_REQ# V17 E14 FINGERPRINT
T45 CLK_REQ1#/SATA_IS4#/FANOUT3/GPIO39 USB_HSD6N USBP6- 31
W20 CLK_REQ2#/SATA_IS5#/FANIN3/GPIO40
have pull hi ) R312 *0_4 ACZ_SPKR W21 C12

USB 2.0
28,29 ACZ_SPKR SPKR/GPIO2 USB_HSD5P USBP5+ 31
PCLK_SMB AA18 D12 BLUETOOTH
2,6,7,29,37 PCLK_SMB SCL0/GPOC0# USB_HSD5N USBP5- 31
PDAT_SMB W18
+3VS5 2,6,7,29,37 PDAT_SMB SDA0/GPOC1#
SCL2/SDATA2 is 3V/S5 tolerance SB_SMBCLK1 K1 B12
SCL1/GPOC2# USB_HSD4P USBP4+ 38
C SB_SMBDATA1 K2 A12 Docking C

GPIO
AMD datasheet define it SDA1/GPOC3# USB_HSD4N USBP4- 38
T46 AA20 DDC1_SCL/GPIO9
R509 10K/F_4 SB_SCLK2 Y18 G12
T50 DDC1_SDA/GPIO8 USB_HSD3P USBP6_CR+ 26
R506 10K/F_4 SB_SDATA2 PM_BATLOW# C1 G14 USB card reader
36 PM_BATLOW# LLB#/GPIO66 USB_HSD3N USBP6_CR- 26
SES_INT Y19
T48 SHUTDOWN#/GPIO5
27 D3E_SCI# G5 DDR3_RST#/GEVENT7# USB_HSD2P H14 USBP2+ 31
+3V H15 Carama USB
USB_HSD2N USBP2- 31

USB_HSD1P A13 USBP1+ 31


R280 4.7K_4 SUS_STAT# CPU_MEMHOT#_IN B13 E-SATA and USB Connector
3,7 CPU_MEMHOT# USB_HSD1N USBP1- 31
R275 *0_4 SMBALERT#_1
5 PM_THERM#
+3VS5 R283 10K/F_4 B14
USB_HSD0P USBP0+ 31
R591 *0_4 SYS_RST# B9 A14 USB Connector
USB_OC6#/IR_TX1/GEVENT6# USB_HSD0N USBP0- 31
B8 USB_OC5#/IR_TX0/GPM5#
R522 *0_4 NEWCARD_WAKE#_R A8 A18

USB OC
34 NEWCARD_WAKE# USB_OC4#/IR_RX0/GPM4# IMC_GPIO8
SB_JTAG_TDO A9 B18
SB_JTAG_TCK USB_OC3#/IR_RX1/GPM3# IMC_GPIO9
E5 USB_OC2#/GPM2# IMC_PWM0/IMC_GPIO10 F21
+3VS5 SB_JTAG_TDI F8 D21 SB_SCLK2
SB_JTAG_RST# USB_OC1#/GPM1# SCL2/IMC_GPIO11 SB_SDATA2
E4 USB_OC0#/GPM0# SDA2/IMC_GPIO12 F19
R536 2.2K_4 DNBSWON# E20 SB_SCLK3
SCL3_LV/IMC_GPIO13 T44
ACZ_BCLK M1 E21 SB_SDATA3
ACZ_SDOUT AZ_BITCLK SDA3_LV/IMC_GPIO14 T47
M2 AZ_SDOUT IMC_PWM1/IMC_GPIO15 E19
R310 10K/F_4 ACZ_SDIN0_R J7 D19 SB_GPIO16
AZ_SDIN0/GPIO42 IMC_PWM2/IMC_GPO16 SB_GPIO16 16
ACZ_SDIN1_R SB_GPIO17

HD AUDIO
R308 10K/F_4 J8 E18 SPI/LPC define
To Azalia R277
R609
10K/F_4
10K/F_4
ACZ_SDIN2_R
ACZ_SDIN3_R
L8
M3
AZ_SDIN1/GPIO43
AZ_SDIN2/GPIO44
IMC_PWM3/IMC_GPO17
G20
SB_GPIO17 16

ACZ_SDOUT R576 33_4 ACZ_SYNC AZ_SDIN3/GPIO46 IMC_GPIO18


ACZ_SDOUT_AUDIO 28 L6 AZ_SYNC IMC_GPIO19 G21
ACZ_RST# M4 D25

INTEGRATED uC
16 ACZ_RST# AZ_RST# IMC_GPIO20
C937 *10P/50V_4 L5 D24
AZ_DOCK_RST#/GPM8# IMC_GPIO21
B
HD audio IMC_GPIO22 C25 B
interface is IMC_GPIO23 C24
ACZ_SYNC R297 33_4 B25
ACZ_SYNC_AUDIO 28 3.3S5 voltage IMC_GPIO24
IMC_GPIO25 C23
C580 *10P/50V_4
IMC_GPIO26 B24
IMC_GPIO27 B23
ACZ_BCLK R578 33_4 A23
BIT_CLK_AUDIO 28 IMC_GPIO28
IMC_GPIO29 C22
C939 10P/50V_4 A22
IMC_GPIO30 +3VS5
IMC_GPIO31 B22
IMC_GPIO32 B21
ACZ_RST# R303 33_4 A21 +3V
ACZ_RST#_AUDIO 28 IMC_GPIO33
H19 D20

INTEGRATED uC
IMC_GPIO0 IMC_GPIO34 R507
H20 IMC_GPIO1 IMC_GPIO35 C20

2
ACZ_SDIN0_R H21 A20 2K/04
ACZ_SDIN0 28 SPI_CS2#/IMC_GPIO2 IMC_GPIO36
F25 IDE_RST#/F_RST#/IMC_GPO3 IMC_GPIO37 B20
PV stage delete R301 B19 3 1 PCLK_SMB
IMC_GPIO38 34,37 SCLK_WLAN
D22 IMC_GPIO4 IMC_GPIO39 A19
E24 D18 Q49
To Modem Board E25
D23
IMC_GPIO5
IMC_GPIO6
IMC_GPIO40
IMC_GPIO41 C18 +3VS5 2N7002EPT

ACZ_SDOUT R577 33_4 IMC_GPIO7 +3V


ACZ_SDOUT_AUDIO_MDC 30
C938 *10P/50V_4 R508

2
2K/04
SB700
ACZ_SYNC R306 33_4 3 1 PDAT_SMB
ACZ_SYNC_AUDIO_MDC 30 +3VSUS 34,37 SDATA_WLAN
C588 *10P/50V_4 C469
CN15
A 10P/50V_4 A
2N7002EPT Q50
ACZ_BCLK R579 33_4 1 SB_JTAG_TCK
BIT_CLK_AUDIO_MDC 30 2 SB_JTAG_TDO
C940 10P/50V_4 3 SB_JTAG_TDI
SB JTAG 4 SB_TEST1
5
6 PROJECT : QT8
Quanta Computer Inc.
ACZ_RST# R299 33_4 SB_JTAG_RST#
ACZ_RST#_AUDIO_MDC 30 7
8

ACZ_SDIN1_R *S/W JTAG DEBUG Size Document Number Rev


ACZ_SDIN1 30 Custom 1A
SB700-ACPI/GPIO/USB 2/4
PV stage delete R292 NB5/RD5
Date: Friday, August 29, 2008 Sheet 13 of 46
5 4 3 2 1
5 4 3 2 1

SATA PORT 0,1,2,3


can support AHCI
mode
PLACE SATA AC COUPLING
CAPS CLOSE TO SB600

C570 0.01U/16V_4 SATA_TXP0_C


U39B

SB700
ID4
BIOS setting
default 0
ID3
BIOS setting
default 0
ID2
BIOS setting
default 0
ID1
BIOS setting
default 0
ID0
base on
H/W setting
14
34 SATA_TXP0 AD9 SATA_TX0P IDE_IORDY AA24
C569 0.01U/16V_4 SATA_TXN0_C AE9 Part 2 of 5 AA25 pull Hi pull Hi pull Hi pull Hi pull hi/low SKU name
SATA1 34 SATA_TXN0 SATA_TX0N IDE_IRQ
Y22 用 820ohm 用 820ohm 用 820ohm 用 820ohm 用 10kohm
C575 0.01U/16V_4 SATA_RXN0_C IDE_A0
34 SATA_RXN0 AB10 SATA_RX0N IDE_A1 AB23
C574 0.01U/16V_4 SATA_RXP0_C AC10 Y23
34 SATA_RXP0 SATA_RX0P IDE_A2
IDE_DACK# AB24
C567 0.01U/16V_4 SATA_TXP1_C AE10 AD25
D SATA ODD 34 SATA_TXP4
C565 0.01U/16V_4 SATA_TXN1_C AD10
SATA_TX1P IDE_DRQ
AC25 0 0 0 0 0 CROFT 1.0 D
34 SATA_TXN4 SATA_TX1N IDE_IOR#
IDE_IOW# AC24 UMA
C558 0.01U/16V_4 SATA_RXN1_C AD11 Y25
34 SATA_RXN4 SATA_RX1N IDE_CS1#
C562 0.01U/16V_4 SATA_RXP1_C AE11 Y24
34 SATA_RXP4 SATA_RX1P IDE_CS3#

31 SATA_TXP2 AB12 SATA_TX2P IDE_D0/GPIO15 AD24 0 0 0 0 1 CROFT 1.0


31 SATA_TXN2 AC12 SATA_TX2N IDE_D1/GPIO16 AD23 discrete

ATA 66/100/133
AE22
E-SATA AE12
IDE_D2/GPIO17
AC22
31 SATA_RXN2 SATA_RX2N IDE_D3/GPIO18
31 SATA_RXP2 AD12 SATA_RX2P IDE_D4/GPIO19 AD21
IDE_D5/GPIO20 AE20 CROFT 1.1
AD13 AB20 0 0 0 1 0 UMA

SERIAL ATA
SATA_TX3P IDE_D6/GPIO21
AE13 SATA_TX3N IDE_D7/GPIO22 AD19
IDE_D8/GPIO23 AE19
AB14 SATA_RX3N IDE_D9/GPIO24 AC20
SATA PORT 4,5 AC14 SATA_RX3P IDE_D10/GPIO25 AD20
are only IDE_D11/GPIO26 AE21 0 0 0 1 1 CROFT 1.1
AE14 SATA_TX4P IDE_D12/GPIO27 AB22 discrete
support IDE AD14 SATA_TX4N IDE_D13/GPIO28 AD22
mode IDE_D14/GPIO29 AE23
AD15 SATA_RX4N IDE_D15/GPIO30 AC23
AE15 SATA_RX4P
AB16 SATA_TX5P
AC16 SATA_TX5N
SPI_DI/GPIO12 G6 T61
AE16 SATA_RX5N SPI_DO/GPIO11 D2 T94
AD16 SATA_RX5P SPI_CLK/GPIO47 D1 T95
R361 F4

SPI ROM
SPI_HOLD#/GPIO31 T70
C R265 1K/F_4 SATA_RBIAS_PN V12 F3 PV stage change to short pad C
SATA_CAL SPI_CS#/GPIO32 T64
SATA_X1 Y12 U15 R266 *0_4/S
SATA_X1 LAN_RST#/GPIO13 BT_OFF# 31
J1 ROM_RST#
ROM_RST#/GPIO14 T93
PLACE SATA_CAL SATA_X2 AA12 SATA_X2 SB_FANOUT0
M8 T55
RES VERY CLOSE SB_SATA_LED# W11
FANOUT0/GPIO3
M5
SATA_ACT#/GPIO67 FANOUT1/GPIO48
TO BALL OF SB700 PLVDD_SATA-- FANOUT2/GPIO49 M7 CHIPSET_PCIE_SLOW_SB# 2
SATA PLL +3V R375 10K/F_4
SB_FANTACH0

SATA PWR
NOTE: +1.2V_PLLVDD_SATA AA11 PLLVDD_SATA FANIN0/GPIO50 P5 T66
POWER P8 SB_FANTACH1
FANIN1/GPIO51 T58
R361 IS 1K 1% FOR 25MHz +3V_XTLVDD_SATA W12 R8 PORT_80_PWR_DWN
XTLVDD_SATA FANIN2/GPIO52 T62
XTAL, 4.99K 1% FOR 100MHz XTLVDD_SATA-- SATA C6
TEMP_COMM BOARD_ID0
INTERNAL CLOCK crystal power TEMPIN0/GPIO61 B6 +3VS5 R286 10K_4 R291 *10K_4
A6

HW MONITOR
TEMPIN1/GPIO62
TEMPIN2/GPIO63 A5
C545 B5 R279 *820_4 BOARD_ID1 R278 *820_4
SATA_X1 TEMPIN3/TALERT#/GPIO64

VIN0/GPIO53 A4 ACCLED_EN 30
27P/50V_4 B4 R553 *0_4 R270 *820_4 BOARD_ID2 R262 *820_4
VIN1/GPIO54 BT_COMBO_EN# 37
2

Y4 C4
R263 VIN2/GPIO55 BOARD_ID0
VIN3/GPIO56 D4
25MHZ 10M_6 D5 BOARD_ID1 R549 *820_4 BOARD_ID3 R543 *820_4
VIN4/GPIO57 BOARD_ID2
D6
1

C529 VIN5/GPIO58 BOARD_ID3


VIN6/GPIO59 A7
SATA_X2 B7 BOARD_ID4 PV stage change to short pad R548 *820_4 BOARD_ID4 R544 *820_4
VIN7/GPIO60
27P/50V_4 +3VS5
B 5mA +3V_VDD_HWM B
F6 L64 *0_6/S
AVDD
SB700 G7 C585 C582 AVDD--H/W monitor
+3V AVSS *0.1U/10V_4 *2.2U/6.3V_6 Analog power

C666
+1.2V ( 1.2V @ 60mA) +1.2V_PLLVDD_SATA
0.1U/10V_4 77mA
U22 L59
5

TC7SH08FU
2 SB_SATA_LED# PBY201209T-181Y-N
30 SATA_LED# 4 C540 C561
1 1U/10V_4 0.1U/10V_4 C553 C552
22U/6.3V_8 22U/6.3V_8
3

+3V
1mA
( 3.3V @ 1.2mA) +3V_XTLVDD_SATA

L58
BLM18PG181SN1D(180,1.5A)_6

C548
1U/10V_4

A A
Place near
ball

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom SB700-ACPI/GPIO/USB 2/4 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 14 of 46
5 4 3 2 1
5 4 3 2 1

PLACE ALL THE DECOUPLING CAPS ON PV change

15
THIS SHEET CLOSE TO SB AS POSSIBLE. to use
short pad
VDD-- S/B CORE power
U39C +1.2V_VCC_SB_R
VDDQ--3.3V I/O power 0.8A 604mA R207 *0_8/S
L9
SB700 L15 2 1 U39E
+3V VDDQ_1 VDD_1 +1.2V
M9 VDDQ_2 Part 3 of 5 VDD_2 M12

1
T15 VDDQ_3 VDD_3 M14 SB700

1
C587 U9 N13 A2

CORE S0
C568 C572 C583 C577 C559 C564 C584 VDDQ_4 VDD_4 C544 C556 C550 C543 C475 VSS_1
U16 P12 A25

PCI/GPIO I/O
100U/6.3V_3528 10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 VDDQ_5 VDD_5 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8 VSS_2
2 U17 P14 B1

2
D VDDQ_6 VDD_6 VSS_3 D
V8 VDDQ_7 VDD_7 R11 VSS_4 D7
W7 VDDQ_8 VDD_8 R15 T10 AVSS_SATA_1 VSS_5 F20
Y6 VDDQ_9 VDD_9 T16 U10 AVSS_SATA_2 VSS_6 G19
AA4 VDDQ_10 U11 AVSS_SATA_3 VSS_7 H8
AB5 VDDQ_11 U12 AVSS_SATA_4 VSS_8 K9
1.8V : FLASH MEMORY MODE(DEFAULT) AB21 VDDQ_12
CKVDD_1.2V-- Internal V11 AVSS_SATA_5 VSS_9 K11
clock Generator I/O V14 K16
3.3V: IDE MODE +VDD33_18 +1.2V_CKVDD W9
AVSS_SATA_6 VSS_10
L4
power AVSS_SATA_7 VSS_11
VDD33_18--3.3V IDE I/O power Y9 AVSS_SATA_8 VSS_12 L7
1.8V flash memory I/O power 0.45A 286mA Y11 AVSS_SATA_9 VSS_13 L10
+3V Y20 L21 L56 +1.2V Y14 L11
VDD33_18_1 CKVDD_1.2V_1 AVSS_SATA_10 VSS_14

IDE/FLSH I/O

CLKGEN I/O
AA21 VDD33_18_2 CKVDD_1.2V_2 L22 Y17 AVSS_SATA_11 VSS_15 L12
PV change to delete R237 AA22 VDD33_18_3 CKVDD_1.2V_3 L24 BLM18PG181SN1D(180,1.5A)_6 AA9 AVSS_SATA_12 VSS_16 L14
1

1
AE25 VDD33_18_4 CKVDD_1.2V_4 L25 AB9 AVSS_SATA_13 VSS_17 L16
C497 C517 C498 C509 C499 C516 C500 C485 C489 AB11 M6
10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 2.2U/6.3V_6 AVSS_SATA_14 VSS_18
AB13 M10
2

2
2.2U/6.3V_6 0.1U/50V_6 0.1U/50V_6 AVSS_SATA_15 VSS_19
AB15 AVSS_SATA_16 VSS_20 M11
AB17 AVSS_SATA_17 VSS_21 M13
AC8 AVSS_SATA_18 VSS_22 M15
AD8 AVSS_SATA_19 VSS_23 N4
AE8 N12
+1.2V_PCIE_VDDR
POWER AVSS_SATA_20 VSS_24
VSS_25 N14
VSS_26 P6
PCIE_VDDR--PCIE I/O power 844mA VSS_27 P9
+1.2V L95 P18 S5_3.3--3.3v standby power P10
PCIE_VDDR_1 +3VALW_R VSS_28
P19 PCIE_VDDR_2 A15 AVSS_USB_1 VSS_29 P11

A-LINK I/O
BLM18PG181SN1D(180,1.5A)_6 P20 0.01A R519 *0_8/S B15 P13
PCIE_VDDR_3 AVSS_USB_2 VSS_30
1

1
P21 PCIE_VDDR_4 S5_3.3V_1 A17 2 1 +3VS5 C14 AVSS_USB_3 VSS_31 P15
C487 C513 C495 C515 C504 C494 R22 A24 D8 R1
10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 PCIE_VDDR_5 S5_3.3V_2 AVSS_USB_4 VSS_32
C R24 B17 D9 R2 C
2

2
PCIE_VDDR_6 S5_3.3V_3 AVSS_USB_5 VSS_33

1
3.3V_S5 I/O
R25 PCIE_VDDR_7 S5_3.3V_4 J4 D11 AVSS_USB_6 VSS_34 R4
S5_3.3V_5 J5 C898 C581 C899 PV change D13 AVSS_USB_7 VSS_35 R9

GROUND
L1 0.1U/10V_4 0.1U/10V_4 10U/6.3V_8 D14 R10
to use

2
S5_3.3V_6 AVSS_USB_8 VSS_36
S5_3.3V_7 L2 D15 AVSS_USB_9 VSS_37 R12
+1.2V_AVDD_SATA short pad E15 R14
AVSS_USB_10 VSS_38
AVDD_SATA--SATA phy power 0.2A F12 AVSS_USB_11 VSS_39 T11
+1.2V L97 AA14 F14 T12
AVDD_SATA_1 AVSS_USB_12 VSS_40
AB18 AVDD_SATA_4 G9 AVSS_USB_13 VSS_41 T14
BLM18PG181SN1D(180,1.5A)_6 AA15 0.22A S5_1.2V--1.2V standby power H9 U4

SATA I/O
AVDD_SATA_2 AVSS_USB_14 VSS_42
1

AA17 G2 H17 U14

CORE S5
AVDD_SATA_3 S5_1.2V_1 +1.2V_S5 AVSS_USB_15 VSS_43
C906 C903 C908 C907 C904 AC18 G4 J9 V6
AVDD_SATA_5 S5_1.2V_2 AVSS_USB_16 VSS_44

1
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 1U/10V_4 1U/10V_4 AD17 J11 Y21
2

AVDD_SATA_6 C932 C930 AVSS_USB_17 VSS_45


AE17 AVDD_SATA_7 J12 AVSS_USB_18 VSS_46 AB1
0.2A 0.1U/10V_4 0.1U/10V_4 J14 AB19

2
AVSS_USB_19 VSS_47
USB_PHY_1.2V_1 A10 +1.2V_USB_PHY_R J15 AVSS_USB_20 VSS_48 AB25
USB_PHY_1.2V_2 B10 K10 AVSS_USB_21 VSS_49 AE1
K12 AVSS_USB_22 VSS_50 AE24
K14 AVSS_USB_23
+3V_AVDD_USB K15 AVSS_USB_24
AVDDTX--USB Phy PCIE_CK_VSS_9 P23
For support USB wakeup-->3V_S5 Analog I/O power V5_VREF--PCI 5V TOLERANCE PCIE_CK_VSS_10 R16
0.2A +5V_VREF
4mA PCIE_CK_VSS_11 R19
+3VS5 L96 A16 AE7 R552 1 2 1K/F_4 +5V T17
AVDDTX_0 V5_VREF PCIE_CK_VSS_12
B16 AVDDTX_1 PCIE_CK_VSS_13 U18
BLM18PG181SN1D(180,1.5A)_6 C16 J16 +3V_AVDDCK 7mA H18 U20
AVDDTX_2 AVDDCK_3.3V PCIE_CK_VSS_1 PCIE_CK_VSS_14
1

D16 AVDDTX_3 1 2 +3V J17 PCIE_CK_VSS_2 PCIE_CK_VSS_15 V18

1
C911 C905 C901 C910 D17 PLL K17 +1.2V_AVDDCK 44mA D36 J22 V20
10U/6.3V_8 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 AVDDTX_4 AVDDCK_1.2V C925 CH501H-40PT PCIE_CK_VSS_3 PCIE_CK_VSS_16
E17 K25 V21
2

AVDDTX_5 PCIE_CK_VSS_4 PCIE_CK_VSS_17


USB I/O

F15 E9 +3V_AVDDC 1U/10V_4 M16 W19

2
B AVDDRX_0 AVDDC PCIE_CK_VSS_5 PCIE_CK_VSS_18 B
F17 AVDDRX_1 M17 PCIE_CK_VSS_6 PCIE_CK_VSS_19 W22
F18 AVDDRX_2 16mA M21 PCIE_CK_VSS_7 PCIE_CK_VSS_20 W24
G15 AVDDRX_3 P16 PCIE_CK_VSS_8 PCIE_CK_VSS_21 W25
G17 AVDDRX_4
G18 AVDDRX_5 F9 AVSSC AVSSCK L17
Part 5 of 5
1

SB700 SB700
C539 C547 C909 C523 C522 C902 C546
1U/10V_4 1U/10V_4 1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
2

+3VS5 +3V_AVDDC
+1.2V_S5 +1.2V_USB_PHY_R AVDDC--USB Analog PLL power
L62
PV change R538 *0_8/S USB_PHY_1.2V--USB Phy BLM18PG181SN1D(180,1.5A)_6
to use 2 1 digital power

1
short pad C549 C551
1

0.1U/10V_4 10U/6.3V_8

2
C913 C914 C915
0.1U/10V_4 0.1U/10V_4 10U/6.3V_8
2

A +1.2V A
+1.2V_AVDDCK +3V +3V_AVDDCK
AVDDCK_1.2--USB Phy AVDDCK_3.3--Analog
digital power system PLL power
L57 L60
BLM18PG181SN1D(180,1.5A)_6 BLM18PG181SN1D(180,1.5A)_6
PROJECT : QT8
1

C521 C528
2.2U/6.3V_6 2.2U/6.3V_6 Quanta Computer Inc.
2

Size Document Number Rev


Custom SB700-PWR/DECOUPLING 4/4 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 15 of 46
5 4 3 2 1
5 4 3 2 1

OVERLAP COMMON PADS WHERE


POSSIBLE FOR DUAL-OP RESISTORS. 16
It must ready
refore RSMRST# REQUIRED STRAPS +3VS5

1
D +3V +3V +3VS5 D

R513
2.2K_4

2
1

1
intermal have pull
Hi 10K , confirm AMD
R597 R598 R309
10K/F_4 10K/F_4 *10K/F_4 ward this pull Hi
not need 13 SB_GPIO17
13 SB_GPIO16

2
12 PCI_CLK_TPM 12 PCI_CLK4 12 LPC_CLK0 12 RTC_CLK

1
12 PCI_CLK3 12 PCI_CLK5 12 LPC_CLK1 13 ACZ_RST#
GPIO16 R512 R257
*2.2K_4 2.2K_4 GPIO17

2
1

1
1

1
R601
10K/F_4 R298
R600 R596 R599 R239 R503 10K/F_4 TYPE GPIO16 GPIO17
2

10K/F_4 *10K/F_4 *10K/F_4 10K/F_4 10K/F_4

2
2

2
FWH L : 2.2K L : 2.2K
pull down pull down
PCI_CLK_TPM PCI_CLK3 PCI_CLK4 PCI_CLK5 LPC_CLK0 LPC_CLK1 RTC_CLK AZ_RST#
LPC NC L : 2.2K
C
pull down C
PULL BOOTFAIL USE RESERVED RESERVED IMC CLKGEN INTERNAL ENABLE PCI
HIGH TIMER DEBUG ENABLED ENABLED RTC ROM BOOT
L : 2.2K
ENABLED STRAPS SPI NC
pull down
DEFAULT

EXT. RTC
PULL BOOTFAIL IGNORE IMC CLKGEN (PD on X1, DISABLE PCI
LOW TIMER DEBUG DISABLED DISABLED apply ROM BOOT RSVD NC NC
DISABLED STRAPS 32KHz to DEFAULT
DEFAULT DEFAULT DEFAULT DEFAULT RTC_CLK)

NB_PWRGD_IN:
RS780/RX780 = 1.8V; RS740 = 3.3V

DEBUG STRAPS Do NOT share it with SB_PWRGD when use Internal Clk Gen
(Need SB PLL initialize firstly)
SB700 HAS 15K INTERNAL PU FOR PCI_AD[28:23] PV stage delete R282
R290 10K/F_4 SB_PWRGD_IN
+3VS5 SB_PWRGD_IN 13

C576
*2.2U/6.3V_6 +1.8V
12 AD28 +1.8V
NB/SB POWER GOOD CIRCUIT
B
12 AD27 B
12 AD26
12 AD25 U16 R271
12 AD24 1 5 C560 *0.1U/10V_4 300_4
D18 CH501H-40PT NC VCC
12 AD23
1 2 2 RX780,RS780
41 VRM_PWRGD A
1

3 4 R276 *33_4 NB_PWRGD_IN


GND Y NB_PWRGD_IN 10
R593 R573 R594 R580 R574 R595
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 Use 2.2K PD. D19 CH501H-40PT *NL17SZ17DFT2G
1 2 SOT-353
2

5,36 ECPWROK
PV stage delete R274

WD_PWRGD 13

PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23

USE USE PCI USE ACPI USE IDE USE DEFAULT RESERVED
PULL LONG PLL BCLK PLL PCIE STRAPS
HIGH RESET
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT

PULL USE BYPASS BYPASS BYPASS IDE USE EEPROM


SHORT PCI PLL ACPI PLL PCIE STRAPS AL17SZ17000 IC(5P) NL17SZ17DFT2G(SOT-353) SOT-353
LOW
A RESET BCLK ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5) SOT23-5 A

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom SB700-STRAPS 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 16 of 46
5 4 3 2 1
5 4 3 2 1

17
U31A

D
2.5Gb/s bit rate PART 1 OF 7 D
PEG_TX0 AK33 AG31 C_PEG_RXP0 0.1U/10V_4 C156
9 PEG_TX0 PCIE_RX0P PCIE_TX0P PEG_RX0 9
PEG_TX#0 AJ33 AG30 C_PEG_RXN0 0.1U/10V_4 C161
9 PEG_TX#0 PCIE_RX0N PCIE_TX0N PEG_RX#0 9

PEG_TX1 AJ35 AF31 C_PEG_RXP1 0.1U/10V_4 C165


9 PEG_TX1 PCIE_RX1P PCIE_TX1P PEG_RX1 9
PEG_TX#1 AJ34 P AF30 C_PEG_RXN1 0.1U/10V_4 C176
9 PEG_TX#1 PCIE_RX1N PCIE_TX1N PEG_RX#1 9
C
9 PEG_TX2
PEG_TX2 AH35 PCIE_RX2P
I PCIE_TX2P AF28 C_PEG_RXP2 0.1U/10V_4 C152
PEG_RX2 9
PEG_TX#2 AH34 AF27 C_PEG_RXN2 0.1U/10V_4 C141
9 PEG_TX#2 PCIE_RX2N - PCIE_TX2N PEG_RX#2 9
E
PEG_TX3 AG35 X AD31 C_PEG_RXP3 0.1U/10V_4 C190
9 PEG_TX3 PCIE_RX3P PCIE_TX3P PEG_RX3 9
PEG_TX#3 AG34 AD30 C_PEG_RXN3 0.1U/10V_4 C180
9 PEG_TX#3 PCIE_RX3N P PCIE_TX3N PEG_RX#3 9

R
PEG_TX4 AF33 AD28 C_PEG_RXP4 0.1U/10V_4 C197
9 PEG_TX4 PCIE_RX4P E PCIE_TX4P PEG_RX4 9
PEG_TX#4 AE33 AD27 C_PEG_RXN4 0.1U/10V_4 C208
9 PEG_TX#4 PCIE_RX4N PCIE_TX4N PEG_RX#4 9
S
PEG_TX5 AE35
S AB31 C_PEG_RXP5 0.1U/10V_4 C212
9 PEG_TX5 PCIE_RX5P PCIE_TX5P PEG_RX5 9
PEG_TX#5 AE34 AB30 C_PEG_RXN5 0.1U/10V_4 C218
9 PEG_TX#5 PCIE_RX5N PCIE_TX5N PEG_RX#5 9
C I C

9 PEG_TX6
PEG_TX6 AD35 N AB28 C_PEG_RXP6 0.1U/10V_4 C228
PEG_RX6 9
PEG_TX#6 PCIE_RX6P PCIE_TX6P C_PEG_RXN6 0.1U/10V_4 C238
9 PEG_TX#6 AD34 PCIE_RX6N T PCIE_TX6N AB27 PEG_RX#6 9
E
PEG_TX7 AC35 R AA31 C_PEG_RXP7 0.1U/10V_4 C244
9 PEG_TX7 PCIE_RX7P PCIE_TX7P PEG_RX7 9
PEG_TX#7 AC34 AA30 C_PEG_RXN7 0.1U/10V_4 C258
9 PEG_TX#7 PCIE_RX7N F PCIE_TX7N PEG_RX#7 9
A
PEG_TX8 AB33 AA28 C_PEG_RXP8 0.1U/10V_4 C266
9 PEG_TX8
PEG_TX#8 AA33
PCIE_RX8P C PCIE_TX8P
AA27 C_PEG_RXN8 0.1U/10V_4 C279
PEG_RX8 9
9 PEG_TX#8 PCIE_RX8N PCIE_TX8N PEG_RX#8 9
E
PEG_TX9 AA35 W31 C_PEG_RXP9 0.1U/10V_4 C285
9 PEG_TX9 PCIE_RX9P PCIE_TX9P PEG_RX9 9
PEG_TX#9 AA34 W30 C_PEG_RXN9 0.1U/10V_4 C292
9 PEG_TX#9 PCIE_RX9N PCIE_TX9N PEG_RX#9 9

PEG_TX10 Y35 W28 C_PEG_RXP10 0.1U/10V_4 C295


9 PEG_TX10 PCIE_RX10P PCIE_TX10P PEG_RX10 9
PEG_TX#10 Y34 W27 C_PEG_RXN10 0.1U/10V_4 C308
9 PEG_TX#10 PCIE_RX10N PCIE_TX10N PEG_RX#10 9

PEG_TX11 W35 V31 C_PEG_RXP11 0.1U/10V_4 C309


9 PEG_TX11 PCIE_RX11P PCIE_TX11P PEG_RX11 9
PEG_TX#11 W34 V30 C_PEG_RXN11 0.1U/10V_4 C316
9 PEG_TX#11 PCIE_RX11N PCIE_TX11N PEG_RX#11 9
B B

PEG_TX12 V33 V28 C_PEG_RXP12 0.1U/10V_4 C317


9 PEG_TX12 PCIE_RX12P PCIE_TX12P PEG_RX12 9
PEG_TX#12 U33 V27 C_PEG_RXN12 0.1U/10V_4 C335
9 PEG_TX#12 PCIE_RX12N PCIE_TX12N PEG_RX#12 9

PEG_TX13 U35 U31 C_PEG_RXP13 0.1U/10V_4 C338


9 PEG_TX13 PCIE_RX13P PCIE_TX13P PEG_RX13 9
PEG_TX#13 U34 U30 C_PEG_RXN13 0.1U/10V_4 C342
9 PEG_TX#13 PCIE_RX13N PCIE_TX13N PEG_RX#13 9

PEG_TX14 T35 U28 C_PEG_RXP14 0.1U/10V_4 C343


9 PEG_TX14 PCIE_RX14P PCIE_TX14P PEG_RX14 9
PEG_TX#14 T34 U27 C_PEG_RXN14 0.1U/10V_4 C348
9 PEG_TX#14 PCIE_RX14N PCIE_TX14N PEG_RX#14 9

PEG_TX15 R35 R31 C_PEG_RXP15 0.1U/10V_4 C350


9 PEG_TX15 PCIE_RX15P PCIE_TX15P PEG_RX15 9
PEG_TX#15 R34 R30 C_PEG_RXN15 0.1U/10V_4 C352
9 PEG_TX#15 PCIE_RX15N PCIE_TX15N PEG_RX#15 9

Clock Calibration
EXT_GFX_CLKP AJ31
+1.1V
2 EXT_GFX_CLKP PCIE_REFCLKP
EXT_GFX_CLKN AJ30 AG26 M86_PCIECALRN R101 2K/F_4 +1.1V_PCIE_VDDC
2 EXT_GFX_CLKN PCIE_REFCLKN PCIE_CALRN
SM Bus AJ27 M86_PCIECALRP
PCIE_CALRP
AK35 NC_SMB_DATA
A AK34 AF3 A
NC_SMBCLK NC_DRAM_0 R93
NC_DRAM_1 AG9
PCIE_RST# AM32 AK29 1.27K/F_4
PROJECT : QT8
12 PCIE_RST# PERSTB NC_AC_BATT
NC_FAN_TACH AK14

M86-M Quanta Computer Inc.


Size Document Number Rev
B 1A
M86 PCIE
NB5/RD5
Date: Friday, August 29, 2008 Sheet 17 of 46
5 4 3 2 1
5 4 3 2 1

+1.8V +/-3% (320mA)


18
+1.8V L17 BK1608HS220 LVDDR
U31B
U31F
22 ohm/1A PART 2 OF 7
C93 C168 C111 PART 7 OF 7
AM12 AN9 TXC_HDMI_L-
VIP_0 TXCAM_DPA0P TXC_HDMI_L- 25
10U/6.3V_8 1U/10V_4 0.1U/10V_4 AJ26 AG7 R102 *10K_4 AL12 AN10 TXC_HDMI_L+
LVDDR_1 ControlVARY_BL 23 VIP1 VIP_1 TXCAP_DPA0N TXC_HDMI_L+ 25
AH26 DPST_PWM 25 AJ12
LVDDR_2 VIP_2 VIP / I2C TX0_HDMI_L-
AJ6 DISP_ON 25 23 VIP3 AH12 AR10 TX0_HDMI_L- 25
DIGON VIP_3 TX0M_DPA1P TX0_HDMI_L+
AM10 AP10 TX0_HDMI_L+ 25
D VIP_4 TX0P_DPA1N D
AK27 AL10
L23 BLM15BD121SN1 LVDDC LVDDC_1 VIP_5 TX1_HDMI_L-
+1.8V AL27 AK24 TXUCLKOUT+ 25 AJ10 AR11 TX1_HDMI_L- 25
LVDDC_2 TXCLK_UP VIP_6 TX1M_DPA2P TX1_HDMI_L+
AL24 TXUCLKOUT- 25 AH10 AP11 TX1_HDMI_L+ 25
C133 C153 C160 TXCLK_UN VIP_7 TX1P_DPA2N
+1.8V +/-3% ( 80mA ) AM24
LVSSR_1 TXOUT_U0P
AN27 TXUOUT0+ 25
AN28 AN26 AM9 AR12 TX2_HDMI_L-
LVSSR_2 TXOUT_U0N TXUOUT0- 25 VHAD_0 TX2M_DPA3P TX2_HDMI_L- 25
120 ohm/300mA 10U/6.3V_8 1U/10V_4 0.1U/10V_4 AN21 AP27 T8 AL9 AP12 TX2_HDMI_L+
LVSSR_3 TXOUT_U1P TXUOUT1+ 25 VHAD_1 TX2P_DPA3N TX2_HDMI_L+ 25
AN24 AR27 TXUOUT1- 25
LVSSR_4 TXOUT_U1N
AN25 AG24 TXUOUT2+ 25 AJ9 AR14
LVSSR_5 TXOUT_U2P VPHCTL TXCBM_DPB0P
AM22 AH24 TXUOUT2- 25 AP14
LVSSR_6 TXOUT_U2N TXCBP_DPB0N
AP21 AK26 AL7

LVDS channel
LVSSR_7 TXOUT_U3P VPCLK0
AP26 AL26 AK7 AR15
LVSSR_8 TXOUT_U3N VIPCLK TX3M_DPB1P
AM27 AP15
LVSSR_9 TX3P_DPB1N
AR21 AR22 TXLCLKOUT+ 25 23 PSYNC AM7
LVSSR_10 TXCLK_LP PSYNC
AR26 AP22 TXLCLKOUT- 25 AR16
LVSSR_11 TXCLK_LN TX4M_DPB2P
AM26 AN23 TXLOUT0+ 25 AJ7 AP16
LVSSR_12 TXOUT_L0P T11 DVALID TX4P_DPB2N
AJ22 AN22 TXLOUT0- 25
LVSSR_13 TXOUT_L0N
AJ24 AP23 TXLOUT1+ 25 AK6 AR17
LVSSR_14 TXOUT_L1P SDA TX5M_DPB3P
AR23 TXLOUT1- 25
T13 AM6 AP17 120 ohm/300mA
TXOUT_L1N T9 SCL TX5P_DPB3N
+1.8V +/-3% ( 40mA ) TXOUT_L2P
AP24 TXLOUT2+ 25
AR24 AN8 AM14 TPVDD L26 BLM15BD121SN1 +1.8V +/-3% ( 40mA )
TXOUT_L2N TXLOUT2- 25 DVPCNTL__MVP_0 DPA_PVDD +1.8V
L15 BLM15BD121SN1 LPVDD AL22 AP25 AP8 AL14
+1.8V LPVDD TXOUT_L3P DVPCNTL__MVP_1 DPA_PVSS
120 ohm/300mA AK22 AR25 AG1 C144 C154 C175
C91 C100 C116 LPVSS TXOUT_L3N DVPCNTL_0 INTEGRATED
AH3 AH17
DVPCNTL_1 DPB_PVDD 1U/10V_4 0.1U/10V_4 10U/6.3V_8
AH2 TMDS/DP AG17
10U/6.3V_8 1U/10V_4 0.1U/10V_4 M86-M DVPCNTL_2 DPB_PVSS
AH1
DVPCLK
AJ3 AN19
DVPDATA_0 DPB_VDDR_1 DPB_VDDR L18 BLM15BD121SN1
AJ2
DVPDATA_1 MULTI_GFX DPB_VDDR_2
AN20 +1.1V +1.1V +/-3% ( 200mA )
AJ1 AP19
DVPDATA_2 EXTERNAL DPA_VDDR_3 C88 C89 C96
AK2 AR19
DVPDATA_3 TMDS DPA_VDDR_4
AK1
DVPDATA_4 1U/10V_4 0.1U/10V_4 10U/6.3V_8
AL3 AN18
DVPDATA_5 DPB_VSSR_1
AL2 AP18
DVPDATA_6 DPB_VSSR_2
RAM_STRAP_ID[3:0] Vendor Type Vendor P/N AL1 AR18
DVPDATA_7 DPB_VSSR_3 DPA_VDDR L76 BLM15BD121SN1
AM3
DVPDATA_8 DPB_VSSR_4
AN16 +1.1V +1.1V +/-3% (200mA)
0000 Qimonda (Infineon) 16*16 HYB18T256161BF-25 AM2 AN17
DVPDATA_9 DPB_VSSR_6 C746 C754 C742
0001 Qimonda (Infineon) 32*16-500MHZ HYB18T512161B2F-20 AN2
DVPDATA_10 DPA_VSSR_5
AN15
0010 Hynix 16*16 HY5PS561621AFP-25 AP3
DVPDATA_11 DPA_VSSR_7
AN11
C 0011 Hynix 32*16-500MHZ H5PS5162FFR-20L AR3 AN12 1U/10V_4 0.1U/10V_4 10U/6.3V_8 C
DVPDATA_12 DPA_VSSR_8
0100 Samsung 16*16 K4N56163QG-ZC25 AN4
DVPDATA_13 DPA_VSSR_9
AN13
0101 Samsung 32*16-500MHZ K4N51163QG-HC20 AR4 AN14
DVPDATA_14 DPA_VSSR_10
0110 Samsung (Q die) 64*16-500MHZ K4N1G164QQ-HC20 AP4
DVPDATA_15
0111 Qimonda (Infineon) 64*16-500MHZ TBD AN5 AG15 R96 150/F_4
DVPDATA_16 DP_CALR
1000 Hynix 64*16-500MHZ TBD AR5 AH18
+VDDR4 DVPDATA_17 NC_TPVDDC
1001 Reserved AP5
DVPDATA_18 NC_TPVSSC
AG18
1010 Reserved AP6 AG6 TMDS_HPD 25
R431 *10K_4 RAM_STRAP0 DVPDATA_19 HPD1
1011 Reserved AR6
DVPDATA_20
PV stage change to short pad
1100 Reserved R434 *10K_4 RAM_STRAP1 AN7
R432 *10K_4 RAM_STRAP2 DVPDATA_21 L_CRT_R R66 *0_4/S CRT_R L_CRT_R R430 150/F_4
1101 Reserved AP7 AR31 CRT_R 24
R433 *10K_4 RAM_STRAP3 DVPDATA_22 R
1110 Reserved AR7
DVPDATA_23 RB
AP31
1111 Reserved L_CRT_G R429 150/F_4
AG2 AR30 L_CRT_G R65 *0_4/S CRT_G
23 GPIO0 GPIO_0 G CRT_G 24
AF2 AP30 L_CRT_B R428 150/F_4
23 GPIO1 GPIO_1 GENERAL GB
AF1
GPIO_2 PURPOSE L_CRT_B R64 *0_4/S CRT_B
AE3 AR29 CRT_B 24
GPIO_3 I/O B
23 GPIO4 AE2 AP29
GPIO_4 DAC1 BB
AE1
PWRCNTL1 PWRCNTL0 V-CORE 23
23
GPIO5
GPIO6 AD3
GPIO_5
GPIO_6 HSYNC
AN29 HSYNC_COM 23,24
25 LVDS_BLON AD2 AN30 VSYNC_COM 23,24
GPIO_7_BLON VSYNC
23 GPIO8 AD1
GPIO_8_ROMSO DAC1RET R87 499/F_4
AD5 AN31
H 0 0 1.1V 23 GPIO9
T19 AD4
GPIO_9_ROMSI
GPIO_10_ROMSCK
RSET
+1.8V +/-5% ( 85mA )
AC3 AR32 AVDD
23 GPIO11 GPIO_11 AVDD
AC2 VDD1DI + VDD2DI AVDD L73 BLM15BD121SN1 +1.8V
23 GPIO12 GPIO_12
AC1 AP32
M 0 1 1.0V 23 GPIO13
AB3
GPIO_13
GPIO_14_HPD2
AVSSQ +1.8V +/-5%( 121mA ) C741 C748 C757
AB2 AR28 VDD1DI L77 BLM15BD121SN1 +1.8V C737
43 GFX_CORE_CNTRL0 GPIO_15_PWRCNTL_0 VDD1DI
OSC_SPREAD AB1 AP28 10U/6.3V_8 1U/10V_4 0.1U/10V_4 *47u/6.3V_1210
2 OSC_SPREAD GPIO_16_SSIN VSS1DI
TEMP_FAIL AF5 C756 C183 C743
M 1 0 1.0V 5 TEMP_FAIL
AF4
GPIO_17_THERMAL_INT
GPIO_18_HPD3 R2
AM19
R90 *10K_4 GFX_CTF AG4 AL19 1U/10V_4 0.1U/10V_4
10U/6.3V_8
GPIO_19_CTF R2B
43 GFX_CORE_CNTRL1 AG3
BBEN GPIO_20_PWRCNTL_1
AD9 AM18
L 1 1 0.9V 20
23
BBEN
GPIO22 AD8
GPIO_21_BBEN
GPIO_22_ROMCSB
G2
G2B AL18
+3V_DELAY R107 10K_4 CLKREQ# AD7 +3.3V +/- 5% ( 135 mA)
R111 1K_4 JMODE GPIO_23_CLKREQB A2VDD L16 BLM15BD121SN1
AB4 AM17 +3V_DELAY
B GPIO_24_JMODE B2 B
T14 AB6 AL17
GPIO_25_TDI B2B C101 C117 C92
AB7
BBEN BBP T20
T22 AB9
GPIO_26_TCK
GPIO_27_TMS
DAC2
C
AK19
AA9 AK18 1U/10V_4 0.1U/10V_4
10U/6.3V_8
T21 GPIO_28_TDO Y
AF8 AK17
+1.8V GEN_A COMP
AF7
L 0 V-CORE AG5
GEN_B
GEN_C V2SYNC
AL15
AP9 AM15
GEN_D_HPD4 H2SYNC
AR9
H 1 +1.8V R92 AP13
GEN_E
GEN_F A2VDD
AM21 A2VDD +1.8V +/-5% ( 2.4mA )
499/F_4 AR13
GEN_G A2VDDQ L14 BLM15BD121SN1 +1.8V
AL21
VREFG A2VDDQ
AD12
VREFG C112 C99 C90
AK21
A2VSSQ
+1.8V+/-3% ( 120mA )
R100 C206 DPLL_PVDD AR20 AH22 VDD1DI 1U/10V_4 0.1U/10V_4
10U/6.3V_8
L75 BLM15BD121SN1 DPLL_PVDD DPLL_PVDD VDD2DI
+1.8V 249/F_4 AP20 AG22
0.1U/10V_4 DPLL_PVSS VSS2DI
C740 C747 C755 PCIE_PVDD AM35 AJ21 DAC2RET R99 715/F_4
PCIE_PVDD R2SET
10U/6.3V_8 1U/10V_4 0.1U/10V_4 AM29 DDCDATA
MPVDD DDC1DATA DDCCLK DDCDATA 24
A14 AL29
MPVDD PLL DDC1CLK DDCCLK 24
B15
MPVSS CLOCKS DDC EDIDDATA
AJ15
XTALI AR33 DP AUX DDC2DATA AH15 EDIDCLK EDIDDATA 25
2 EVGA-XTALI XTALIN DDC2CLK EDIDCLK 25
+1.8V +/-5% ( 40mA ) XTALO AP33
T74 XTALOUT
AJ5 HDMI_SDA DDC3 and DDC4
DDC3DATA_DP3_AUXN HDMI_SDA 25
L20 BLM15BD121SN1 PCIE_PVDD DPLL_VDDC AG19 AJ4 HDMI_SCL are +5V
+1.8V DPLL_VDDC DDC3CLK_DP3_AUXP HDMI_SCL 25
tolerant
C118 C128 C134 AG21 AH14
TS_FDO DDC4DATA_DP4_AUXN
AG14
10U/6.3V_8 1U/10V_4 0.1U/10V_4 VGATHRM- THERMAL DDC4CLK_DP4_AUXP
AK4
DMINUS
PV stage delete R94,R95
VGATHRM+ AM4 DPLUS
M86-M

+VGA_CORE +/-5%(414mA)
A A

Thermal Sensor
+VGA_CORE L36 BK1608HS220 MPVDD PV stage change to short pad
22 ohm/1A C370 C373 C357 781-1_3V R40 200/F_6 +3V_DELAY
10U/6.3V_8 1U/10V_4 0.1U/10V_4 U3 C74 0.1U/10V_4
5,36 MBCLK2 R43 *0_4/S TMBCLK2 8 1
SMCLK VCC VGATHRM+
R45 *0_4/S TMBDATA2 7 2
5,36 MBDATA2 SMDATA DXP
+1.1V +/-5%( 300mA ) C77

DPLL_VDDC R49 10K/F_4 VGA_ALERT


6
-ALT DXN
3 2200P/50V_4 w/s 10 / 10 PROJECT : QT8
L25 BK1608HS220
Quanta Computer Inc.
+1.1V +3V_DELAY
5 4 VGATHRM-
GND -OVT
22 ohm/1A C151 C172 C182
G781-1P8@EV
10U/6.3V_8 1U/10V_4 0.1U/10V_4 -VGATHRM Size Document Number Rev
+3V_DELAY
I2C ADDRESS: 9AH R52 10K/F_4 C M86 LVDS & SYSTEM 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 18 of 46
5 4 3 2 1
5 4 3 2 1

U31C

21 VMA_DQ[63..0]

21 VMA_DM[7..0]

21 VMA_RDQS[7..0]
VMA_DQ[63..0]

VMA_DM[7..0]

VMA_RDQS[7..0]

VMA_WDQS[7..0]
VMA_DQ0
VMA_DQ1
VMA_DQ2
VMA_DQ3
VMA_DQ4
P27
P28
P31
P32
DQA_0
DQA_1
DQA_2
DQA_3
Part 3 of 7

MAA_0
MAA_1
MAA_2
MAA_3
C27
B28
B27
G26
VMA_MA0
VMA_MA1
VMA_MA2
VMA_MA3
VMA_MA4
22 VMB_DQ[63..0]

22 VMB_DM[7..0]

22 VMB_RDQS[7..0]
VMB_DQ[63..0]

VMB_DM[7..0]

VMB_RDQS[7..0]
VMB_DQ0
VMB_DQ1
VMB_DQ2
H15
G14
U31G

DQB_0
DQB_1
Part 4 of 7

MAB_0
MAB_1
H2
H3
VMB_MA0
VMB_MA1
VMB_MA2
19
21 VMA_WDQS[7..0] M27 DQA_4 MAA_4 F27 E14 DQB_2 MAB_2 J3
VMA_DQ5 K29 E27 VMA_MA5 VMB_WDQS[7..0] VMB_DQ3 D14 J5 VMB_MA3
DQA_5 MAA_5 22 VMB_WDQS[7..0] DQB_3 MAB_3
VMA_DQ6 K31 D27 VMA_MA6 VMB_DQ4 H12 J4 VMB_MA4
VMA_DQ7 DQA_6 MAA_6 VMA_MA7 VMB_DQ5 DQB_4 MAB_4 VMB_MA5
D K32 DQA_7 MAA_7 J27 G12 DQB_5 MAB_5 J6 D
VMA_MA[12..0] VMA_DQ8 M33 E29 VMA_MA8 VMB_MA[12..0] VMB_DQ6 F12 G5 VMB_MA6

MEMORY INTERFACE A
21 VMA_MA[12..0] DQA_8 MAA_8 22 VMB_MA[12..0] DQB_6 MAB_6
VMA_DQ9 M34 C30 VMA_MA9 VMB_DQ7 D10 J9 VMB_MA7

MEMORY INTERFACE B
VMA_DQ10 DQA_9 MAA_9 VMA_MA10 VMB_DQ8 DQB_7 MAB_7 VMB_MA8
L34 DQA_10 MAA_10 E26 B13 DQB_8 MAB_8 F3
VMA_BA0 VMA_DQ11 L35 A27 VMA_MA11 VMB_BA0 VMB_DQ9 C12 F4 VMB_MA9
21 VMA_BA0 DQA_11 MAA_11 22 VMB_BA0 DQB_9 MAB_9
VMA_BA1 VMA_DQ12 J33 G27 VMA_MA12 VMB_BA1 VMB_DQ10 B12 J1 VMB_MA10
21 VMA_BA1 DQA_12 MAA_A12 22 VMB_BA1 DQB_10 MAB_10
VMA_BA2 VMA_DQ13 J34 D26 VMA_BA2 VMB_BA2 VMB_DQ11 B11 J2 VMB_MA11
21 VMA_BA2 DQA_13 MAA_BA2 22 VMB_BA2 DQB_11 MAB_11
VMA_DQ14 H33 C28 VMA_BA0 VMB_DQ12 C9 J7 VMB_MA12
VMA_DQ15 DQA_14 MAA_BA0 VMA_BA1 VMB_DQ13 DQB_12 MAB_A12 VMB_BA2
H34 DQA_15 MAA_BA1 B29 B9 DQB_13 MAB_BA2 F1
VMA_DQ16 K27 VMB_DQ14 A9 G2 VMB_BA0
VMA_DQ17 DQA_16 VMA_DM0 VMB_DQ15 DQB_14 MAB_BA0 VMB_BA1
J29 DQA_17 DQMAb_0 M29 B8 DQB_15 MAB_BA1 G3
VMA_DQ18 J30 K33 VMA_DM1 VMB_DQ16 J10
VMA_DQ19 DQA_18 DQMAb_1 VMA_DM2 VMB_DQ17 DQB_16 VMB_DM0
J31 DQA_19 DQMAb_2 G30 H10 DQB_17 DQMBb_0 D12
VMA_DQ20 F29 E33 VMA_DM3 VMB_DQ18 F10 C10 VMB_DM1
VMA_DQ21 DQA_20 DQMAb_3 VMA_DM4 VMB_DQ19 DQB_18 DQMBb_1 VMB_DM2
F32 DQA_21 DQMAb_4 C22 D9 DQB_19 DQMBb_2 E7
VMA_DQ22 D30 H21 VMA_DM5 VMB_DQ20 G7 C6 VMB_DM3
VMA_DQ23 DQA_22 DQMAb_5 VMA_DM6 VMB_DQ21 DQB_20 DQMBb_3 VMB_DM4
D32 DQA_23 DQMAb_6 C17 G6 DQB_21 DQMBb_4 P3
VMA_DQ24 G33 G17 VMA_DM7 VMB_DQ22 F6 R4 VMB_DM5
VMA_DQ25 DQA_24 DQMAb_7 VMB_DQ23 DQB_22 DQMBb_5 VMB_DM6
G34 DQA_25 D6 DQB_23 DQMBb_6 W3
VMA_DQ26 G35 M30 VMA_RDQS0 VMB_DQ24 C8 V8 VMB_DM7
VMA_DQ27 DQA_26 QSA_0 VMA_RDQS1 VMB_DQ25 DQB_24 DQMBb_7
F34 DQA_27 QSA_1 K34 C7 DQB_25
VMA_DQ28 D34 G31 VMA_RDQS2 VMB_DQ26 B7 J14 VMB_RDQS0
VMA_DQ29 DQA_28 QSA_2 VMA_RDQS3 VMB_DQ27 DQB_26 QSB_0 VMB_RDQS1
C34 DQA_29 QSA_3 E34 QSA[7..0] A7 DQB_27 QSB_1 B10
VMA_DQ30 C35 B22 VMA_RDQS4 VMB_DQ28 B5 F9 VMB_RDQS2
VMA_DQ31 DQA_30 QSA_4 VMA_RDQS5 VMB_DQ29 DQB_28 QSB_2 VMB_RDQS3

read strobe
C
B34 DQA_31 QSA_5 F21 A5 DQB_29 QSB_3 B6 QSB[7..0] C
VMA_DQ32 C24 B17 VMA_RDQS6 VMB_DQ30 C4 P2 VMB_RDQS4

read strobe
VMA_DQ33 DQA_32 QSA_6 VMA_RDQS7 VMB_DQ31 DQB_30 QSB_4 VMB_RDQS5
B24 DQA_33 QSA_7 D17 B4 DQB_31 QSB_5 P8
VMA_DQ34 B23 VMB_DQ32 M3 W2 VMB_RDQS6
VMA_DQ35 DQA_34 VMA_WDQS0 VMB_DQ33 DQB_32 QSB_6 VMB_RDQS7
A23 DQA_35 QSA_0B M31 M2 DQB_33 QSB_7 V6
VMA_DQ36 C21 K35 VMA_WDQS1 VMB_DQ34 N2
VMA_DQ37 DQA_36 QSA_1B VMA_WDQS2 VMB_DQ35 DQB_34 VMB_WDQS0
B21 G32 N1 H14

write strobe
VMA_DQ38 DQA_37 QSA_2B VMA_WDQS3 VMB_DQ36 DQB_35 QSB_0B VMB_WDQS1
C20 DQA_38 QSA_3B E35 QSA#[7..0] R3 DQB_36 QSB_1B A10
VMA_DQ39 B20 A22 VMA_WDQS4 VMB_DQ37 R2 E9 VMB_WDQS2

write strobe
VMA_DQ40 DQA_39 QSA_4B VMA_WDQS5 VMB_DQ38 DQB_37 QSB_2B VMB_WDQS3
J22 DQA_40 QSA_5B E21 T3 DQB_38 QSB_3B A6 QSB#[7..0]
VMA_DQ41 H22 A17 VMA_WDQS6 VMB_DQ39 T2 P1 VMB_WDQS4
VMA_DQ42 DQA_41 QSA_6B VMA_WDQS7 VMB_DQ40 DQB_39 QSB_4B VMB_WDQS5
F22 DQA_42 QSA_7B E17 M8 DQB_40 QSB_5B P7
VMA_DQ43 D21 VMB_DQ41 M7 W1 VMB_WDQS6
VMA_DQ44 DQA_43 VMA_ODT0 VMB_DQ42 DQB_41 QSB_6B VMB_WDQS7
J19 DQA_44 ODTA0 C31 VMA_ODT0 21 P5 DQB_42 QSB_7B V5
VMA_DQ45 G19 C25 VMA_ODT1 VMB_DQ43 P4
DQA_45 ODTA1 VMA_ODT1 21 DQB_43
VMA_DQ46 F19 VMB_DQ44 R9 D2 VMB_ODT0
DQA_46 DQB_44 ODTB0 VMB_ODT0 22
VMA_DQ47 D19 A33 VMA_CLK0 VMB_DQ45 R8 K5 VMB_ODT1
DQA_47 CLKA0 VMA_CLK0 21 DQB_45 ODTB1 VMB_ODT1 22
VMA_DQ48 C19 A26 VMA_CLK1 VMB_DQ46 R6
DQA_48 CLKA1 VMA_CLK1 21 DQB_46
VMA_DQ49 B19 VMB_DQ47 U4 A3 VMB_CLK0
DQA_49 DQB_47 CLKB0 VMB_CLK0 22
VMA_DQ50 A19 B33 VMA_CLK0# VMB_DQ48 U3 K1 VMB_CLK1
DQA_50 CLKA0b VMA_CLK0# 21 DQB_48 CLKB1 VMB_CLK1 22
VMA_DQ51 B18 B26 VMA_CLK1# VMB_DQ49 U2
DQA_51 CLKA1b VMA_CLK1# 21 DQB_49
VMA_DQ52 C16 VMB_DQ50 U1 B3 VMB_CLK0#
DQA_52 DQB_50 CLKB0b VMB_CLK0# 22
VMA_DQ53 B16 A31 RASA0# VMB_DQ51 V2 K2 VMB_CLK1#
DQA_53 RASA0b RASA0# 21 DQB_51 CLKB1b VMB_CLK1# 22
VMA_DQ54 C15 D24 RASA1# VMB_DQ52 Y3
DQA_54 RASA1b RASA1# 21 DQB_52
VMA_DQ55 A15 VMB_DQ53 Y2 D3 RASB0#
DQA_55 DQB_53 RASB0b RASB0# 22
B VMA_DQ56 H18 C32 CASA0# VMB_DQ54 AA2 K7 RASB1# B
DQA_56 CASA0b CASA0# 21 DQB_54 RASB1b RASB1# 22
VMA_DQ57 F18 H26 CASA1# VMB_DQ55 AA1
+1.8V DQA_57 CASA1b CASA1# 21 DQB_55
VMA_DQ58 E18 VMB_DQ56 U9 C1 CASB0#
DQA_58 DQB_56 CASB0b CASB0# 22
VMA_DQ59 D18 A30 CSA0_0# VMB_DQ57 U7 K4 CASB1#
DQA_59 CSA0b_0 CSA0_0# 21 +1.8V DQB_57 CASB1b CASB1# 22
VMA_DQ60 J17 B30 CSA0_1# VMB_DQ58 U6
DQA_60 CSA0b_1 T83 DQB_58
VMA_DQ61 G15 VMB_DQ59 V4 E1 CSB0_0#
DQA_61 DQB_59 CSB0b_0 CSB0_0# 22
R139 VMA_DQ62 E15 G24 CSA1_0# VMB_DQ60 W9 E2 CSB0_1#
DQA_62 CSA1b_0 CSA1_0# 21 DQB_60 CSB0b_1 T30
100/F_4 VMA_DQ63 D15 H24 CSA1_1# VMB_DQ61 W7
DQA_63 CSA1b_1 T31 DQB_61
R134 VMB_DQ62 W6 L3 CSB1_0#
DQB_62 CSB1b_0 CSB1_0# 22
MVREFDA N35 B31 CKEA0 100/F_4 VMB_DQ63 W4 M4 CSB1_1#
MVREFDA CKEA0 CKEA0 21 DQB_63 CSB1b_1 T23
N34 F24 CKEA1
MVREFSA CKEA1 CKEA1 21
C366 MVREFDB B14 E3 CKEB0
MVREFDB CKEB0 CKEB0 22
R133 C29 WEA0# A13 K8 CKEB1
WEA0b WEA0# 21 MVREFSB CKEB1 CKEB1 22
100/F_4 0.1U/10V_4 AM34 D22 WEA1# C358
NC_1 WEA1b WEA1# 21
R129 R91 1K_4 AM30 F2 WEB0#
TESTEN WEB0b WEB0# 22
100/F_4 0.1U/10V_4 R110 4.7K_4 AA8 M6 WEB1#
TEST_MCLK WEB1b WEB1# 22
R112 4.7K_4 AA7
R114 240/F_4 TEST_YCLK MEM_RST# R113 4.7K_4
AA5 MEMTEST DRAM_RST AA4 +1.8V
+1.8V M86-M AH19
T16 PLLTEST
+1.8V M86-M

R138 DIVIDER RESISTORS DDR2 DDR3


100/F_4
R137
A A
MVREFSA MVREF TO 1.8V 100R 40.2R 100/F_4

C365 MVREFSB
R131
100/F_4 0.1U/10V_4
MVREF TO GND 100R 100R
C363 PROJECT : QT8
1.28V
R130
100/F_4 0.1U/10V_4
Quanta Computer Inc.
MVREF Voltage 0.9V
Size Document Number Rev
Custom 1A
0.5*VDDQ M86 Memory controll
NB5/RD5
Date: Friday, August 29, 2008 Sheet 19 of 46
5 4 3 2 1
5 4 3 2 1

U31D
+PCIE_VDDR

20
VDDR1 + VDDRH
PART 5 OF 7
+1.8V +/-5% ( 2.2A ) +1.8V +/-5% ( 500mA ) 33ohm/3000mA
+1.8V D1 AR34 +PCIE_VDDR L79 BLM18PG330SN1D +1.8V
VDDR1_1 PCIE_VDDR_1
A8 VDDR1_2 PCIE_VDDR_2 AL33
C362 C369 C330 A12 AM33 C155 C137
C400 C437 C444 VDDR1_3 PCIE_VDDR_3 C759
A16 VDDR1_4 PCIE_VDDR_4 AN33
10U/6.3V_8 10U/6.3V_8 10U/6.3V_8
1U/10V_4 1U/10V_4 1U/10V_4 A20 AN34 0.1U/10V_4 1U/10V_4 10U/6.3V_8
VDDR1_5 PCIE_VDDR_5
A24 VDDR1_6 PCIE_VDDR_6 AN35
A28 VDDR1_7 PCIE_VDDR_7 AP34
+1.1V_PCIE_VDDC
+1.1V +/-5% ( 2A )

Memory I/O
B1 VDDR1_8 PCIE_VDDR_8 AP35
H1 33ohm/3000mA
VDDR1_9 L19 BLM18PG330SN1D
D
H35 VDDR1_10 PCIE_VDDC_1 R26 +1.1V D
L18 VDDR1_11 PCIE_VDDC_2 U26
C327 C291 C324 C290 L19 V25 C256 C276 C196 C236 C225 C207
VDDR1_12 PCIE_VDDC_3
L21 VDDR1_13 PCIE_VDDC_4 V26
1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 L22 W25 0.1U/10V_4
0.1U/10V_4
1U/10V_4 1U/10V_4 1U/10V_4
10U/6.3V_8

PCI-Express
VDDR1_14 PCIE_VDDC_5
M10 VDDR1_15 PCIE_VDDC_6 W26
M35 VDDR1_16 PCIE_VDDC_7 AA25
P10 VDDR1_17 PCIE_VDDC_8 AD26
T1 VDDR1_18 PCIE_VDDC_9 AF26
Y1 VDDR1_19 PCIE_VDDC_10 AA26
B35 VDDR1_20 PCIE_VDDC_11 AB25
C325 C331 C328 C329 C322 C326 M1 AB26 VDDC+VDDCI
VDDR1_21 PCIE_VDDC_12
D35 VDDR1_22
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4 K10 0.95~1.1V +/-5% ( 20A peak ,Ripple < 87.3mV )
VDDR1_23
K12 VDDR1_24 VDDC_1 N13 +VGA_CORE
K24 VDDR1_25 VDDC_2 N15

1
K26 VDDR1_26 VDDC_3 N18
L14 N21 C261 C305 C273 C215 + C729
+VDD_CT VDDR1_27 VDDC_4 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 10U/6.3V_8 *330U_2.5V_7343_ESR6
L15 VDDR1_28 VDDC_5 N23
+1.8V +/- 5% (136mA) L17 P14

2
120ohm/300mA VDDR1_29 VDDC_6
VDDC_7 P17
+VDD_CT

I/O Internal
+1.8V L32 BLM15BD121SN1 AA11 P19
VDD_CT_1 VDDC_8
AB11 VDD_CT_2 VDDC_9 P22
C294 C219 C237 AD10 V18
VDD_CT_3 VDDC_10 C222 C223 C270
AF10 VDD_CT_4 VDDC_11 V21
10U/6.3V_8 1U/10V_4 0.1U/10V_4
R11
P VDDC_12 V23
W14 1U/10V_4 1U/10V_4 1U/10V_4
VDD_CT_5 VDDC_13
+VDDR3
R25 VDD_CT_6 O VDDC_14 W17

Core
U11 VDD_CT_7 VDDC_15 W19
+3.3V +/-5% ( 60mA ) U25 VDD_CT_8
W VDDC_16 W22
C AA15 C
+3V_DELAY L30 BLM15BD121SN1 VDDR3 AE14 VDDR3_1
E VDDC_17
VDDC_18 AA18
AE15 AA21 C234 C299 C300 C301 C280
C202 C203 AF12
VDDR3_2 R VDDC_19
AA23
VDDR3_3 VDDC_20 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
AE17 VDDR3_4 VDDC_21 AB14
+VDDR4 1U/10V_4 0.1U/10V_4 AB17
VDDC_22
AP2 VDDR4_1 VDDC_23 AB19
+1.8V L78 BLM15BD121SN1 +VDDR4 AR2 AB22
VDDR4_2 VDDC_24
VDDC_25 AC13
C745 C753 C752 AN1 AC15 C249
VDDR5_1 VDDC_26 C233 C243 C281 C221
+VDDR4 + + VDDR5 AP1 VDDR5_2 VDDC_27 AC18
10U/6.3V_8
1U/10V_4 0.1U/10V_4 AC21 1U/10V_4
+1.8V +/-5% ( 170mA ) VDDRHA1 VDDC_28 1U/10V_4 1U/10V_4 1U/10V_4 1U/10V_4
A25 VDDRHA_1 VDDC_29 AC23
VDDRHA2 A32 AE18
VDDRHA_2 VDDC_30
VDDC_31 AE22
L80 BLM15BD121SN1 +VDDR5 B25 AE19
+1.8V VSSRHA_1 VDDC_32
Memory I/O

B32 AE21
Clock

C744 C750 C751 VSSRHA_2 VDDC_33


VDDC_34 R13
VDDRHB1 B2 R15 C287 C224 C220 C204 C302 C250
*10U/6.3V_8
1U/10V_4 0.1U/10V_4 VDDRHB2 VDDRHB_1 VDDC_35
L1 VDDRHB_2 VDDC_36 R18
R21 0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
0.1U/10V_4
VDDC_37
C2 VSSRHB_1 VDDC_38 R23
L2 VSSRHB_2 VDDC_39 U14
VDDC_40 U17
L46 BLM15BD121SN1 VDDRHB1 W13 U19
+1.8V BBN_1 VDDC_41
Back

120ohm/300mA AA13 U22


Bias

C426 C427 BBN_2 VDDC_42 +VDDCI


VDDC_43 V15
U13 BBP_1 VDDC_44 W11
1U/10V_4 0.1U/10V_4 V13 33ohm/3000mA
+VBBP BBP_2
M12 +VDDCI L31
B VDDCI_1 +VGA_CORE B
C288 C265 M24
VDDCI_2 C332 C312 C310 C323 BLM18PG330SN1D
VDDCI_3 P11
1U/10V_4 0.1U/10V_4 P25
VDDCI_4 0.1U/10V_4 1U/10V_4 1U/10V_4 10U/6.3V_8
+1.8V L33 BLM15BD121SN1 VDDRHB2 M86-M
120ohm/300mA

C334 C315

1U/10V_4 0.1U/10V_4

+VBBP
+1.5V/+1.8V ( 144mA )
L74 Q42
+VGA_CORE +3V_DELAY
AO3409
*BLM18PG181SN1D(180,1.5A)_6 +3.3V(0.5A)
L38 BLM15BD121SN1 VDDRHA1 1 3
+1.8V +3V
120ohm/300mA
C368 C364 Q39
ME2303T1 R427

2
1U/10V_4 0.1U/10V_4 3 1 3 1 +1.8V 100K/F_4
+VGA_CORE
Q38
2N7002E
2

Q41

3
L37 BLM15BD121SN1 VDDRHA2 R416 100K/F_4 2N7002E
+1.8V
120ohm/300mA 1 2 +5V
A C360 C361 D32 CH501H-40PT A
3

28,36,40,43,44,45 MAINON 1 2 2
1U/10V_4 0.1U/10V_4

2 Q40 R438 68.1K_4


18 BBEN
2N7002E
PROJECT : QT8
1

C767

0.1U/10V_4 Quanta Computer Inc.


1

Size Document Number Rev


Custom M86 power 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 20 of 46
5 4 3 2 1
5 4 3 2 1

15mil
Channel A-1
21
U36 U8
D0-D7 VMA_DQ28 B9 J2 VMREFA1 R488 4.99K/F_4 D16-D23 VMA_DQ21 B9 J2 VMREFA2 R141 4.99K/F_4
UDQ7 VREF +1.8V UDQ7 VREF +1.8V
D24-D31 VMA_DQ24 B1 R489 4.99K/F_4 D8-D15 VMA_DQ20 B1 R147 4.99K/F_4
VMA_DQ[63..0] VMA_DQ29 UDQ6 C879 0.1U/10V_4 VMA_DQ19 UDQ6 C375 0.1U/10V_4
19 VMA_DQ[63..0] D9 UDQ5 D9 UDQ5
VMA_DQ25 D1 VMA_DQ17 D1
VMA_DM[7..0] VMA_DQ26 UDQ4 VMA_DQ16 UDQ4
19 VMA_DM[7..0] D3 UDQ3 VDD1 A1 +1.8V D3 UDQ3 VDD1 A1 +1.8V
VMA_DQ31 D7 E1 VMA_DQ18 D7 E1
VMA_RDQS[7..0] VMA_DQ27 UDQ2 VDD2 C880 C878 C876 C445 C875 VMA_DQ22 UDQ2 VDD2 C440 C413 C422 C442 C446
19 VMA_RDQS[7..0] C2 UDQ1 VDD3 J9 C2 UDQ1 VDD3 J9
VMA_DQ30 C8 M9 VMA_DQ23 C8 M9
VMA_WDQS[7..0] VMA_DQ6 UDQ0 VDD4 1000p_4 0.01U/50V_40.1U/10V_4
10U/6.3V_8 10U/6.3V_8 VMA_DQ8 UDQ0 VDD4 1000p_4 0.01U/50V_40.1U/10V_4
10U/6.3V_8 10U/6.3V_8
19 VMA_WDQS[7..0] F9 LDQ7 VDD5 R1 F9 LDQ7 VDD5 R1
VMA_DQ0 F1 VMA_DQ15 F1
VMA_MA[12..0] VMA_DQ5 LDQ6 VMA_DQ9 LDQ6
19 VMA_MA[12..0] H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
VMA_DQ1 H1 C1 VMA_DQ12 H1 C1
D
VMA_DQ3 LDQ4 VDDQ2 VMA_DQ13 LDQ4 VDDQ2 D
H3 LDQ3 VDDQ3 C3 H3 LDQ3 VDDQ3 C3
VMA_BA0 VMA_DQ4 H7 C7 VMA_DQ10 H7 C7
19 VMA_BA0 LDQ2 VDDQ4 LDQ2 VDDQ4
VMA_BA1 VMA_DQ2 G2 C9 VMA_DQ14 G2 C9
19 VMA_BA1 LDQ1 VDDQ5 LDQ1 VDDQ5
VMA_BA2 VMA_DQ7 G8 E9 VMA_DQ11 G8 E9
19 VMA_BA2 LDQ0 VDDQ6 LDQ0 VDDQ6
VDDQ7 G1 VDDQ7 G1 PV stage delete L43
VMA_DM3 B3 G3 PV stage delete L91 VMA_DM2 B3 G3
VMA_DM0 UDM VDDQ8 VMA_DM1 UDM VDDQ8
F3 LDM VDDQ9 G7 F3 LDM VDDQ9 G7
G9 15mil C874 1U/16V_6 G9
VMA_RDQS3 VDDQ10 VMA_RDQS2 VDDQ10
B7 UDQS B7 UDQS
VMA_WDQS3 A8 VMA_WDQS2 A8
VMA_RDQS0 UDQS VDDLA1 VMA_RDQS1 UDQS VDDLA2
F7 LDQS VDDL J1 F7 LDQS VDDL J1 15mil
VMA_ODT0 VMA_WDQS0 E8 VMA_WDQS1 E8
19 VMA_ODT0 LDQS LDQS
CKEA0 C873 0.1U/10V_4 C401 C396
19 CKEA0
CSA0_0# VMA_CLK0 J8 A2 VMA_CLK0 J8 A2
19 CSA0_0# CK NC1 CK NC1
WEA0# VMA_CLK0# K8 E2 VMA_CLK0# K8 E2 0.1U/10V_4
1U/16V_6
19 WEA0# CK NC2 CK NC2
RASA0# L1 VMA_BA2 L1 VMA_BA2
19 RASA0# NC3 NC3
CASA0# VMA_BA1 L3 R3 VMA_BA1 L3 R3
19 CASA0# VMA_BA0 BA1 NC4 VMA_BA0 BA1 NC4
L2 BA0 NC5 R7 L2 BA0 NC5 R7
NC6 R8 NC6 R8
VMA_CLK0 VMA_MA12 R2 VMA_MA12 R2
19 VMA_CLK0 VMA_MA11 A12 VMA_MA11 A12
P7 A11 P7 A11
VMA_CLK0# VMA_MA10 M2 A3 VMA_MA10 M2 A3
19 VMA_CLK0# VMA_MA9 A10 VSS1 VMA_MA9 A10 VSS1
P3 A9 VSS2 E3 P3 A9 VSS2 E3
VMA_MA8 P8 J3 VMA_MA8 P8 J3
R490 R491 VMA_MA7 A8 VSS3 VMA_MA7 A8 VSS3
P2 A7 VSS4 N1 P2 A7 VSS4 N1
56_4 56_4 VMA_MA6 N7 P9 VMA_MA6 N7 P9
VMA_MA5 A6 VSS5 VMA_MA5 A6 VSS5
N3 A5 N3 A5
VMA_MA4 N8 A7 VMA_MA4 N8 A7
VMA_MA3 A4 VSSQ1 VMA_MA3 A4 VSSQ1
N2 A3 VSSQ2 B2 N2 A3 VSSQ2 B2
C VMA_MA2 M7 B8 VMA_MA2 M7 B8 C
C884 VMA_MA1 A2 VSSQ3 VMA_MA1 A2 VSSQ3
M3 A1 VSSQ4 D2 M3 A1 VSSQ4 D2
470p_4 VMA_MA0 M8 D8 VMA_MA0 M8 D8
A0 VSSQ5 A0 VSSQ5
VSSQ6 E7 VSSQ6 E7
VMA_ODT0 K9 F2 VMA_ODT0 K9 F2
CKEA0 ODT VSSQ7 CKEA0 ODT VSSQ7
K2 CKE VSSQ8 F8 K2 CKE VSSQ8 F8
CSA0_0# L8 H2 CSA0_0# L8 H2
WEA0# CS VSSQ9 WEA0# CS VSSQ9
K3 WE VSSQ10 H8 K3 WE VSSQ10 H8
RASA0# K7 RASA0# K7
CASA0# RAS CASA0# RAS
L7 CAS VSSDL J7 L7 CAS VSSDL J7

GDDR2-BGA84 GDDR2-BGA84

15mil
Channel A-1 D56-D63 VMA_DQ61
VMA_DQ57
B9
U35
UDQ7 VREF J2 VMREFA3 R475 4.99K/F_4
+1.8V
VMA_DQ49
VMA_DQ54
B9
U7
UDQ7 VREF J2 VMREFA4 R171 4.99K/F_4
+1.8V
D40-D47 B1 R479 4.99K/F_4 D48-D55 B1 R170 4.99K/F_4
VMA_DQ58 UDQ6 C865 0.1U/10V_4 VMA_DQ51 UDQ6 C438 0.1U/10V_4
D9 UDQ5 D32-D39 D9 UDQ5
VMA_DQ60 D1 VMA_DQ55 D1
VMA_DQ63 UDQ4 VMA_DQ52 UDQ4
D3 UDQ3 VDD1 A1 +1.8V D3 UDQ3 VDD1 A1 +1.8V
VMA_DQ62 D7 E1 VMA_DQ48 D7 E1
VMA_DQ56 UDQ2 VDD2 C414 C882 C862 C351 C374 VMA_DQ53 UDQ2 VDD2 C405 C439 C431 C441 C435
C2 UDQ1 VDD3 J9 C2 UDQ1 VDD3 J9
VMA_DQ59 C8 M9 VMA_DQ50 C8 M9
VMA_DQ46 UDQ0 VDD4 1000p_4 0.01U/50V_40.1U/10V_4
10U/6.3V_8 10U/6.3V_8 VMA_DQ38 UDQ0 VDD4 1000p_4 0.01U/50V_40.1U/10V_4
10U/6.3V_8 10U/6.3V_8
F9 LDQ7 VDD5 R1 F9 LDQ7 VDD5 R1
VMA_DQ43 F1 VMA_DQ33 F1
VMA_ODT1 VMA_DQ45 LDQ6 VMA_DQ34 LDQ6
19 VMA_ODT1 H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
CKEA1 VMA_DQ42 H1 C1 VMA_DQ32 H1 C1
B 19 CKEA1 LDQ4 VDDQ2 LDQ4 VDDQ2 B
CSA1_0# VMA_DQ40 H3 C3 VMA_DQ39 H3 C3
19 CSA1_0# LDQ3 VDDQ3 LDQ3 VDDQ3
WEA1# VMA_DQ47 H7 C7 VMA_DQ35 H7 C7
19 WEA1# LDQ2 VDDQ4 LDQ2 VDDQ4
RASA1# VMA_DQ41 G2 C9 VMA_DQ36 G2 C9
19 RASA1# CASA1# VMA_DQ44 LDQ1 VDDQ5 VMA_DQ37 LDQ1 VDDQ5
19 CASA1# G8 LDQ0 VDDQ6 E9 G8 LDQ0 VDDQ6 E9
VDDQ7 G1 VDDQ7 G1
VMA_DM7 B3 G3 PV stage delete L90 VMA_DM6 B3 G3 PV stage delete L92
VMA_CLK1 VMA_DM5 UDM VDDQ8 VMA_DM4 UDM VDDQ8
19 VMA_CLK1 F3 LDM VDDQ9 G7 F3 LDM VDDQ9 G7
VDDQ10 G9 VDDQ10 G9
VMA_CLK1# VMA_RDQS7 B7 VMA_RDQS6 B7
19 VMA_CLK1# UDQS UDQS
VMA_WDQS7 A8 15mil VMA_WDQS6 A8 15mil
VMA_RDQS5 UDQS VDDLA3 VMA_RDQS4 UDQS VDDLA4
F7 LDQS VDDL J1 F7 LDQS VDDL J1
R169 R168 VMA_WDQS5 E8 VMA_WDQS4 E8
56_4 56_4 LDQS C872 C871 LDQS C881 C883
VMA_CLK1 J8 A2 VMA_CLK1 J8 A2
VMA_CLK1# CK NC1 0.1U/10V_4
1U/16V_6 VMA_CLK1# CK NC1 0.1U/10V_4 1U/16V_6
K8 CK NC2 E2 K8 CK NC2 E2
L1 VMA_BA2 L1 VMA_BA2
VMA_BA1 NC3 VMA_BA1 NC3
L3 BA1 NC4 R3 L3 BA1 NC4 R3
C447 VMA_BA0 L2 R7 VMA_BA0 L2 R7
470p_4 BA0 NC5 BA0 NC5
NC6 R8 NC6 R8
VMA_MA12 R2 VMA_MA12 R2
VMA_MA11 A12 VMA_MA11 A12
P7 A11 P7 A11
VMA_MA10 M2 A3 VMA_MA10 M2 A3
VMA_MA9 A10 VSS1 VMA_MA9 A10 VSS1
P3 A9 VSS2 E3 P3 A9 VSS2 E3
VMA_MA8 P8 J3 VMA_MA8 P8 J3
VMA_MA7 A8 VSS3 VMA_MA7 A8 VSS3
P2 A7 VSS4 N1 P2 A7 VSS4 N1
VMA_MA6 N7 P9 VMA_MA6 N7 P9
VMA_MA5 A6 VSS5 VMA_MA5 A6 VSS5
N3 A5 N3 A5
VMA_MA4 N8 A7 VMA_MA4 N8 A7
VMA_MA3 A4 VSSQ1 VMA_MA3 A4 VSSQ1
N2 A3 VSSQ2 B2 N2 A3 VSSQ2 B2
A VMA_MA2 M7 B8 VMA_MA2 M7 B8 A
VMA_MA1 A2 VSSQ3 VMA_MA1 A2 VSSQ3
M3 A1 VSSQ4 D2 M3 A1 VSSQ4 D2
VMA_MA0 M8 D8 VMA_MA0 M8 D8
A0 VSSQ5 A0 VSSQ5
VSSQ6 E7 VSSQ6 E7
VMA_ODT1 K9 F2 VMA_ODT1 K9 F2
CKEA1 ODT VSSQ7 CKEA1 ODT VSSQ7
K2 F8 K2 F8
CSA1_0#
WEA1#
L8
CKE
CS
VSSQ8
VSSQ9 H2 CSA1_0#
WEA1#
L8
CKE
CS
VSSQ8
VSSQ9 H2 PROJECT : QT8
Quanta Computer Inc.
K3 WE VSSQ10 H8 K3 WE VSSQ10 H8
RASA1# K7 RASA1# K7
CASA1# RAS CASA1# RAS
L7 CAS VSSDL J7 L7 CAS VSSDL J7

GDDR2-BGA84 GDDR2-BGA84 Size Document Number Rev


Custom VRAM Channel A 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 21 of 46
5 4 3 2 1
5 4 3 2 1

15mil
Channel B-1
22
U33 U6
D24-D31 VMB_DQ29 B9 J2 VMREFB1 R452 4.99K/F_4 VMB_DQ17 B9 J2 VMREFB2 R470 4.99K/F_4
UDQ7 VREF +1.8V UDQ7 VREF +1.8V
D8-D15 VMB_DQ27 B1 R453 4.99K/F_4 D16-D23 VMB_DQ22 B1 R469 4.99K/F_4
VMB_DQ31 UDQ6 C828 0.1U/10V_4 VMB_DQ16 UDQ6 C861 0.1U/10V_4
D9 UDQ5 D0-D7 D9 UDQ5
VMB_DQ24 D1 VMB_DQ20 D1
VMB_DQ[63..0] VMB_DQ26 UDQ4 VMB_DQ21 UDQ4
19 VMB_DQ[63..0] D3 UDQ3 VDD1 A1 +1.8V D3 UDQ3 VDD1 A1 +1.8V
VMB_DQ30 D7 E1 VMB_DQ18 D7 E1
VMB_DM[7..0] VMB_DQ25 UDQ2 VDD2 C877 C823 C819 C864 C418 VMB_DQ23 UDQ2 VDD2 C416 C340 C412 C436 C417
19 VMB_DM[7..0] C2 UDQ1 VDD3 J9 C2 UDQ1 VDD3 J9
VMB_DQ28 C8 M9 VMB_DQ19 C8 M9
VMB_RDQS[7..0] VMB_DQ11 UDQ0 VDD4 1000p_4 0.01U/50V_4
0.1U/10V_4
10U/6.3V_8 10U/6.3V_8 VMB_DQ1 UDQ0 VDD4 1000p_4 0.01U/50V_4
0.1U/10V_4
10U/6.3V_8 10U/6.3V_8
19 VMB_RDQS[7..0] F9 LDQ7 VDD5 R1 F9 LDQ7 VDD5 R1
VMB_DQ12 F1 VMB_DQ0 F1
VMB_WDQS[7..0] VMB_DQ8 LDQ6 VMB_DQ3 LDQ6
19 VMB_WDQS[7..0] H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
VMB_DQ13 H1 C1 VMB_DQ4 H1 C1
D
VMB_DQ15 LDQ4 VDDQ2 VMB_DQ5 LDQ4 VDDQ2 D
H3 LDQ3 VDDQ3 C3 H3 LDQ3 VDDQ3 C3
VMB_MA[12..0] VMB_DQ9 H7 C7 VMB_DQ2 H7 C7
19 VMB_MA[12..0] LDQ2 VDDQ4 LDQ2 VDDQ4
VMB_DQ14 G2 C9 VMB_DQ6 G2 C9
VMB_DQ10 LDQ1 VDDQ5 VMB_DQ7 LDQ1 VDDQ5
G8 LDQ0 VDDQ6 E9 G8 LDQ0 VDDQ6 E9
VMB_BA0 G1 G1
19 VMB_BA0 VDDQ7 VDDQ7
VMB_BA1 VMB_DM3 B3 G3 PV stage delete L85 VMB_DM2 B3 G3 PV stage delete L44
19 VMB_BA1 UDM VDDQ8 UDM VDDQ8
VMB_BA2 VMB_DM1 F3 G7 VMB_DM0 F3 G7
19 VMB_BA2 LDM VDDQ9 LDM VDDQ9
VDDQ10 G9 VDDQ10 G9
VMB_RDQS3 B7 VMB_RDQS2 B7
VMB_WDQS3 UDQS VMB_WDQS2 UDQS
A8 UDQS 15mil A8 UDQS 15mil
VMB_RDQS1 F7 J1 VDDLB1 VMB_RDQS0 F7 J1 VDDLB2
VMB_ODT0 VMB_WDQS1 LDQS VDDL VMB_WDQS0 LDQS VDDL
19 VMB_ODT0 E8 LDQS E8 LDQS
CKEB0 C834 C839 C406 C408
19 CKEB0
CSB0_0# VMB_CLK0 J8 A2 VMB_CLK0 J8 A2
19 CSB0_0# CK NC1 CK NC1
WEB0# VMB_CLK0# K8 E2 0.1U/10V_4
1U/16V_6 VMB_CLK0# K8 E2 0.1U/10V_4
1U/16V_6
19 WEB0# CK NC2 CK NC2
RASB0# L1 VMB_BA2 L1 VMB_BA2
19 RASB0# NC3 NC3
CASB0# VMB_BA1 L3 R3 VMB_BA1 L3 R3
19 CASB0# VMB_BA0 BA1 NC4 VMB_BA0 BA1 NC4
L2 BA0 NC5 R7 L2 BA0 NC5 R7
NC6 R8 NC6 R8
VMB_CLK0 VMB_MA12 R2 VMB_MA12 R2
19 VMB_CLK0 VMB_MA11 A12 VMB_MA11 A12
P7 A11 P7 A11
VMB_CLK0# VMB_MA10 M2 A3 VMB_MA10 M2 A3
19 VMB_CLK0# VMB_MA9 A10 VSS1 VMB_MA9 A10 VSS1
P3 A9 VSS2 E3 P3 A9 VSS2 E3
VMB_MA8 P8 J3 VMB_MA8 P8 J3
R132 R136 VMB_MA7 A8 VSS3 VMB_MA7 A8 VSS3
P2 A7 VSS4 N1 P2 A7 VSS4 N1
56_4 56_4 VMB_MA6 N7 P9 VMB_MA6 N7 P9
VMB_MA5 A6 VSS5 VMB_MA5 A6 VSS5
N3 A5 N3 A5
VMB_MA4 N8 A7 VMB_MA4 N8 A7
VMB_MA3 A4 VSSQ1 VMB_MA3 A4 VSSQ1
N2 A3 VSSQ2 B2 N2 A3 VSSQ2 B2
C VMB_MA2 M7 B8 VMB_MA2 M7 B8 C
C354 VMB_MA1 A2 VSSQ3 VMB_MA1 A2 VSSQ3
M3 A1 VSSQ4 D2 M3 A1 VSSQ4 D2
470p_4 VMB_MA0 M8 D8 VMB_MA0 M8 D8
A0 VSSQ5 A0 VSSQ5
VSSQ6 E7 VSSQ6 E7
VMB_ODT0 K9 F2 VMB_ODT0 K9 F2
CKEB0 ODT VSSQ7 CKEB0 ODT VSSQ7
K2 CKE VSSQ8 F8 K2 CKE VSSQ8 F8
CSB0_0# L8 H2 CSB0_0# L8 H2
WEB0# CS VSSQ9 WEB0# CS VSSQ9
K3 WE VSSQ10 H8 K3 WE VSSQ10 H8
RASB0# K7 RASB0# K7
CASB0# RAS CASB0# RAS
L7 CAS VSSDL J7 L7 CAS VSSDL J7

GDDR2-BGA84 GDDR2-BGA84

15mil
Channel B-2 D32-D39 VMB_DQ37
VMB_DQ35
B9
U29
UDQ7 VREF J2 VMREFB3 R108 4.99K/F_4
+1.8V D48-D55 VMB_DQ50
VMB_DQ52
B9
U5
UDQ7 VREF J2 VMREFB4 R117 4.99K/F_4
+1.8V
D40-D47 B1 R103 4.99K/F_4 D56-D63 B1 R115 4.99K/F_4
VMB_DQ38 UDQ6 C185 0.1U/10V_4 VMB_DQ48 UDQ6 C242 0.1U/10V_4
D9 UDQ5 D9 UDQ5
VMB_DQ32 D1 VMB_DQ55 D1
VMB_DQ33 UDQ4 VMB_DQ53 UDQ4
D3 UDQ3 VDD1 A1 +1.8V D3 UDQ3 VDD1 A1 +1.8V
VMB_DQ39 D7 E1 VMB_DQ49 D7 E1
VMB_DQ34 UDQ2 VDD2 C367 C311 C293 C407 C443 VMB_DQ54 UDQ2 VDD2 C812 C415 C863 C166 C432
C2 UDQ1 VDD3 J9 C2 UDQ1 VDD3 J9
VMB_DQ36 C8 M9 VMB_DQ51 C8 M9
VMB_DQ45 UDQ0 VDD4 1000p_4 0.01U/50V_4
0.1U/10V_4
10U/6.3V_8 10U/6.3V_8 VMB_DQ59 UDQ0 VDD4 1000p_4 0.01U/50V_4
0.1U/10V_4
10U/6.3V_8 10U/6.3V_8
F9 LDQ7 VDD5 R1 F9 LDQ7 VDD5 R1
VMB_DQ43 F1 VMB_DQ61 F1
VMB_ODT1 VMB_DQ44 LDQ6 VMB_DQ57 LDQ6
19 VMB_ODT1 H9 LDQ5 VDDQ1 A9 H9 LDQ5 VDDQ1 A9
CKEB1 VMB_DQ40 H1 C1 VMB_DQ60 H1 C1
B 19 CKEB1 LDQ4 VDDQ2 LDQ4 VDDQ2 B
CSB1_0# VMB_DQ42 H3 C3 VMB_DQ63 H3 C3
19 CSB1_0# LDQ3 VDDQ3 LDQ3 VDDQ3
WEB1# VMB_DQ46 H7 C7 VMB_DQ56 H7 C7
19 WEB1# LDQ2 VDDQ4 LDQ2 VDDQ4
RASB1# VMB_DQ41 G2 C9 VMB_DQ62 G2 C9
19 RASB1# CASB1# VMB_DQ47 LDQ1 VDDQ5 VMB_DQ58 LDQ1 VDDQ5
19 CASB1# G8 LDQ0 VDDQ6 E9 G8 LDQ0 VDDQ6 E9
VDDQ7 G1 VDDQ7 G1
VMB_DM4 B3 G3 PV stage delete L27 VMB_DM6 B3 G3 PV stage delete L29
VMB_CLK1 VMB_DM5 UDM VDDQ8 VMB_DM7 UDM VDDQ8
19 VMB_CLK1 F3 LDM VDDQ9 G7 F3 LDM VDDQ9 G7
VDDQ10 G9 VDDQ10 G9
VMB_CLK1# VMB_RDQS4 B7 VMB_RDQS6 B7
19 VMB_CLK1# UDQS UDQS
VMB_WDQS4 A8 15mil VMB_WDQS6 A8 15mil
VMB_RDQS5 UDQS VDDLB3 VMB_RDQS7 UDQS VDDLB4
F7 LDQS VDDL J1 F7 LDQS VDDL J1
R449 R447 VMB_WDQS5 E8 VMB_WDQS7 E8
56_4 56_4 LDQS C158 C148 LDQS C226 C211
VMB_CLK1 J8 A2 VMB_CLK1 J8 A2
VMB_CLK1# CK NC1 0.1U/10V_4
1U/16V_6 VMB_CLK1# CK NC1 0.1U/10V_4
1U/16V_6
K8 CK NC2 E2 K8 CK NC2 E2
L1 VMB_BA2 L1 VMB_BA2
VMB_BA1 NC3 VMB_BA1 NC3
L3 BA1 NC4 R3 L3 BA1 NC4 R3
C810 VMB_BA0 L2 R7 VMB_BA0 L2 R7
470p_4 BA0 NC5 BA0 NC5
NC6 R8 NC6 R8
VMB_MA12 R2 VMB_MA12 R2
VMB_MA11 A12 VMB_MA11 A12
P7 A11 P7 A11
VMB_MA10 M2 A3 VMB_MA10 M2 A3
VMB_MA9 A10 VSS1 VMB_MA9 A10 VSS1
P3 A9 VSS2 E3 P3 A9 VSS2 E3
VMB_MA8 P8 J3 VMB_MA8 P8 J3
VMB_MA7 A8 VSS3 VMB_MA7 A8 VSS3
P2 A7 VSS4 N1 P2 A7 VSS4 N1
VMB_MA6 N7 P9 VMB_MA6 N7 P9
VMB_MA5 A6 VSS5 VMB_MA5 A6 VSS5
N3 A5 N3 A5
VMB_MA4 N8 A7 VMB_MA4 N8 A7
VMB_MA3 A4 VSSQ1 VMB_MA3 A4 VSSQ1
N2 A3 VSSQ2 B2 N2 A3 VSSQ2 B2
A VMB_MA2 M7 B8 VMB_MA2 M7 B8 A
VMB_MA1 A2 VSSQ3 VMB_MA1 A2 VSSQ3
M3 A1 VSSQ4 D2 M3 A1 VSSQ4 D2
VMB_MA0 M8 D8 VMB_MA0 M8 D8
A0 VSSQ5 A0 VSSQ5
VSSQ6 E7 VSSQ6 E7
VMB_ODT1 K9 F2 VMB_ODT1 K9 F2
CKEB1 ODT VSSQ7 CKEB1 ODT VSSQ7
K2 F8 K2 F8
CSB1_0#
WEB1#
L8
CKE
CS
VSSQ8
VSSQ9 H2 CSB1_0#
WEB1#
L8
CKE
CS
VSSQ8
VSSQ9 H2 PROJECT : QT8
Quanta Computer Inc.
K3 WE VSSQ10 H8 K3 WE VSSQ10 H8
RASB1# K7 RASB1# K7
CASB1# RAS CASB1# RAS
L7 CAS VSSDL J7 L7 CAS VSSDL J7

GDDR2-BGA84 GDDR2-BGA84 Size Document Number Rev


Custom VRAM Channel B 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 22 of 46
5 4 3 2 1
5 4 3 2 1

P33
P34
P35
U31E

PCIE_VSS_1
PCIE_VSS_2
PCIE_VSS_3
Part 6 of 7
VSS_66
VSS_67
VSS_68
P6
M9
M26
23
R27 PCIE_VSS_4 VSS_69 K28
R28 PCIE_VSS_5 VSS_70 M32
R29 PCIE_VSS_6 VSS_71 N14
R32 PCIE_VSS_7 VSS_72 N17
R33 N19
D
U29
PCIE_VSS_8
PCIE_VSS_9
VSS_73
VSS_74 N22 STRAP PIN D
U32 PCIE_VSS_10 VSS_75 N33
V29 PCIE_VSS_11 VSS_76 N3
V32 PCIE_VSS_12 VSS_77 R5

PCI-Express GND
T33 U8 +3V_DELAY
V34
PCIE_VSS_13
PCIE_VSS_14
VSS_78
VSS_79 P13 CONFIGURATION STRAPS
V35 PCIE_VSS_15 VSS_80 P15
W29 P18 R73 *10K_4
PCIE_VSS_16 VSS_81 18 GPIO0
W32 PCIE_VSS_17 VSS_82 P21
W33 P23 R72 *10K_4
PCIE_VSS_18 VSS_83 18 GPIO1
AA29 PCIE_VSS_19 VSS_84 P26 PIN DESCRIPTION OF DEFAULT SETTINGS M86-ME
AA32 P29 R76 *10K_4
PCIE_VSS_20 VSS_85 18 GPIO4
AB29 PCIE_VSS_21 VSS_86 P30
AB32 R1 R71 *10K_4 GPIO0 PCIE FULL TX OUTPUT SWING , 0 = 50% , 1 = FULL 0
PCIE_VSS_22 VSS_87 18 GPIO5
Y33 PCIE_VSS_23 VSS_88 U5
AB34 P9 R83 *10K_4
PCIE_VSS_24 VSS_89 18 GPIO6
AB35 PCIE_VSS_25 VSS_90 R10 GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED , 0 = DISABLE 0
AC33 R14 R70 *10K_4
PCIE_VSS_26 VSS_91 18 GPIO8
AD29 PCIE_VSS_27 VSS_92 R17
AD32 R19 R77 *10K_4 GPIO5 Allows eitherPCIe 2.5GT/s or 5GT/s operation , 0 = 2.5G , 1 = 5G 0
PCIE_VSS_28 VSS_93 18 GPIO22
AF29 PCIE_VSS_29 VSS_94 R22
AF32 V3 R85 *10K_4
PCIE_VSS_30 VSS_95 18 PSYNC
AD33 PCIE_VSS_31 VSS_96 AK9 VIP3 ENABLE HD AUDIO ( M86-M ) , 1 = ENABLE 1
AF34 U10 R69 *10K_4
PCIE_VSS_32 VSS_97 18,24 VSYNC_COM
AF35 PCIE_VSS_33 VSS_98 U15
AG27 U18 R79 *10K_4 GPIO8 ENABLE HD AUDIO ( M82-S ) REV
PCIE_VSS_34 VSS_99 18 VIP1
AG29 PCIE_VSS_35 VSS_100 U21
AG32 PCIE_VSS_36 VSS_101 U23
AG33 V7 R80 10K_4 HSYNC ENABLED HDMI 1
PCIE_VSS_37 VSS_102 18 VIP3
AJ29 PCIE_VSS_38 VSS_103 W8
C AJ32 V10 R68 10K_4 C
PCIE_VSS_39 VSS_104 18,24 HSYNC_COM
AH33 PCIE_VSS_40 VSS_105 V14 GPIO22 0 : DISABLED EXTERNAL BIOS ROM 0
AL34 PCIE_VSS_41 VSS_106 V17
AL35 PCIE_VSS_42 VSS_107 V19
AK32 PCIE_VSS_43 VSS_108 V22 GPIO4 FOR DEBUG ONLY 0
VSS_109 V1
A2 VSS_1 VSS_110 AK12
A34 VSS_2 VSS_111 V9 GPIO6 INTERNAL USE ONLY 0
C3 VSS_3 VSS_112 W10
C5 VSS_4 VSS_113 W15
A4 VSS_5 VSS_114 W18 VSYNC IGNORE VIP DEVICE STRAPS 0
C18 VSS_6 VSS_115 W21
A21 VSS_7 VSS_116 W23
C23 VSS_8 VSS_117 AA6 PSYNC VGA ENABLE , 0 = VGA CONTROLLER CAPACITY ENABLE 0
C11 VSS_9 VSS_118 AA10
C13 VSS_10 VSS_119 AA14
C14 VSS_11 VSS_120 AA17
A18 VSS_12 VSS_121 AA19
A11 VSS_13 VSS_122 AA22
C26 VSS_14 VSS_123 AB8
C33 VSS_15 VSS_124 AB10
F35 VSS_16 VSS_125 AB13
R7 VSS_17 VSS_126 AB15
G10 VSS_18 VSS_127 AB18
F15 VSS_19 VSS_128 AB21
H17 VSS_20 VSS_129 AB23
G21 VSS_21 VSS_130 AC14
D29 AC17
A29
G1
VSS_22
VSS_23
VSS_131
VSS_132 AC19
AC22
Memory Aperture size
B VSS_24 VSS_133 B
F14 VSS_25 VSS_134 AF9
J15 AD6
E19
E22
VSS_26
VSS_27
VSS_135
VSS_136 AB5
AD24
GPIO9 GPIO13 GPIO12 GPIO11
VSS_28 VSS_137
E24 VSS_29 VSS_138 W5 BIOSROM ROMIDCFG2 ROMIDCFG1 ROMIDCFG0
D7 VSS_30 VSS_139 AF6
G9 AF14
F26
G29
VSS_31
VSS_32
VSS_140
VSS_141 AF21
AF22
0 128M 0 0 0
VSS_33 VSS_142
D33 AK10
M5
G4
VSS_34
VSS_35
VSS_143
VSS_144 AF17
AF18 +3V_DELAY
0 256M 0 0 1
VSS_36 VSS_145
E10 AF19
E12
F17
VSS_37
VSS_38
VSS_146
VSS_147 AA3
AG12 R84 *10K_4
0 64M 0 1 0
VSS_39 VSS_148 18 GPIO9
G18 AJ14
G22
F30
VSS_40
VSS_41
VSS_149
VSS_150 AH21
D4
18 GPIO11
R75 10K_4 0 32M 0 1 1
VSS_42 VSS_151 R82 *10K_4
J35 AF15
J18
H19
VSS_43
VSS_44
VSS_152
VSS_153 AG10
AN6
18 GPIO12
R74 *10K_4
0 512M NO SUPPORT
VSS_45 VSS_154 18 GPIO13
J21 AK15
F7
J12
VSS_46
VSS_47
VSS_155
VSS_156 AJ17
AJ18
0 1G NO SUPPORT
VSS_48 VSS_157
J24 AJ19
J26
K30
VSS_49
VSS_50
VSS_158
VSS_159 AF24
AN32
0 2G NO SUPPORT
VSS_51 VSS_160
J32 AK3

A
F33
K6
VSS_52
VSS_53
VSS_161
VSS_162 AN3
AR8
0 4G NO SUPPORT A
VSS_54 VSS_163
K9 VSS_55 VSS_164 AM1
K14 VSS_56 VSS_165 AK30
K15 VSS_57 VSS_166 V11
K17 VSS_58
K18
K19
VSS_59
VSS_60 MECH_1 A35 PROJECT : QT8
Quanta Computer Inc.
K21 VSS_61 MECH_2 AR1
K22 VSS_62 MECH_3 AR35
M28 VSS_63
K3 VSS_64
L33 CORE GND Size Document Number Rev
VSS_65 Custom 1A
M86-STRAPS & GND
M86-M NB5/RD5
Date: Friday, August 29, 2008 Sheet 23 of 46
5 4 3 2 1
5 4 3 2 1

CRT PORT
F2 40 mils
+5VCRT

+5VCRT
C682
0.1U/10V_4

40 MIL
24
+5V 2 1

16
FUSE1A6V_POLY

6
CRT_R_1_L L71 BLM18BA470SN1(47,300MA)_6 CRT_R1 1 11 +3V
D
7 D
CRT_G_1_L L70 BLM18BA470SN1(47,300MA)_6 CRT_G1 2 12 D27 *BAV99W
8 1
CRT_B_1_L L69 BLM18BA470SN1(47,300MA)_6 CRT_B1 3 13 CRT_R1
3
9
4 14 2
10
R389 R388 R387 C690 C687 C684 C683 C686 C688 5 15
D26 *BAV99W
150/F_4 150/F_4 150/F_4 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6
1 CRT_G1
EMI

17
3
CRT CONN
close conn CN19 2
within 600mils PV stage change to short pad
D25 *BAV99W

+5V R1 *0_4/S CRTDDCCLK2 1 CRT_B1


3
R3 33_4 CRTVSYNC
+5V 2
R4 33_4 CRTHSYNC
D1 *BAV99W
5

1
C685 0.1U/10V_4 R5 *0_4/S CRTDDCDAT2
U23 1 DDCCLK2
3

18,23 VSYNC_COM 2 4 PR_VSYNC 38 2


AHCT1G125DCH PV stage change to short pad C1 C2 C3 C4
D2 *BAV99W
C *470P/50V_4 *47P/50V_4 *47P/50V_4 *47P/50V_4 C
1
5

CRTVSYNC
U24 AHCT1G125DCH 3

2
18,23 HSYNC_COM 2 4 PR_HSYNC 38
D3 *BAV99W
+3V
1 CRTHSYNC
R23 4.7K_4 3
+3V_DELAY
2

2
DDCCLK 1 3 DDCCLK2
18 DDCCLK DDCCLK2 38
D4 *BAV99W
Q6
2N7002E 1 DDCDAT2
+3V 3

+3V_DELAY R24 4.7K_4


2
2

DDCDATA 1 3 DDCDAT2
18 DDCDATA DDCDAT2 38
Q7
2N7002E
R2 R6

6.81K_4 6.81K_4

B B
+5VCRT 2 1 +5V_CRT2
+5VCRT
CH501H-40PT D24

U25
PR_RED 2 inputs function
38 PR_RED IA0
CRT_R_1_L 3
PR_GEN IA1 CRT_R
38 PR_GEN 5 IB0 YA 4 CRT_R 18
CRT_G_1_L 6 7 CRT_G
IB1 YB CRT_G 18
PR_BLU 11 9 CRT_B /E SET
38 PR_BLU IC0 YC CRT_B 18
CRT_B_1_L 10 12
IC1 YD
14 ID0
13 ID1 L L Y - port 0
1 16 +5V_SW
36,38 PR_INSERT# SEL VCC +5V
15 /E GND 8 R394 L H Y - port 1
1

PV stage 10K/F_4
74CBT3257 C693
delete H X Disconnect
0.1U/10V_4
2

R393
EMI
A CRT SWITCH A

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom CRT 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 24 of 46
5 4 3 2 1
1 2 3 4 5 6 7 8

+12VALW

25
+12VALW is +15V power level +3V
R391

2
C20 +LOGO_PWR R50 4.7K_4 EDIDCLK
+5V +3V_DELAY
R17 AO3404 ID 0.1U/10V_4
current 75R/F_6 R51 4.7K_4 EDIDDATA
18 TXLCLKOUT- TXLCLKOUT- 330K_6 5.8A

3
18 TXLCLKOUT+ TXLCLKOUT+ +5VSUS N-MOS,5.8A L2 +3VLCD_CON

1
+3VLCD
TXLOUT0- Q2 +3VLCD PBY201209T-4A_8 C14 10U/6.3V_8
18 TXLOUT0- TXLOUT0+ AO3404 C10 *0.1U/10V_4
18 TXLOUT0+
TXLOUT1- LCDONG 2 C12 0.01U/16V_4
18 TXLOUT1-

1
TXLOUT1+
18 TXLOUT1+ 460mA

1
TXLOUT2+ R12
18 TXLOUT2+

3
TXLOUT2- R14
A 18 TXLOUT2- A
100K/F_4 +VIN_BLIGHT +VIN_BLIGHT

1
18 TXUCLKOUT- TXUCLKOUT- 22_8 CN1 +3VLCD_CON

2
18 TXUCLKOUT+ TXUCLKOUT+ 2 +3VLCD_CON 41

2
1
TXUOUT0+ C5 1000P/50V_4
18 TXUOUT0+ 1 2
TXUOUT0- Q3 Q4 C18 LCDDISCHG
18 TXUOUT0- 3 4

3
TXUOUT1- PDTC144EU 2N7002E 0.1U/10V_4
18 TXUOUT1-

2
TXUOUT1+ 5 6
+3V

1
18 TXUOUT1+ 7 8 EDIDCLK 18

3
TXUOUT2- 2 EDIDDATA VADJ1
18 TXUOUT2- 18 DISP_ON 18 EDIDDATA 9 10
TXUOUT2+ +LOGO_PWR
18 TXUOUT2+ 11 12
LCDON# Q1 BLONCON 13 14
2

1
R15 2N7002E C692 1000P/50V_4 15 16
2.2K_4 TXLCLKOUT+ 17 18 TXUCLKOUT+
TXLCLKOUT- 19 20 TXUCLKOUT-
21 22

1
TXLOUT0+ 23 24 TXUOUT0+
TXLOUT0- 25 26 TXUOUT0-
27 28
TXLOUT1+ 29 30 TXUOUT1+
TXLOUT1- 31 32 TXUOUT1-
33 34
TXLOUT2+ 35 36 TXUOUT2+
+VIN_BLIGHT TXLOUT2- 37 38 TXUOUT2-
D5 CH501H-40PT 39 40
L1 FBM2125 HM330-T(4A,0.015)_8 PN_BLON BLONCON C24 22P/50V_4 41 42
+VIN 2 1
42
+3VPCU R22 33K_6 LCD CONN
C11 C8 C7 C9 C6 R20 100K/F_4
0.1U/50V_6 0.01U/50V_4 0.1U/50V_6 *10U/25V_12 0.1U/50V_6 D7 CH501H-40PT
B LVDS_BLON R21 1K/F_4 PN_BLON 2 1 LID_EC# B
18 LVDS_BLON LID_EC# 35,36

2 1 HWPG 36,39,40,42,43
18 DPST_PWM DPST_PWM R390 *0_4

3
D6 CH501H-40PT
PWM_VADJ R392 0_4 VADJ1
36 PWM_VADJ
LCD_BK 2
12 LCD_BK
Q5
C689 C691
R18 *PDTC144EU

1
*10K/F_4 *4.7U/6.3V_6 0.1U/10V_4
+3VS5

HDMI HPD SENSE


5v
TMDS_HPD R86 20K/F_4 HDMI_DET
18 TMDS_HPD
R445 499/F_4 TX2_HDMI+

1
R446 499/F_4 TX2_HDMI- D10 R81
+5V 100K/F_4 HDMI_SCL R62 0_4 HDMI_SCLK
3

R444 499/F_4 TX1_HDMI+ UDZS2.7BTE-17 18 HDMI_SCL


Q43 HDMI_SDA R78 0_4 HDMI_SDATA

2
2N7002E R443 499/F_4 TX1_HDMI- 18 HDMI_SDA
C C
2
R448 499/F_4 TX0_HDMI+
+5V_HDMVCC +5V_HDMVCC
R450 499/F_4 TX0_HDMI-
1

2
R451 R442 499/F_4 TXC_HDMI+
1 2 D31 D33
R441 499/F_4 TXC_HDMI- CH501H-40PT
100K/F_4

1
HDMI PORT
CH501H-40PT

CN26
20 +3V +3V R439 R440
Close to HDMI Connector TX2_HDMI+ 1
2
SHELL1
D2+SHELL3 22
4.7K_4 4.7K_4
TX2_HDMI- D2 Shield R58
3 D2-
TX1_HDMI+ 4 *2K/04
D1+

2
5 D1 Shield
18 TX2_HDMI_L- TX2_HDMI_L- C797 0.1U/10V_4 TX2_HDMI- TX1_HDMI- 6
TX2_HDMI_L+ C793 0.1U/10V_4 TX2_HDMI+ TX0_HDMI+ D1- HDMI_SCLK
18 TX2_HDMI_L+ 7 D0+ 1 3
8 18 HDMI_SCL
TX1_HDMI_L- C786 0.1U/10V_4 TX1_HDMI- TX0_HDMI- D0 Shield Q11
18 TX1_HDMI_L- 9 D0-
TX1_HDMI_L+ C789 0.1U/10V_4 TX1_HDMI+ TXC_HDMI+ 10 +3V *FDV301N
18 TX1_HDMI_L+ CK+ +3V
11 CK Shield
TX0_HDMI_L- C804 0.1U/10V_4 TX0_HDMI- TXC_HDMI- 12
18 TX0_HDMI_L- CK-
TX0_HDMI_L+ C801 0.1U/10V_4 TX0_HDMI+ PV stage delet L82,L83 13 R63
18 TX0_HDMI_L+ CE Remote
14 *2K/04 Q12
NC

2
TXC_HDMI_L- C779 0.1U/10V_4 TXC_HDMI- HDMI_SCLK 15 *FDV301N
18 TXC_HDMI_L- DDC CLK
D TXC_HDMI_L+ C781 0.1U/10V_4 TXC_HDMI+ HDMI_SDATA 16 D
18 TXC_HDMI_L+ DDC DATA
17 1 3 HDMI_SDATA
+5V_HDMVCC GND 18 HDMI_SDA
+5V 2 1 18 +5V
F1 500mA 19 23
FUSE1A6V_POLY HP DET
SHELL4
SHELL2 21
C132

*0.1U/10V_4
HDMI CONN PROJECT : QT8
HDMI_DET
Quanta Computer Inc.
Size Document Number Rev
Custom LCD CONN,HDMI CONN 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 25 of 46
1 2 3 4 5 6 7 8
8 7 6 5 4 3 2 1

For 5158

26
For 5158E SP6 SD_DAT1 SP7 MS_DATA0_SD_DAT0
R339 *0_4 R529 *0_4
2 CLK_48M_CR R383 *0_4 XTLO Note: R517 *0_4 XD-D6 D23
SP6 R534 *0_4 MS_DATA1
SP4 R322 *0_4 SD/MMC MS XD R525 *0_4 XD-D3
+3VSUS R325 *100K/F_4 U20 SP8 R526 *0_4 MS_DATA2_XD_D2
43 SP19 For 5158E SP1 XD_CD# SP16 R554 *0_4 SD_DAT2
XD_CLE/CF_D3 SP18 SP2 SD_WP R608 *0_4 XD-RE#
XD_CE#/CF_D11 42
13 41 SP17 SP3 SD_CD# SP5 R533 *0_4 MS_BS
R324 *0_4 CARD_LEDO CF_CD# XD_ALE/CF_D4 SP4 SD_DAT1 XD_D4 R518 *0_4 XD-D5
27,30 CARD_LED# 14 GPIO0
15 40 SP16 SP5 MS_BS XD_D5 SP15 R546 *0_4 SD_DAT3
CF_D10 SD_DAT2/XD_RE#/CF_D12 SP15 SP6 SD_DAT1 MS_D1 XD_D3 R567 *0_4 XD_WE
16 CF_D9 SD_DAT3/XD_WE#/CF_D5 39
SP14
AL005158B10 -->RTS5158E SP7 SD_DAT0 MS_D0 XD_D6 SP11 R531 *0_4 SD_CLK_MS_CLK
17 38
CF_D2 XD_RDY/CF_D13 SP13 SP8 SD_DAT7 MS_D2 XD_D2 R555 *0_4 XD-D1
D XD_CD#
18
CF_D8/SM_CD# SD_DAT4/XD_WP#/CF_D6
37 AL005158B00 -->RTS5158 SP2 SD_WP D
19 SP9 MS_INS# R504 *0_4
SP2 CF_D1/XD_CD# SD_CMD_R SP10 SD_DAT6 MS_D3 XD_D7 SP13 R558 *0_4 XD-WP#
20 36
SD_CD# CF_D0/SM_WPM#/SD_WP SD_CMD SP12 SP11 SD_CLK MS_SCLK XD_D1 SP19 R583 *0_4 XD-CLE
21 35
CF_A0/SD_CD# SD_DAT5/XD_D0/CF_D14 SP11 SP12 SD_DAT5 XD_D0 SP4 R524 *0_4 XD-D4
22 34
SP4 CF_DMACK# SD_CLK/XD_D1/MS_CLK/CF_D7 SP10 SP13 SD_DAT4 XD_WP# SP10 R537 *0_4 MS_DATA3
23 31
CF_A1/XD_D4 SD_DAT6/XD_D7/MS_D3/CF_D15 SP14 XD_R/B# R511 *0_4 XD-D7
24 30
CF_DMARQ CF_CS0# MS_CD# SP15 SD_DAT3 XD_WE# SP14 R610 *0_4 XD-RB#
29
R353 *6.19K/F_4 RREF MS_INS#/CF_IORD# SP8 SP16 SD_DAT2 XD_RE# SP12 R560 *0_4 XD-D0
2 28
RREF SD_DAT7/XD_D2/MS_D2/CF_IOWR# SP7 SP17 XD_ALE SP17 R569 *0_4 XD-ALE
27
SD_DAT0/XD_D6/MS_D0/CF_RST# SP6 SP18 XD_CE# SP18 R582 *0_4 XD-CE#
26
SD_DAT1/XD_D3/MS_D1/CF_IORDY SP5 SP19 XD_CLE SD_CMD_R R545 *0_4 SD_CMD
25
XD_D5/MS_BS/CF_A2
13 USBP6_CR- 4
DM
13 USBP6_CR+ 5 1
DP AV_PLL_IN C659 C950
*0.1U/10V_4
C661 *5.6P/50V_4 XTLO *1U/10V_4 JMB 380 Note:
48
XTLO SD/MMC MS XD
2

*12MHz 10 VREG CH501H-40PT


VREG_OUT +3VSUS_RTS
R363
5V_IN
8 R328 *0_6 +3VSUS D22 1 2 MS_CD# MDID0 SD_DAT0 XD_D0 MS_D0
*270K_4 Y6 3 MDID1 SD_DAT1 XD_D1 MS_D1
A3V3_ IN C648 C604 C610 XD_CD# SD_CD# MDID2 SD_DAT2 XD_D2 MS_D2
33 1 2
1

XTLI D3V3_ IN *0.1U/10V_4 *0.1U/10V_4 *4.7U/6.3V_6 MDID3 SD_DAT3 XD_D3 MS_D3


47
C660 *5.6P/50V_4 XTLI *0.1U/10V_4 C952 CH501H-40PT MDID4 SD_CMD XD_WE# MS_BS
For 5158 BG612000717 MDID5 SD_CLK XD_CE# MS_SCLK
11 +3VSUS C891 MDID6 SD_WP XD_WP#
D3V3_OUT 270P/25V_4 MDID7 XD_CLE
MODE_SEL 45 *0.1U/10V_4 C629 C600 MDID8 SD_DAT4 XD_D4
MODE_SEL *4.7U/6.3V_6 MDID9 SD_DAT5 XD_D5
RTS5158 need to remove
R380 C681 D23/D24/C873 MDID10 SD_DAT6 XD_D6
7 +3VSUS +3VCARD MDID11 SD_DAT7 XD_D7
C *10K/F_4 *47P/50V_4 A3V3_OUT MDID12 XD_RE# C
9 +3VCARD MDID13 XD_R/B#
For 5158 CARD_3V3_OUT MDID14 XD_ALE
6 C641 C954 CR1_LEDN SD1_LED# MS1_LED# XD_LED#
AG33 C646 C645 C634 C633 CR1_PCTLN SD1_PCTL#MS1_PCTL#XD1_PCTL#
46
AG_PLL *0.1U/10V_4 CR1_CD0 SD1_CD# XD_CV#
32
R621 *100K/F_4 5158_RST# 44 DGND2 *1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 *0.1U/10V_4 CR1_CD1 MS1_CD# XD_CD#
+3VSUS 12
C953 RST# DGND1
If SD_DAT1 connect to *RTS5158
SP4 , MOD_SEL need to *1U/10V_4
let it to N.C

PAD15 PAD14 PAD3 PAD8

*H-S315D110P2
H6

*H-S315D110P2 H2
H5
+3VCARD +3VCARD MDC_SPRING MDC_SPRING MDC_SPRINGMDC_SPRING
5 IN1 CARD READER

1
CN33
XD,MMC/SD,MS/MSP

*H-O173X118D173X118N
H17
XD-RB# 1 37

1
C936 XD-RE# xD-R/B GND
2 38
XD-CE# xD-RE GND
3 41

1
xD-CE GND PAD1

*H-S315D110P2
*270P/25V_4 XD-CLE 4 42
xD-CLE GND

*H-C256D157P2
H3
XD-ALE 5 1
+3VCARD +3VCARD +3VCARD XD_WE xD-ALE
6 40

1
xD-WE NC

*H-S315D110P2
H25

*H-C244D181P2
H27

*H-C217D157P2
H9

*H-C217D157P2
H12

*H-C217D157P2
H11
XD-WP# 7 39

1
CN32 XD-D0 xD-WP NC *MDC_SPRING
8
XD-RB# XD-D1 xD-D0 SD_CD#
1 37 9 36

1
R561 XD-RE# XD-R/B GND SD_DAT2 xD-D1 SD-CD SD_WP
2 38 10 35
XD-CE# XD-RE GND SD_DAT3 SD-DAT2 SD-WP XD_CD# Del PAD1
3 XD-CE GND 40 11 SD-DAT3 xD-CD 34
B *10K/F_4 XD-CLE 4 42 SD_CMD 12 33 PAD5 B
XD-CLE GND SD-CMD xD-VCC for TP
XD-ALE 5 43 13 32 XD-D7 1 on PV
XD_WE XD-ALE GND GND xD-D7 XD-D6
6 XD-WE 14 MS-VCC xD-D6 31

*H-C315D118P2

*H-S315D110P2
H10

*H-C315D118P2
H28

*H-C256D217P2
H19

*H-C256D217P2
H20
XD-WP# 7 39 SD_CD# SD_CLK_MS_CLK 15 30 XD-D5
XD-WP SD-C/D SD_CD# 27 MS-SDLK xD-D5

H15
XD-D0 8 36 SD_CD# MS_DATA3 16 29 SD_DAT1 MDC_SPRING
XD-D1 XD-DATA0 SD-CD-SW SD_WP MS_CD# MS-DATA3 SD-DAT1 XD-D4
9 41 17 28

1
SD_DAT2 XD-DATA1 SD-W/P SD_WP MS_DATA2_XD_D2 MS-INS xD-D4 XD-D3 PAD6 PAD10
10 SD-DATA2 SD-WP-SW 35 18 MS-DATA2 xD-D3 27
SD_DAT3 11 34 XD_CD# MS_DATA0_SD_DAT0 19 26 MS_DATA2_XD_D2 1 1
SD_CMD SD-DAT3 XD-CD MS_DATA1 MS-DATA0 xD-D2 MS_DATA0_SD_DAT0
12 SD-CMD XD-VCC 33 20 MS-DATA1 SD-DAT0 25
13 32 XD-D7 MS_BS 21 24 SD_CLK_MS_CLK
GND XD-DATA7 XD-D6 MS-BS SD-CLK MDC_SPRING *MDC_SPRING
14 MS-VCC XD-DATA6 31 22 GND SD-VCC 23 K/B SCREW HOLE VGA Hole
SD_CLK_MS_CLK 15 30 XD-D5
MS-SDLK XD-DATA5 PAD2 PAD11

*H-C315d118p2
H1
MS_DATA3 16 29 SD_DAT1
MS-DATA3 SD-DATA1

*H-S315D110P2
H8

*H-S315D110P2
H14

*H-C217D181P2
H7

*H-C217D181P2
H13
MS_CD# 17 28 XD-D4 *TAI TWUM 5IN1 CARD READER SOCKET 1 1
27 MS_CD# MS_DATA2_XD_D2 MS-INS XD-DATA4 XD-D3
18 27

1
MS_DATA0_SD_DAT0 MS-DATA2 XD-DATA3 MS_DATA2_XD_D2
19 26

1
MS_DATA1 MS-DATA0 XD-DATA2 MS_DATA0_SD_DAT0 R527 *0_4/S MS_DATA0_SD_DAT0 *MDC_SPRING *MDC_SPRING
20 MS-DATA1 SD-DATA0 25 27 MDIO00
MS_BS 21 24 SD_CLK_MS_CLK R557 *0_4/S XD-D0
MS-BS SD-CLK R520 *0_4/S SD_DAT1
22 GND SD-VCC 23 27 MDIO01 for MDC cable
+3VCARD R532 *0_4/S MS_DATA1 PAD12
routing
R551 *0_4/S XD-D1 1
5IN1 CARD READER SOCKET R528 *0_4/S MS_DATA2_XD_D2
27 MDIO02 SD_DAT2
R550 *0_4/S
C896 R510 R540 *0_4/S MS_DATA3 MDC_SPRING Mini Card Hole
27 MDIO03 SD_DAT3
2.2U/6.3V_6 *150K/F_4 R542 *0_4/S
+3V Q25 +3VCARD PAD13

*H-C256D217P2
H29

*H-C256D217P2
H26
R523 *0_4/S XD-D3
*AO3409

H4

*H-C256D217P2
H16

*H-C236D87P2
H23

*H-C236D87P2
H21

*H-C236D87P2
H18
R541 *0_4/S SD_CMD 1
27 MDIO04

*H-C256D217P2
R535 *0_4/S MS_BS

1
CLOSE CONN PV stage delete for Jmicro solution 1 3 R563 *0_4/S XD_WE

1
+5V R530 47/F_4 SD_CLK_MS_CLK MDC_SPRING
A 27 MDIO05 A
R587 47/F_4 XD-CE#
R502 *0_4/S SD_WP PAD9
2

27 MDIO06 XD-WP#
R505 *0_4/S 1
+3VCARD XD_PWON R330 *10K/F_4 R588 *0_4/S XD-CLE
27 MC_PWR_CTRL_0# 27 MDIO07 XD-D4
R521 *0_4/S
+3VCARD 27 MDIO08 XD-D5
Layout concern no change short pad R516 *0_4/S MDC_SPRING
PROJECT : QT8
27 MDIO09 XD-D6
R515 *0_4/S
27 MDIO10 XD-D7 PAD7 PAD4
C912 C897 C918 R335 0_8 R514 *0_4/S
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
RESERVED for JMicron -- after
27
27
MDIO11
MDIO12
R592
R607
*0_4/S
*0_4/S
XD-RE#
XD-RB#
1 1 Quanta Computer Inc.
27 MDIO13 XD-ALE
programming can out-put +3.3V R566 *0_4/S
27 MDIO14
MDC_SPRING MDC_SPRING Size Document Number Rev
throught MC_PWR_CTRL_0# signal Custom 1A
RTS5158 & CR SOCKET &HOLE
PV stage change to short pad NB5/RD5
Date: Friday, August 29, 2008 Sheet 26 of 46
8 7 6 5 4 3 2 1
5 4 3 2 1

+3V

C631

C624
0.1U/10V_4

0.1U/10V_4
TPBIAS0

R355
56.2/F_4
R356
56.2/F_4
C668 0.33U/16V_4

27
C651 0.1U/10V_4 TPB0N
*WCM-2012-900T(400mA)
D TPB0P D
C948 10U/6.3V_8 TPA0N 4 3

5
6
7
8
TPA0N TPA0P 1 2

5
6
7
8
+1.8V TPA0P L93 TPA0P 4
+1.8V_CARD 4
*BLM18PG181SN1D(180,1.5A)_6 TPBIAS0 TPA0N 3
L66 3

MDIO08 26 L94 TPB0P 2


C589 10U/6.3V_8 TPB0P 2
MDIO09 26 1 2
+3V TPB0N TPB0N

1
MDIO10 26 4 3 1 1
C625 0.1U/10V_4 12K %1 MDIO11 26
:CS31202FB15 MDIO12 26 1394_CONN
C630 0.1U/10V_4 R352 *WCM-2012-900T(400mA)
or 12K/F_4 CN31
C592 1000P/50V_4 CS31202FB07
C649 0.1U/10V_4 R617 56.2/F_4 R618 4.99K/F_4
R620 56.2/F_4
C590 0.1U/10V_4 C951 220P/50V_4

36

35

34

33

32

31

30

29

28

27

26

25
U18

TPA1N

TPB1N
TPA1P

TPB1P
TREXT

TPBIAS_1

TAV33

MDIO8

MDIO9

MDIO10

MDIO11

MDIO12
C C
R350 10K/F_4 D3E :
+1.8V_CARD 37 24 mode 1 : when card device insert can wake up card reader chip
DV18 TCPS
mode 2 : need to use pin16 to wake up card reader device
38 TXIN MDIO13 23 MDIO13 26

39 TXOUT MDIO14 22 MDIO14 26


R357 +3V
26 MDIO07 40 MDIO7 CR_LEDN 21 CARD_LED# 26,30
D3E _WAKEN pin :out put low 1ms can wake up
1M/F_4 26 MDIO06 41 20 +3V system when system into D3E mode 2
MDIO6 DV33

Y5 26 MDIO05 42 MDIO5 DV33 19

26 MDIO04 43
JMB380 18 +1.8V_CARD R329 R320 RB501V-40 D37
MDIO4 DV18 4.7K_4 4.7K_4 2 1 D3E GPIO# 12
+3V 44 DV33 CR1_PCTLN 17 MC_PWR_CTRL_0# 26
24.576MHZ
C653 C654 26 MDIO03 45 16 SD_CD# 26 D3E_SCI# 13
22P/50V_4 MDIO3 CR1_CD0N
27P/50V_4
26 MDIO02 46 MDIO2 CR1_CD1N 15 MS_CD# 26

3
Q24 R302 2.2K_4 +3VS5
26 MDIO01 47 14 T71 2N7002E-G
MDIO1 NC
B 26 MDIO00 48 13 D3E_WAKEUP 2 Q69 for power B
MDIO0 D3E_WAKEN
leakage
APCLKN

APREXT
APCLKP

APGND

D3E _WAKEN pin :out put Hi into D3E mode


APVDD

APRXN
49
XRSTN

APRXP

APTXN

APTXP
XTEST

APV18
EPAD concern
out put low normal mode

1
1

10

11

12
+3VCARD
R311

MDIO06 R323 10K/F_4


12 CARD_PLTRST#

MDIO13 R346 10K/F_4


8.2K/F_4

+3V
+1.8V_CARD

+1.8V_CARD

2 CLK_PCIE_CARD#
MDIO07 R342 10K/F_4
2 CLK_PCIE_CARD

A MDIO12 R351 2 1 200K/F_4 A


9 PCIE_TXP5
9 PCIE_TXN5
C594 0.1U/10V_4 PCIE_RXN5_C
PROJECT : QT8
9 PCIE_RXN5
C593 0.1U/10V_4 PCIE_RXP5_C
9 PCIE_RXP5
MDIO14 R570 1 200K/F_4
Quanta Computer Inc.
2

Size Document Number Rev


B 1A
JMB380 Controller/1394
NB5/RD5
Date: Friday, August 29, 2008 Sheet 27 of 46
5 4 3 2 1
A B C D E

28
+4.75VAVDD PV change to short pad +5V
U17 L67 *0_8/S
5 Vout Vin 1 1 2
+4.75VAVDD
PV change --from 4 BYP C599 C598 C591 C658 C595
0ohm to Bead EAPD#--DEFAULT is Hi C643 C657 C656 2 3 0.1U/10V_4 0.047U/25V_4 1U/10V_4 0.1U/10V_4 10U/6.3V_8
10U/6.3V_8 0.1U/10V_4 1U/10V_4 GND EN
38 SPDIF EAPD# 29
TPS793475
DIGITAL_CLK 31 C622
+3V_DVDD C949 AGND AGND AGND 1U/10V_4
+3V C150 22P/50V_4
BLM18PG181SN1D(180,1.5A)_6 *.1U/10V_4 C642 C655 R611 1K/F_4 MAINON 20,36,40,43,44,45
L65 10U/6.3V_8 0.1U/10V_4 C944 220U/16V AGND AGND
EARPO_R

+
EARP_R
R345 C945 220U/16V C612
EARPO_L EARP_L TO Headphone jack

+
C601 C616 C597 22_6 *0.1U/10V_4
AGND
1U/10V_4 0.1U/10V_4 10U/6.3V_8
AGND

PV BIT_CLK_AUDIO ACZ_SDIN0_ADC

49

48

47

46

45

44

43

42

41

40

39

38

37
change U19 +4.75VAVDD
--delete +3V_DVDD AGND

AVSS2**

AVDD2**
SPDIF0

GPIO 7 / SPDIF OUT1

GPIO 6

GPIO 5

PORTA_L
DMIC_CLK
EAPD

EAPD

PORTA_R

NC

NC
R351 and C605 0.01U/16V_4
1 2 R378 C608 C607
R338 C620 *22P/50V_4 TO Internal Speakers *27P/50V_4 *27P/50V_4
1 36 HP-R 29
DVDD_CORE PORT-D_R 5.11K/F_4
31 DIGITAL_D1 2 35 HP-L 29
FOR EMI
C609 0.1U/10V_4 VOL_UP/DMIC_0 PORT-D_L
3 34 SENSE_B R377 39.2K/F_4 SB_E#
+3V_DVDD DVDD_IO SENSE_B / NC
T96 DIGITAL_D2 4 33 C678 1U/10V_4 C679 1U/10V_4
VOL_DN/DMIC_1 CAP2 AGND AGND Audio JACK: Normal Open
5 32 Del R686, R356, R349
13 ACZ_SDOUT_AUDIO SDO MONO_OUT
direct on PV SA_A# -->EXT HP
BIT_CLK_AUDIO 6 31 MIC1-VREFO-E
13 BIT_CLK_AUDIO BITCLK VREFOUT-E / GPIO 4 SA_B# -->EXT MIC
7 30 IDT_GPIO3#
DVSS
92HD71B7
GPIO 3 IDT_GPIO3# 29 SB_E#-->DOCK MIC
13 ACZ_SDIN0 R316 22_4 ACZ_SDIN0_ADC 8 29 MIC1-VREFO-C
SDI_CODEC VREFOUT-C
PV change --update footprint
9 28 MIC1-VREFO-B
DVDD_CORE VREFOUT-B
ACZ_SYNC_AUDIO 10 27 VREF_FLT R187 *0_6/S
13 ACZ_SYNC_AUDIO SYNC VREFFILT
ACZ_RST#_AUDIO 11 26 CDC_AVSS R32 *0_6/S
13 ACZ_RST#_AUDIO RESET# AVSS1
R317 47K_4 C606 12 25 +4.75VAVDD C677 C640 C647 C680 R362 *0_6/S
13,29 ACZ_SPKR PCBEEP AVDD1

PORTC_R
10U/6.3V_8 1U/10V_4 1U/10V_4 1U/10V_4
PORTE_R

PORTB_R
PORTF_R
SENSE_A

PORTC_L
PORTE_L

PORTB_L
PORTF_L

C676 R334 *0_6/S


0.1U/10V_4 0.1U/10V_4
+3V_DVDD
NC

NC

NC
R627 *0_6/S
R321 C614 AGND AGND AGND
AGND AGND AGND R348 *0_6/S
13

14

15

16

17

18

19

20

21

22

23

24
10K/F_4 0.01U/16V_4
+4.75VAVDD
1 C615 C596 MIC1-VREFO-B R349 4.7K_4 1
0.1U/10V_4 10U/6.3V_8 AGND
recommand use X7R /10V R347 4.7K_4
R336 AGND SHIELD
MIC1_R1 C652 2.2U/6.3V_6 EXT_MIC_R
AGND SHIELD
TO EXTERNAL MIC
AGND 5.11K/F_4 MIC1_L1 C644 2.2U/6.3V_6 EXT_MIC_L
AGND SHIELD
JACK_SEN# R333 39.2K/F_4 SENSE_A R616 4.7K_4 R344 1.21K/F_4 AGND
AGND SHIELD
SA_B# R332 20K/F_4 DOCK_MIC_R1 C632 2.2U/6.3V_6 R343 10K/F_4
DOCK_MIC_R 38
AGND SHIELD
DOCK_MIC_L1 C627 2.2U/6.3V_6 R340 10K/F_4
C611 DOCK_MIC_L 38 AGND SHIELD TO DOCK MIC
1000P/50V_4 MIC1-VREFO-E R614 4.7K_4 R341 1.21K/F_4 AGND

AGND

SB_E# +12VALW is +15V power level +12VALW EARPO_R

3
CN18 Q29
C650 0.1U/10V_4 AUDIO CONN +5V 2N7002E
13 38 JACK_SEN#
+5VPCU R365 2 R379
1
36,38 CIR_IN 2 330K/F_4 *0_4
EARP_L 3
EARP_R 4 R366 R361 +3V

1
5
3

3
SA_A# 47K_4 47K_4
6 Q33 Q51 R622 C926
7

3
SA_B# EARPO_R_1 RSPK_DK_R

+
2N7002E 2N7002E
8

2
Q32 2 R628 2 RSPK_DK 38
9

2
EXT_MIC_L R619 60.4/F_6 220U/16V
10
3

C639 MMBT3904 2 R358


*180P/50V_4 C638 EXT_MIC_R 11 *0_4 100K/F_4 EARPO_L
12 DOCK MIC DETECT 2

3
Q52 100K/F_4
1

1
*180P/50V_4 14 R360 2N7002E
1

1
3

10K/F_4 R381 PV BOM check

1
C637 DOCK_MIC_L DKMIC_SEN 2 Q31 AGND AGND 2 TO DOCK Headphone
C636 AGND AGND
*180P/50V_4 *180P/50V_4 TO AUDIO/B CON. C675 R382 MMBT3904 3
Q30 *0_4
1

AGND 1U/10V_4 47K_4 2N7002E


for EMI AGND AGND R623 C927

1
SA_A# EARPO_L_1 LSPK_DK_R

+
AGND AGND 2 Q54 C669
2N7002E .01U/25V_4 LSPK_DK 38
R626 100K/F_4 60.4/F_6 220U/16V
TO Headphone jack +3V 2 1
AGND 100K/F_4 R354
1

AGND 2 1

AGND
PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom Azalia AD1883 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 28 of 46
A B C D E
1 2 3 4 5 6 7 8

AUDIO AMPLIFIER
+5VAMP

6 PVDD1
U21
ROUT+ 18
R_SPK+4

R_SPK-3
L8

L10
BK1608HM241

BK1608HM241

C52
R_SPK+

R_SPK- CN9
4
29
15 PVDD2 ROUT- 14 3
16 C57
VDD 470P/50V_4 470P/50V_4 2
LOUT+ 4 1
R376 *0_4/S HP_L_C C674 1 2 0.047U/16V_6 C_SPKR_L 5 8 DC impedance 0.35ohm
28 HP-L LIN- LOUT-
R367 *0_4/S HP_R_C 1 2 0.047U/16V_6 C_SPKR_R 17 INT SPEAKER CONN
28 HP-R RIN-
C667 19
A
PC_BEEP SHUTDOWN AGND A
9 LIN+
INT. SPEAKER

C618

C635

C671

C673
PV stage change to short pad 7 12 L_SPK+2 L11 BK1608HM241 L_SPK+
RIN+ NC
EPAD 21

2
C662 2 1 0.47U/10V_6 AMP_BYPASS 10 1 L_SPK-1 L9 BK1608HM241 L_SPK-
AGND BYPASS GND1
GND2 11 Vrms = Vpp / 2 √2

100P/50V_4

100P/50V_4

100P/50V_4

100P/50V_4
AUDIO_G0 2 13

1
AUDIO_G1 GAIN0 GND3
3 GAIN1 GND4 20
+5VAMP Power = (Vrms) 2/ R
TPA6017A2/FAN7031/LM4874 C63 C56
470P/50V_4 470P/50V_4 QT8 speaker -- 3.2ohm / 2W
AGND AGND AGND AGND AGND

6017A2 Gain Table R385 R384


PV change AGND
*100K/F_4 100K/F_4 +3V
GAIN0 GAIN1 AV RIN +5V ---delete R319 +5VAMP
0 0 6dB 90K AUDIO_G0 change to bead PV change ---update footprint

2
0 1 10dB 70K AUDIO_G1 R326
L98 BLM18PG330SN1D R624 *0_6/S

2
1 0 15.6dB 45K 2 499K/F_4
36 VOLMUTE#
R374 R373 R327 *0_6/S

1
1 1 21.6dB 25K 3 C613 C626 C619 C672
1K_4 *1K/F_4 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.047U/25V_4
1 1 AGND

1
28 EAPD#

2
D38
BAT54A

B AGND B
AGND

PC-BEEP MUTE_LED +5VPCU


Low -->un-MUTE
+5VAMP

2
High-->Mute
C935 *.1U/16V/04 R318
AGND from Hp suggestion
100K/F_4

1
36,38 MUTE_LED
5

1 C942 *0.1UF/06 TO AMP +3V R615 10K/F_4


36 KEY_BEEP

3
4 R585 *1K/04 PC_BEEP
13,28 ACZ_SPKR 2 2 Q53
36 VOLMUTE#
ME2N7002E
U40 R605 3 2
TO CODE
3

2
*NC7SZ86 *1K/04
C943 C941 1
28 IDT_GPIO3#
*.47U/10V_6 *.47U/10V_6

1
D39

1
AGND BAT54A
AGND
R571 *0_4
AMP_GND
C C

Acceleration sensor

+3V +3V
U9
1 Vdd_IO reserved second source
6 VDD
C455 C454 C457 3 C450 C449
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 Reserved *0.1U/10V_4 *0.22U/6.3V_4 U10
11 Reserved
2 VDD Reserved 1
9 VDD_IO Reserved 10

Del R767 8
12 INTH# INT1
9 INT2 12 INTH# 4 INT
12 2 PDAT_SMB 8
SDO GND 2,6,7,13,37 PDAT_SMB SDI
PDAT_SMB 13 4 PCLK_SMB 6 7
2,6,7,13,37 PDAT_SMB PCLK_SMB SDA/SDI/SDO GND 2,6,7,13,37 PCLK_SMB SCK SDO
2,6,7,13,37 PCLK_SMB 14 SCL/SPC GND 5 5 CSB GND 3
R180 10K/F_4 7 10
+3V CS GND
D *BOSCH BMA150 D
SGT-LIS302DLTR

SGT-LIS302DLTR interrupt pin default


is low / active Hi , BIOS need to
programming 22h to change status
from active Hi to low
PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
AMP_TPA6017/INT SPK
NB5/RD5
Date: Friday, August 29, 2008 Sheet 29 of 46
1 2 3 4 5 6 7 8
A B C D E

Modem CONN
30

FBSA1017
H24

FBSA1017
H22
1

1
+3V

MDC
CN17
4 4
1 2 C664 C665 C670
ACZ_SDOUT_AUDIO_MDC GND REV 0.1U/10V_4 2.2U/6.3V_6 1000P/50V_4
13 ACZ_SDOUT_AUDIO_MDC 3 A_SDO REV 4
5 GND VCC 6
ACZ_SYNC_AUDIO_MDC 7 8
13 ACZ_SYNC_AUDIO_MDC AC_SDIN1_MDC A_SYNC GND
13 ACZ_SDIN1 9 A_SDI GND 10
R331 33_4 11 12 R368 *0_4/S
A_RST# A_BCLK BIT_CLK_AUDIO_MDC 13
C617 *10P/50V_4 MDC CONN
13 ACZ_RST#_AUDIO_MDC For EMI
C663 PV stage change to short pad
*10P/50V_4

+3V

R364
*10K/F_4
(White)
2
LED
SATA_R_LED1 R372 39_6 3
3 +3V

3
R386 LED5
200/F_6 1 LED 3P WHITE/AMBER + 1 2 -
2 Q26 (Amber)

3
R371
Q28 Q27 *0_6/S Single Color ,Right angle
3 2 2 LTW-110TLA 3
36 LEDVCC_EN#

1
14 ACCLED_EN
1 *PDTC144EU *PDTC144EU

1
PDTC144EU
14 SATA_LED#
PV stage change to short pad

LED PWR CONTROL R178 *0_8/S


PV stage change to short pad

+12VALW is +15V power level +12VALW 20~40mils


LED3 2P WHITE LED
3 1 +3V_LED 1 2 PWR_R_LED1 R369 39_6
+3V +3V_LED 35,36 PWR_LED# +3VPCU_LED
Q21
R189 *2N7002E
2

*1M_4
C465 C467 LED4 2P WHITE LED
10U/6.3V_8 0.1U/10V_4
36 MBATLED0# 1 2 MBAT_R_LED1 R370 39_6
+3VPCU_LED
R186 *1M/F_4 LED_CTL
3 White
3

2P WHITE LED
C458 C563 C557 LED6 Anode 2 1 Amber
1 2 CARD_LED1 R500 39_6
2 *2N7002E 26,27 CARD_LED# +3V 2
LEDVCC_EN# 2 *1U/25V_8 *.22U/25V_6 *.22U/25V_6
36 LEDVCC_EN# Q19 Dual Color ,Right angle
LTW-326DSKF-5A

LED1 2P WHITE
1

36 CAPSLED# 1 2 CAP_LED R193 39_6


+3V_LED
add LED auto dim
function
PV stage
change to R289 *0_8/S PV2
Change to 39ohm
short pad
20~40mils
3 1 +3VPCU_LED
+3VPCU +3VPCU_LED
Q23 I = Vcc -Vf / R
*2N7002E
LED Vf
2

Amber
LED_CTL (Amber) R
C571 C579 TP_LED1# TPLD3 R191 200/F_6 4 2 +
10U/6.3V_8 0.1U/10V_4
36 TP_LED1# 4 2 +3V_LED Vcc Anode
TP_LED2# TPLD4 R190 39_6 3 1 +
36 TP_LED2# 3 1 +3V_LED
(White) For PA White
LED2 LED 4P WHITE/AMBER
PV stage
change to R161 *0_8/S
1 short pad 1

20~40mils
+5V 3 1 +5V_LED
Q13
*AO3404
PROJECT : QT8
Quanta Computer Inc.
2

C410 C411
0.1U/10V_4 *10U/6.3V_8
LED_CTL Size Document Number Rev
Custom MDC1.5 Con Accelerometer/lLED 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 30 of 46
A B C D E
5 4 3 2 1

BLUETOOTH LEFT SIDE USBX1 and E-SATA/USB COMBO


31
+3VPCU +3VSUS

R188 +5VSUS
U34 80 mils (Iout=2A)
4.7K_4

1
2 8 USB0PWR
VIN1 OUT3
3 VIN2 OUT2 7

1
Q18 4 6 C860
Del R179 on PV ME2303T1 EN OUT1 C867 C866 +
2 1 GND OC 5

100UF_16V
*470P/50V_4 0.1U/10V_4
C856 G545B2PU8

2
1U/10V_4 (TPS2061D)

3
3
D D
C464 AL000545017
2 Q20 0.1U/10V_4
14 BT_OFF#
PDTC144EU 24mil IC(8P)G545B2P8U(MSOP-8) - 1.5A
BTV AL000545000 USB 0
IC OTHER(8P) G545A2P8U(MSOP-8) - 2A

1
CN30
C456 C453 C459
CN2 10U/6.3V_8 0.1U/10V_4 *WCM-2012-900T(400mA) USB0PWR 1 8
BLUE TOOTH CONN *100U/6.3V_3528 USBP0- 1 GND
4 3 2 7

2
13 USBP0- 2 GND
87213-0600-6P-L 1 2 USBP0+ 3 6
13 USBP0+ 3 GND
4 4 GND 5
BTCON_P1 L47 C425 C433
6 T1
BLUELED *47P/50V_4 *47P/50V_4
5 BLUELED 36,37
USBP5- USBP1+ USB CONN
4 USBP5- 13
USBP5+ USBP1-
3 USBP5+ 13

1
2 BTV
1

2
C424

*Clamp-Diode_6
*Clamp-Diode_6 C434

1
*Clamp-Diode_6

2
C356
C344
*Clamp-Diode_6

C C825 C822 C
0.1U/10V_4 *470P/50V_4

USB & ESATA


CN29

*WCM-2012-900T(400mA) USB0PWR 1
USBP1- USB Vcc
13 USBP1- 4 3 2 D-
1 2 USBP1+ 3
13 USBP1+ D+
4 GND
L34

C346 *47P/50V_4 5 14
C371 0.01U/16V_4 SATA_TXP2_C GND Shield
14 SATA_TXP2 6 A+
1. ESD GND C355 *47P/50V_4 C372 0.01U/16V_4 SATA_TXN2_C 7 15
USB CAMERA CONNECT USB Fingerprint CON 14

14
SATA_TXN2

SATA_RXN2
C333 0.01U/16V_4 SATA_RXN2_C
SATA_RXP2_C
8
9
A-
GND
B-
Shield

Shield 12
2. SYSTEM GND C313 0.01U/16V_4 10
14 SATA_RXP2 B+
11 GND Shield 13
CN5
CAMERA-BOARD 3. USB-
Close to ESATA USB_ESATA_COMBO
DIGITAL_D1 6
28 DIGITAL_D1
DIGITAL_CLK 5 4. USB+ CON from AMD
28 DIGITAL_CLK 4 recommend
+3.9V-CAMARA
L28 4 USBP2- 3
13 USBP2- 3
USBP2+ 2 5. USB PWR(+3V)
13 USBP2+ 1 2 1
B +3V B
*WCM-2012-900T(400mA)
C97
0.1U/10V_4 RIGHT SIDE USBX2
C419 0.1U/10V_4 +5VSUS

DIGITAL_CLK +5VSUS
CN14 1
2
L50 3
USBP6+ 5 4
13 USBP6+ 1 2 4 13 USBP8+ 5
C135 4 3 USBP6- C55
+3V 13 USBP6- 3 13 USBP8- 6
*27P/50V_4 0.1U/10V_4
+3.9V-CAMARA 2 7
1 13 USBP9+ 8
*WCM-2012-900T(400mA)
13 USBP9- 9
R59 10
+5V *0_6 CN7
FINGER PRINTER CONN DUAL USB CONN
U4 PCB footprint
3 VIN VOUT 4 BL123-10R-10P-L-QT6

C121
C785 1 SHDN R1 R89 4.7U/6.3V_6
1U/10V_4 215K/F_4
A A
2 GND SET 5

IC(5P) G913C (SOT23-5)EP

R88
R2 100K/F_4
PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom BT/WEBCAM/FT/USBX4/ESATA 1A
Vout=1.25(1+R1/R2) NB5/RD5
Date: Friday, August 29, 2008 Sheet 31 of 46
5 4 3 2 1
5 4 3 2 1

33 +FB12
Layout concern no change short pad

R37 0_6 +LAN_A1.8_FB12


+3VLANVCC

PV stage
change to
R408 *0_6/S

C710

0.1U/10V_4
+CTRL15_E

C716

10U/6.3V_8
C719

10U/6.3V_8
32
Stuffed for RTL8111C for relteak check short pad

+3VLANVCC R407 *0_6/S +3V_GVDD


PV stage change to short pad
D LAN_TX# D
PV change ---delete R25
+LAN_D1.5 R31 *0_6/S +LAN_D1.5_RVD Stuffed for RTL8111C(10/100/1000)
+3V_A_LAN +3V_A_LAN LAN_LED_100# LAN_GLINK100#

XTAL1 LAN_GLINK10#
R406 *0_6 +CTRL15_E
Y1 33 +CTRL15
LAN_GLINK1000#
1 2 XTAL2 Stuffed for 8102E/RTL8101E
+3V_LAN +3V_LAN
+3V_GVDD
25MHZ
LAN CABLE DETECT 36
+CTRL15_E use BIOS to programming
+LAN_D1.5 EEPROM , EEDI should be
C42 C43 R30 2.49K/F_4 LANRSET +LAN_D1.5
30P/50V_4
pull Hi
30P/50V_4
+LAN_D1.5

U2 +3V_LAN R46

65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49

2
R409 only for 8111B,

RSET
EPAD

GVDD

NC
NC
VCTRL15

CKTAL2
CKTAL1
AVDD33
VDD15
LED_TX#
LED_100#
LED_10#
LED_1000#
VDD33
VDD15

VDD15
3.6K_6 8101E&8102E&8111C can
remove
33 +CTRL18 1 48

1
+3V_A_LAN VCTRL18 EESK EEDI
2 47
+3V_A_LAN MDI0+ AVDD33 EEDI +3V
3 46 +3V_LAN
MDI0- MDIP0 VDD33
4 45
+LAN_A1.8_FB12 MDIN0 EEDO
5 44
MDI1+ AVDD18 EECS +LAN_D1.5 LAN_YLED
6 43
MDI1- MDIP1 VDD15
7 42
+LAN_A1.8 MDIN1 NC LAN_GLED
+LAN_A1.8 8 41
C MDI2+ AVDD18 VDD15 if ISOLATEB pin C
MDI2-
9
MDIP2 RTL8111C-VB-GR NC
40 R421
EMI
10
MDIN2 NC
39 *1K/F_4 pull-low,the LAN
+LAN_A1.8 11 38 +LAN_D1.5 chip will not C86 C37
MDI3+ AVDD18 VDD15 +3V_LAN +3V_LAN
12 37 drive it's PCI-E *0.1U/50V_6 *0.1U/50V_6
MDI3- MDIP3 VDD33 ISOLATEB R422 100_4
13 36 LAN_DISABLE# 13,36 outputs (
+LAN_A1.8 MDIN3 ISOLATEB#
14 35
AVDD18 NC excluding

LANWAKEB#
+LAN_D1.5 +LAN_D1.5 R44 *0_4 15 34 2 1

PDAT_SMB
PCLK_SMB
VDD15 NC

REFCLK_N
REFCLK_P
+3V_LAN 16 33 PCIE_WAKE# pin )

PERSTB#
+3V_LAN VDD33 VDD15

2
EVDD18

EVDD18
VDD15

VDD15
*RB501V-40

AGND

HSON
AGND
HSOP
R411

HSIN
HSIP
R778
15K/F_4
D30 RJ45
RTL8111C remove , CN24
RTL8111B,8101E,8102E
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32

1
R53 330_4 LAN_GLED 12
need to stuff +3V_LAN LED_GRE_P
LAN_GLED# 10
T2 +LAN_D1.5 LED_GRE_N
T4
LAN_MX3- 8
PCIE_WAKE# PCIE_RXN6_LAN_L C83 0.1U/10V_4 LAN_MX3+ RX1-
13,37 PCIE_WAKE# PCIE_RXN6_LAN 9 7
PCIE_RXP6_LAN_L C82 0.1U/10V_4 LAN_MX1- RX1+
PCIE_RXP6_LAN 9 6
+LAN_D1.5 +LAN_D1.5 +LAN_E1.8 LAN_MX2- RX0-
+LAN_E1.8 5
+LAN_E1.8 +LAN_E1.8 PCIE_LAN_CLKN LAN_MX2+ TX1-
PCIE_LAN_CLKN 2 4
PCIE_LAN_CLKP LAN_MX1+ TX1+
PCIE_LAN_CLKP 2 3
PCIE_TXP6_LAN LAN_MX0- RX0+
9 PCIE_TXP6_LAN 2 14
PCIE_TXN6_LAN LAN_MX0+ TX0- GND1
9 PCIE_TXN6_LAN 1
TX0+
13
GND
R426 *0_4 LAN_REST_R# R28 330_4 LAN_YLED 9
36 LAN_REST# +3V_LAN LED_YEL_P
LAN_YLED# 11
LED_YEL_N

B AL08111C001 IC CTRL(64P) RTL8111C-VB-GR(QFN) RJ45_CONN B

AL08101E005 IC(64P)RTL8101E-GR(QFN) U27


C709 0.01U/16V_4 V_DAC 1 24 LAN_MCT0 C53 0.01U/100V_6 R34 75/F_4
TCT1 MCT1
MDI0+ 2 23 LAN_MX0+
TD1+ MX1+ LAN_MX0+ 38
MDI0- 3 22 LAN_MX0-
TD1- MX1- LAN_MX0- 38
C67 0.01U/16V_4 V_DAC 4 21 LAN_MCT1 C58 0.01U/100V_6 R38 75/F_4
+3V_LAN TCT2 MCT2
MDI1+ 5 20 LAN_MX1+
TD2+ MX2+ LAN_MX1+ 38
C736 0.1U/10V_4
MDI1- 6 19 LAN_MX1-
TD2- MX2- LAN_MX1- 38
LAN_GLINK10# 2 U28 C60 0.01U/16V_4 V_DAC 7 18 LAN_MCT2 C65 0.01U/100V_6 R39 75/F_4
TCT3 MCT3
5

3 LAN_PLTRST# 2 MDI2+ 8 17 LAN_MX2+


12 LAN_PLTRST# TD3+ MX3+ LAN_MX2+ 38
4 LAN_REST_R#
LAN_GLINK100# 1 1 MDI2- 9 16 LAN_MX2-
TD3- MX3- LAN_MX2- 38
D9 BAT54A TC7SH08FU C62 0.01U/16V_4 V_DAC 10 15 LAN_MCT3 C71 0.01U/100V_6 R42 75/F_4
3

TCT4 MCT4
LAN_GLINK1000# D8 1 2 RB501V-40 LAN_GLED# MDI3+ 11 14 LAN_MX3+
TD4+ MX4+ LAN_MX3+ 38
LAN_TX# LAN_YLED# MDI3- 12 13 LAN_MX3-
TD4- MX4- LAN_MX3- 38
R415 *0_4 C39
Link NS892402
C36 C81 1000P/3KV_1808
PV change ---delete R48
*0.01U/16V_4 *0.01U/16V_4 NS892402:GIGABIT
A
DB0AT9LAN05 A

NS892405:10/100 DB0ZB1LAN04

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
NB5/RD5
RTL8111C/8101E/RJ11-RJ45 CN
Date: Friday, August 29, 2008 Sheet 32 of 46
5 4 3 2 1
5 4 3 2 1

LANVCC
1.2W
364mA
+3V_LAN
Power trace Layout 寬度> 30mil

33
>30mil
+3VLANVCC

C718 C725 C712 C727 these CAP are for LAN CHIP LANVCC
D D
0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
C721 pins--16, 37, 46 and 53.placement close lan
C715 chip
10U/6.3V_8 0.1U/10V_4

+3V_A_LAN
placement close to lan chipset
>30mil

C711 C713 these CAP are for LAN CHIP LAN_A3.3


0.1U/10V_4 0.1U/10V_4
pins-- 2 and 59.placement close lan chip

L8 +FB12 32
RTL8111C ( Gaga lan ) use 4.7uH
power choke A>500mA tolerance L9
±15% RTL8111C stuff
RTL8102E need to remove L9
C RTL8101E & RTL8102E stuff 0ohm C

+LAN_A1.8
Power trace Layout 寬度> 30mil Power domain chart
L8 4.7UH,+-20%,580MA_8 L7
L9 *0_8/S
L6
>30mil +LAN_A1.8
32 +CTRL18 RTL8111B / RTL8111C
RTL8101E RTL8102E
these cap are for lan
C51 C59
10U/6.3V_8 C726 C724 C720 C728 chip LAN_A1.8 LANVCC 3.3V 3.3V
0.1U/10V_4
PV stage 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 pins--5, 8, 11 and 14.
C49
change to placement close chip
*10U/6.3V_8 C45 LAN_D1.8 1.8V 1.2V
10U/6.3V_8 short pad
C46 1.8V 1.2V
RTL 8101E /8102E stuff , LAN_A1.8
placement close to lan chipset
RTL 8111C need to remove +LAN_E1.8
R220
LAN_D1.5 1.5V 1.2V
PV stage R412 *0_8/S 8102E need to remove
C46 change to 8101E /RTL8111C use 0 ohm
RTL8111C stuff R220
short pad
RTL8101E / 8102E can remove
C730 C731
0.1U/10V_4 1U/10V_4

B B

these cap are for lan chip


PV stage L72 LAN_D1.8 pins, such as 22 and 28.
change to placement close lan chip
*0_8/S L66
short pad
L66 RTL8111C used 0ohm
RTL 8101E/8102E need to
remove

Power trace Layout 寬度> 30mil


C705
RTL8111C stuff
RTL8101E / 8102E can remove +LAN_D1.5
L5 *0_8
L67 >30mil
32 +CTRL15

L67 & C704


8101E/8102E stuff C705
C704 8111C need to remove
C717 C38 C47 C80 C79 C78 C48 C50 C46 C72 C84 C44 C69
C32 10U/6.3V_8 10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4
0.1U/10V_4
*10U/6.3V_8
A A

these cap are for lan chip LAN_D1.5 pins-- 15,


21, 32, 33, 38, 41, 43, 49, 52 and 58.placement PROJECT : QT8
close lan chip Quanta Computer Inc.
Size Document Number Rev
Custom LAN Power 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 33 of 46
5 4 3 2 1
A B C D E

NEWCARD (PCIEXPRESS*1 + USB*1)


SATA CD-ROM
1
CN34

GND1
S1
NEWCARD PV change ---delete R222,R226 , add short pad

*WCM-2012-900T(400mA)
+3V_NEWCARD
CN16
EXPCARD-48303-0042-26P-L-QT6
+3V

+3V
34
+3VS5
14 SATA_TXP4 2 TXP 1 GND_1

1
3 14 USBP7- L99 4 3 USBP7- 2 USB- C578 C573
14 SATA_TXN4 TXN 14 13 USBP7- USBP7+ USBP7+
4 GND2 16 16 13 USBP7+ 1 2 3 USB+
5 NEWCARD_DETECT CPUSB# 4 CPUSB# 0.1U/10V_4 0.1U/10V_4 C586 C531

2
14 SATA_RXN4 RXN 13 NEWCARD_DETECT
14 SATA_RXP4 6 RXP 5 RSV_0
7 GND3 PV change ---delete R229 6 RSV_1 10U/6.3V_8 0.1U/10V_4
R556 1K/F_4 S7 SCLK_WLAN 7 SMBCLK
D P1 13,37 SCLK_WLAN SDATA_WLAN D
1 2 8 DP 13,37 SDATA_WLAN 8 SMBDATA
9 9 +1.5V_0 +3VAUX
+5V +1.5V_NEWCARD
+5V 10 +5V 17 17 10 +1.5V_1
11 15 NEWCARD_WAKE# 11 WAKE#
MD 15 13 NEWCARD_WAKE# +3V_NEWCARD
12 GND +3VAUX 12 +3.3VAUX

1
13 PERST# 13 PERST# C519 C518
GND P6 PV change ---delete R261 14 +3.3V_1
SATA ODD 15 +3.3V_2 0.1U/10V_4 0.1U/10V_4

1
CLK_NEW_OE# 16 CLKREQ# C532 C525
NEWCARD_DETECT CPPE# 17 CPPE#
PCIE_NEW_CLKN 18 REFCLK- 0.1U/10V_4 0.1U/10V_4
2 PCIE_NEW_CLKN

2
PCIE_NEW_CLKP 19 REFCLK+
2 PCIE_NEW_CLKP +3VS5
L52 *WCM2012-110 20 GND_2
PCIE_RXN0 1 2 PCIE_RXN0 21 PERn0
9 PCIE_RXN0
120 mils PCIE_RXP0 4 3 PCIE_RXP0 22 PERp0
9 PCIE_RXP0
+5V 23 GND_3 NC5 31

1
PCIE_TXN0 1 2 PCIE_TXN0 24 PETn0 C542 C541
9 PCIE_TXN0 PCIE_TXP0 PCIE_TXP0 NC5 32 +1.5V_NEWCARD
4 3 25 PETp0

NC1
NC2
NC3
NC4
C900 C923 C919 C924 C921 9 PCIE_TXP0 0.1U/10V_4 0.1U/10V_4
26 GND_4

2
10U/6.3V_8 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 0.1U/10V_4 L51 *WCM2012-110

27
28
29
30

1
+3VS5 C510 C511

CPUSB# R232 *10K/F_4 0.1U/10V_4 0.1U/10V_4


2

2
CPPE# R258 *10K/F_4
2231_SHDN# R287 *10K/F_4
2231_STBY# R288 *10K/F_4

C C
U15
2231_STBY# 0.7A 1 STBY# 3.3VIN 2 +3V
+3VS5 17 4 For HP request to
+3VAUX AUXIN 3.3VIN
15 AUXOUT
SI Build N_PLTRST# 6 12 reserve
SYSRST# 1.5VIN +1.5V
NEWCARD_DETECT
21
22

23
24

10 CPPE# 1.5VIN 14
CN25 SATA HDD(1ST) 9 PCIE_RXN0
PERST# CPUSB#
8 3
2231_SHDN# 20
PERST# 3.3VOUT
SHDN# 3.3VOUT 5
+3V_NEWCARD 2A PCIE_RXP0
Main HDD +5V: 2 A(4 Pin) NEWCLKEN 18
NEW_OC# OC# RCLKEN PCIE_TXN0
19 11
+3V: 2 A(4 Pin) T97
7
OC#
GND
1.5VOUT
1.5VOUT 13
+1.5V_NEWCARD 1A
0

PCIE_TXP0
1

Gnd : (5 Pin) PV change ---delete R272

GND
GND
GND
GND
GND
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

1
R5538D001-TR-F C916 C917 C920 C922

26
25
24
23
22
21
*.1U/10V_4 *.1U/10V_4 *.1U/10V_4 *.1U/10V_4

2
SATA_TXP0 14
SATA_TXN0 14

SATA_RXN0 14
+5V SATA_RXP0 14
R5538 NEW CARD POWER SWITCH
+1.5V

B
pin name pull hi/low B

1
C536 C537
CPPE# internal pull up to AUXIN
0.1U/10V_4 0.1U/10V_4 PV change to short pad

2
+5V SYSRST# internal pull up to AUXIN +3VS5

R236 *0_6/S
2 EXT_NWD_CLK_REQ#
CPUSB## internal pull up to AUXIN
R235

3
*22K_4
PERST# a logic level power good
C195 C794 C778 C174 2 NEWCLKEN
10U/6.3V_8 4.7U/6.3V_6 0.1U/10V_4 10U/6.3V_8 SHDN# internal pull up to AUXIN
Q22
2N7002E
RCLKEN internal pull up to AUXIN

1
CLK_NEW_OE#
OC# over current status
follow AMD schematic
STBY# internal pull up to AUXIN
+3VS5

C526 0.1U/10V_4

U14
5

A A
EPRESS_PLTRST# 2
12 EPRESS_PLTRST# N_PLTRST#
4
1

TC7SH08FU
PROJECT : QT8
3

Quanta Computer Inc.


Size Document Number Rev
PV change - delete R539 add U14 Custom NEW CARD/SATA ODD/SATA HDD 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 34 of 46

A B C D E
5 4 3 2 1

POWER BUTTON CONNECT


MY5
MY6
MY3
C385
C849
C390
220P/50V_4
220P/50V_4
220P/50V_4
MY1
MY2
MY4
C852
C851
C383
220P/50V_4
220P/50V_4
220P/50V_4
MX7
MX0
MX5
C395
C384
C388
220P/50V_4
220P/50V_4
220P/50V_4
34
MY7 C850 220P/50V_4 MY0 C387 220P/50V_4 MX1 C393 220P/50V_4

NBSWON1# MY8 C382 220P/50V_4 MX4 C403 220P/50V_4 MY12 C848 220P/50V_4
+PWLEDVCC MY9 C404 220P/50V_4 MX6 C394 220P/50V_4 MY13 C389 220P/50V_4
MY10 C846 220P/50V_4 MX3 C853 220P/50V_4 MY14 C847 220P/50V_4
D D
MY11 C381 220P/50V_4 MX2 C386 220P/50V_4 MY15 C380 220P/50V_4

1
G2

1
C33 C40 C492 *SHORT_ PAD1

0.1U/10V_4 0.1U/10V_4 0.1U/10V_4

2
KEYBOARD PULL-UP
CN11 CN10
MX1 MX1
MX7 1 MX7 1
MX6 2 MX6 2
+3VPCU MY9 3 MY9 3
RP29
C705 0.1U/10V_4 MY0 MX4 4 MX4 4
10 1 5 5
MY15 9 2 MY5 MX5 MX5
MY11 MY4 MY0 6 MY0 6
8 3 7 7
CN4 MY13 7 4 MY8 MX2 MX2
R27 *39_6 PWR BTN CONN MY3 MX3 8 MX3 8
6 5 9 9
1 2 1. +3VPCU(LIDSWITCH PWR) MY5 MY5
+5VPCU 10 10
10K_10P8R MY1 MY1
+3VPCU 11 11
R26 39_6 2. LEDVCC(+3VPCU) MX0 MX0
+PWLEDVCC 1 MY2 12 MY2 12
+3VPCU_LED 1 2 RP40
2 MY10 MY4 13 MY4 13
25,36 LID_EC# 3 3. LIDSWITCH MY9
10 1
MY14 MY7 14 MY7 14
36 NBSWON1# 4 9 2 15 15
PWR_LED# 4.POWERON# MY1 8 3 MY12 MY8 MY8
30,36 PWR_LED# 5 16 16
MY2 7 4 MY6 MY6 MY6
6 MY7 MY3 17 MY3 17
5. PWRLED# 6 5
MY12 18 MY12 18
10K_10P8R MY13 19 MY13 19
C 6. GND MY14 20 MY14 20
C

MY11 21 MY11 21
MY10 22 MY10 22
MY[0..15] MY15 23 MY15 23
36 MY[0..15] 24 24

MX[0..7] KB CONN_SCY *KB CONN_FOX


36 MX[0..7]
BL135-24-RL-24P-L-QT6 GB1RF240-1253-XF-24P-L

PV change - REMOVE CN12


CAP SW CONNECT +5V_LED 140 mA
CN12
1.LEDVCC
4 2.LEDVCC
3
2 3. NC
C399 1
4. GND
*0.1U/10V_4 *BL123-04R-TAND
BL123-04R-4P-L-QT6-A

+3VPCU
B B

C76
0.1U/10V_4

CN8 1. +3VPCU
CAP SW BOARD
2. MBCLK
1
36,45 MBCLK 2 3. MBDATA
36,45 MBDATA 3
36 IC2_INT 4 4. CAP_INT
5
36 NUMLED# 6 5. GND
+5V_LED 7
8 6. NUM LOCK LED
C73 9
7. +5V
0.1U/10V_4
8. ESB_CLK
9. ESB_DAT

L12 ESB_CLK
36 CAP_ESB_CLK
FBMA-11-160808-601T

L13 ESB_DAT
36 CAP_ESB_DAT
A FBMA-11-160808-601T A

C66
C70
68P/50V_4 *10P/50V_4

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom LED/KEYBOARD/SW 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 35 of 46
5 4 3 2 1
5 4 3 2 1

PV change
+3VPCU +3VPCU

36
+3VPCU_EC +5VPCU
to short U11
pad *GMT_G910T21U
U12 C463 4.7U/6.3V_6 L53 R167 4.7K_4 TPCLK
+5VSUS
SERIRQ 3 9 C484 0.1U/10V_4 1 3
12 SERIRQ LFRAME# SERIRQ VCC1 Vout Vin TPDATA
4 22 C470 0.1U/10V_4 R172 4.7K_4

GND
12,37 LFRAME# LFRAME VCC2
LAD0 10 33 C503 0.1U/10V_4 BLM18BA470SN1(47,300MA)_6 C466 close conn
12,37 LAD0 LAD0 VCC3
LAD1 8 96 C507 0.1U/10V_4
12,37 LAD1 LAD2 LAD1 VCC4
7 111 C502 0.1U/10V_4 1U/10V_4
12,37 LAD2

2
LAD3 LAD2 VCC5 C462 0.1U/10V_4
5 125
12,37 LAD3
PCLK_LPC_KB3920 12
LAD3 VCC6
67 C468 4.7U/6.3V_6 TOUCH PAD CONNECTOR
12 PCLK_LPC_KB3920 PCICLK AVCC
R225 *0_4/S 13
12 PCIRST# PCIRST/GPIO5
CLKRUN# 38 25 mils
D 12 CLKRUN# CLKRUN +3VPCU_EC D
C428 0.1U/10V_4
+5VSUS
SCI1# 20
GATEA20 SCI/GPIOE TEMP_MBAT C423 0.1U/10V_4
13 GATEA20 1 GA20/GPIO0 AD0/GPI38 63 TEMP_MBAT 45 +3V_LED
RCIN# 2 64 AD_TYPE
13 RCIN# KBRST/GPIO1 AD1/GPI39
3920_RST# 37 65 AD_AIR
ECRST AD2/GPI3A AD_AIR 45
66 SYS_I
AD3/GPI3B SYS_I 45 12
MX0 55
35 MX0 KSI0/GPIO30 11
MX1 56 68 CC-SET TPCLK L48 BLM18BA470SN1(47,300MA)_6 TPCLK-1
35 MX1 KSI1/GPIO31 DA0/GPO3C CC-SET 45 10
MX2 57 70 TPDATA L49 BLM18BA470SN1(47,300MA)_6 TPDATA-1
35 MX2 KSI2/GPIO32 DA1/GPO3D 9
MX3 58 71 FAN1ON TP_LED1#
35 MX3 KSI3/GPIO33 DA2/GPO3E FAN1ON 38 8
MX4 59 72 D/C# C430 TP_LED2#
35 MX4 KSI4/GPIO34 DA3/GPO3F D/C# 45 7
MX5 60 C448
35 MX5 KSI5/GPIO35 6
MX6 61 21 PWM_VADJ *10P/50V_4 *10P/50V_4 TP_L
35 MX6 KSI6/GPIO36 PWM1/GPIOF PWM_VADJ 25 5
MX7 62 23 KEY_BEEP (1KHz) TP_R
35 MX7 KSI7/GPIO37 PWM2/GPIO10 KEY_BEEP 29 4
MY0 3
35 MY0 39 KSO0/GPIO20 FANPWM1/GPIO12 26 CV-SET 45 2
MY1 40 27 EC_ACLIM
35 MY1 MY2 KSO1/GPIO21 FANPWM2/GPIO13 FAN1SIG EC_ACLIM 45 1
35 MY2 41 KSO2/GPIO22 FANFB1/GPIO14 28 FAN1SIG 38
MY3 42 29 CIR_IN
35 MY3 KSO3/GPIO23 FANFB2/GPIO15 CIR_IN 28,38
MY4 43 CN13
35 MY4 MY5 KSO4/GPIO24 MBCLK
44 77 Battery charge/discharge TOUCH PAD CONN
35 MY5 KSO5/GPIO25 SCL1/GPIO44 MBCLK 35,45
MY6 45 78 MBDATA Cap button SW1 PCB footprint
35 MY6 MY7 KSO6/GPIO26 SDA1/GPIO45 MBCLK2 MBDATA 35,45
35 MY7 46 KSO7/GPIO27 SCL2/GPIO46 79 MBCLK2 5,18 3 1 BL121-12R-12P-L-QT6
MY8 47 80 MBDATA2 VGA thermal MY7 4 2 MX4
35 MY8 KSO8/GPIO28 SDA2/GPIO47 MBDATA2 5,18
MY9 48 system thermal 6 5
35 MY9 MY10 KSO9/GPIO29
35 MY10
MY11
49
50
KSO10/GPIO2A PA
35 MY11 KSO11/GPIO2B
MY12 51 TMG-533-S-V-TR
35 MY12 KSO12/GPIO2C
MY13 52
35 MY13 KSO13/GPIO2D
C MY14 53 6 SUSB# C
35 MY14 KSO14/GPIO2E GPIO4 SUSB# 13
MY15 54 C956 5.6P/50V_6
35 MY15
81
KSO15/GPIO2F
KSO16/GPIO48 GPIO7 14 HWPG
HWPG 25,39,40,42,43
MBCLK TOUCH PAD ON/OFF
82 15 PM_BATLOW1# C958 5.6P/50V_6
KSO17/GPIO49 GPIO8 MBDATA
IC2_INT 83 16 SUSC# C955 5.6P/50V_6
35 IC2_INT PSCLK1/GPIO4A GPIOA SUSC# 13
SLPBTN# 84 17 MBCLK2 SW2
24,38 SLP_BTN# PSDAT1/GPIO4B GPIOB CAP_ESB_CLK 35
R210 10K/F_4 85 18 CAP_ESB_DAT 35 C957 5.6P/50V_6 TP_L R337 1K/F_4 TP_L_CONN 3 1
+3VPCU PSCLK2/GPIO4C GPIOC
ACIN 86 19 NBSWON1# MBDATA2 4 2
45 ACIN PSDAT2/GPIO4D GPIOD NBSWON1# 35
TPCLK 87 25 6 5
PSCLK3/GPIO4E GPIO11 LAN_REST# 32

2
PV change TPDATA 88 30
PSDAT3/GPIO4F GPIO16 EC_DEBUG1 37
31 SWI#1 C452
to short BIOS_RD# GPIO17 KBSMI#1 0.1U/10V_4 TMG-533-S-V-TR
119 32

1
pad BIOS_WR# RD GPIO18
120 WR PV add for SM BUS noise issue
BIOS_CS# 128 34 VRON
SELMEM/SPICS GPIO19 VRON 40,41
R242 *0_4/S SERR#_1 89 36 NUMLED#
12 SERR# SELIO/GPIO50 GPIO1A NUMLED# 35
76 AD5/GPI43
VOLME_UP# 109 reserved for H/W CIR SW3
38 VOLME_UP# VOLME_DN# D0/GPXD0 TP_R TP_R_CONN
110 R359 1K/F_4 3 1
38 VOLME_DN# D1/GPXD1
PR_INSERT# 112 4 2
24,38 PR_INSERT# D2/GPXD2
MUTE_LED 114 73 6 5
29,38 MUTE_LED D3/GPXD3 GPIO40 CIR_IN 28,38

2
RF_LINK# 115 74 R195 *10K/F_4
37 RF_LINK# D4/GPXD4 GPIO41 +3VPCU
BLUELED 116 75 R196 10K/F_4 for EC board ID pin C451
LAN CABLE DETECT D5/GPXD5 AD4/GPI42 DNBSWON#1 0.1U/10V_4 TMG-533-S-V-TR
32 LAN CABLE DETECT 117 90

1
D6/GPXD6 GPIO52 CAPSLED# +3V R221 *10K/F_4 HWPG
T41 118 D7/GPXD7 GPIO53 91 CAPSLED# 30
92 PWR_LED#
R243 *4.7K_4 BIOS_A0 97 A0/GPXA0
GPIO54
GPIO55 93 ECPWROK PWR_LED# 30,35
ECPWROK 5,16
TOUCH PAD L/R
SUSON 98 95 RSMRST# R252 100K/F_4 CIR_IN
42,44 SUSON MAINON A1/GPXA1 GPIO56 VOLMUTE# RSMRST# 13 +3VPCU NBSWON1#
99 121 R197 10K/F_4
20,28,40,43,44,45 MAINON A2/GPXA2 GPIO57 VOLMUTE# 29
LAN_POWER 100 126 SPI_CLK R244 10K/F_4 VOLME_UP#
B 44 LAN_POWER A3/GPXA3 GPIO58 B
S5_ON 101 127 LID_EC# R245 10K/F_4 VOLME_DN#
43,44 S5_ON A4/GPXA4 GPIO59 LID_EC# 25,35
VR2.5_ON 102 R220 10K/F_4 SLPBTN#
42 VR2.5_ON A5/GPXA5
103 R199 4.7K_4 MBCLK
13,32 LAN_DISABLE# LEDVCC_EN# A6/GPXA6 CRY2 MBDATA
104 123 C490 18P/50V_4 R205 4.7K_4
30 LEDVCC_EN# A7/GPXA7 XCLKO
MBATLED0# 105 R223 *8.2K_4 PM_BATLOW#
30 MBATLED0# A8/GPXA8
4

AC_LED_ON# 106 R183 *8.2K_4 CLKRUN# BLUELED R246 100K/F_4


45 AC_LED_ON# A9/GPXA9 31,37 BLUELED
TP_LED1# 107 122 CRY1 Y3 R230 *8.2K_4 SERIRQ +3VPCU
30 TP_LED1# A10/GPXA10 XCLKI
TP_LED2# 108 32.768KHZ R202 4.7K_4 CAP_ESB_CLK
30 TP_LED2# A11/GPXA11 R198 4.7K_4 CAP_ESB_DAT
11
1

GND1
GND2 24
35 +3VPCU
GND3 C491 18P/50V_4
124 V18R GND4 94
113 C555
GND5
2

69 0.1U/10V_4
C505 C506 AGND D11
0.1U/10V_4 4.7U/6.3V_6 1SS355 U38 R264
1

KB3926 BIOS_CS# 1 8
SPI_CLK R248 33_4 CE# VDD 10K/F_4
6 SCK
For KB3926 C version BIOS_WR# 5
AD_TYPE R182 100/F_4 BIOS_RD# SI SPI_7P
AD_ID 45 2 SO HOLD# 7

R247 10K/F_4 SPI_3P 3 4


+3VPCU WP# VSS
2

R181 64.9K -->65W MX25L8005


SCI1# D13 1 2 CH501H-40PT C461 24.3K/F_4
SCI# 13
0.1U/10V_4 33.7K -->90W SST AKE5GFK0Z09 1M byte
1

SB internal pull Hi 10k SPI


WINBOND AKE3GFP0N08
A PM_BATLOW1# D15 1 2 CH501H-40PT PM_BATLOW# 13 to 3v_s5 BIOS A
PME AKE3GZP0500

DNBSWON#1 3920_RST#
EON AKE3GZP0Q00
D16 RB500V-40
DNBSWON# 13 3920_RST# 5,45

R184 47K_4
C460 0.1U/10V_4
PROJECT : QT8
Quanta Computer Inc.
+3VPCU 2 1
KBSMI#1 D12 RB500V-40
KBSMI# 13

SB internal pull Hi PV change - Delete R219 Size Document Number Rev


SWI#1 D14 1 2 *CH501H-40PT L-F Custom KB3926/ROM/TP 1A
SWI# 13 10k to 3v_s5 NB5/RD5
Date: Friday, August 29, 2008 Sheet 36 of 46
5 4 3 2 1
A B C D E

Mini PCI-E Card 1 WLAN


+3V
+3VSUS

R57 *10K/F_4
+1.5V
37

2
C87 C85 C30
0.01U/16V_4 0.1U/10V_4 10U/6.3V_8
+3V_WLAN +1.5V
D D
3 1 MINICAR_PME#
13,32 PCIE_WAKE#
CN22 Q8
51 52 *PDTC144EU
Reserved +3.3V
49 Reserved GND 50
47 Reserved +1.5V 48
45 46 MINI_BLED R281 *0_4 +3V_WLAN
Reserved LED_WPAN# BLUELED 31,36
43 44 RF_LINK#
Reserved LED_WLAN# RF_LINK# 36
41 42 R295 10K/F_4
Reserved LED_WWAN# +3V
39 Reserved GND 40
37 Reserved USB_D+ 38 USBP10+ 13
35 36 C29 C708
GND USB_D- USBP10- 13
PCIE_TXP1 33 34 0.1U/10V_4 10U/6.3V_8
9 PCIE_TXP1 PETp0 GND
PCIE_TXN1 31 32 DAT_SMB SDATA_WLAN 13,34
9 PCIE_TXN1 PETn0 SMB_DATA
29 30 CLK_SMB
GND SMB_CLK SCLK_WLAN 13,34
27 GND +1.5V 28
PCIE_RXP1 25 26
9 PCIE_RXP1 PERp0 GND
PCIE_RXN1 23 24
9 PCIE_RXN1 PERn0 +3.3Vaux MINI_PLTRST#
21 GND PERST# 22 MINI_PLTRST# 12
PCLK_LPC_DEBUG 19 20
12 PCLK_LPC_DEBUG Reserved W_DISABLE# RF_OFF# 12
MINI_PLTRST# 17 18 INTEL WLAN
Reserved GND +3V
CARD PIN 20
15 16 LAD0_1 R495 *0_4/S LAD0 LAD0 12,36 W_DISABLE#
PCIE_MINI1_CLKP GND Reserved LAD1_1 R494 *0_4/S LAD1
2 PCIE_MINI1_CLKP 13 REFCLK+ Reserved 14 LAD1 12,36 have
2 PCIE_MINI1_CLKN PCIE_MINI1_CLKN 11 12 LAD2_1 R493 *0_4/S LAD2
REFCLK- Reserved LAD2 12,36 internal
9 10 LAD3_1 R492 *0_4/S LAD3 LAD3 12,36
T5 CLK_MINI_OE# GND Reserved LFRAME#_1 R496 *0_4/S LFRAME# pull-up 110k
7 CLKREQ# Reserved 8 LFRAME# 12,36
5 6 ohm C34 C41
14 BT_COMBO_EN# BT_CHCLK +1.5V
3 4 0.1U/10V_4 1U/10V_4
MINICAR_PME# BT_DATA GND
T3 1 WAKE# +3.3V 2 PV change to short pad
C C
MINI PCIE H=4.0
BT_DATA,BT_CHCLK,CLKREQ# R487
internal pull-DOWN 100k *10K/F_4
ohm

PCLK_LPC_DEBUG R410 *0_4 C714 *27PF/50V_4

for EMI request

Mini PCI-E Card 2 TV tuner card


+3V

B B
MINIEC_5V +1.5V
FOR KBC DEBUG C628 C603
CN35 0.1U/10V_4 10U/6.3V_8
R625 *0_6 51 52
+5V COMP VIDEO IN +3.3Vaux
49 Therm Trip out GND 50
47 AUD_R_IN +1.5V 48
36 EC_DEBUG1 45 AUD_L_IN NC 46
43 GND NC 44
41 +3.3Vaux NC 42
39 +3.3Vaux GND 40
37 GND NC(USB_D+) 38 USBP11+ 13
35 GND NC(USB_D-) 36 USBP11- 13
PCIE_TXP3 33 34
9 PCIE_TXP3 PCIE_TXN3 PETp0 GND PDAT_SMB
9 PCIE_TXN3 31 PETn0 NC(SMB_DATA) 32 PDAT_SMB 2,6,7,13,29
29 30 PCLK_SMB
GND NC(SMB_CLK) PCLK_SMB 2,6,7,13,29
27 GND +1.5V 28
PCIE_RXP3 25 26
9 PCIE_RXP3 PERp0 GND
PCIE_RXN3 23 24 +3V
9 PCIE_RXN3 PERn0 NC(+3.3Vaux)
21 22 MINI_PLTRST# PV change - Delete R314
GND PERST#
19 S-Video Y/in NC 20
17 S-Video C/in GND 18

15 16 +1.5V
PCIE_MINI2_CLKP GND NC
2 PCIE_MINI2_CLKP 13 REFCLK+ NC 14
2 PCIE_MINI2_CLKN PCIE_MINI2_CLKN 11 12
REFCLK- NC
9 GND NC 10
7 CLKREQ# NC 8
5 6 C621 C623 C602
NC +1.5V 0.01U/16V_4 0.1U/10V_4 10U/6.3V_8
3 NC GND 4
A 1 NC +3.3Vaux 2 A

MINIPCIE H=7.0
67910-0002

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom Mini CARD X 3 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 37 of 46
A B C D E
A B C D E

CABLE DOCK
38
support 6A 200mils
CX000480005

+DOCK_VA CN20
L4
48/6A_12 VA_P VA_P 44 43 VA_P
45 +DOCK_VA VDD VDD

CRT_GDK 38 39
C27 C13 CRT_RDK 38 39
40 40 37 37
0.1U/50V_6 0.1U/50V_6 24 DDCDAT2 34 34 35 35
CRT_BDK 36 33
4
R613 221/F_4 SPDIF_DK C947 0.1U/50V_6 SPDIF_DOCK R16 BK1608 LL121 PR_HSYNC_D 36 33 4
28 SPDIF 24 PR_HSYNC 30 30 31 31
24 DDCCLK2 32 32 29 29 CIR_IN 28,36
USBP4- 26 27 PWR_ON
26 27
R612 C946 R19 BK1608 LL121 PR_VSYNC_D 28 25 MUTE_LED
24 PR_VSYNC 28 25 MUTE_LED 29,36
100/F_4 220P/50V_4 22 23 SLP_BTN#
22 23 SLP_BTN# 36
USBP4+ 24 21 JACK_SEN#
24 21 JACK_SEN# 28
18 19 VOLME_UP#
32 LAN_MX3+ 18 19 VOLME_UP# 36
4 3 USBP4- 20 17 VOLME_DN#
13 USBP4- 32 LAN_MX3- 20 17 VOLME_DN# 36
1 2 USBP4+ 15 SPDIF_DOCK
13 USBP4+ 15
32 LAN_MX2+ 14 14
L3 *WCM-2012-900T(400mA) 16 13
32 LAN_MX2- 16 13 AGND
10 11 RSPK_DK
32 LAN_MX1+ 10 11 RSPK_DK 28
12 9 LSPK_DK
32 LAN_MX1- 12 9 LSPK_DK 28
32 LAN_MX0+ 6 6 7 7
8 5 DOCK_MIC_R 28
32 LAN_MX0- 8 5 DOCK_MIC_L 28
+3V +3VPCU 2 3
2 3 DOCK_PRESENT AGND
+VIN 4 4 1 1
1

C704 42 41
VSS VSS
46 46 45 45
R398 0.1U/50V_6
100K/F_4 R404 DOCKING CONN
*100K_4
2

PR_INSERT#
PR_INSERT# 24,36
docking
insert is HI
3 voltage 3
Q34
3

MMBT3904
DOCK_PRESENT 1 2 DKPR# 2 PV change to BLM18BA470SN1(47,300MA)
R397 1K/F_4
1

R399
2K/F_4 PR_GEN BLM18BA470SN1(47,300MA) R9 CRT_GDK
24 PR_GEN
PR_RED BLM18BA470SN1(47,300MA) R8 CRT_RDK
24 PR_RED
D28
PR_BLU BLM18BA470SN1(47,300MA) R11 CRT_BDK
24 PR_BLU
+5V RB500V-40

D29
+5VSUS R396 1 2 10K/F_4 DK_PWRON RB500V-40 PWR_ON R13 R7 R10
C22 C15 C19 C21 C16 C17
1

S0: 4V *Check 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6 5.6P/50V_6


S3: 2.5V voltage on R395 150/F_4 150/F_4 150/F_4
DB 15K/F_4
S4/S5:
2

0V

filter for docking CRT

2 2
+3V DOCK_MIC_R

DOCK_MIC_L
CPU FAN R185
4.7K_6 RSPK_DK

LSPK_DK
VOLME_DN#
36 FAN1SIG
JACK_SEN#
CIR_IN
CN23
20 mil
+5VFAN1 1 PR_HSYNC_D
1
2 2
3 PR_VSYNC_D
C723 C722 3
FAN CONN
2.2U/6.3V_6 0.1U/10V_4 C25 C23
C697 C699 C698 C701 C700 C703 C702
5.6P/50V_4
5.6P/50V_4 *100P/50V_4 *100P/50V_4 *270P/25V_4 *180P/50V_4 *180P/50V_4 *180P/50V_4 *180P/50V_4
+5V
G955 /FON
signal have C696 1U/10V_4
internal AGND AGND AGND AGND AGND
pull Hi to
VIN , R420 R405
maybe can G995 layout notice
1 10K/F_4 U26 1
remove 2 3 +5VFAN1
VIN VO 8 7 6 5
GND 5
FAN_SMBALERT# 1 6
/FON GND
GND 7 Gnd shape

PROJECT : QT8
36 FAN1ON 4 VSET GND 8

Quanta Computer Inc.


FANPWR = 1.6*VSET G995
1 2 3 4

Size Document Number Rev


Custom 1A
CABLE DOCKING/FAN
NB5/RD5
Date: Friday, August 29, 2008 Sheet 38 of 46
A B C D E
5 4 3 2 1

+3V 2,3,5,6,7,10,11,12,13,14,15,16,20,24,25,26,27,28,29,30,31,32,34,36,37,38,44

DC/DC +3VPCU/+ 5VPCU/ +12VALW


TON: 5V / 3.3V
39
GND = 400 / 500KHz
+5VPCU 28,29,35,36,40,41,42,43 REF = 400 / 300KHz
VCC = 200 / 300KHz
+3VPCU 5,12,25,30,31,35,36,38,41,42,43,45
+VIN
D +3VSUS 13,26,31,37,40,42,44 DB modify
D

+VIN_6237
+3VS5 5,7,12,13,14,15,16,25,27,34,44
+5VAL +5V_VCC1
+5VSUS 25,31,36,38,44

2200P/50VB_4

0.1U/50VB_6

10U/25VD_1206
PR153

PC193

PC190

PC192
+VIN PD19 2 1
+5V 5,15,20,24,25,26,28,29,30,31,34,37,38,43,44 UDZS5.6BTE-17 PR157

4.7U/6.3VC_6
1 2 *47_6
+LANVCC +

PC116
1K/F_4
PV modify 2 1
PR154 Place these CAPs 3.3 Volt +/- 5%

6237ONLDO
*0_4 150K/F_4
PR156 close to FETs

5 Volt +/- 5% Place these CAPs Del PR159 for TP on PV


+3VPCU
C/C:8A
10U/25VD_1206

0.1U/50VB_6

2200P/50VB_4
6237VIN PC113
close to FETs
PC189

PC103

PC104
PC114 PC112 1U/10VC_4
+5VPCU P/C:10A

5
6
7
8
0.1U/50VB_6
0.1U/10VC_4

REF
PC115
C/C:8A 6236AGND
*1U/10VC_4 6236AGND
4
P/C:10A

TON
PQ58

8
7
6
5
SI4800BDY

8
7
6
5
4
3
2
1
4 6236AGND
6236AGND PL13 +3VPCU

LDO

ONLDO

REF
LDOREFIN

IN
RTC

VCC
TON

3
2
1
PC111 REFIN2 2.5uH/7.5A_10
Vout=0.7(Ra+Rb)/Rb

6236AGND
C PQ55 *0.1U/10VC_4 3V_LX C
SI4800BDY PR155

5
6
7
8

330U/6.3V_ESR25_6X5.8
+5VPCU 9 32 309K/F_4
+5VPCU Rb around 49.9k BYP REFIN2

6236AGND

0.1U/10VC_4
PL8 10 31 1 2
1
2
3

OUT1 ILIM2

1
2.5uH/7.5A_10 6236FB1 11 PU8 30 PR209
FB1 OUT2

PC197

PC195
+5V_ALWP PR144 1 2 12 29 4 2.2_6 +
309K/F_4 PGOOD1 ILIM1 RT8206 SKIP PGOOD2 PR149
13 28

1
PGOOD1 PGOOD2
2

6237ON1 14 27 *0_4/S

2
ON1 ON2
2

8
7
6
5
330U/6.3V_ESR25_6X5.8

PR206 5V_DH 15 26 3V_DH PC196

1
DH1 DH2
0.1U/10VC_4

Ra 2.2_6 5V_LX 16 25 2200P/50VA_6


LX1 LX2
1

PC84
PC177

+ PR145 4 5V_DL

SECFB
1

3
2
1
AGND
PGND
+3VPCU

0.1U/50VB_6

PC108
*0_4

BST1

BST2
VDD
PAD
1

DL1

DL2
PC109 PQ59
2

2
PC176 PQ54 0.1U/50VB_6 FDS6690AS
2

2200P/50VA_6 FDS6690AS

5VBST1R
Rb

33

17
18
19
20
21
22
23
24

5
6
7
8
Rds(on) 15m ohm PR147
PR146 PR140 1_6 *0_4

3VBST2R
1
2
3

*0_4/S 5VBST1

3VBST2
Rds(on) 15m ohm 1 2

1
4
1

44 MAIND
PR139 PC110 PQ34
+5VAL 1 2 *0.1U/10VC_4 6236AGND SI4800BDY
6236AGND PD17 1_6 3V_DL
1 6236AGND
PC107 6236AGND
I_lim*MOSFET(RDSON)=V_ILIM(mV)/10 BAT54S 3 PR208
+3V

3
2
1
PC194 PR177 *0_4/S
0.1U/50VB_6 1U/10VC_4 PGOOD2 2
V_ILIM(mV)=5uA*R_ILIM 2 1 +3V
*SHORT-1A
PGOOD1
6.76A
B HWPG 25,36,40,42,43 B
PC101 1
0.1U/50VB_6 PC106
PD18 3 6236AGND 6236AGND S0-S1
BAT54S
PR138 2 0.1U/50VB_6 +3VPCU
0_6
+12VALW is +15V power level +12V_ALWP
+12VALW
2

Please use +15VALW to +15VALW

5
prevent voltage PR152
PR142
0_4
PC100
2.2U/50VB_8 +3VS5 +3VSUS
rating issue 100K_4 PQ35
1

AP4228
+5VAL
PR141
6237ON2
0.5A 1.84A
5,45 SYS_SHDN# 2 1

0_4
S0-S5 +3VS5 +3VSUS S0-S3

4
+5VPCU +5VPCU

+3VSUS
5,7,12,13,14,15,16,25,27,34,44 +3VS5 +3VSUS 13,26,31,37,40,42,44
5
6
7
8

5
6
7
8

+5VSUS SUSD
44 S5_OND SUSD 44
MAIND4 PQ24 4 PQ23

A
44 MAIND
SI4800BDY
+5V 44 SUSD
SI4800BDY 4.5A +3VPCU
A

4.31A S0-S3
1
2
5
6
For EMI-SI +5V For EMI-SI +5VSUS PQ57 +LANVCC
3
2
1

3
2
1

SI3456
S0-S1
PROJECT : QT8
44 LAN_ON 3

0.27A
Quanta Computer Inc.
4

PC117 PC92 +3VLANVCC


+5V 5,15,20,24,25,26,28,29,30,31,34,37,38,43,44 +5VSUS 25,31,36,38,44
0.1U/10VC_4 0.1U/10VC_4
Size Document Number Rev
+3VLANVCC 32,33,44 Custom 1A
+5V/+3V(ISL6237)
NB5/RD5
Date: Friday, August 29, 2008 Sheet 39 of 46
5 4 3 2 1
5 4 3 2 1

+1.1V & +1.2V 40


PD3
+5VPCU CH501H-40PT L-F
D +VIN D

2 1 RTBST

1U/10VC_4
PC24

2200P/50VB_4

10U/25VD_1206

*10U/25VD_1206
PR25
+VIN +1.2V

0.1U/50VB_6
10_6

PC137

PC136

PC144

PC140
Ton=3.85p*R_TON*VOUT/(VIN-0.5) +3VSUS PC15 PR6
12A (4.3A+7.0A)

5
6
7
8
Frequency=Vout/(VIN*TON) 8204VDD BST

PR5 1U/10VC_4 0_6

20
21

13
2

9
604K_4 PC4 4
PR46 0.1U/50VB_6 S0-S1

VDD

GND
GND

VDDP

BST
47K_4 RTTON 16 12 RTDH PQ41
TON DH SI4800BDY
RTPG 4 11 RTLX
PR48 *0_4/S PGD LX +1.2V
PU1
2 1 RTLPPG 5 PL7
25,36,39,42,43 HWPG PR33

3
2
1
PR1 LPGD ILIM
RTEN 15
RT8204 ILIM 10
36,41 VRON EN/DEM

5
6
7
8
10.7K/F_4 1.5uH/13A_10
DL 8

1
0_4 17 PAD

VOUT
*100P/50VA_4

0.1U/10VC_4
3 +

LDRI

GND
LEN
FB

LFB
PC2

PC178
19 RTDL 4 PR199 PC175
C 20,28,36,43,44,45 MAINON GND C
PQ40 2.2_6 390U/2.5V_6X5.8ESR10

RTFB

2
PR9 *0_4 FDS6690AS

14

18

1
PR45
reserved for pwr seq -- andrew PR39 10K/F_4 PC159

RTLEN
6.49K/F_6 2200P/50VA_6 PC150 change

3
2
1
PR47 footprint to
10K_4 R1 R2 ECAP6_3X6_1-7_2-QT8
RTPG
RDSon=15m-ohm
PV modify
PC21
PC3 *100P/50VA_4
*100P/50VA_4

Vo=0.75(R1+R2)/R2
+1.2V R_ILIM=I_LIMIT*Rsense/20uA +1.1V 8,9,10,11,18,20,44

Keep R2 higher than 10Kohm +1.2V 2,3,11,12,14,15


RTLDRI
+1.1V_DYN
PC28

5
6
7
8
22P/50VA_4 PC180
B 10U/4VD_8 B
PR49
0_6 4
PQ53
SI4856
+1.1V
PC41
22P/50VA_4
7.0A
+1.1V

3
2
1
S0-S1

0.1U/10VC_4
PC186

10U/4VD_8

10U/4VD_8
R1

*22P/50VA_4

PC184

PC185
PC34
PR53
5.11K/F_6

RTLFB

Vo=0.75(R1+R2)/R2
R2 PR43
A 10K/F_4 A

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
B 1A
+1.2V & +1.1V(RT8204)
NB5/RD5
Date: Friday, August 29, 2008 Sheet 40 of 46
5 4 3 2 1
A B C D E F G H

3A +CPUVDDNB

UGATE_NB 8 G1

7 S1/D2
PQ50

D1 1

D1 2
+VIN_CPU_NB
+VIN

41

2200P/50VB_4

0.1U/50VB_6

10U/25VD_1206
PR201

1
390U/2.5V_ESR10_6X5.8
ISL6265 Pin1 OFS VFIXEN 3 CPU_VDDNB_RUN_FB_H PL11 6 G2 3 LGATE_NB

PC161

PC166

PC160
3.3UH/11A_10
47/F_4 + 5 S2 4

2
PC187
1.2V
V X SI4914DY

0.1U/10VC_4
PR200

PC183
3.3V 3 CPU_VDDNB_RUN_FB_L
X V
47/F_4
1 1
5V 6265AGND
X X

+5VPCU PR90

1000P/50VB_4
10_6

PC51
PR85
VFIXEN VID Codes 22.1K/F_4

2
PC52
SVC SVD Output 1U/10VC_4

1
+VIN +VIN
PR91

1
10_6 6265AGND

1200P/50VB_6
0 0 1.4 PR78

PC153
*0_4/S

2200P/50VB_4

0.1U/50VB_6

10U/25VD/1206

10U/25VD/1206
1

1
PC156

PC150
0 1 1.2

2
2

PC29

PC145
PR192

44.2K/F_6
PR195

*0_4/S

PR79
PC53 LGATE_NB

2
5
1 0 1.0 0.01U/50VB_4 PR196

33P/10VB_4

PC158
*short 12.1K/F_4 PHASE_NB

2
6265AGND
1 1 0.8 4

+5VPCU PR87 UGATE_NB PQ43


0_4 6265AGND PC152 FDMS8692
1 2 0.1U/50VB_6
36A
+3VPCU

49

48

47

46

45

44

43

42

41

40

39

38

37
PR74 PU3

3
2
1
+3VPCU *0_4 PV modify PL9 +VCORE0

FB_NB

COMP_NB

FSET_NB

VSEN_NB

RTN_NB

OCSET_NB

PGND_NB

LGATE_NB

PHASE_NB

UGATE_NB
GND

VIN

VCC
1 2 PR194 0.36uH/25A_11
PR75 6265AGND 1_6
10K_4 PR86 1 2
PR76 1 36 BOOT_NB
OFS/VFIXEN BOOT_NB
3 4

5
PR66 PC49

330U/2V_ESR9_7
2 *0_4/S *10K_4 2

1
330U/2V_ESR9_7
16 VRM_PWRGD 1 2 2 35 BOOT_0 PR204
PGOOD BOOT_0 2.2_8

PC86

PC85
PR62 *0_4/S 1_6 0.22U/25VB_6 4
3 CPU_PWRGD_SVID_REG 1 2 3 34 UGATE_0

2
PWROK UGATE_0

*100P/50VA_6
PC169
PR59 *0_4/S
1 2 4 33 PHASE_0
3 CPU_SVD SVD PHASE_0
PR56 *0_4/S ISP_0

3
2
1
3 CPU_SVC 1 2 5 32 PQ46
SVC PGND_0 FDMS8670S ISN_0
PR210 PR50 *0_4/S
1 2 6 31 LGATE_0 +5VPCU +VIN
36,40 VRON ENABLE LGATE_0
6265AGND

PC148
PC33
PR189 180P/50VA_4 Pin 49 is GND Pin
7 30 2 1
10K_4 RBIAS PVCC

2200P/50VB_4

0.1U/50VB_6

10U/25VD/1206

10U/25VD/1206
22K/F_4 PR190
ISL6265HRTZ-T

1
4.7U/6.3VC_6

PC146

PC149

PC31

PC147
PR38 100K/F_4 8 29 LGATE_1
OCSET LGATE_1

5
255/F_4
PC30

2
PR40 4700P/25VB_4 9 28
1K/F_4 VDIFF_0 PGND_1
4 36A
10 27 PHASE_1
FB_0 PHASE_1 +VCORE1
PC7 PQ44
PR12 11 26 UGATE_1 FDMS8692
54.9K/F_4 COMP_0 UGATE_1 PL10

3
2
1
1200P/50VB_6 PR34 PR32 PC22 0.36uH/25A_11 PC87 PC88
12 25 1 2
VW_0 BOOT_1

COMP_1
VDIFF_1
VSEN_0

VSEN_1
PC20 6.81K/F_4 1_6 0.22U/25VB_6 3 4
RTN_0

RTN_1

5
ISN_0

ISN_1
ISP_0

VW_1

ISP_1
180P/50VA_4

FB_1

1
330U/2V_ESR9_7

330U/2V_ESR9_7
PR203
PC19 4 2.2_8
13

14

15

16

17

18

19

20

21

22

23

24
3 3
1000P/50VB_4

2
*100P/50VA_6
PR20

PC162
ISP_0

3
2
1
16.2K/F_4 PQ47
2

FDMS8670S
1

1
PR24

PR23

1000P/50VB_4
PR183 PR19 PC10
4.02K/F_4 0.1U/50VB_6
1

+VCORE0

2
10_4 ISN_0 PC11 PC13 PR8
0.1U/50VB_6 4.02K/F_4
2

1
*0_4/S *0_4/S PV modify
3 CPU_VDD0_RUN_FB_H ISP_1
PR21

6.81K/F_4

PR18

3 CPU_VDD0_RUN_FB_L PR7
1

16.2K/F_4 ISN_1
+VCORE0 +VCORE1
PR182 *0_4/S
PR207
2 1
2

10_4 PR184 2 1
+1.8VSUS *0.001_2512

*1K/F_4
1

1200P/50VB_6

PC6

PR151 PR22
*0_4/S
4700P/25VB_4

10_4
2

PC5

180P/50VA_4
1K/F_4

PR26

3 CPU_VDD1_RUN_FB_L
PC1

3 CPU_VDD1_RUN_FB_H +VCORE0 5
4 4
+VCORE1 5
54.9K/F_4

PR150
PR4

PR11
+VCORE1
255/F_4 +CPUVDDNB5
10_4

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
C CPU_CORE(ISL6265) 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 41 of 46
A B C D E F G H
A B C D E

42
+2.5V 3
+1.8VSUS 3,4,5,6,7,41,43

+1.8VSUS
+VIN

4 4
0.1U/10VC_4

0.1U/10VC_4

0.1U/10VC_4

*100U/25V_6.3X7.7

*100U/25V_6.3X7.7

*10U/25VD_1206

10U/25VD_1206
1

PC37

PC151
I_lim(Valley)=10uA*R_ILIM/RDS_ON
PC119

PC121

PC118

PC174

PC179
+ +
+5VPCU
PR36
For OCP set.

2
51116_V5FILT

2
10_6
PC27 PC16

0.1U/50VB_6

2200P/50VB_4
2.2U/6.3VC_6 1U/10VC_4
+1.8VSUS

1
+3VSUS

PC42

PC45
PV modify

15

14
PU2

5
23.65A Ra=(Vout-0.75)/0.75*Rb PC46
PR64
PR44

V5FILT
V5IN
BST 22 16 CS PR193
VBST CS 10K_4
4
S0~S3 0.1U/50VB_6 2.2_6 8.45K/F_6
Rb value from 100K to 300K ohm PQ42
PGOOD
13 HWPG 25,36,39,40,43
AOL1426
1.8V_DH 21
DRVH
+1.8VSUS 11 S5ON PR16

1
2
3
S5 SUSON 36,44
PL6 0_4
+1.8VSUS_J 1.8V_LX 20 10 S3ON PR17
LL RT8207 S3 0_4
1

*100P/50VA_4
1.5uH/10A_10 23 +1.8VSUS
VLDOIN
0.1U/10VC_4

*100P/50VA_4
+

PC14
3 PC168 PR202 3
PC171

PC9
2.2_6 4 1.8_DL 19 PC47
2

DRVL 1U/10VC_4

2
2200P/50VA_6
Ra PQ45 1
VTTGND

PC170
AOL1412
390U/2.5V_6X5.8ESR10 PR15 4
147/F_4 1.8V_OUT MODE PC63 PC54 +0.9VSMVTT
8
+0.9VSMVT

1
2
3
PC8 VDDQSNS 10U/4VD_8 10U/4VD_8
*100P/50VA_4 9 24
VDDQSET VTT +0.9VSMVTT 4,7

COMP 6
VTTSNS
2 VTTSNS 1 2
*0_4/S PR51
2.25A
COMP
Fix 1.8V Output 18
S0~S3

CS_GND
PGND

VTTREF
PR31 7 PR52 CPU_VTT_SENSE 4
51116_V5FILT NC *0_4
12 25

GND
PR35 NC PAD PR41
*0_4 0_4 *0_4/S
MODE 1 2 +1.8VSUS

17

3
51116_V5FILT PR27
619K/F_4
Rb +VIN
PR37
PR14 0_6 EC:1108 SI PR186
100K/F_4
4,6 +0.9VSMVREF
*SHORT-1A Mode Discharge Mode
PC38
0.033U/25VB_6
2 V5IN No discharge 2

VDDQ Tracking discharge


+2.5V
0.25A +1.8VSUS
Gnd Non-tracking discharge
Close to CPU
SI power S0~S1
PC125
5
6
7
PU9 8 0.1U/10VC_4 V_TRIP(mV)=R_TRIP(Kohm)*10(uA)
PR161 +2.5V
10K_4
PQ27
36 VR2.5_ON 1
SHDN VOUT
4 44 1.8V_OND 4
SI4856
I_OCP=V_trip/Rds_on+I_Ripple/2
3 +
+1.8V
PC122
+3VPCU VIN R1 PR160 PC120 10.4A VDDQSET VDDQ(V) VTTREF and Vtt Note
0.1U/10VC_4 100K/F_4 4.7U/6.3VC_6
1

2 5 SET
S0~S1
3
2
1

PC123 GND SET


1U/10VC_4 +1.8V GND 2.5 V_ vddqsns/2 DDR
2

G913C Vout=1.25(1+R1/R2)
PR159
+1.8V 3,5,8,10,11,15,16,18,19,20,21,22,27,44 V5IN 1.8 V _vddqsns/2 DDR2
100K/F_4 PC127
R2 0.1U/10VC_4 FB adjustable V_VDDQSNS/2 1.5V<VDDQ<3V
1 1

Discrete:SI4856 PROJECT : QT8


UMA:SI4800 Quanta Computer Inc.
Size Document Number Rev
Custom 1.8VSUS/DDR_VTER/+1.8V/2.5V 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 42 of 46
A B C D E
5 4 3 2 1

ATI M86-ME
PWRCNTL1 PWRCNTL0 V-CORE
+VIN

PC25
+VIN

PC91
+VIN

PC35
+VIN

PC105
+VGA_CORE 5,18,20
+1.2V_S5 15
43
0.1U/50VB_6 0.1U/50VB_6 0.1U/50VB_6 0.1U/50VB_6
+1.5V 34,37
H 0 0 1.1V
PR84 +5VPCU +VIN
D M 0 1 1.0V 20_6 D

CH501H-40PT L-F
2

10U/25VD_1206

*10U/25VD_1206
M 1 0 1.0V

8118VDDA

PD9

2200P/50VB_4

0.1U/50VB_6
PR95 PC60 PC82
+VGA_CORE

PC172

PC165

PC90

PC89
1K_4 1U/10VC_4 1U/10VC_4

1
+5VPCU
L 1 1 0.9V 22A

5
8118AGND PR109

16

5
PC70 0_6 D

8118AGND
PR105 8118VIN 2 8 8118BST G
S0~S1

VDDA

VDDP
10K_4 VIN BST
4
0.01U/50VB_4 9 8118HDR S DCR=3.3m-ohm (max)
PD10 HDR RJK0366DPA

1
2
3
1 2 8118PG 4 PQ51 PL12 +VGA_CORE
25,36,39,40,42 HWPG PGD PC74 DB modify
SW1010CPT PR111 *0_4/S 0.1U/50VB_6 +VGA_CORE 5,18,20
44 VCORE_PG

5
PR106 8118LX 1.0UH/15A(PCMC104T-1R0MN)

*2.2_6 PR205

PC182

PC181
10

RJK0351DPA-02

RJK0351DPA-02
LX

1
8118EN 3 D D
20,28,36,40,44,45 MAINON ON/SKIP PU5 PR93 + +
G G
*100P/50VA_4

15K_4 7 8118LDR 4 4 174K/F_4 PR89 PC188


LDR

390U/2.5V_ESR10_6X5.8

330U_2.5V_7343_ESR6
8118VSET 13 OZ8119 S S 51.1/F_4 0.1U/10VC_4

2
VSET
PC75

PR107

1
2
3

1
2
3
10K_4 +8118VREF 14
VREF PR94 PC65

PC167
PQ52

PQ56
11 8118CSP
8118TSET CSP
15 TSET
C PR67 PR73 C
162K/F_6 63.4K/F_4 100K/F_4 5600P/25V_4
PV modify DB modify

GNDA1

*100P/50VA_6
GNDP
8118AGND

OCT
12 8118CSN
CSN

1000P/50VB_4
3

0.1U/50VB_6
PR58 DB modify PR83

17

6
+VIN +VIN +VIN

PC59

PC61
PR104 665K/F_6 *4.99K/F_4
1000P/50VB_4

1000P/50VB_4

22P/50VA_4
*0_4/S

0.022U/25VB_6

PC55

PC68
18 GFX_CORE_CNTRL0 1 2 2 PR68 PR72
PC62

110K/F_6 130K/F_6

PC58
PQ10
2N7002E PR63 PC80 PC173 PC43
665K/F_6 0.1U/50VB_6 0.1U/50VB_6 0.1U/50VB_6
1

PR97
*0_4/S
18 GFX_CORE_CNTRL1 1 2 2 PR69
8118AGND
PQ8
2N7002E *short
8118AGND
1

+1.8VSUS

+1.5V
PC124 PC126 PU10
B
10U/4VD_8 0.1U/10VC_4 5 VIN POK 7 2.0A B

9 VIN1 GND 1 S0~S1


PR214 PR168 +1.5V
10K_4
S5EN_G966
+1.2V_S5 +5V
10K_4
5913EN 8
APL5913
3
36,44 S5_ON
+5V EN VOUT +1.5V 34,37
0.5A 6 4
PC202 PC128 VCNTL VOUT PC132 PC133

FB
*0.1U/10VC_4 S0~S5 0.1U/10VC_4
PR170
0.1U/10VC_4 10U/4VD_8
PU11 PC129 R1

2
+3VPCU 1 8 +1.2V_S5 0.1U/10VC_4 5913FB
POK GND
2 VEN ADJ 7
3 6 +1.2V_S5 15 41.2K/F_6
VIN VO
4 VPP NC 5
+5VPCU
9

R1 Sequence control ?? PR162 R2 PC130


966ADJ

G966 47K/F_4 1 2
9

PC203 PC204 PR212 PC199 PC200


10U/4VD_8 0.1U/10VC_4 51.1K/F_6 10U/4VD_8 0.1U/10VC_4 56P/50VA_6

PC201
0.1U/10VC_4 Vo=0.8(1+R1/R2)
R2
PR213
100K/F_4 Vo=0.8(R1+R2)/R2
A A
R2<120Kohm

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
VGA PWR OZ8118/1.2V_S5/+1.5
NB5/RD5
Date: Friday, August 29, 2008 Sheet 43 of 46
5 4 3 2 1
1 2 3 4 5

+12VALW
44
+5V +3V +1.1V

+VIN PR174
1M_4
PR172 PR175 PR169
A *22_8 *22_8 *22_8 A
PR173
MAIND 39
1M_4 PQ32

1
*2N7002E-G PQ33 PQ29
*2N7002E-G *2N7002E-G PC134
2200P/50VB_4

2
MAINON_G 2 2 2 2

PQ30

3
2N7002E
+3VSUS +5VSUS +12VALW

1
2 PR176
20,28,36,40,43,45 MAINON 1M_4

PR82 PR117 PQ31

1
+VIN PR185 *22_8 1M_4 PDTC144EU
*22_8

SUSD
SUSD 39
PR100

3
1M_4 PQ4 PQ7

1
*2N7002E-G *2N7002E-G
PC83 +12VALW
SUSON_G 2 2 2 2200P/50VB_4 +3VLANVCC

2
PQ9
2N7002E PR101
3

PR81 +VIN 1M_4


1

1
B 1M_4 PR115 B
2 *22_8
36,42 SUSON LAN_ON
LAN_ON 39
PR116
PQ5 1M_4
1

1
PDTC144EU PQ12
*2N7002E-G PC71
2200P/50VB_4

2
2 2

3
PQ14
2N7002E
2

1
36 LAN_POWER
PR118
1M_4
PQ13

1
PDTC144EU LAN_POWER_G

+12VALW

+3VS5

PR178

+VIN
1M_4 For Discrete Only
PR179
C *22_8 S5_OND C
S5_OND 39
+1.8V
PR180 PQ37
3

1M_4 *2N7002E-G
PC135
2200P/50VB_4 +VIN
2

2 2 PR167 +12VALW
*22_8
3

PQ36

3
PR181 PR166
1

2 1M_4 2N7002E 1M_4 PR171


36,43 S5_ON
1M_4
PR165 2
PQ38 S5_ONG *0_4
1

PDTC144EU PQ26
20,28,36,40,43,45 MAINON 1.8V_OND 42

3
*2N7002E-G

1
PR163

3
2 1M_4 PC131
43 VCORE_PG
2200P/50VB_4

2
PR164
0_4 PQ25 2

1
PDTC144EU
PQ28
2N7002E

1
D D

PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom DISCHARGE 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 44 of 46
1 2 3 4 5
5 4 3 2 1

TOP DC_JACK
65W/90W 38

PL3
+DOCK_VA

+VA
2

1
PD8
SD840S

3
+VAD

PQ49
PD21
*P4SMAJ20A
+VAD

PC154
0.1U/50VB_6
+VAD

PC48
0.1U/50VB_6
PQ6
DEL PR203,PR202,PC145

+BATCHG
PL1
HI0805R800R-00/5A_8

PL2
45
AD_ID 36 +PRWSRC
HI0805R800R_5A/08 PD22 IRFR3709ZCTRPBF FDS6679AZ HI0805R800R-00/5A_8 CN21
2 1 8 +BATT 7 8
CN3 7 8
3 4 3 2 7
J1-1 1 3 6 SMD 6 10
3 5 PL4 6 10
4 5
4 6 HI0805R800R_5A/08 SD840S EC:11/05_SI +VIN SMC 5 9

1
PR188 PR71 5 9
D D
PC139 PC155 100_4 PC157 RC7520WT-R020 4 2

BATDIS_G
9 2 0.1U/50VB_6 0.1U/50VB_6 ACOK_IN 1U/25VC_8 4 2
1 2
10 1
3 1
3 1

2
DC-IN CONN PV modify PR187

+BATCHG
+VH28 150K/F_4 BATDIS_G PR215 PR216 11
11
PV modify *0_2/S *0_2/S
+3VPCU 12
JACK-LED PR13 J1-1 +6251_VDD PR29 PR28 12

1
10_6 PD20 330_4 330_4
PR3 PD4 *SW1010CPT PD6 BP07061-BA015

CSIN_1
10K_6 *SW1010CPT PC142 PC143 PC141 PC32
3

2 1 PC18 1000P/50V_4 +VIN


5,36 3920_RST#

2
CSIP_1
35,36 MBDATA
*UDZS5.6BTE-17 PC76 PR10 PR42

10U/25VD_1206

*10U/25VD_1206
ACOK# 2 2 AC_LED_ON# 36 PR55 2.2U/6.3VC_6 10K/F_4 1K/F_4
5,39 SYS_SHDN#

1
*100K/F_4 TEMP_MBAT 36
35,36 MBCLK

2200P/50VB_4

0.1U/50VB_6
PQ18 DB modify PR92 PR96 +6251_VDD +6251_VDD PC26

1
*2N7002E-G PQ1 2_6 20_4 0.1U/50VB_6
2N7002E PR2 PC39
1

1
UDZS5.6BTE-17

UDZS5.6BTE-17
100K/F_4 2 PR60 .01U/16V_4
+VAD2 CSIP CSIN 4.7_6 PC12

VDD VREF = 5.075V

PD2

PD1
PD15 PC66 0.01U/50VB_4
*UDZS5.6BTE-17 6251_ACIN PQ3 PR198
*2N7002E-G +6251_VDDP +VIN +VIN

2
PR131 *470_4 PTC
+VH28 1 2
3

2
PR126 0.1U/50VB_6 PC50 PD7

19

20

15
1

5
6
7
8
*200K_4 *200K_4 PQ19 Close to AC soft start MOSFET CH501H-40PT L-F
1

*2N7002E-G

CSIN
CSIP

VDDP

1
PR125 2 +VAD 4.7U/6.3VC_6 PC44 PC17
+VAD2 2 PR99 20_4 21 4 0.1U/50VB_6 0.1U/50VB_6

1
CSOP
3

C CSOP_1 CSOP PR80 PC57 PQ39 C


3 16

1
*0_4 PQ11 BOOT 6251_BOOT SI4800BDY

2
PQ20 PR130 IMD2 PC72
3

*2SB1197K 2 *200K_4 17 6251_UGATE 1_6 0.1U/50VB_6


0.047U/25VB_4 UGATE
22

1
CSON_1 CSON CSON PR197 +VAD2

3
2
1
ACOK# 23 18 6251_PHASE PL5 RL3720WT-R020
PQ21 PR103 20_4 ACPRN PHASE +VAD2
PR136 2 1
1

*680K/F_6 *2N7002E-G

5
6
7
8
24 14 6251_LGATE PQ48 10UH/4.4A_10

2P

1P
DCIN LGATE

10U/25VD/1206

10U/25VD/1206
PR112 +DCIN FDS6690AS PR135 PD16

PC164

PC163
10_6 ISL6251A PR191 *10K_4
13 4 *2.2_8 1
PC78 PGND PC102
+DOCK_VA +VA 20,28,36,40,43,44 MAINON
1U/25VC_8 12 +6251_VREF 3 *CHN217PT
GND CSOP_1

2
PD13 PC138 2

4
SW1010CPT PD11 PR54 *0.01U/50VB_4
VADJ
11 PV modify *100P/50VA_4
+VH28
2 1 +VAD2 PR110 100K/F_4 6251_ACIN 2 PR65 240K/F_4 CSON_1

3
2
1
ACSET 21K/F_4
10 PQ22

1
SW1010CPT Setting the Vin PC77 ACLIM 6251_VADJ *IMZ2
2 1 3
EN

VCOMP
min to 11.42V 6251_EN

ICOMP
CELLS

CHLIM
0.1U/10VC_4

VRFE
PD12 PR120 PR114 For ACSET PR119 6251_ACLIM 2 1 CV-SET 36

3
2
ICM
CH501H-40PT L-F 75K/F_4 1.26V
100K/F_4 12.4K/F_4 PC36 PR57 PR132

2
Setting the Vin min to 15.88V 0.01U 240K/F_4 *100K_4 PC99

1
For EN = 1.06V PU4 PC40 PR61 PR128 *0.1U/50VB_6
36 AD_AIR 0.01U 11.8K/F_4 *47K_4

1
VREF = 2.39V
+6251_VREF
6251_ICM
6251_CHLIM PR211

6251_VCOMP1
B 6251_CELLS B
PR70 11.8K/F_4 V ACLIM = VREF * PR134
PR122 PR108 EC_ACLIM 36 (Rhi // 152K) / (Rhi // 152K + Rlow// 152K)
PC81 12.4K/F_4 7.15K/F_6 CC-SET 36
Input curretn = 2.9A (71.5K , 10K)
0.1U/10VC_4 6251_ICOMP 100K_4 (0.05/Vref * Vaclim + 0.05 ) / Rsense *47K_4
PC198
2

PC56 Charging Curret setting 0.1U/10VC_4


PR102 PC69 100P/50VA_4 PR77 I chg = 165mV / Rsense * (Vchlim / 3.3V) ADP TYPE PR72 Value P/N
0_4 6800P/25VB_4 100K_4 +VAD2
1

PC94
ACOK 3 1 +6251_VDD CLOSE TO EC SIDE 65W 40.2K/F CS34022FB15 *0.1U/50VB_6
PC67 PR88
100P/50VA_4 SYS_I 36 90W 3.48K/F CS23482FB12
PR123 PQ15 ONLY for 3S battery pack
10K_4 PDTA124EU Input Current monitor
PR98 100_4 V icm = 19.9 * (Vcsip - Vcsin)
2

10K_4

5
PC64
36 ACIN 3300P/25VB_4 + 3
2

ACOK# 4
PR124 PC73 - 1
15K_4 0.01U/50VB_4 PU7
1

+VAD2 PR137 PU6 +VH28 *TL331

2
6251_ACIN PR127 22_6 PR129 PR133
BATDIS_G 1 8 *22K_4 *10K_4
VIN Vout
PV modify
3

1
100_4 ACOK_IN 2
PR30 PC98 GND 6251_ACIN PC97
P2805 PG
6
PR121 PC79 .1U/50V_6 4 .1U/50V_6

2
NC PC95
2 2
10_4

CP
3 5
1

100K/F_4 1U/25VC_8 CN D_CAP *220P/50VB_4


CH501H-40PT L-F

A A

1
PQ16 PQ17 PD5

7
PD14

2N7002E PR113 2N7002E 2 PC93


1

D/C# 36
1M_4 PQ2 1U/50V_6

2
PDTC144EU 2 1
2

*CH501H-40PT L-F
1

PC96
PC23
*10U/10VD_8
0.01U/50V_6
PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom 1A
CHARGER ( ISL6251)
NB5/RD5
Date: Friday, August 29, 2008 Sheet 45 of 46
5 4 3 2 1
5 4 3 2 1

CPU Power 1
CPU Power 2
EC Pin98
SUSON HWPG VRM_PWRGD
+VCORE0
+1.8VSUS
D D

EC Pin99
EC Pin34 MAINON
+VCORE1
VDDA_EN

+0.9VSMVTT

+CPUVDDNB

+2.5V
HWPG
+1.2V

EC Pin101
HWPG
C S5_ON S5_OND +1.1V C

Delay +3VS5

EC Pin101 VCORE_PG
S5_ON
+1.2VS5 +VGACORE
HWPG

+5VSUS EC Pin99
MAINON

EC Pin98 Option 1.8V_OND


Delay +1.8V
SUSON SUSD
Delay +3VSUS VCORE_PG

B B

+5V
+5V
+1.5V
EC Pin99
MAINON MAIND
Delay +3V

1 2 3 4 EC Pin76
A A
S5_ON SUSON MAINON HWPG ECPWROK SB_PWRGD_IN NB_PWRGD_IN
S5_OND SUSD MAIND VCORE_PG Delay 600ms 3.3V 1.8V
RSMRST# VRM_PWRGD
PROJECT : QT8
Quanta Computer Inc.
Size Document Number Rev
Custom Power control 1A
NB5/RD5
Date: Friday, August 29, 2008 Sheet 46 of 46
5 4 3 2 1

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