Apple Net Names Reference Sheet

Circuit NetName Description of Circuit

1 2C2 DATA COMMUNICATION BETWEEN
12C2_AP_BI_ALS_SDA_CONN THE MAIN CPU AND THE OPTICAL SENSOR
12C INTERFACE CLOCK OF THE APPLIED
12CO_AP_SCL PART
XSP CLOCK SIGNAL FROM THE OWL
12S_AP_OWL_TO_CODEC_XSP_LRCLK CIRCUIT OF THE MAIN CPU TO THE AUDIO
CLOCK SIGNAL FROM THE MAIN CPU TO
THE 12S INTERFACE OF THE BASEBAND
12S_AP_TO_BB_BCLK CPU
DATA OUTPUT FROM THE MAIN CPU TO THE
12S_AP_TO_BB_DOUT 12S INTERFACE OF THE BASEBAND
DATA OUTPUT FROM THE MAIN CPU TO THE
12S_AP_TO_BT_DOUT 12S INTERFACE OF THE BLUETOOTH CHIP
ASP CLOCK SIGNAL FROM THE MAIN CPU
12S_AP_TO_CODEC_ASP_BCLK TO THE 12S INTERFACE OF THE AUDIO
MAIN CLOCK SIGNAL FROM THE MAIN CPU
12S_AP_TO_CODEC_MCLK_R TO THE 12S INTERFACE OF THE AUDIO
CLOCK SIGNAL FROM THE MAIN CPU TO
12S_AP_TO_CODEC_MSP_BC LK THE 12S VOICE COMMUNICATION OF THE
DATA OUTPUT FROM THE MAIN CPU TO THE
12S_AP_TO_CODEC_MSP_DOUT VOICE COMMUNICATION OF THE AUDIO
CLOCK SIGNAL FROM THE MAIN CPU TO
12S_AP_TO_CODEC_MSP_LRCLK THE VOICE COMMUNICATION OF THE AUDIO
XSP DATA OUTPUT SIGNAL FROM THE MAIN
12S_AP_TO_CODEC_XSP_DOUT CPU TO THE 12S INTERFACE OF THE AUDIO
CLOCK SIGNAL FROM THE MAIN CPU TO
12S_AP_TO_SPEAKERAMP_M CLK_R THE 12S INTERFACE OF THE AUDIO
DATA INPUT FROM THE BASEBAND TO THE
12S_BB_TO_AP_DIN 12S INTERFACE OF THE MAIN CPU
ASP DATA INPUT FROM THE AUDIO
ENCODING AND DECODING TO THE 12S
12S_CODEC_TO_AP_ASP_DIN INTERFACE OF
DATA INPUT FROM THE AUDIO ENCODING
12S_CODEC_TO_AP_MS P DIN AND DECODING TO THE 12S VOICE
19.2M CLOCK SIGNAL FROM THE BASEBAND
50_BBPMU_TO_STOCKHOLM_19P2M_CLK POWER OUTPUT TO THE
50_MDM_19P2M_CLK MODEM 19.2M CLOCK SIGNAL
19.2M CLOCK SIGNAL FROM THE BASEBAND
50_MDM_19P2M_CLK_PMU POWER OUTPUT TO THE BASEBAND CPU
 Circuit NetName Description of Circuit
SIGNAL FROM THE BASEBAND POWER
50_SLEEP_CLK_32K sleep clock 32.768KHz OUTPUT TO THE BASEBAND CPU
50_SLEEP_JLK_32K SLEEP CLOCK 32.768KHZ
19.2M CLOCK SIGNAL FROM THE BASEBAND
50_WTR_19P2M_CLK POWER OUTPUT TO THE RF TRANSCEIVER
ACCEL ACCELEROMETER
ACCEL GYRO ACCELEROMETER GYROSCOPE
ACCELJNTL_L ACCELERATOR INTERRUPT SIGNAL
ALS_INT_L AMBIENT LIGHT INTERRUPT SIGNAL
INTERRUPT LOW EFFECTIVE SIGNAL FROM
ALS_TO_APINT_L THE LIGHT SENSOR TO THE MAIN CPU
AMBIENT LIGHT DETECT ION INTERRUPT
ALSJNT_L SIGNAL
MAIN PROCESSOR TEMPERATURE
AP_NTC DETECTION
HOLD ACTIVATION SIGNAL FROM THE MAIN
AP_TO ARC_STAYIN_ALlVE CPU TO THE AUDIO FREQUENCY AMPLIFIER
RESET SIGNAL FROM THE MAIN CPU TO THE
AP_TO_ARC_RESET_L AUDIO FREQUENCY AMPLIFIER
FINGERPRINT OPEN SIGNAL FROM THE
AP_TO_BB_MESA_ON_L MAIN CPU TO THE BASEBAND
SERVICE WAKE-UP SIGNAL FROM THE MAIN
AP_TO_BB_PCl E_DEV_WAKE CPU TO THE PCLE INTERFACE OF THE
OPEN SIGNAL FROM THE MAIN CPU TO THE
BASEBAND POWER SUPPLY OF THE
AP_TO_BB_RADIO_ON_L BASEBAND
RESET SIGNAL FROM THE MAIN CPU TO THE
AP_TO_BB_RESET_L BASEBAND
BASEBAND SWITCHING SIGNAL FROM THE
AP_TO_BBPMU_RADIO_ON_L MAIN CPU TO THE BASEBAND POWER
WAKE-UP SIGNAL FROM THE MAIN CPU TO
AP_TO_BT_WAKE THE BLUETOOTH CHIP
CIOS ING SIGNAL FROM THE MAIN CPU TO
AP_TO_FCAM_SHUTDOWN_L THE FRONT CAMERA
CLOCK SIGNAL FROM THE MAIN CPU TO
AP_TO_FCAMJLK_R THE FRONT CAMERA
CONTROL SIGNAL FROM THE MAIN CPU TO
AP_TO_HP_HS3_CTRL THE EARPHONE MIC
 Circuit NetName Description of Circuit
RESET SIGNAL FROM THE MAIN CPU TO THE
AP_TO_LCM_RESET_L DISPLAY SCREEN
OPEN SIGNAL FROM THE MAIN CPU TO THE
AP_TO_LED_DRIVER_E N FLASH LIGHT DRIVE
OPEN SIGNAL FROM THE MAIN CPU TO THE
AP_TO_LED_DRIVER_EN FLASH CHIP
THE RESET SIGNAL FROM THE MAIN CPU TO
AP_TO_NAND_RESET_L THE HARD DISK
ANALOG COMPOSITE SWITCH SIGNAL
AP_TO_PMU_AMUX_OUT OUTPUT FROM MAIN CPU TO POWER CHIP
THE TEST CLOCK SIGNAL OUTPUT FROM
AP_TO_PMU_TEST_CLKOUT THE MAIN CPU TO THE MAIN POWER CHIP
THE WATCHDOG RESET FROM THE MAIN
AP_TO_PMU_WDOG_RESET CPU TO THE POWER CHIP
C1OSING SIGNAL FROM THE MAIN CPU TO
AP_TO_RCAM_SH UTDOWN THE REAR CAM ERA
CLOSING SIGNAL FROM THE MAIN CPU TO
AP_TO_RCAM_SHUTDOWN_L THE REAR CAMERA
RESET SIGNAL FROM THE MAIN CPU TO THE
AP_TO_SPEAKERAMP_RESET_L AUDIO FREQUENCY AMPLIFIER
SERVICE WAKE-UP SIGNAL FROM THE MAIN
AP_TO_STOCKHOLM_DEV_WAKE CPU TO THE NEAR FIELD
RESET SIGNAL FRO M THE MAIN CPU TO
AP_TO_TOUCH_RESET_L THE TOUCH
FRONT CAMERA CLOCK SIGNAL SENT BY
AP_TO_FCAM_CLK_CONN THE MAIN CPU
INTERRUPT SIGNAL FROM THE AUDIO
ARC_TO_APINT_L FREQUENCY AMPLIFIER TO THE MAIN CPU
AUDIO_ADIFFH_HP_AUD_DP HEADPHONE OUTPUT
AUDIO CODEC AUDIO ENCODING AND DECODING
BASEBAND BASEBAND BASEBAND
BATIERY CONNECTOR BATTERY PEDESTAL
BATIERY SWI BATTERY SOFT INT ERRU PT INSTRUCTION
BATTERY_S NS BATTERY VOLTAGE DETECTION SIGNAL
DATA SIGNAL OF 12C INTERFACE OF
BB_EEPROM_12C_SDA BASEBAND CHIP
CLOCK SIGNAL OF 12C INTERFACE OF
BB_EEPROMJ2C_SCL BASEBAND CHIP
BB_JTAG_SRST_L BASEBAND JTAG RESET SIGNAL
 Circuit NetName Description of Circuit
BB_PMUJET_ON BASEBAND POWER START SIGNAL
BB_RESET_DET_L BASEBAND RESET DETECTION SIGNAL
BB_RESET_L BASEBAND RESET SIGNAL
GPS TIME STAMP SIGNAL FROM THE
BB_TO_AP_GPS_TIME_MARK BASEBAND TO THE MAIN CPU
RESET DETECTION SIGNAL FROM THE
BB_TO_AP_RESET_DETECT_L BASEBAND TO THE MAIN CPU
THE HOST WAKE-UP LOW LEVEL EFFECTIVE
BB_TO_PMU_PClE_HOST_WAKE_L SIGNAL FROM THE BASEBAND CPU TO
BB_WAKE_AP BASEBAND WAKE
BOARd_iD2 MOTHERBOARD VERSION IDENTIFICATION
BOARD_ID4 MOTHERBOARD CONFIGURATION
BOOST_PROT FEEDBACK
BOOST_SENSE_P BRIGHTNESS ADJUSTMENT
BOOT_CO NFIG2 BOOT CONFIGURATION ITEM 2
BT_RESET_L BLUETOOTH RESET SIGNAL
THE HOST WAKE-UP SIGNAL FROM THE
BT_TO_PMU_HOST_WAKE BLUETOOTH TO THE MAIN POWER
BT_WAKE BLUETOOTH WAKE-UP SIGNAL
BT_WAKE_AP BLUETOOTH WAKE-UP
FAST SWITCHING SIGNAL FROM THE
BUTTON_RING ER_A SILENCE TO VIBRATION
BUTTON_VOL_DOWN_L VOLUME KEY “+”
CAM_CLK_SRC CAMERA CLOCK SIGNAL
CAM_RESET_L CAMERA RESET SIGNAL
CAM_SHUTDOWN CAMERA SHUTDOWN SIGNAL
CAM_STROBE_EN FLASH ENABLE SIGNAL
CAM_STROBE_EN CAMERA SHUTDOWN ENABLE
CORE POWER SUPPLY ENABLE SIGNAL IN
CAM_VDDCORE_EN THE CAMERA
CLK32 K_GRAPE MULTI TOUCH 32K CLOCK
INTERRUPT SIGNAL FROM THE AUDIO
ENCODING AND DECODING TO THE
CODEC_TO_AP_PMU_INT_L APPLICATION
 Circuit NetName Description of Circuit
POWER INTERRUPT SIGNAL FROM THE
AUDIO ENCODING AND DECODING TO THE
CODEC_TO_AP_PMU_INT_L MAIN CPU
DIFFERENTIAL TRANSMISSION N FROM THE
AUDIO EN CODING AND DECODING TO THE
CODEC_TO_HAC_P HEARING AID
DIGITAL RECORDING INTERRUPT LOW
CODEC_TO_PMU_MIKEY_INT_L LEVEL EFFECTIVE SIGNAL FROM THE AUDIO
DIFFERENTIAL TRANSMISSION SIGNAL N
FROM THE AUDIO ENCODING AND
CODEC_TO_RCVR_N DECODING TO THE
COMPASS COMPASS
COMPASS_BRD_INT COMPASS INTERRUPT SIGNAL
CYROJNT2 GYROSCOPE INTERRUPT SIGNAL
DIVERSITY ANTENNA SWITCH ANTENNA SWITCH
EHCI_PORT_PWR BUS FEEDBACK
FOCE2_VREF CHIP SELECT REFERENCE VOLTAGE
FORCE DFU FORCED DFU MODE
TEMPERATURE DETECTION ON THE TOP OF
FOREHEAD_NTC THE MOTHERBOARD
DIFFERENTIAL TRANSMISSION N FROM THE
FRONTMIC3_TO_CODEC_AIN4_CONN_N FRONT MIC3 OF THE
GRAPE_RESET_L MULTI TOUCH RESET SIGNAL
GYRO GYROSCOPE GYROSCOPE
GYRO_INT2 GYROSCOPE INTERRUPT SIGNAL
HOST_BB_HSIC_RDY BASE BAND MAIN CONTROL SIGNAL
HPHONE_DET EARPHONE DETECTION
HPHONE_OUT EARPHONE SIGNAL OUTPUT
HPHONE_REF EARPHONE REFERENCE VOLTAGE
EARPHONE REFERENCE VOLTAGE
HPHONE_REF_CTRL CONTROL
HPHONE_RET EARPHONE SIGNAL RETURN DETECTION
CLOCK SIGNAL FROM THE MAIN CPU TO
I2S_AP_TO_BT_LRCLK THE 125 OF THE BLUETOOTH
DATA INPUT SIGNAL FROM THE BLUETOOTH
I2S_BT_TO_AP_DIN TO THE 125 OF THE MAIN CPU
L1NEOUTL_REF EXTERNAL AUDIO REFERENCE VOLTAGE
 Circuit NetName Description of Circuit
LCD_BOOST_CTRL BACKLIGHT ADJUSTMENT MANAGEMENT
LCD_BOOST_OUT BACKLIGHT BOOST OUTPUT
LCD_BST_SW BACKLIGHT TIME SWITCH
LCD_PWR_EN LCD POWER ENABLE SIGNAL
LCD_RESET_L LCD RESET SIGNAL
LCM_ISENSE INDUCTION
SYNCHRONIZATION SIGNAL FROM THE
DISPLAY SCREEN TO THE MAIN
LCM_TO_OWL_BSYNC PROCESSOR
LED_DRIVE_GSMB LED DRIVING SIGNAL
LED_DRIVE_OUT FLASH OUTPUT
FLASH ELEMENT TEMPERATURE
LED_MODULE_NTC DETECTION
LED_PWR_IN BACKLIGHT VOLTAGE INPUT
LINE_OUT EXTERNAL AUDIO OUTPUT
FINGERPRINT SCANNING CIRCUIT
EXTERNAL CONNECTION LDO CHIP OPEN
MAMBA_EXT_LDO_EN SIGNAL
MENU_KEY_L RETURN KEY(HOME)
INTERRUPT SIGNAL FROM THE
MESA_TO_AP_INT FINGERPRINT TO THE MAIN CPU
TRANSMIT DATA FROM THE MA IN CPU TO
THE MIPI INTERFACE OF THE DISPLAY
MIPI_AP_TO_LCM_DATAO_N SCREEN
TRANSMISSION CLOCK DIFFERENTIAL
SIGNAL N FROM THE FRONT CAMERA TO
MIPI_FCAM_TO_AP_CLK_CONN_N THE
DATAL GROUP OF TRANSMISSION
MIPI_FCAM_TO_AP_DATA1_CONN_P DIFFERENTIAL SIGNAL P FROM THE FRONT
DATA 0 GROUP OF TRANSMISSION
MIPI_FCAM_TO_AP_DATAO_CONN_N DIFFERENTIAL SIGNAL FROM THE FRONT
TRANSMIT DATA FROM THE FRONT CAMERA
MIPI_FCAM_TO_AP_DATAO_P TO THE MIPI INTERFACE OF THE MA IN CPU
TRANSMIT DATA FROM THE REAR CAMERA
MIPI_RCAM_TO_AP_DATAO_CONN_P TO THE MIPI INTERFACE OF THE
TRANSMISSION CLOCK DIFFERENTIAL
SIGNAL P FROM THE FRONT CAMERA TO
MIPIJCAM_TO_AP_C LK_CONN_P THE
MMPA_2G3G_MODE POWER AMPLIFIER MODE CONTROL SIGNAL
 Circuit NetName Description of Circuit
NIMBUS_VDDH_TEST MULTI TOUCH TEST SIGNAL
NTC_CAM _P CAMERA NTC DETECTION SIGNAL
NTC_H4P_P NTC DETECT ION SIGNAL IN THE AT PART
RADIO FREQUENCY NTC DETECTION
NTC_RFPA_P SIGNAL
TIME SYNCHRONIZATION HOST INTERRUPT
OSCAR_BI_AP_TIME_SYNC_HOSTJNT SIGNAL BETWEEN CO -PROCESSOR
CHIP SELECT LOW LEVEL EFFECTIVE
SIGNAL FROM THE CO-PROCESSOR TO THE
OSCAR_TO_PHOSPHORUS_SPI_CS_L AIR
CHIP SELECT LOW LEVEL EFFECTIVE
SIGNAL FROM THE CO-PROCESSOR TO THE
OSCAR_TO_COMPASS_SPI_CS_L SPI
REFERENCE CLOCK SIGNAL FROM THE
MAIN CPU TO THE PCIE INTERFACE OF THE
PCIE_AP_TO_NAND_REFCLK_P HARD
RESET SIGNAL FROM THE MAIN CPU TO THE
PCIE_AP_TO_NAND_RESET_L PCIE INTERFACE OF THE HARD DISK
THE EMIT DATA FROM THE MAIN CPU TO
PCIE_AP_TO_NAND_TXDO_P THE PCIE INTERFACE OF THE HARD DISK
SERVICE WAKE-U P SIGNAL FROM THE MAIN
PCIE_AP_TO_WLAN_DEV_WAKE CPU TO THE PCIE INTERFACE OF THE
CLOCK REQUEST LOW VALID SIGNAL FROM
THE BASEBAND TO THE PCIE INTERFACE OF
PCIE_BB_BI_AP_CLKREQ_L THE
CLOCK REQUEST SIGNAL FROM THE HARD
DISK TO THE PCLE INTERFACE OF THE MAIN
PCIE_NAND_TO_AP_CLKREQ CPU
THE RECEIVE DATA FROM THE HARD DISK
PCIE_NAND_TO_AP_RXDO_P TO THE PCLE INTERFACE OF THE MAIN CPU
RESET SIGNAL FROM THE MAIN CPU TO THE
PClE_AP_TO_WLAN_RESET_L PCLE INTERFACE OFTHE WIFI CHIP
INFRARED LIGHT EMITTING DIODE
PGND_IRLED_K CATHODE GROUNDING
PHASE-LOCKED LOOP FEEDBACK CONTROL
PLL AVDD CIRCUIT
RESET LOW LEVEL ACTIVE SIGNAL OUTPUT
PMIC_RESOUT_L BY BASEBAND POWER
PMU_RESET_IN POWER MANAGEMENT RESET INPUT
 Circuit NetName Description of Circuit
TEMPERATURE CORRECTION OF THE
PMU_TCAL POWER CHIP CIRCUIT
INTERRUPT REQUEST SIGNAL FROM THE
PMU_TO_APIRQ.L MAIN POWER CHIP TO THE MAIN CPU
RESET SIGNAL FROM THE MAIN POWER
PMU_TO_BB_PMIC_RESET_R_L CHIP TO THE BASEBAND POWER
DETECTION SIGNAL FROM THE MAIN
PMU_TO_BB_USB_VBUS_DETECT POWER CHIP TO THE USB 5V OF THE
RESET SIGNAL FROM THE MAIN POWER
PMU_TO_BBPMU_RESET_L CHIP TO THE BASEBAND POWER
DIGITAL LDO PULL DOWN FROM THE MAIN
PMU_TO_CODEC_DIGLDO_PULLDN POWER CHIP TO THE AUDIO ENCODING
BATTERY LOW VOLT AGE START LOW
PMU_TO_NAN D_LOW_BATI_BOOT_L LEVEL EFFECTIVE SIGNAL FROM THE MA IN
OPEN SIGNAL FROM THE POWER CHIP TO
PMU_TO_STOCK HOLM_EN THE NEAR FIE LD COMMUNICATION CHIP
OPEN SIGNAL FROM THE POWER CHIP TO
PMU_TO_WLAN_REG_ON THE POWER SUPPLY OF THE WIFI
PMUJRQ_L POWER INTERRUPT REQUEST SIGNAL
PP_BATT_VCC BATTERY POWER SUPPLY VOLTAGE
BIAS POWER SUPPLY FROM THE AUDIO
PP_CODEC_TOFRONTMIC3_BIAS_CONN ENCODING AND DECODING TO THE
FLASH LIGHT COLD LIGHT DRIVING POWER
PP_LED_DRIVER_COOL_LED SUPPLY
FLASH LIGHT WARM LIGHT DRIVING POWER
PP_LED_DRIVER_WARM_LED SUPPLY
POWER AMPLIFIER POWER SUPPLY CHIP
OUTPUT THE POWER SUPPLY TO THE
PP_QPOET_VCC_PA POWER AMPLIFIER
BOOST OUTPUT OF POWER AMPLIFIER
PP_QPOET_VDD_BOOST_OUT POWER SUPPLY CHIP
PP_SPHERE FOCUSING DRIVE POWER SUPPLY
PP_UIM1_LDOll SIM CARD POWER SUPPLY 1.8V
PP_VCC_MAIN MAIN POWER SUPPLY VOLTAGE
3V POWER SUPPLY OF THE PROXIMITY
PP3VO_PROX_CONN SENSOR ON THE PEDESTAL
3V POWER SUPPLY OF THE INFRARED
PP3VO_PROXJRLED PROXIMITY SENSOR
PP5VO_USB_PROTECT USB CHARGING VOLTAGE
 Circuit NetName Description of Circuit
CORE POWER SUPPLY 1.2V OF THE FRONT
PPlV2_FCAM_VCORE_CONN CAMERA
1.8V POWER SUPPLY OF THE FRONT
PPlV8_FCAM_CONN CAMERA
PROX & ALS INTE RFACE PROXIMITY SENSOR
PROX_RX PROXIMITY SENSOR RX SIGNAL
PROX_RX_EN PROXIMITY SENSOR RX ENABLE
PROX_TX_EN PROXIMITY SENSOR TX ENABLE
PS_HOLD MAINTAIN SIGNAL
MAINTAIN SIGNAL SENT BY BASEBAND CPU
PS_HOLD_PMIC TO THE BASEBAND POWER
RADIO_ON_L POWER START SIGNAL
BASEBAND POWER AMPLIFIER
RADIO_PA_NTC TEMPERATURE DETECTION
TRANSMISSION DATA FROM THE REAR
CAMERA TO THE MIPI INTERFACE OF THE
RCAM_TO_AP_MIPI_DATA3_P MAIN
FLASH OPEN SIGNAL FROM THE REAR
RCAM_TO_LEDDRV_STROBE_EN CAMERA TO THE FLASH CHIP
RCVR_TEST RECEIVER TEST
REAR CA MERA CIRCUIT TEMPERA TU RE
REAR_CAMER_NTC DETECTION
RESISTOR FOR TEMP CALIBRATION THERMISTOR SENSOR
ANYTHING THAT HAS RF HAS TO DO WITH
RF RADIO FREQUENCY
CLOCK SIGNAL FILTERING PART OF THE
RFFE_CLOCK_FILTERS FRONT END OF THE RF
RINGER_A MUTE SWITCH BUTTON
RVCR_CONN_N RECEIVER
SIM_CLK SIM CARD CLOCK SIGNAL
SIM_DETECT SIM CARD DETECTION SIGNAL
SIM_RST SIM CARD RESET SIGNAL
SIM_TRAY_DET SIM CARD INSERTION TEST SIGNAL
SIMCRD_RST SIM CARD RESET SIGNAL SIM CARD RESET SIGNAL
SLEEP_CLK MAIN TALK SIGNAL MAIN TALK SIGNAL
SLEEP_CLK SLEEP CLOCK SLEEP CLOCK
 Circuit NetName Description of Circuit
SIGNAL FROM THE LOW FREQUENCY BAND
SO_LB_ASM_ANTl_LAT ANTENNA TO THE ANTENNA
SIGNAL FROM MIDDLE AND HIGH
FREQUENCY BAND ANTENNA SWITCH TO
SO_MB-HB_ASM_ANTl_LAT THE ANTENNA
INTERRUPT SIGNAL FROM THE AUDIO
SPEAKERAMP_TO_AP_INT_L FREQUENCY AMPLIFIER TO THE MAIN CPU
CHIP SELECT FROM THE MAIN CPU TO THE
SPI OF AUDIO ENCODING AND DECODING
SPI_AP_TO_CODEC_CS_L CHIP
THE MAIN OUTPUT FROM INPUT FROM THE
MAIN CPU TO THE SPI OF THE AUDIO
SPI_AP_TO_CODEC_MOSI ENCODING
CLOCK SIGNAL FROM THE MAIN CPU TO
THE SPI OF AUDIO ENCODING AND
SPI_AP_TO_CODEC_SCLK DECODING CHIP
THE MAIN OUTPUT FROM THE INPUT SIGNAL
FROM THE MAIN CPU TO THE SPI
SPI_AP_TO_MESA_MOSI INTERFACE OF
CLOCK SIGNAL FROM THE MAIN CPU TO
THE SPI INTERFACE OF THE FINGERPRINT
SPI_AP_TO_MESA_SCLK_R CHIP
CHIP SELECT LOW LEVEL EFFECTIVE
SIGNAL FROM THE MAIN CPU TO THE 5P I
SPI_AP_TO_TOUCH_CS_L INTERFACE OF
THE MAIN OUTPUT FROM THE INPUT SIGNAL
SPI_AP_TO_TOUCH_MOSI FROM THE MAIN CPU CHIP TO THE SPI
CLOCK SIGNAL FROM THE MAIN CPU TO
SPI_AP_TO_TOUCH_SCLK_R THE SPI INTERFACE OF THE TOUCH
THE MAIN OUTPUT FROM INPUT FROM THE
AUDIO ENCODING AND DECODING TO THE
SPI_CODEC_TO_AP_miSO SPI
THE MAIN INPUT FROM THE OUTPUT SIGNAL
FROM THE FINGERPRINT TO THE SPI
SPI_MESA_TO_AP_miSO INTERFACE OF
THE MAIN INPUT FROM OUTPUT SIGNAL
FROM THE TOUCH TO THE SPI INTERFACE
SPI_TOUCH_TO_AP_MISO OF THE
SPK AMP LOUDSPEAKER AMPLIFIER
SPKAMP_EN SPEAKER PER-AMPLIFIER ENABLE SIGNAL
PER-AMPLIFIER OUTPUT TO RING
SPKR_CONN_PREAMP _P AMPLIFIER
 Circuit NetName Description of Circuit
THE HOST WAKE-UP SIGNAL FROM THE
STOCKHOLM_TO_PMU_HOST_WAKE NEAR FIELD COMMUNICATION CHIP TO
SW_BOOST BACKLIGHT SWITCH
ELECTRIC QUANTITY DETECTING SIGNAL
FROM THE MAIN CPU TO THE CHARGING
SWI_AP_BI_TIGRIS CHIP
ELECTRON IC QUANTITIES DETECTION
SIGNAL BETWEEN THE MAIN CPU AND THE
SWI_AP_BI_TIGRIS_FET CHARGING CHIP
TIGRIS CHARGER CHARGE MANAGEMENT CHIP
TIGRIS_ACTIVE_DIODE CHARGE TUBE ACTIVATION SIGNAL
ELECTRONIC QUANTITIES DETECTION
SIGNAL FROM THE CHARGING CHIP TO THE
TIGRIS_TO_BATIERY_SWI BATTERY
INTERRUPT SIGNAL FROM THE CHARGING
TIGRIS_TO_PMUINT_R_L CHIP TO THE MAIN POWER CHIP
TIGRIS_VBUS_DETECT CHARGING SV DETECTION
INTERRUPT LOW EFFECTIVE SIGNAL FROM
TOUCH_TO_APINT_L THE TOUCH TO THE MAIN CPU CHIP
RECEIVE OPEN SIGNAL FROM THE TOUCH
TOUCH_TO_PROX_RX_EN_FCAM_CONN CHIP TO THE PROXIMITY SENSOR
SEND AND OPEN BUFFER SIGNAL FROM
TOUCH_TO_PROX_TX_EN_BUFF THE TOUCH TO THE PROXIMITY SENSING
INTERRUPT SIGNAL FROM THE USB
TRISTAR_TO_APINT MANAGER TO THE MAIN CPU
CLOSING SIGNAL OF THE CHARGING CHIP
TRISTAR_TO_TIGRIS_VBUS_OFF SV OVER-VOLTAGE PROTECTION
RECEIVING DATA FROM THE ATTACHMENT
UART_ACCESSORY_TO_AP_RXD TO THE UART SERIAL OF THE MAIN CPU
THE MAIN PROCESSOR SECTION DEBUG
INTERFACE OF THE UART SERIAL RECEIVES
UART_AP_DEBUG_RXD DATA
TRANSMISSION DATA FROM THE MAIN CPU
UART_AP_TO_ACCESSORY_TXD TO THE UART SERIAL OF THE USB
UART SERIAL FROM THE MAIN CPU TO THE
UART_AP_TO_BT_RTS_L BLUETOOTH CHIP SEND S REQUEST SIGNAL
SENDING DATA FROM THE MAIN CPU TO
THE UART INTERFACE OF THE BLUETOOTH
UART_AP_TO_BT_TXD CHIP
 Circuit NetName Description of Circuit
TRANSMISSION DATA FROM THE MAIN CPU
TO THE UART SERIAL OF THE NEAR FIELDN
UART_AP_TO_STOCKHO_LM_TXD COMMUNICATION
UART SERIAL FROM THE MAIN CPU TO THE
UART_AP_TO_STOCKHOLM_RTS_L NEAR FIELD COMMUNICATION CHIP
UART SERIAL FROM THE MAIN CPU TO THE
UART_AP_TO_WLAN_RTS_L WIFI CHIP SENDS REQUEST SIGNAL
TRANSMISSION DATA FROM THE MAIN CPU
UART_AP_TO_WLAN_TXD TO THE UART SERIAL OF THE WIFI CHIP
UART SERIAL FROM THE BLUETOOTH TO
UART_BT_TO_AP_CTS_L THE MAIN CPU CLEARS SENDING SIGNAL
RECEIVING DATA FROM THE NEAR FIELD
UART_STOCKHO LM_TO_AP_RXD COMMUNICATION CHIP TO THE UART
UART SERIAL FROM THE MAIN CPU TO THE
UART_STOCKHOLM_TO_AP_CTS_L NEAR FIELD COMMUNICATION CHIP
RECEIVING DATA FROM THE WI FI CHIP TO
UART_WLAN_TO_AP_RXD THE UART SERIAL OF THE MAIN CPU
UART SERIAL FROM THE MAIN CPU TO THE
UART_WLAN_TO_APITS_L WI FI CHIP CLEARS SENDING SIGNAL
USB_AP_DATA_N THE DATA FROM THE USB TO THE MAIN CPU
USB_VBUS USB REFERENCE VOLTAGE INPUT
USB_VBUS_PROT _SNS USB CHARGING DETECTION
USBHS_P\USB FS_P USB COMMUNICATION INTERFACE
BATTERY QUANTITIES DETECTION AND
VBATI_SENSE TRANSMISSION
VBOOST_LCM LCD DISPLAY MAIN POWER
VIB_LDO_EN VIBRATOR POWER SUPPLY ENABLE
VIB_PWM VIBRATOR DRIVE SIGNAL
EARPHONE REFERENCE VOLTAGE
VIDEO_AMP_EN CONTROL
VOL_DWN_L VOLUME DOWN
VOL_UP_L VOLUME UP
W LAN_WAKE_AP WLAN WAKEUP
WLAN LAT 2.4GHZ BAW BPF WIFI 2.4GHZ BAND PASS FILTERING CIRCUIT
WLAN_HSIC_RDY WIRELESS CONTROL SIGNAL
THE HOST WAKE-UP SIGNAL FROM THE WIFI
WLAN_TO_PMU_HOST_WAKE CHIP TO THE MAIN POWER
XO_OUT_D1_EN CLOCK OUTPUT ENABLE SIGNAL
 Circuit NetName Description of Circuit
XO_OUT_DO_EN BASEBAND CLOCK OUTPUT SIGNAL
XTAL_19P2M_OUT 19.2MHZ CLOCK SIGNAL OUTPUT
XTAL_19P2MJN 19.2MHZ CLOCK SIGNAL INPUT
THE 24M CLOCK SIGNAL OUTPUT OF THE
XTAL_API4M_OUT MAIN CPU