HCS12 µController

Addressing modes

DR. Salim Al-Wasity

 DEFINITIONS

opcode Operand addressing

1- 2 bytes. 0- 5 bytes.
Specify the operation to Used to access the
be performed. operand(s)

Effective Address:
• It is a memory location that holds the data.
• The addressing mode (operand) tells the CPU how to get the effective address.
HARVARD AND VON NEUMANN ARCHITECTURES

A0 A0 A0
Address bus Address bus Address bus
A19 A19 A19

Code Data Code Data

CPU CPU
memory memory memory memory

D0 D0 D0
Data bus Data bus Data bus
D7 D19 D19

von Neumann Architecture Harvard Architecture

HARVARD AND VON NEUMANN ARCHITECTURES
von Neumann Architecture Harvard Architecture
• It was developed at Princeton University. • It was developed at Harvard University.
• It use the same bus to access the code and data memories. • It use separate buses for code and data memories.
• 2 buses: data bus and address bus. • 4 buses:
• Data bus for code memory
• Slow, because each access operation (weather code or data) had to
• Data bus for data memory
wait for the other to finish fetching.
• Address bus for code memory
• Easy to implement for PCs and workstations as ROM and RAM are • Address bus for data memory
external to the CPU.
• Fast compared to von Neumann architecture as it can access
• Microcontroller use Harvard architecture internally, but they still use simultaneously data and code memories.
von Neumann architecture if they need external memory for code
• Easy to implement inside a microcontroller where both ROM (code)
and data space.
and RAM (data) are internal (on-chip) with few millimeters away.
• Expensive to implement for PCs as ROM and RAM are external to
the CPU. It will:
• Make the motherboard large due to the number of bus wires.
• Need more pins coming out of the CPU for the extra buses.
INHERENT MODE
• This mode has either no operands or all the operands are internal CPU registers.
• Examples:
• nop (No Operation), This instruction has no operand.
• inca (increment register A), Operand is a CPU register.
IMMEDIATE MODE
• The value to be operated on has been included in the instruction itself.
• The immediate value can be 8-bit or 16-bit.
• An immediate value is preceded by a # character in the assembly instruction.
• Examples:
• ldx #$2000 (load), Places the hex value 2000 in index register X.
• ldd #$2102 (load double), place 21 in accumulator A and 02 in accumulator B.
DIRECT MODE
• It is called zero-paging addressing.
• It used to access operands in the address range of $0000 to $00FF.
• Only the 8 low order bits of the address need to be included in the instruction (after the opcode).
• Examples:
• ldaa $20 (load accumulator A), fetches the contents of the memory location at $0020 and puts it in accumulator A..

Memory
$0000
A register
Address Data
$20 $0020 $F5 $F5
$0021 $00
EXTENDED MODE
• The full 16-bit address of memory location to be operated on is provided in the instruction.
• This addressing mode can be used to access any location in the 64-kB memory map.
• Examples:
• ldaa $2000 (load accumulator A), fetches the contents of the memory location at $2000 and puts it in accumulator A..

Memory
$0000
A register
Address Data
$2000 $2000 $F5 $F5
$2001 $00
RELATIVE MODE
• It is used only by branch instructions that may change the program flow.
• The distance of the branch (or jump) is referred to as branch offset.
• A short branch instruction consists of an 8-bit opcode and a signed 8-bit offset contained in the byte that follows
the opcode.
• Long branch instructions consist of an 8-bit prebyte, an 8-bit opcode, and a signed 16-bit offset contained in 2
bytes that follow the opcode.
• Each conditional branch instruction tests certain status bits in the condition code register.
• If the bits are in a specified state, the offset is added to the address of the next instruction to form an effective address, and execution
continues at that address. PC=PC+offset
• If the bits are not in the specified state, execution continues with the instruction next to the branch instruction.

• Both 8-bit and 16-bit offsets are signed 2nd complement numbers to support branching forward and backward in
memory.
RELATIVE MODE
• The numeric range of the short branch offset values is $80 (-128) to $7F (127).
• The numeric range of the long branch offset values is $8000 (-32768) to $7FFF (32767).
• If the offset is zero, the CPU executes the instruction immediately following the branch instruction, regardless of
the test result.
• For simplicity, branch offset is often specified using a label rather than a numeric value.
• Examples:
• bmi minus
----commands--- (branch if minus), HCS12 to execute the instruction with the label minus if the N flag of
the CCR register is set to 1.
minus ----command----

• lbcc next (long branch if carry flag of CCR register is set to 0).
RELATIVE MODE

Memory
$0000
PC=$1000
offset=0A (2nd F6) A register
If branch=1, then PC+offset=$0FF6 Address Data
$0FF6 $AD $XX
If branch=0, then PC=$1000

$1000 $F0
$1001 $00
INDEXED ADDRESSING MODE
• It uses the sum of two components to compute the effective address:
• Base address: which is stored is the based register (X, Y, SP or PC).
• Offset: which is the distance of the target from the base address. It could be a constant (5-bits, 9-bits or 16-bits) or the contents of
accumulator A, B or D.

• It can be divided into:

• Indexed addressing modes with constant offsets.
• Indexed addressing modes with offset in an accumulator
• Auto Pre-/Postdecrement/-Increment Indexed Addressing Modes.
• 16-Bit Offset Indexed Indirect Mode.
• Accumulator D Indirect Indexed Addressing.
INDEXED ADDRESSING MODES WITH CONSTANT OFFSETS
• The syntax of this addressing mode is:
n, r
Where n is a constant offset (5-bit, 9-bit, or 16-bit)
r is the base register and can be X, Y, SP, or PC

• Example:
• ldaa 4,X loads the contents of the memory location with the address equal to the sum and 4 and X into A

Memory
$0000
X=$1000
n=4 A register
Address Data
X+n=$1004 $1004 $AD $AD
INDEXED ADDRESSING MODES WITH OFFSET IN AN ACCUMULATOR
• The syntax of this addressing mode is:
acc, r
Where acc can be A, B or D.
r is the base register and can be X, Y, SP, or PC

• Example:
• staa B,X stores the contents of A in the memory location with an address equals the sum of the contents of B and X
• ldx D,SP Load 2 bytes into X. 1st memory address is [[D]+[SP]] and 2nd memory address is [1+[D]+[SP]]

Memory
$0000
X=$1000
Acc(B)=D A register
Address Data
X+acc=$100D $100D $AD $AD
AUTO PRE-/POSTDECREMENT/-INCREMENT INDEXED ADDRESSING MODES

• The syntax of this addressing mode is (see table below):

• Predecrement/Preincrement: the HCS12 decrements/increments the specified base register by the specified offset amount (n) before using
the contents of the base register as an effective address to access memory.
• Postdecrement/Postincrement: the HCS12 uses the contents of the specified base register as the effective address to access memory and
then decrements/increments the specified base register.

Syntax Effective Address New value of based register (r) Example Comment
n,-r [r]-n [r]-n std 2,-SP Predecrement
n,+r [r]+r [r]+r ldd 2,+SP Preincrement
n,r- [r] [r]-n std 2,X- Postdecrement
n,r+ [r] [r]+r std 2,Y+ Postincrement

Where n = offset amount of decrement or increment.

r= base register (X, Y, or SP).
AUTO PRE-/POSTDECREMENT/-INCREMENT INDEXED ADDRESSING MODES

• Example:
If the index register X contains $1000, then
• Predecrement:
staa 2, -X stores the contents of accumulator A in the memory location at $9FE. the new value in X is $9FE

• Preincrement:
ldaa 2,+X loads the contents of memory location at $1002 into A. the new value of X is $1002.

• Postdecrement:
sty 2,X- stores the high and low bytes of Y in memory locations at $1000 and $1001, respectively. After that, index register X
receives the new value of $9FE.

• Postincrement:
ldaa 4,X+ loads the contents of the memory location at $1000 into A. After that, index register X receives the new value of $1004
16-BIT OFFSET INDEXED INDIRECT ADDRESSING MODE
• The syntax of this addressing mode is:
[n, r]
Where n is the 16-bit offset and r is the base register and can be X, Y, SP, or PC Memory
$0000
• The HCS12 fetches the actual effective address from the memory
location with address equal to the sum of the 16-bit offset and the X=$1000 Address
contents of the base register and then uses that effective address to 10+X=$100A $100A $20
access the operand $100B $00

Address
• Example: ldaa [10,X]
1. index register X holds the base address, lets assume that X has an initial
value of $1000. A register
2. Then, the instruction adds the value 10 to the value in X to form the Data
$F0 $2000 $F0
address $100A.
3. Next, an address pointer (lets assume it’s $2000) is fetched from $35
memory locations at $100A and $100B.
4. Finally, the value stored in $2000 is read and loaded into accumulator A.
ACCUMULATOR D INDIRECT INDEXED ADDRESSING MODE
• The syntax of this addressing mode is:
[D, r]
Where D is the value in register D and r is the base register and can be X, Y, SP, or PC Memory
$0000
• The HCS12 adds the value in accumulator D to the value in the base
X=$1000 Address
index register to form the address of a memory location that
D+X=$100F $100F $20
contains a pointer to the memory location of the operand.
$1010 $00
• Example: ldaa [D,X]

Address
1. index register X holds the base address, lets assume that X has an initial
value of $1000.
2. Then, the instruction adds the value of accumulator D (lets assume its A register
15) to the value in X to form the address $100F. Data
$F0 $2000 $F0
3. Next, an address pointer (lets assume it’s $2000) is fetched from
$35
memory locations at $100F and $1010.
4. Finally, the value stored in $2000 is read and loaded into accumulator A.
 HCS12 memory map

ADDRESSING MORE THAN 64 KB

• The HCS12 has a 16-bit PC and hence can only address up to 64 kB of
program memory directly as shown in the figure.
• The HCS12 can support a larger memory space up to 4 MB.
• The expanded memory system (> 64 KB) is accessed by using the bank-
switching scheme by which:
• The HCS12 treats the 16 kB of memory space from $8000 to $BFFF as a program
memory window.
• The HCS12 has an 8-bit program page register (PPAGE)
• PPAGE allows up to 256 of 16 KB program memory pages to be switched into and out
of the program memory window.