setCTSMode

setCTSMode
[-help]
[-reset]
[-addClockRootProp {true|false}]
[-checkAssumedInputTran number ]
[-checkAttribute {true | false}]
[-checkGateAreaOverlappingRatio number ]
[-checkGatingLevel{true | false}]
[-checkGateLocation {true|false}]
[-checkGateLocationMargin number ]
[-checkInputCap {true | false}]
[-checkMacroModel {true | false}]
[-checkMacroModelMaxDelayScale number ]
[-checkMacroModelMaxSkewScale number ]
[-checkMacroModelVarianceStepSize number ]
[-checkMaxCapThreshold number ]
[-checkMaxGatingLevel number ]
[-checkMaxNetResistanceDeviation float ]
[-checkMaxPlaceableDistanceThreshold number ]
[-checkMaxRefinePlaceDistance number ]
[-checkMaxRouteFollowsGuideDeviation number ]
[-checkMinPrefLayerUtilization number ]
[-checkMinRouteLengthThreshold number ]
[-checkNetResistanceMinLength number ]
[-checkNetResistance {true|false}]
[-checkPlaceableDistance {true | false}]
[-checkPostCTSTiming {true|false}]
[-checkPostCTSTimingDetail {true|false}]
[-checkPostCTSTimingPathNum integer ]
[-checkPostCTSTimingRptFile filename ]
[-checkReconvergentMux {true | false}]
[-checkRefinePlaceDistance {true | false}]
[-checkRootInputTran {true | false}]
[-checkRouteFollowsGuide {true | false}]
[-checkRouteLayerFollowsPreference {true | false}]
[-checkRouteObstructOverClockPin {true|false}]
[-checkSynSubTreeMaxTime number ]
[-checkSynSubTreeMaxSaveDesignnumber ]
[-checkMaxTranTimeFactor number ]
[-checkDriveStrength {true | false}]
[-detailReport {true | false}]
[-engine {ck | ccopt}]
[-fixLeafInst {true|false}]
[-fixNonLeafInst {true|false}]
[-flowPriority {timing | skew | none}]
[-honorFence {true|false}]
[-mmprefix prefix name ]
[-moveGate {true|false}]
[-nameAppendParentInClones {true | false}]
[-nameSingleDelim {true|false}]
[-opt {true|false}]
[-optAddBuffer {true|false}]
[-optArea {true|false}]
[-optBreakReconvergent {true|false}]
[-optLatency {true | false}]
[-optLatencyMoveGate {true | false}]
[-powerAware {true|false}]
[-rcCorrelationAutoMode {true |false}]
[-reportHTML {true|false}]
[-routeBottomPreferredLayer number ]
[-routeClkNet {true|false}]
[-routeGuide {true|false}]
[-routeLeafBottomPreferredLayer number ]
[-routeLeafMask < value >]
[-routeLeafNonDefaultRule ruleName ]
[-routeLeafPreferredExtraSpace spaceValue ]
[-routeLeafRouteTypeOnGate {true|false}]
netName ]
[-routeLeafShielding
number ]
[-routeLeafTopPreferredLayer
[-routeMask < value >]
[-routeNonDefaultRule ruleName ]
[-routeObstructOverClockPin {true | false}]
[-routePreferredExtraSpacespaceValue ]
[-routeShieldingnetName ]
[-routeTopPreferredLayer number ]
[-specMultiMode {true | false}]
[-synthFixDRVOnly {true | false}]
[-synthLatencyEffort {high | low}]
[-synthSnapGatingCell]
[-synthSubTreeDelayThreshold number ]
[-synthSubTreeLevelThreshold number ]
[-synthUpsizeClockGate {true | false}]
[-traceAsyncSRPinAsLeaf {true | false}]
[-traceBlackBoxPinAsLeaf {true | false}]
[-traceDPinAsLeaf {true|false}]
[-traceHonorConstants {true | false}]
[-traceIoPinAsLeaf {true|false}]
[-traceTriStateEnablePinAsLeaf {true | false}]
[-useLefACLimit {true|false}]

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 [-useLibMaxCap {true|false}]
[-useLibMaxFanout {true|false}]
[-verbose {true|false}]

Sets global parameters for clock tree synthesis. Parameters you specify with
the setCTSMode command are then used automatically whenever clock tree
synthesis is performed. These parameters include default routing attributes
that CTS uses if no RouteType statement is specified for a clock tree in the clock
tree specification file. Settings in the clock tree specification file take priority
over settings defined by setCTSMode .
Use the getCTSMode command to return the current settings for the setCTSMode

command.

You must set all setCTSMode parameters before running the specifyClockTree command. If you
want to change setCTSMode parameters after running the specifyClockTree command, you must
use the cleanupSpecifyClockTree command before you specify the setCTSMode command again.

Parameters

-help Outputs a brief description that includes type

and default information for each setCTSMode
parameter.
For a detailed description of the command and
all of its parameters, use the man command:
man setCTSMode .
-addClockRootProp {true | false}
Adds the CLOCKROOT property to each clock that
CTS inserts in a design.
Default : false

-checkAssumedInputTran Specifies the input transition value when

number performing drive strength, input pin
capacitance, and placeable distance checks. For
example, when the tool evaluates if a certain
buffer choice in the clock tree specification file
is able to meet the transition constraint, the
tool applies this value to the input pin of the
buffer and measures if the transition of the
output pin exceeds the passing point.
Default : Auto computed by assuming the
largest buffer with zero input slew.
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .

-checkAttribute {true|false} Reports cells or instances that are marked as

DontUse or DontTouch due to timing libraries or
timing constraints. Reports standard cell
instances that have FIXED placement attribute.
Default : true
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-checkRootInputTran {true|false} Checks if the clock root input transition
constraint is reasonable for CTS to meet the
input transition constraint for buffers or clock
gates.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkInputCap {true|false}
Checks if the input pin capacitance specification
in timing library and macromodel definition is
reasonable for CTS to meet the maximum input
transition constraint or maximum capacitance
constraint.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt.
-checkReconvergentMux {true|false} Reports the instance name of multiplexer that
has simultaneous clock paths from the same
clock source through more than one input pins.
Default : true

Note : This parameter will be ignored if the

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 Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-checkGatingLevel {true|false}
Reports maximum number of level of logic
before clock tree synthesis. It issues a warning
message if the number of level exceeds a
certain threshold level that can be set using
setCTSMode -checkMaxGatingLevel .

Default : 10 levels
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt.
-checkMaxNetResistanceDeviation Displays a message if deviation of resistance
float
between pre-route and post-route is more than
a certain threshold (20% is default). This
parameter is used by ckSynthesis during post-
synthesis check.
Default : 0.2

-checkNetResistance {true|false} Checks the deviation of resistance between pre-

route and post-route. This parameter is used by
ckSynthesis during post-synthesis check.

Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt.
-checkNetResistanceMinLength Specifies that the nets having wire length equal
number
or less than this value will not be checked
during net resistance check.
Default : 200 times of the M2 pitch.
-checkPostCTSTiming {true|false}
Performs post-CTS quality of results (QoR)
diagnosis.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt.
-checkPostCTSTimingRptFile
Dumps the results into a text file.
filename
Default : Does not dump result into a text file.
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt.
-checkPostCTSTimingPathNum
Sets the number of most critical timing paths to
integer
be analyzed.
Default : 50

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkPostCTSTimingDetail
{true|false}
Indicates the path number of clock timing path
that fall into each of the check category.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkPlaceableDistance {true|false}
Checks for unrealistic floorplan or placement
whereby CTS cannot find a valid location close
enough to input pins of clock leaf instance or
gating instance to meet the input transition
constraint.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkRouteObstructOverClockPin
{true|false}
Reports the instance and pin name for instance
that falls into the following situations:
The clock input pin of the instance is covered
by routing blockages on the preferred
routing layers.
The clock input pin of the instance is
assumed to be covered by routing blockages
on the preferred routing layers by CTS.
The routing blockages over the clock input
pin of the instance on the preferred routing
layer is ignored by CTS.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
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 setCTSMode -engine parameter is set to ccopt .
-checkRefinePlaceDistance
{true|false}
Reports instance that has been moved by large
distance in the refine placement step. The
threshold distance can be set by using setCTSMode -
checkMaxRefinePlaceDistance .

Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkRouteLayerFollowsPreference
{true|false}
Reports nets that have low utilization of
preferred routing layers. The threshold
percentage of utilization can be set by using
setCTSMode -checkMinPrefLayerUtilization . Note that nets that
have wire length below a certain threshold are
not checked. The default threshold length is
auto-computed by the tool and can be set using
setCTSMode - checkMinRouteLengthThreshold .

Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkRouteFollowsGuide {true|false} Reports nets that have substantial difference in
total and maximum wire length from driver to
receivers between CTS's pre-route estimation
and actual routing. Note that nets that have
wire length below a certain threshold are not
checked. The default threshold length is auto-
computed by the tool and can be set using
setCTSMode - checkMinRouteLengthThreshold .

Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkDriveStrength {true|false}
Checks if the clock instance (for example, clock
macros, gating instances) along the clock path
and buffer choices in clock specification file has
sufficient drive strength to meet the input
transition constraints.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkSynSubTreeMaxTime
Specifies the time limit for synthesis of each
number
subtree. CTS works on subtree basis. When the
time expires, save the design when the
synthesis of current subtree is completed (that
is, before working on a new sub-tree).
Default : 0 (the design is not saved)
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-checkSynSubTreeMaxSaveDesign Specifies the number of designs to be saved.
number
Whenever the time limit for synthesis of each
subtree expires, the tool will check this setting
and any previously saved design. It will not
count the previously saved designs that are
deleted or moved.
Default : 1

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .

-checkAssumedInputTran number Specifies the input transition value when

performing drive strength, input pin
capacitance, and placeable distance checks. For
example, when the tool evaluates if a certain
buffer choice in the clock tree specification file
is able to meet the transition constraint, the
tool applies this value to the input pin of the
buffer and measures if the transition of the
output pin exceeds the passing point.
Default : Auto computed by assuming the
largest buffer with zero input slew.
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .

Controls the other four options of setCTSMode : -

-checkMaxTranTimeFactor number
checkDriveStrength , - checkRootInputTran , - checkInputCap and -
checkPlaceableDistance when running the checking.
When the computed transition value exceeds
the product of this value and
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 the product of this value and the transition
constraint in the clock specification file, the tool
flags a message.
Default : 0.9

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .

-checkMaxCapThreshold number Specifies the factor of MaxCap constraints where if

computation of output capacitance exceeds the
product of this value and MaxCap , the tool flags a
message indicating the possibility of large input
pin capacitance of cells.
Default : 0.9

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .

-checkMaxGatingLevel number Specifies the threshold level in which if a clock

has logic level more than this value, the tool will
flag a warning message.
Default : 10

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkMaxRefinePlaceDistance Specifies the distance in which if the instances
number
are moved by refinePlace with distance more than
this value, the tool will flag a message.
Default : auto-computed by the tool
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-checkMinRouteLengthThreshold
controls how the other two options of setCTSMode: -
number
checkRouteLayerFollowsPreference and - checkRouteFollowsGuide
run the checking. Nets that have wire length
equal or less than this value will not be
checked.
Default : 200 times of the M2 pitch
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-
checkMaxRouteFollowsGuideDeviation
Controls how setCTSMode -checkRouteFollowsGuide runs the
checking. If the positive difference of actual
routing and pre-route estimation exceeds this
value, the tool will flag message. (0.5 means
the ratio of actual routing to pre-route
estimation is 1.5).
Default : 0.5
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .

-checkMacroModel {true | false} Checks for macromodel definitions that might

lead to poor CTS results such as invalid delay
values, too large maximum delay, large
difference between the maximum and minimum
delay that makes it impossible to meet the
skew and large variance among many different
macromodel delays.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkMacroModelMaxDelayScale
Controls how setCTSMode -checkMacroModel runs the
number
checking. The tool flags a message if the
maximum delay definition of a macro model
exceeds the product of this value and the
MaxDelay constraint in the clock tree specification
file.
Default : 0.9

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkMacroModelMaxSkewScale Controls how setCTSMode -checkMacroModel runs the
number
checking. The tool flag a message if the
difference between the minimum and maximum
delay definition of a macromodel exceeds the
product of this value and the MaxSkew constraint
in the clock tree specification file.
Default : 0.9

Note : This parameter will be ignored if the

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 Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-checkMacroModelVarianceStepSize Controls how setCTSMode - checkMacroModel runs the
number
checking. This setting overrides the default step
size when checking for large variance of
macromodel delays.
Default : 100ps

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkGateLocation {true|false} Checks the placement location of clock gating
instances. For gating instances that are
declonable, check if there is any physical region
overlap among receivers of different gating
instances. It also checks if the gating location is
optimal before and after synthesis.
At the pre-synthesis stage, it checks if a gating
instance is outside the bounding box of its
downstream sink and the clock source by a
certain margin.
At post-synthesis stage, it checks if a gating
instance is outside the bounding box of its
immediate sink and the clock source by a
certain margin.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-checkGateAreaOverlappingRatio
Specifies the maximum allowed overlapping
number
ratio between different physical regions
bounded by receivers of each declonable gating
instances. If the overlapping ratio exceeds this
value, the tool displays a message for gating
instances.
Default : 0.5

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .

-checkGateLocationMargin number Specifies the maximum margin allowed for the

gating instance to be out of the bounding box. If
the distance exceeds this margin, the tool
displays a message for this instance.
Default : auto-computed by the tool.
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-
checkMaxPlaceableDistanceThreshold
Controls how setCTSMode -checkPlaceableDistance runs the
number checking. If the nearest available placement
location to the input pin of clock leaf instance or
gating instance has a distance that exceeds this
value, the tool flag a message for this instance.
Default : 0, auto-computed by the tool.
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .
-checkMinPrefLayerUtilization Controls how setCTSMode - checkRouteLayerFollowsPreference
number
runs the checking. When the utilization
percentage of a net falls below this value, the
tool flags a message for this net.
Default : 0 . 8

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .

-detailReport {true | false} When set to true, this parameter enables

computing of additional analysis data, which is
not on by default. The additional data includes
number of clock nets, max clock net
capacitance, min clock net capacitance, total
clock net capacitance, average clock net
capacitance, max clock net wire length, min
clock net wire length, total clock net wire
length, average clock net wire length, max net
fanout, min net fanout, and average net fanout.
Default : false
Note : This parameter will be ignored if the
setCTSMode -engine parameter is set to ccopt .

-engine {ck | ccopt} Specifies whether clockDesign will use the EDI-
CTS ckSynthesis/ckECO commands
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 CTS ckSynthesis/ckECO commands or the
CCOpt engine to complete clock tree synthesis.
When this option is set to ccopt , the EDI clock
spec file will be automatically mapped to Azuro
clock specification.
Note: To run clockDesign with CCOpt engine,
you will need a CCOpt license. For more
information on the license requirement, see the
Product and Licensing Information chapter in
the EDI System User Guide .
By default, the software uses the EDI-CTS or the
ck option.
Note : When the setCTSMode -engine
parameter is set to ccopt , the CTS commands
listed below are not supported. These
commands are ignored and the software issues
a warning message.
analyzeClockTreeSpec
changeClockStatus checkClockTreeCellHalo
ckECO
ckSynthesis
clockSpiceOut
createClockTreeSpec
deleteClockTree
fixClockExcludedNetDRV
refineClockTreeCellHalo
saveClockBuffers
saveClockNets
setClockNetRouteAttribute
-fixLeafInst {true | false} Changes the placement status of leaf instances
to FIXED or PLACED .
Default : true

Note : This parameter is supported in the

native CCOpt flow.
-fixNonLeafInst {true | false} Changes the placement status of non-leaf
instances to FIXED or PLACED .
Default: true

Note : This parameter is supported in the

native CCOpt flow.
-flowPriority {timing | skew | none}
Enables the high-effort CTS flow to get better
skew.
Note: The -flowPriority skew parameter will take
effect only if setDesignMode -flowEffort high is also set.
Default: none

-honorFence {true | false}

Controls whether CTS enters more than once
into a fence in hierarchical designs.
If you specify true , CTS does not create any
extra ports for fences.
Default : false (This means that CTS might create
extra ports.)
Note : This parameter is supported in the
native CCOpt flow.
-mmprefix prefix name Changes the CTS naming convention for
excluded buffer from original_net_name__MMExc_X
to original_net_name__string_X .
-moveGate {true | false} Moves a driving gate during synthesis. When it
is set to false, the driving gate cannot be
moved.
Default : true

Note : This parameter is supported in the

native CCOpt flow.
-nameAppendParentInClones {true |
false}
Appends the parent instance or net name to
clones created with the ckCloneGate command.
If you specify -nameAppendParentInClones false , clones are
named using the following convention:

FECTS_CLONE_I# (for cloned instances)

FECTS_CLONE_N# (for nets created by ckCloneGate )

If you specify -nameAppendParentInClones true , clones are
named using the following convention:

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 original_instance_name _FECTS_CLONE_I#

original_net_name _FECTS_CLONE_N#
Default: false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-nameSingleDelim {true | false}
Uses single name delimiters after the first
element in clock root and net names.
CTS normally inserts double (or, in some cases,
multiple) name delimiters after the first element
of clock root or net names. If you specify -
nameSingleDelim true , CTS inserts a single underscore
( _ ) in clock root and net names.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-opt {true | false}
Resizes buffers or inverters, refines placement,
and corrects routing for signal and clock wires.
If you specify -opt true , CTS attempts to resize
gating components; however, it might not do
so. If you specify -opt false , CTS does not resize
gating components.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-optAddBuffer {true | false}
Adds buffers during optimization.
Note: You must specify -opt true in order to use
this parameter.
Default: false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-optArea {true | false}
Performs downsizing for clock instances
(buffers/inverters and gating cells) before
routing while maintaining skew and does not
create new design-rule violations.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-optBreakReconvergent {true | false}
Enables ckECO speed up the run time in a clock
design that has heavy reconvergence.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-optLatency {true | false}
Reduces the latency during post-optimization
stage of CTS by moving, resizing, deleting, and
splitting the buffers when set to true . It also
minimizes the skew during clock tree synthesis.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-optLatencyMoveGate {true | false}
Allows the tool to move the gating cell for
latency reduction during clock tree synthesis.
When optLatency and optLatencyMoveGate are set to true ,
the tool moves the gate in the post-optimization
stage.
Note: The optLatency parameter must be set to true
before honoring the optLatencyMoveGate parameter.
Default : true

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-powerAware {true | false}
Considers internal power, leakage power, and
switching power (based on cv 2 f ) when
building clock trees. Power reporting is enabled
with -powerAware true .
Note: You must specify the Period statement in
the clock tree specification file if you use -
powerAware true .

Default : false
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 Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .

-rcCorrelationAutoMode {true | false} Used to get a better correlation between pre-

CTS and post-CTS routing. This parameter
invokes grid-based RC extraction for the pre-
CTS and clock-routeOnly mode. The grid-based
RC extraction is more precise than the current
length-based model. It includes better modeling
of via resistance caused by pin-access
connection and provides better correlation for
process that has big via-capacitance resistance.
Note: Use this parameter before loading the
clock tree specification file and before running
clock tree synthesis.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-reportHTML {true | false} Generates HTML versions of CTS reports.
Note: Specifying either setting for this
parameter will override the normal reporting
behavior of the ckECO , ckSynthesis , and reportClockTree
commands.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine parameter is set to ccopt .
-reset
Resets parameters to their default values. The -
reset parameter must be the first parameter
specified. If you specify -reset by itself, the
software resets all setCTSMode parameters to their
default values. If you specify parameters after -
reset , the software resets only those parameters
to their default values.
-routeBottomPreferredLayer
Specifies the bottom preferred metal layer for
number
routing non leaf-level nets.
Default: 3
-routeClkNet {true | false}
Routes clock nets.
Note : This parameter controls the routing of
clock nets in CCOpt.
Default: true

-routeGuide {true | false} Determines whether Nanoroute uses the CTS-

generated route guide file when routing clock
nets. The route guide marks routable gcells for
the trunk portion of the net, and provides a list
of pins per clock net that should be connected
first, to maintain a balanced route topology.
For information on how to use this parameter in
combination with the RouteClkNet clock tree
specification file statement, see "Synthesizing
Clock Trees" in the EDI System User Guide .
Note : This parameter controls the calling of
Nanoroute in CCOpt.
Default : true

-routeLeafNonDefaultRule
Specifies the LEF NONDEFAULTRULE statement that
ruleName
the router should use for routing leaf-level nets.
If you specify this parameter without a rule
name, CTS removes any previously specified
leaf nondefault rules.
Default: "" (empty string)
-routeLeafMask value Specifies the mask number to apply to leaf
nets. All clock nets with the same mask number
will have the same design color.
With non-zero mask, the wires on the layers of
the corresponding nondefault rule (NDR)
defined on the clock nets will attempt having
same-mask spacing from their neighbors.
Default: 0
-routeLeafPreferredExtraSpace Specifies the extra space (in tracks) to add
spaceValue
around clock wires, when routing leaf-level
nets. This parameter matches setAttribute -
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 nets. This parameter matches setAttribute -
preferred_extra_space , which controls pitch spacing.
Both NanoRoute and Trial Route honor this
attribute.
Default : 1

-routeLeafRouteTypeOnGate {true |
false}
Assigns either RouteType or LeafRouteType for nets that
connect to both leaf pins and gating pins.
Default: true

-routeLeafShielding netName Specifies the ground net name for routing leaf-
level nets.
If you specify this parameter without a ground
net name, CTS removes any previously
specified ground nets.
Default: "" (empty string)
-routeLeafTopPreferredLayer Specifies the top preferred metal layer for
number
routing leaf-level nets.
Default: 4

-routeMask value Specifies the mask number to apply to the trunk

nets. All clock nets with the same mask number
will have the same design color.
With non-zero mask, the wires on the layers of
the corresponding nondefault rule (NDR)
defined on the clock nets will attempt having
same-mask spacing from their neighbors.
Default : 0
-routeNonDefaultRule ruleName Specifies the LEF NONDEFAULTRULE statement that
the router should use for routing non leaf-level
nets.
If you specify this parameter without a rule
name, CTS removes any previously specified
nondefault rules.
Default: "" (empty string)
-routePreferredExtraSpace
Specifies the extra space (in tracks) to add
spaceValue
around clock wires, when routing non leaf-level
nets. This parameter matches setAttribute -
preferred_extra_space , which controls pitch spacing.
Both NanoRoute and Trial route honor this
attribute.
Default : 1

-routeShielding netName Defines the ground net name for routing non
leaf-level nets.
If you specify this parameter without a ground
net name, CTS removes any previously
specified ground nets.
Default: "" (empty string)
-routeTopPreferredLayer number Specifies the top preferred metal layer for
routing non leaf-level nets.
Default: 4

-specMultiMode {true | false}

Enables the new clock tree specification file
generator, which generates a specification file
that is more timing aware. This parameter can
be used only with the clockDesign command.
When you specify the following commands
when the software is not in multi-mode multi-
corner (MMMC) analysis mode:
setCTSMode -specMultiMode true
clockDesign -genSpecOnly

The auto clock tree spec generator determines

whether certain groups of flops that form a
clock divider circuit need to be balanced
separately. Additionally, it handles case
analysis constraints, disabled timing, and loop
breaking in the SDC file. It also adds dynamic
macromodels when appropriate.
If you specify the same commands when the
software is in MMMC analysis mode, the auto
clock tree spec generator generates multiple
specification files as above, using the naming
convention fileName . modeName . It also performs
the following CTS functions on all active
analysis views, sequentially:
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 analysis views, sequentially:
Creates and loads a clock tree specification
file for each mode.
Runs clock tree synthesis.
Determines which instances of the
synthesized clock tree to preserve for
building the next clock tree.
Removes the clock tree spec file from
memory.
After the software runs clock tree synthesis on
all of the views, it runs timeDesign .
Default: false

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-synthFixDRVOnly {true | false}
Fixes DRVs (maximum transition, maximum
capacitance, and so on) without optimizing
clock latency and skew when set to true . It
reduces added clock buffers, and also the run
time.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-synthSnapGatingCell {true | false}
By default, CTS moves the gating cell to the
center of gravity of its connected flops. When
this parameter is set to true , CTS moves the
gating cell to the boundary (toward clock root)
of the bounding box of its connected flops. In
some cases this helps to reduce clock latency
significantly.
Note: When this parameter is set to true , ensure
that the clock gating cells are not marked FIXED
and the setCTSMode - moveGate parameter is set to true.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-synthSubTreeDelayThreshold
Specifies the threshold delay in nanosecond for
number
each subtree whereby during synthesis, if the
delay of a subtree exceeds the threshold
number, CTS switches to DRV fixing mode and
does not minimize skew for this subtree.
Default: 15000 ps
Note : This parameter will be ignored if the
setCTSMode -engine is set to ccopt .
-synthSubTreeLevelThreshold
Specifies the threshold level of buffer or
number
inverter logic for each subtree whereby during
synthesis, if the number of level of buffer or
inverter logic of a subtree exceeds the
threshold level, CTS switches to DRV fixing
mode and does not minimize skew for this
subtree.
Default : 70

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-synthUpsizeClockGate {true | false} When this parameter is set to true , ckSynthesis
(also clockDesign ) sizes up clock gating cells to
their maximum sizes (highest drivability).
Subsequently, the software may downsize some
gating cells in order to reduce power and area
without degrading the skew.
It is also recommended that when this
parameter is set to true , you should run ckECO -area
after CTS to further reduce the area.
Default : false

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-synthLatencyEffort {high | low}
Puts more effort during initial clock tree
construction in order to achieve a clock tree
that has less clock insertion delay. When set to
high , the maximum fanout constraint is ignored.

Default : high
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 Default : high

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-traceAsyncSRPinAsLeaf {true | false} Treats asynchronous set and reset pins as leaf
pins.
Default : false

Note : This parameter is supported in the

native CCOpt flow.
-traceBlackBoxPinAsLeafPin {true |
false}
Treats input pins of black boxes (macro blocks
that do not have timing libraries, or timing arcs
from the pins), as leaf pins.
Default : false

Note : This parameter is supported in the

native CCOpt flow.
-traceDPinAsLeaf {true | false} Treats the Data pins of flip-flops as synchronous
pins, instead of as excluded pins.
Data pins include:
Data pins
Enable pins
Scan-in pins

Scan-enable pins 1

Synchronous set and reset pins

Default : false

Note : This parameter is supported in the

native CCOpt flow.
-traceHonorConstants {true | false} Honors the following SDC constraints captured
in the memory after reading the timing
constraints file, and propagates the constants
when tracing the clock tree.
set_case_analysis

set_disable_timing

set_logic_one

set_logic_zero

1'b0 and 1'b1 in the netlist

When set to false , the software ignores the
constraints when tracing the clock tree. For
example, it traces through an AND gate, where
the non-clock input pin has a set_case_analysis 0 .
When set to true , the software stops propagating
constants at the AND gate, and marks the clock
input pin as an excluded pin.
Default: false

-traceIoPinAsLeaf {true | false}

Treats I/O pins as synchronous pins, instead of
as excluded pins.
Default : false

Note : This parameter is supported in the

native CCOpt flow.
-traceTriStateEnablePinAsLeaf {true |
false}
Treats enable pins of tristate instances as leaf
pins.
Default : false

Note : This parameter is supported in the

native CCOpt flow.
-useLefACLimit {true | false}
Considers electromigration (EM) during clock
tree synthesis.
If you specify -useLefACLimit true , CTS tries to
minimize EM violations during synthesis by
resizing or inserting buffers to enhance the
electrical current flow through the wires. If any
wire exceeds the library value, CTS reports the
violation in the standard CTS report.
In order to perform EM analysis and
optimization, your LEF file must contain an AC
Limit table. You must also specify the Period
statement in the clock tree specification file.
You can use clockDesign -genSpecOnly
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 You can use clockDesign -genSpecOnly to convert the
period value from the SDC constraints.
Default: false

-useLibMaxCap {true | false}

Uses the maximum capacitance values
specified in the timing library.
If you specify -useLibMaxCap true and there are no
PinMaxCap , MaxCap , or DefaultMaxCap statements
specified in the clock tree specification file, the
software attempts to correct maximum
capacitance violations based on the maximum
capacitance values specified in the timing
library for buffers, inverters, gating cells, and
pins.
If you specify -useLibMaxCap true and there is a
PinMaxCap , MaxCap , or DefaultMaxCap statement
specified in the clock tree specification file, the
maximum capacitance values specified in the
specification file (in the statement order listed)
override the values specified in the timing
library.
Default: false

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-useLibMaxFanout {true | false} Uses the maximum fanout constraints in the
timing library.
If you specify -useLibMaxFanout true and there is no
MaxFanout statement specified in the clock tree
specification file, the software limits the number
of clock buffer fanouts to the value specified in
the timing library.
If you specify -useLibMaxFanout true and there is a
MaxFanout statement specified in the clock tree
specification file, CTS uses the worst case
constraint specified.
CTS does not support a fanout_load that is not equal
to 1.
Note: CTS considers -useLibMaxFanout to be a soft
constraint. CTS will try to meet it, but might
need to make adjustments in order to meet
physical constraints.
Default: false

Note : This parameter will be ignored if the

setCTSMode -engine is set to ccopt .
-verbose {true | false} Controls the amount of information displayed in
the Encounter console and written to the log
files during CTS.
Default : false

Note : This parameter is supported in the

native CCOpt flow.

Examples

The following command instructs CTS add the CLOCKROOT property for
different clocks in a design during clock tree synthesis:
setCTSMode -addClockRootProp true

The following command instructs CTS to route clock nets during clock
tree synthesis:
setCTSMode -routeClkNet true

The following command resets the -routeClkNet and -powerAware parameters to

their default values:
setCTSMode -reset -routeClkNet -powerAware

The following command resets all setCTSMode parameters to their default

settings:
setCTSMode -reset

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