OPAMP APPLICATION

PART25 SCHMITT TRIGGER

AND 555 TIMER
KUNTALA DAS

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Op-amp Comparator Circuit

the op-amp voltage comparator compares the magnitudes of two voltage

inputs and determines which is the largest of the two. The Op-amp
comparator compares one analog voltage level with another analog
voltage level, or some preset reference voltage,VREF and produces an
output signal based on this voltage comparison

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When the value of the input voltage Vin is greater than the reference voltage Vref
the output voltage Vo goes to positive saturation. This is because the voltage at
the non-inverting input is greater than the voltage at the inverting input.

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 When the value of the input voltage Vin is lesser than the reference
voltage Vref, the output voltage Vo goes to negative saturation. This
is because the voltage at the non-inverting input is smaller than the
voltage at the inverting input. Thus, output voltage Vo changes from
positive saturation point to negative saturation point whenever the
difference between Vin and Vref changes. This is shown in the
waveform below. The comparator can be called a voltage level
detector, as for a fixed value of Vref, the voltage level of Vin can be
detected.
 The circuit diagram shows the diodes D1and D2. These two diodes
are used to protect the op-amp from damage due to increase in
input voltage. Thes diodes are called clamp diodes as they clamp
the differential input voltages to either 0.7V or -0.7V. Most op-amps
do not need clamp diodes as most of them already have built in
protection. Resistance R1 is connected in series with input voltage
Vin and R is connected between the inverting input and reference
voltage Vref. R1 limits the current through the clamp diodes and R
reduces the offset problem.

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Waveform

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 An inverting 741 IC op-amp comparator circuit is
shown in the figure below. It is called a inverting
comparator circuit as the sinusoidal input signal Vin is
applied to the inverting terminal. The fixed reference
voltage Vref is give to the non-inverting terminal (+)
of the op-amp. A potentiometer is used as a voltage
divider circuit to obtain the reference voltage in the
non-inverting input terminal. Bothe ends of the POT
are connected to the dc supply voltage +VCC and -
VEE. The wiper is connected to the non-inverting
input terminal. When the wiper is rotated to a value
near +VCC, Vref becomes more positive, and when
the wiper is rotated towards -VEE, the value of Vref
becomes more negative. The waveforms are shown
below.

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Waveform

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SCHMITT TRIGGER

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Schmitt trigger
 Schmitt trigger is an electronic circuit
with positive feedback which holds the
output level till the input signal to
comparator is higher than the threshold.It
converts a sinusoidal or any analog signal
to digital signal. It exhibits hysteresis by
which the output transition from high to
low and low to high will occur at different
thresholds.

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Schmitt Trigger

 in an Inverting Schmitt Trigger, the input is

applied to the inverting terminal of the
Op-Amp. In this mode, the output
produced is of opposite polarity. This
output is applied to non-inverting terminal
to ensure positive feedback.
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 Principle of operation
•When VIN is slightly greater than VREF, the output
becomes -VSAT .
• if VIN is slightly less that -VREF (more negative than -
VREF), then output becomes VSAT. Hence,
•The output voltage VO is either at VSAT or -VSAT and the
input voltage at which these state changes occur can be
controlled using R1 and R2.

 The values of VREF and -VREF can be formulated as follows:

 VREF = (VO x R2) / (R1 + R2), VO = VSAT. Hence,
 VREF = (VSAT x R2) / (R1 + R2)
 -VREF = (VO x R2) / (R1 + R2), VO = -VSAT. Hence,
 -VREF = (-VSAT x R2) / (R1 + R2)
 The reference voltage VREF and -VREF are called Upper Threshold Voltage
VUT and Lower Threshold Voltage VLT. The following image shows the
output voltage versus input voltage graph also known as the Transfer
Characteristic of Schmitt Trigger.

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Transfer Characteristic of
Schmitt Trigger.

This value of input voltage at which output makes transition from negative
saturation voltage to positive saturation voltage is called lower threshold.
This value of input voltage at which output makes transition from positive
saturation voltage to negative saturation voltage is called upper
threshold.
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Numerical problems

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Applications

 One important application of Schmitt Trigger

is to convert Sine waves into Square waves.
 They can be used to eliminate chatter in
Comparators (a phenomenon where
multiple output transitions are produced due
to swinging of input signal through the
threshold region).
 They can also act as simple ON / OFF
Controllers (for example, temperature based
switches).

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Applications
 Analog to digital conversion: The Schmitt trigger is
effectively a one bit analog to digital converter. When the
signal reaches a given level it switches from its low to high
state.
 Level detection: The Schmitt trigger circuit is able to
provide level detection. When undertaking this application, it
is necessary that the hysteresis voltage is taken into account
so that the circuit switches on the required voltage.
 Line reception: When running a data line that may have
picked up noise into a logic gate it is necessary to ensure
that a logic output level is only changed as the data changed
and not as a result of spurious noise that may have been
picked up. Using a Schmitt trigger broadly enables the peak
to peak noise to reach the level of the hysteresis before
spurious triggering may occur.

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555 TIMER

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555 TIMER

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 555 Signals and Pinout (8 pin DIP)


Pin 1 - Ground (GND) This pin is connected to

 circuit ground.
Pin 2 - Trigger (TRI)
A low voltage (less than 1/3 the supply voltage)
 applied momentarily to the Trigger input causes the output (pin 3) to go high. The
output will remain high until a high voltage is applied to the Threshold input (pin 6).
Pin 3 – Output (OUT)
In output low state the voltage will be close to 0V. In output high state the voltage will
be 1.7V lower than the supply voltage. For example, if the supply voltage is 5V output
high voltage will be 3.3 volts. The output can source or sink up to 200 mA (maximum
depends on supply voltage).

Pin 4 – Reset (RES)
A low voltage (less than 0.7V) applied to the reset pin will cause the output (pin 3) to
go low. This input should remain connected to Vcc when not used.

Pin 5 – Control voltage (CON)
You can control the threshold voltage (pin 6) through the control input (which is
internally set to 2/3 the supply voltage). You can vary it from 45% to 90% of the supply
voltage.

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555 Signals and Pinout


Pin 6 – Threshold (TRE)

In both astable and monostable mode the voltage across the timing
capacitor is monitored through the Threshold input. When the
voltage at this input rises above the threshold value the output will
go from high to low.

Pin 7 – Discharge (DIS)

when the voltage across the timing capacitor exceeds the threshold
value. The timing capacitor is discharged through this input

Pin 8 – Supply voltage (VCC)

This is is the positive supply voltage terminal. The supply voltage
range is usually between +5V and +15V. The RC timing interval will
not vary much over the supply voltage range (approximately 0.1%)
in either astable or monostable mode.

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555 timer internal structure

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Working Principle
 A 555 timer has two comparators, which are basically 2 op-
amps), an R-S flip-flop, two transistors and a resistive network.
 Resistive network consists of three equal resistors and acts as a
voltage divider.
 Comparator 1 compares threshold voltage with a reference
voltage + 2/3 VCC volts.
 Comparator 2 compares the trigger voltage with a reference
voltage + 1/3 VCC volts.
 Output of both the comparators is supplied to the flip-flop. Flip-
flop assumes its state according to the output of the two compa-
rators. One of the two transistors is a discharge transistor of
which collector is connected to pin 7.

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Working Principle
 Upper comparator has a threshold input (pin 6) and a control input
(pin 5). Output of the upper comparator is applied to reset (R) input
of the flip-flop. Whenever the threshold voltage exceeds the control
voltage, the upper comparator will reset the flip-flop and its output
Qbar is high. A high output from the flip-flop when given to the base
of the discharge transistor saturates it and thus discharges the
transistor that is connected externally to the discharge pin 7.
 To change the output of flip-flop to low, the voltage at the trigger
input must fall below + (1/3) Vcc. When this occurs, lower
comparator triggers the flip-flop, forcing its output low.
 it is concluded that for the having low output from the timer 555, the
voltage on the threshold input must exceed the control voltage or +
(2/3) VCC. This also turns the discharge transistor on. To force the
output from the timer high, the voltage on the trigger input must drop
below +(1/3) VCC. This turns the discharge transistor off.

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