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University of Engineering and Technology, Lahore Department of Electrical Engineering

This document describes experiments using a 555 timer IC to design monostable and bistable multi-vibrators. For the monostable multi-vibrator experiment, students will build a circuit to generate a pulse of duration determined by external RC components and observe the output waveform. For the bistable multi-vibrator, triggering the circuit by momentarily connecting points to ground or power will toggle the output between stable states without a timing element.

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0% found this document useful (0 votes)
59 views

University of Engineering and Technology, Lahore Department of Electrical Engineering

This document describes experiments using a 555 timer IC to design monostable and bistable multi-vibrators. For the monostable multi-vibrator experiment, students will build a circuit to generate a pulse of duration determined by external RC components and observe the output waveform. For the bistable multi-vibrator, triggering the circuit by momentarily connecting points to ground or power will toggle the output between stable states without a timing element.

Uploaded by

Muhammad Sameer
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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University of Engineering and Technology, Lahore

Department of Electrical Engineering

EE 213: Analog and Digital Electronics Circuits


Experiment 9
Objective:
To design and study the operation of multi-vibrators using 555 timer IC.

Components Required:
IC 555 timer, Resistors (1KΩ×2, 10KΩ×2, 2.7KΩ), Variable resistor (10KΩ), Capacitors
(0.01uF, 0.047uF, 0.1uF, 1uF), and Diodes IN 4148×2.

Part 2: Monostable Multi-vibrator


Monostable multivibrator often called a one shot multivibrator is a pulse generating circuit I
which duration of this pulse is determined by RC network connected externally to the 555 timer.
In a stable or standby state, the output of the circuit is approximately zero or logic low level.
when external trigger pulse is applied (see circuit diagram) output is forced to go high. The time
for which output remains high is determined by the external RC network connected to the timer.
At the end of timing interval, the output automatically reverts to its logic low stable state. The
output stays low until trigger pulse is again applied. Then the cycle repeats. The monostable
circuit has only one stable state (output low) hence the name monostable.
Initially when the circuit is in stable state i.e, when the output is low, transistor Q in IC 555 is
ON and capacitor C is shorted out to ground. Upon the application of negative trigger pulse to
pin 2, transistor Q is turned OFF, which releases the short circuit across the external capacitor
and drives the output high. The capacitor C now starts charging up towards VCC through R.
when voltage across capacitor equals 2/3 VCC, the upper comparator’s (see schematic of IC 555)
output switches from low to high, which in turn derives the output to its low state via the output
of the flip flop. At the same time the output of the flip flop turns transistor Q ON and hence the
capacitor C rapidly discharges through the transistor. The output of monostable remains low until
the trigger pulse is again applied. Then the cycle repeats. The pulse width of the trigger must be
smaller than the expected pulse width of output waveform. Also, the trigger pulse must be a
negative going input signal with amplitude larger than 1/3 VCC (why?). The pulse width can be
calculated as (How?): T= 1.1 R.C.
Once triggered, the circuit’s output will remain in the high state until the set time ‘T’ elapses.
The output will not change its state even if an input trigger is applied again during this time
interval. The circuit can be reset during the timing cycle by applying negative pulse to the reset
terminal. The output will remain in low state until a trigger is again applied. The circuit is
designed as shown in circuit diagram, the left part of which shows how to generate a negative
trigger pulse from square wave signal.

Procedure:
1. Configure the circuit as per the circuit diagram.
2. Use R1=1KΩ, RA= 2.7KΩ, RL=1KΩ, CT= 1uF, CD= 0.047uF, C=0.01uF, and Vcc=10V.
3. Compute the expected values of pulse duration.
4. Apply square wave input of frequency 1KHz at terminal N of circuit diagram.
5. Connect the output terminal (pin 3) to channel 1 of oscilloscope. Also feed the voltage
across capacitor to channel 2.
6. Power on the circuit. Determine the values of pulse duration from your simulated design
observations and compare with theoretical values.
Output waveform and Capacitor waveform.

Parameters Calculated value Observed value Error


(ms) (ms)
Pulse duration

Part 3: Bistable Multi-vibrator


In this circuits, the output is stable in both states. The states are switched using an external
trigger but unlike the monostable multi-vibrators it does not return to its original state. Another
trigger is needed for this to happen. This operation is similar to a flip flop. There are no RC
timing network and hence no design parameters. The following circuit can be used to design a
bistable multivibrator. The trigger and reset inputs (pin 2 and 4 respectively on 555) are held
high via pull-up resistor while the threshold input (pin6) is simply grounded. Thus configured,
pulling the trigger momentarily to ground acts as a ‘set’ and transitions the output pin (pin 3) to
Vcc (high state). Pulling the threshold input to Vcc acts as ‘reset’ and transitions the output pin
to ground (low state). No capacitors are required in Bistable configuration.
Procedure:
1. Configure the circuit as per the circuit diagram.
2. Use RA=RB= 10KΩ, RL=1KΩ, C1= 1uF, C2= 0.01uF, and Vcc=10V.
3. Power on your circuit.
4. Connect the point F to ground momentarily. This will set the output Q in the oscilloscope
to 1 or HIGH level. This state will be permanently stable state and the operation is called
“SET”.
5. Connect the point G to VCC momentarily. This will set the output Q in the oscilloscope
to 0 or LOW level. This is called “RESET” operation.
6. Connect the output terminal (pin 3) to channel 1 of oscilloscope. Also feed the voltage
across capacitor to channel 2.

Output waveform and Capacitor waveform.


Point Connected to Output
F Ground
G VCC

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