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OCW - Unit 3. Assembly Programming PDF

The document provides an overview of assembly programming and the MIPS32 assembly language. It discusses basic concepts of assembly programming like machine instructions, instruction execution, and the relationship between high-level languages, assembly, and machine code. It also describes the MIPS architecture, including its register bank, instruction formats, data transfer, arithmetic, logical, and other instruction types. The goal is to understand how high-level languages are executed at the assembly and machine code levels.

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OCW - Unit 3. Assembly Programming PDF

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Computer Structure

Unit 3. Assembly programming

Departamento de Informática
Grupo de Arquitectura de Computadores, Comunicaciones y Sistemas
UNIVERSIDAD CARLOS III DE MADRID

Félix García Carballeira, Alejandro Calderón Mateos, José Daniel García Sánchez
Contents

Basic concepts on assembly programming

MIPS32 assembly language
Instruction formats and addressing modes
Procedure calls and subroutines

ARCOS Computer Structure 2

Motivation
Understand how high level
languages are executed
C, C++, Java, …
Analyze the execution time of
high level instructions.
Useful in specific domains:
Compilers
Operating Systems
Games
Embedded systems
Etc.

ARCOS Computer Structure 3

Motivation to use MIPS32

Easy architecture.
Easy to learn

Assembly similar to other

RISC processors

Very used in many devices

4
ARCOS Computer Structure 4
What is a computer?

Data results
Processor

Instructions

ARCOS Computer Structure 5

Machine instruction

001 AB 00000000101

Operation code

Registers
Operands Memory address
Numbers

ARCOS Computer Structure 6

Steps to execute an instruction

Fetch PC 000100

MAR PC IR
Read
MBR Memory
PC PC + 1 MAR MBR
RI MBR

Decoding Address Content

000100 0010000000000000
Execution

Jump to fetch

Memory

ARCOS Computer Structure 7

Machine instructions properties

Do a single and easy task

Use a fixed number of operands
Auto-contents, include all information neededd for the
execution:
An instruction includes:
Operation to do
Location of operands:
Registers
Memory
Instruction
Location to store the results
A reference to the next instruction
Implicit way: next instruction
Explicit way: branch instructions

ARCOS Computer Structure 8

Program

Ordered sequence of machine instructions

temp = v[k];
00001001110001101010111101011000
10101111010110000000100111000110 v[k] = v[k+1];
11000110101011110101100000001001
v[k+1] = temp;
01011000000010011100011010101111

ARCOS Computer Structure 9

Languages levels

temp = v[k];
High level language v[k] = v[k+1];
(ej: C, C++) v[k+1] = temp;
compiler
lw $t0, 0($2)
Assembly language lw $t1, 4($2)
sw $t1, 0($2)
(Ej: MIPS) sw $t0, 4($2)
assembler
Machine language 0000 1001 1100 0110 1010 1111 0101 1000
1010 1111 0101 1000 0000 1001 1100 0110
(MIPS) 1100 0110 1010 1111 0101 1000 0000 1001
0101 1000 0000 1001 1100 0110 1010 1111

ARCOS Computer Structure 10

Assembly language

Uses symbolic codes to represent instructions

add – addition
lw – Load a memory data
Uses symbolic codes for data and references
$t0 – register
There is an assembly instruction per machine instruction
add $t1, $t2, $t3

ARCOS Computer Structure 11

Programming model of a computer

A computer provides a programming model:

Instruction set (assembly language)
An instruction includes:
Operation code
Other elements: registers, memory address, numbers
Storing elements
Registers
Memory
Registers of I/O controllers
Execution modes

ARCOS Computer Structure 12

MIPS architecture

MIPS R2000/R3000
32 bits processor
RISC
CPU +
auxiliary coprocessors

Coprocessor 0
exceptions, interrupts and
virtual memory system

Coprocessor 1
FPU (floatingg point unit)

ARCOS Computer Structure 13

Symbolic Number Use

name 32 registers
zero 0 Constant 0 Size: 1 word (4
at 1 Reserved for assembler bytes)
v0, v1 2, 3 Results of functions Use $ at the
a0, …, a3 4, …, 7 Function arguments beginning
t0, …, t7 8, …, 15 Temporary (NO preserved across calls)
s0, …, s7 16, …, 23 Saved temporary (preserved across calls)
t8, t9 24, 25 Temporary (NO preserved across calls)
k0, k1 26, 27 Reserved for operating system
gp 28 Pointer to global area
sp 29 Stack pointer
fp 30 Frame pointer
ra 31 Return address (used by function calls)

ARCOS Computer Structure 14

Types of instructions

Transfer instruction
Arithmetic
Logical instructions
Shifting
Rotation
Comparison
Branches

ARCOS Computer Structure 15

Data transfer

Store a value in a register. Immediate load

li $t0 5 $t0 5

Memory access instructions (later)

ARCOS Computer Structure 16

Arithmetic instructions

Integer operations (ALU) or floating point operations (FPU)

Examples with integers
Addition
add $t0, $t1, $t2 $t0 $t1 + $t2 Addition with overflow
addi $t0, $t1, 5 $t0 $t1 + 5 Addition with overflow
addu $t0, $t1, $t2 $t0 $t1 + $t2 Addition without overflow
Subtraction
sub $t0 $t1 1
Multiplication
mul $t0 $t1 $t2
Division
div $t0, $t1, $t2 $t0 $t1 / $t2 Integer division
rem $t0, $t1, $t2 $t0 $t1 % $t2 remainder

ARCOS Computer Structure 17

Example

int a = 5; li $t0, 5
int b = 7; li $t1, 7
int c = 8; li $t2, 8
int d;

d = a * (b + c) add $t1, $t1, $t2

mul $t3, $t1, $t0

ARCOS Computer Structure 18

Example

int a = 5; li $t0, 5
int b = 7; li $t1, 7
int c = 8; li $t2, 8
int d; li $t3 10

d=-(a*(b-10)+c)
sub $t4, $t1, $t3
mul $t4, $t4, $t0
add $t4, $t4, $t2
li $t5, -1
mul $t4, $t4, $t5

ARCOS Computer Structure 19

Logical instructions

Boolean operations
Examples:
AND
1100
and $t0 $t1 $t2 ($t0 = $t1 & $t2)
1010
AND
OR 1000

or $t0 $t1 $t2 ($t0 = $t1 | $t2) 1100

ori $t0 $t1 80 ($t0 = $t1 | 80) 1010
OR
1110

NOT NOT 10
not $t0 $t1 ($t0 = ! $t1) 01

XOR 1100
1010
or $t0 $t1 $t2 ($t0 = $t1 ^ $t2) XOR
0110

ARCOS Computer Structure 20

Example

li $t0, 5
li $t1, 8
What is the value of $t2?
and $t2, $t1, $t0

ARCOS Computer Structure 21

Solution

li $t0, 5
li $t1, 8
What is the value of $t2?
and $t2, $t1, $t0
000 …. 0101 $t0
000 ….. 1000 $t1
and 000 ….. 0000 $t2

ARCOS Computer Structure 22

Shift instructions

Bits movement
Examples:
Shift right logical 0
srl $t0 $t0 4 ($t0 = $t0 >> 4 bits) 01110110101

Shift left logical 0

sll $t0 $t0 5 ($t0 = $t0 << 5 bits) 01110110101

Shift right arithmetic

sra $t0 $t0 2 ($t0 = $t0 >> 2 bits) 11110110101

ARCOS Computer Structure 23

Example

li $t0, 5
li $t1, 6
What is the value of $t0?
sra $t0, $t1, 1

ARCOS Computer Structure 24

Example

li $t0, 5
li $t1, 6
Waht is the value of $t0?
sra $t0, $t1, 1
000 …. 0110 $t1
shift one bit to right
000 ….. 0011 $t0

ARCOS Computer Structure 25

Example

li $t0, 5
li $t1, 6
What is the value of $t0?
sra $t0, $t1, 1

ARCOS Computer Structure 26

Example

li $t0, 5
li $t1, 6
What is the value of $t0?
sra $t0, $t1, 1
000 …. 0110 $t1
Shit one bit to left
000 ….. 1100 $t0

ARCOS Computer Structure 27

Rotations

Bits movement
Example:
Rotate left
rol $t0 $t0 4 rotate 4 bits
01110110101

Rotate right
ror $t0 $t0 5 rotate 5 bits
01110110101

ARCOS Computer Structure 28

Comparison instructions

seq $t0, $t1, $t2 if ($t1 == $t2) $t0 = 1; else $t0 = 0

sneq $t0, $t1, $t2 if ($t1 !=$t2) $t0 = 1; else $t0 = 0
sge $t0, $t1, $t2 if ($t1 >= $t2) $t0 = 1; else $t0 = 0
sgt $t0, $t1, $t2 if ($t1 > $t2) $t0 = 1; else $t0 = 0
sle $t0, $t1, $t2 if ($t1 <= $t2) $t0 = 1; else $t0 = 0
slt $t0, $t1, $t2 if ($t1 < $t2) $t0 = 1; else $t0 = 0

ARCOS Computer Structure 29

Comparison instructions

seq $t0, $t1, $t2 Set if equal

sneq $t0, $t1, $t2 Set if no equal
sge $t0, $t1, $t2 Set if greater or equal
sgt $t0, $t1, $t2 Set if greater than
sle $t0, $t1, $t2 Set if less or equal
slt $t0, $t1, $t2 Set if less than

ARCOS Computer Structure 30

Branch instructions

Alter the flow of control and the sequence of

instructions
Types:
Conditional branches:
beq $t0 $t1 0xE00012
Branch to address 0xE00012, if $t0 == $t1
beqz $t1 address
Branch to instruction labeled with address if $t1 == 0
Unconditional branches:
Always branch
j 0x10002E
b address
Function calls:
jal 0x20001E …… jr $ra

ARCOS Computer Structure 31

Branch instructions

beqz $t0, address Branch if $t0 == 0

beq $t0, $t1, address Branch if equal (t0 == t1)
bneq $t0, $t1, address Branch if not equal (t0 ≠ t1)
bge $t0, $t1, address Branch if greater or equal (t0 ≥ t1)
bgt $t0, $t1, address Branch if greater than (t0 > t1)
ble $t0, $t1, address Branch if less or equal (t0 ≤ t1)
blt $t0, $t1, address Branch if less than (t0 <t1)

ARCOS Computer Structure 32

Control flow structures
while

int i;
li $t0 0
li $t1 10
i=0; while: bge $t0 t1 end
while (i < 10)
# action
{
/* action*/ addi $t0 $t0 1
i = i + 1 ; b while
} end: ...
}

ARCOS Computer Structure 33

Example

Calculate 1 + 2 + 3 + …. + 10

i=0;
s=0;
while (i < 10)
{
s = s + i;
i = i + 1;
}
}

Result in $t1

ARCOS Computer Structure 34

Solution

Calculate 1 + 2 + 3 + …. + 10

i=0;
li $t0 0
s=0;
li $t1 0
while (i < 10)
li $t2 10
{
while: bge $t0 t2 end
s = s + i;
add $t1 $t1 $t0
i = i + 1;
addi $t0 $t0 1
}
b while
}
end: ...

Result in $t1

ARCOS Computer Structure 35

Example

Calculate the number of 1’s of a register ($t0). Result in $t3.

i = 0;
n = 45; #number
s=0;
while (i < 32)
{
b = last bit of n
s = s + b;
sift n one bit to
right
i = i + 1 ;
}
}
ARCOS Computer Structure 36
Solution

Calculate the number of 1’s of a register ($t0). Result in $t3

i = 0;
li $t0 0 #i
n = 45; #number
li $t1 45 #n
s=0;
li $t2 32
while (i < 32)
li $t3 0 #s
{
while: bge $t0 t2 end
b = last bit of n
and $t4 $t1 1
s = s + b;
add $t3 $t3 $t4
sift n one bit to
srl $t1 $t1 1
right
addi $t0 $t0 1
i = i + 1 ;
b while
}
end: ...
}
ARCOS Computer Structure 37
Example

Obtain the 16 first bits of a register ($t0) and store them in the
16 last bits of other register ($t1)

ARCOS Computer Structure 38

Solution

Obtain the 16 first bits of a register ($t0) and store them in the
16 last bits of other register ($t1)

srl $t1, $t0, 16

0
01110110101 Shift 16 bits to right

ARCOS Computer Structure 39

Control flow structures
if

int b1 = 4;
int b2 = 2; li $t0 4
li $t1 2
li $t2 8
if (b2 == 8) {
b1 = 0;
} bneq $t0 $t2 end
... li $t0 0
end: ...

ARCOS Computer Structure 40

Control flow structures
if-else

int a=1; li $t1 1

int b=2; li $t2 2

if (a < b) blt $t1 $t2 then # cond.

{ else: ...
// action 1
# action 2
}
b end # uncond.
else
{
// action 2 then: ...
} # action 1

end: ...

ARCOS Computer Structure 41

Example

Determine if the number stored in $t2 is even. If $t2 is even

the program stores 1 in $t1, else stores 0 in $t1

ARCOS Computer Structure 42

Solution

Determine if the number stored in $t2 is even. If $t2 is even

the program stores 1 in $t1, else stores 0 in $t1

li $t2 9
li $t1 2
rem $t1 $t2 $t1 # remainder
beq $t1 $0 then # cond.
else: li $t1 0
b end # uncond.
then: li $t1 1
end: ...

ARCOS Computer Structure 43

Example

Determine if the number stored in $t2 is even. If $t2 is even

the program stores 1 in $t1, else stores 0 in $t1. In this case,
analyze the last bit

ARCOS Computer Structure 44

Solution

Determine if the number stored in $t2 is even. If $t2 is even

the program stores 1 in $t1, else stores 0 in $t1. In this case,
analyze the last bit
li $t2 9
li $t1 1
and $t1 $t2 $t1 # get the last bit
beq $t1 $0 then # cond.
else: li $t1 0
b end # uncond.
then: li $t1 1
end: ...

ARCOS Computer Structure 45

Example
Calculate an
a in $t0
n in $t1
Result in $t2

a=8
n=4;
i=0;
p = 1;
while (i < n)
{
p = p * a
i = i + 1 ;
}
}

ARCOS Computer Structure 46

Solution
Calculate an
a in $t0
n in $t1
Result in $t2

a=8 li $t0 8
n=4; li $t1 4
i=0; li $t2 1
p = 1; li $t4 0
while (i < n)
{ while: bge $t4 $t1 end
p = p * a mul $t2 $t2 $t0
i = i + 1 ; addi $t4 $t4 1
} b while
} end: move $t2 $t4

ARCOS Computer Structure 47

Contents

Basic concepts on assembly programming

MIPS32 assembly language
Instructions formats and addressing modes
Procedure calls and subroutines

ARCOS Computer Structure 48

SPIM simulator

http://pages.cs.wisc.edu/~larus/spim.html
SPIM is a simulator of the
MIPS architecture
Multiplatform:
Linux
Windows
MacOS

ARCOS Computer Structure 49

SPIM simulator (other version)

http://sourceforge.net/projects/spimsimulator/files/

SPIM is a simulator of the

MIPS architecture
Multiplatform:
Linux
Windows
MacOS

ARCOS Computer Structure 50

Exercise

Install the SPIM simulator

http://pages.cs.wisc.edu/~larus/spim.html
http://sourceforge.net/projects/spimsimulator/files/

Use the simulator with small assembly programs

ARCOS Computer Structure 51

MIPS Architecture

ARCOS Computer Structure 52

0 32 registers 16
1 4 bytes of size (one 17
2 18
word )
3 19
Use $
4 20
5 21
6 22
7 23
8 24
9 25
10 26
11 27
12 28
13 29
14 30
15 31

ARCOS Computer Structure 53

0 $zero 16
1 17
2 18
3 19
4 20
5 Constant zero 21
6 Cannot be changed 22
7 23
8 24
9 25
10 26
11 27
12 28
13 29
14 30
15 31

ARCOS Computer Structure 54

0 $zero 16
1 17
2 Temprorary registers 18
3 19
4 20
5 21
6 22
7 23
8 $t0 $t8 24
9 $t1 $t9 25
10 $t2 26
11 $t3 27
12 $t4 28
13 $t5 29
14 $t6 30
15 $t7 31

ARCOS Computer Structure 55

0 $zero $s0 16
1 $s1 17
2 Preserved values $s2 18
3 $s3 19
4 $s4 20
5 $s5 21
6 $s6 22
7 $s7 23
8 $t0 $t8 24
9 $t1 $t9 25
10 $t2 26
11 $t3 27
12 $t4 28
13 $t5 29
14 $t6 30
15 $t7 31

ARCOS Computer Structure 56

0 $zero $s0 16
1 $s1 17
2 $v0 $s2 18
3 $v1 $s3 19
4 $a0 $s4 20
5 $a1 $s5 21
6 $a2 $s6 22
7 $a3 $s7 23
8 $t0 $t8 24
9 $t1 $t9 25
10 $t2 26
11 $t3 27
12 $t4 Arguments and 28
13 $t5 subroutines $sp 29
14 $t6 $fp 30
15 $t7 $ra 31

ARCOS Computer Structure 57

0 $zero $s0 16
1 $at $s1 17
2 $v0 $s2 18
3 $v1 $s3 19
4 $a0 $s4 20
5 $a1 $s5 21
6 $a2 $s6 22
7 $a3 $s7 23
8 $t0 $t8 24
9 $t1 $t9 25
10 $t2 $k0 26
11 $t3 $k1 27
12 $t4 Others $gp 28
13 $t5 $sp 29
14 $t6 $fp 30
15 $t7 $ra 31

ARCOS Computer Structure 58

Memory layout

4GB of memory

A part for the processes

Other part reserved for a

mini operating system.
First 4 MB

ARCOS Computer Structure 59

Memory layout for a program

ARCOS Computer Structure 60

Memory layout for a program

A user program is divided in

$fp
segments:
01011001 Stack segment
Local variables
$sp Function contexts
Stack segment
01011001 Data segments
Static data
Code segment (text)
$gp Program code
01011001

Data segment
pc
Text segment 01011001

ARCOS Computer Structure 61

Program structure

Assembly directives
Data section
.data
# Global static definitions

.text
# instructions
Code section

ARCOS Computer Structure 62

SPIM simulator
Register
bank
$0, $1, $2, …
$f0, $f1, …

Code
segment

Data
segment

Stack
segment

Others

ARCOS Computer Structure 63

SPIM simulator
Register
bank
$0, $1, $2, …
$f0, $f1, …

Code
segment

Data
segent

Stack
segment

ARCOS Computer Structure 64

Example: Hello world…

Hello.s
.data
msg_hola: .asciiz "Hello world\n"

.text
.globl main
main:
# printf(" Hello world\n") ;
li $v0 4
la $a0 msg_hola
syscall

ARCOS Computer Structure 65

Example: Hello world…

# coments

Instruction/pseudoinstructino
label: operands

.directive
Hello.s
.data
msg_hola: .asciiz "Hello world\n"

.text
.globl main
main:
# printf(" Hello world\n") ;
li $v0 4
la $a0 msg_hola
syscall

ARCOS Computer Structure 66

Example: Hello world…

Hello.s
.data
msg_hola: .asciiz "Hello world\n"

.text
.globl main
main:
# printf("Hello world\n") ;
li $v0 4 #system call code
la $a0 msg_hola
syscall

ARCOS Computer Structure 67

Directives

Directives Description
.data Data segment definition
.text Code segment definition
.ascii “string” String definition without NULL terminator
.asciiz “string” String definition with NULL terminator
.byte 1, 2, 3 Definition of bytes in memory
.half 300, 301, 302 Definition of half-words
.word 800000, 800001 Definition of words
.float 1.23, 2.13 Definition of float values
.double 3.0e21 Definition of double values
.space 10 Reserve 10 bytes
.extern label n Label is global and extern of size n
.globl label Label is global
.align n Align next data to 2^n

ARCOS Computer Structure 68

Static data definition

ARCOS Computer Structure 69

System calls

The SPIM simulator provides a small operating system with

17 services

How to invoke:
Call code in $v0.
Arguments in registers.
Execute syscall instruction

ARCOS Computer Structure 70

System calls

Service Call code Arguments Result

($v0)
print_int 1 $a0 = integer
print_float 2 $f12 = float
print_double 3 $f12 = double
print_string 4 $a0 = string
read_int 5 integer in $v0
read_float 6 float in $f0
read_double 7 double in $f0
read_string 8 $a0=buffer, $a1=length
sbrk 9 $a0=amount Address in $v0
exit 10

ARCOS Computer Structure 71

System calls

Service Call code Arguments Result

($v0)
print_char 11 $a0 (ASCII code)
read_char 12 $v0 (ASCII code)
open 13 Equivalent to $v0 = open($a0, $a1, $a2)
read 14 Equivalent to $v0 = read ($a0, $a1, $a2)
write 15 Equivalent to $v0 = write($a0, $a1, $a2)
close 16 Equivalent to $v0 = close($a0)

exit2 17 Finish the program. Return code in $a0

ARCOS Computer Structure 72

Example

ARCOS Computer Structure 73

Memory model.
Byte addressing
Byte addressing refers to hardware architectures which support
accessing individual bytes of data rather than only larger units
called words (most of computers)
A computer with addresses of n bits can address 2n bytes
A 32-bit computer (MIPS32) can address 232 bytes of
memory = 4 GB
MIPS includes instructions to access:
Individual bytes
Words (4 consecutive bytes )

ARCOS Computer Structure 74

Memory model.
Byte addressing
Byte Byte
addresses (content)
0
1
2
3 Address: 6 (000110)
4
5 Content: 00001101 (9)
6 00001101

2n-1

ARCOS Computer Structure 75

Address space
Byte addressing
Byte Byte
addresses (content)

Address: 0x0F000002
0x0F000000
0x0F000001 Content: 00001101 (9)
0x0F000002 00001101
0x0F000003

ARCOS Computer Structure 76

Address space

ARCOS Computer Structure 81

Address space and byte addressing
lb $t1, 0x6
Byte Byte
addresses (content)
0
1
2
3 address : 6 (000110)
4
5 content: 11111101 (-3 in two’s complement)
6 11111101

$t1
31 24 23 16 15 87 0

2n-1

ARCOS Computer Structure 82

Address space and byte addressing
lb $t1, 0x6
Byte Byte
addresses (content)
0
1
2
3 Address: 6 (000110)
4
5 Content: 11111101 (-3 in two’s complement)
6 11111101

$t1 11111111 11111111 11111111 11111101

31 24 23 16 15 87 0

ARCOS Computer Structure 86

Address space and byte addressing
lbu $t1, 0x6
Byte Byte
addresses (content)
0
1
2
3 Address: 6 (000110)
4
5 Content: 11111101 (-3 in two’s complement)
6 11111101

$t1 00000000 00000000 0000000 11111101

ARCOS Computer Structure 92

Storing words in memory

Byte Byte
addresses (content) A word: four bytes

0
1
2 Word stored in byte 0
3
4
5
6 Word stored in byte 4
7
8

2n-1

ARCOS Computer Structure 93

Storing words in memory

Byte Byte
addresses (content)
0
1
2
3
4
5
? byte0
32-bit word
byte1 byte2 byte3
6 31 24 23 16 15 87 0
7 + significant - significant
8

2n-1

ARCOS Computer Structure 94

Storing words in memory

32-bit word
byte0 byte1 byte2 byte3
31 24 23 16 15 87 0
+ significant - significant

A byte0 A byte3
A+1 byte1 A+1 byte2
A+2 byte2 A+2 byte1
A+3 byte3 A+3 byte0

BigEndian LittleEndian

The number 27(10 = 11011(2 = 000000000000000000000000000011011

A 00000000 A 00011011
A+1 00000000 A+1 00000000
A+2 00000000 A+2 00000000
A+3 00011011 A+3 00000000

BigEndian LittleEndian

ARCOS Computer Structure 95

Communication problems in computers
with different architectures
The number 27(10 = 11011(2 = 000000000000000000000000000011011

A 00000000 A
A+1 00000000 A+1
A+2 00000000 A+2
A+3 00011011 A+3

BigEndian LittleEndian

ARCOS Computer Structure 96

Communication problems in computers
with different architectures
The number 27(10 = 11011(2 = 000000000000000000000000000011011

A 00000000 A
A+1 00000000 A+1
A+2 00000000 A+2
A+3 00011011 A+3
Network transfer
BigEndian LittleEndian

ARCOS Computer Structure 97

Communication problems in computers
with different architectures
The number 27(10 = 11011(2 = 000000000000000000000000000011011

A 00000000 A 00000000
A+1 00000000 A+1 00000000
A+2 00000000 A+2 00000000
A+3 00011011 A+3 00011011
Network transfer
BigEndian LittleEndian

ARCOS Computer Structure 98

Communication problems in computer
with different architectures
The number 27(10 = 11011(2 = 000000000000000000000000000011011

A 00000000 A 00000000
A+1 00000000 A+1 00000000
A+2 00000000 A+2 00000000
A+3 00011011 A+3 00011011

BigEndian LittleEndian

The number stored is : 000110110000000000000000000000000

Not 27

ARCOS Computer Structure 99

Space address and word addressing

Logical lw $t1, 0x4

Byte
0
1
2
3 Address: 4 (000110)
4 00000000
5 00000000
Content : 00000000000000000000000100001101(2 = 269(10
6 00000001 BigEndian
7 00001101

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 100

Address space and physical word
addressing
Logical lw $t1, 0x4 Physical
Byte 32-bit word
0 0
1 1 00000000 00000000 00000001 00001101
2 2
3 3
4 00000000 4 byte 0 byte 1 byte 2 byte 3
5 00000000
6 00000001
7 00001101

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 101

Address space and physical word
addressing
Logical lw $t1, 0x4 Physical
Byte 32-bit word
0 0
1 1 00000000 00000000 00000001 00001101
2 2
0x4 3 3
4 00000000 byte 0 byte 1 byte 2 byte 3
5 00000000
6 00000001
7 00001101

Acces to the word in address:

0x4 = 00000…….000100

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 102

Transfer the word 1

00000000 00000000 00000001 00001101

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 103

Address space and physical word
addressing
Logical lw $t1, 0x4 Physical
Byte 32-bit word
0 0
1 1 00000000 00000000 00000001 00001101
2 2
3 3
4 00000000 byte 0 byte 1 byte 2 byte 3
5 00000000
6 00000001
7 00001101

00000000 00000000 00000001 00001101

Copy the word

$t1 00000000 00000000 00000001 00001101

31 24 23 16 15 87 0

ARCOS Computer Structure 104

Differences among lw, lb, lbu, la

Byte Byte lw $t1, 0x0F000000

addresses (content)

0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

ARCOS Computer Structure 105

Differences among lw, lb, lbu, la

Byte Byte lw $t1, 0x0F000000

addresses (content)

0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

Copy the content of the word

0xCB 0x12 0x08 0x02

$t1 11001011 00010010 00001000 00000010

31 24 23 16 15 87 0

ARCOS Computer Structure 106

Differences among lw, lb, lbu, la

Byte Byte lbu $t1, 0x0F000002

addresses (content)

0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

Copy the content

0x08
$t1 00000000 00000000 00000000 00001000
31 24 23 16 15 87 0

ARCOS Computer Structure 107

Differences among lw, lb, lbu, la

Byte Byte la $t1, 0x0F000000

addresses (content)

Copy the address, not

the content
0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

0x0F 0x00 0x00 0x00

$t1 00001111 00000000 00000000 00000000

31 24 23 16 15 87 0

ARCOS Computer Structure 108

Example

Byte Byte
addresses (content) li $t1, 18
li $t2, 24

0x0F000000
0x0F000001
0x0F000002
0x0F000003
0x0F000004
0x0F000005
0x0F000006
0x0F000007

ARCOS Computer Structure 109

Data alignment

Address
31 23 15 7 0
0 This word is aligned.
4
8
12
16
20
24

ARCOS Computer Structure 116

Data alignment

A datum of K bytes of size is aligned when the address D used

for this datum:
D mod K = 0
Data alignment implies:
Data of 2 bytes are stored in even addresses
Data of 4 bytes are stored in addresses multiple of 4
Data of 8 bytes (double) are stored in addresses multiple of 8

ARCOS Computer Structure 117

Data alignment

Many computers does not allow the access to not aligned data:
Goal: reduce the number of memory accesses
Compilers assign addresses aligned to variables
Intel architectures allow the access to not aligned data
We need several memory accesses

32-bit word
0
1 00000000 00000000 00001110
2 00001101
3
4 byte 0 byte 1 byte 2 byte 3

ARCOS Computer Structure 118

Summary

The instructions and data of a program must be loaded in

memory for the execution
All data and instructions have a memory address
In a 32-bit computer (as MIPS32)
Registers have 32 bits
Memory can store bytes (8 bits)
Instructions: memory → register: lb, lbu, sb
Instructions: register → memory: sb
Memory can store words (32 bits)
Instructions: memory → register : lw
Instructions: register → memory : sw

ARCOS Computer Structure 119

Instructions and pseudo-instructions

There is an assembly instruction per machine instruction:

32 bits
addi $t1, $t1, 2
A pseudo-instruction is equivalent to several machine
instructions:
li $t1, 0x00800010
Need more than 32 bits, but can be used as an pseudo-
instruction .
Is translated to:
lui $t1, 0x0080
ori $t1, $t1, 0x0010

ARCOS Computer Structure 120

Instructions and pseudo-instructions

The pseudo-instruction move

move reg2,reg1

Is translated to:
add reg2,$zero,reg1

ARCOS Computer Structure 121

Format of the memory access instructions

lw
sw
lb Register, memory address
sb
lbu Number that represent sthe address
Symbolic label that represents the
adress
(register): address stored in a
register
num(register): represent sthe
address that is obtained adding
num and the address stored in the
register

ARCOS Computer Structure 122

Other uses of the instructions la, lw, lb

Byte Byte
addresses (content)

0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

$t0
31 24 23 16 15 87 0

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 123

Other uses of the instructions la, lw, lb

Byte Byte
addresses (content) la $t0, 0x0F000002

0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

$t0
31 24 23 16 15 87 0

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 124

Other uses of the instructions la, lw, lb

Byte Byte
addresses (content) la $t0, 0x0F000002

Copy the address, not

0x0F000000 0xCB
0x0F000001 0x12 the content
0x0F000002 0x08
0x0F000003 0x02

$t0 00001111 00000000 00000000 00000010

31 24 23 16 15 87 0

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 125

Other uses of the instructions la, lw, lb

Byte Byte
addresses (content) lbu $t0, ($t1)

0x0F000000 0xCB
0x0F000001 0x12
0x0F000002 0x08
0x0F000003 0x02

$t0 00001111 00000000 00000000 00000010

31 24 23 16 15 87 0

$t1
31 24 23 16 15 87 0

ARCOS Computer Structure 126

Other uses of the instructions la, lw, lb

Byte Byte
addresses (content) lbu $t0, ($t1)

Copy the byte stored in the memory stored in register

0x0F000000 0xCB
0x0F000001 0x12 $t1
0x0F000002 0x08
0x0F000003 0x02

$t0 00001111 00000000 00000000 00000010

31 24 23 16 15 87 0

$t1 00000000 00000000 00000000 00001000

31 24 23 16 15 87 0

ARCOS Computer Structure 127

Other uses of the instructions la, lw, lb

Byte Byte
addresses (content) lw $t0, ($t1)

Copy the word stored in memory address stored in

0x0F000000 0xCB
0x0F000001 0x12 register $t1
0x0F000002 0x08
0x0F000003 0x02

$t0 00001111 00000000 00000000 00000000

31 24 23 16 15 87 0

$t1 11001011 00010010 00001000 00000010

31 24 23 16 15 87 0

ARCOS Computer Structure 128

Other uses of the instructions la, lw, lb

lbu $t0, 0x0F000002

Absolute/direct. Load in $t0 the byte stored in
0x0F000002
lbu $t0, ($t1)
Register indirect. Load in $t0 the byte stored in the memory
address stored in register $t1
lbu $t0, 80($t1)
Relative. Load in $t0 the byte stored in the memory address
that is obtained adding the content of $t1 to 80

ARCOS Computer Structure 129

Instructions to write in memory

sw $t0, 0x0F000000
Copy the word stored in $t0 in the address 0x0F000000
sb $t0, 0x0F000000
Copy the byte stored in $t0 in the address 0x0F000000

ARCOS Computer Structure 130

Basic data types
Integers
.data
result: .word 0
int result; op1: .word 100
int op1 = 100 ; op2: .word -10
int op2 = -10 ; ...
...
.text
.globl main

main () main: lw $t1 op1

lw $t2 op2
{
add $t3 $t1 $t2
result= op1 + op2 ;
la $t4 result
...
sw $t3 ($t4)
}
...

ARCOS Computer Structure 131

Exercise

Write an assembly fragment similar to

int b;
int a = 100 ;
int c = 5 ;
int d;
main ()
{
d = 80;
b = -(a+b*c+a);
}

Assuming that a, b, c and d are variables stored in memory

ARCOS Computer Structure 132

Basic data types
Arrays
Collection of data items stored
consecutively in memory
The address of j element is: Init address v[0]
Init_address + j * p v[1]
v[2]

Where p is the size of each item

v[N-1]

ARCOS Computer Structure 133

Basic data types
Arrays
.data
.align 2 #next item aligen to 4

int vec[5] ; vec: .space 20 #5 elem.*4 bytes

...

main () .text
{ .globl main
vec[4] = 8;
main: la $t1 vec
} li $t2 8
sw $t2 16($t1)
...

ARCOS Computer Structure 134

Basic data types
Arrays
.data
.align 2 #next item align to 4

int vec[5] ; vec: .space 20 #5 elem.*4 bytes

...

main () .text
{ .globl main
vec[4] = 8;
main: li $t0 16
} la $t1 vec
add $t3, $t1, $t0
li $t2 8
sw $t2, ($t3)
...

ARCOS Computer Structure 135

Basic data types
Arrays
.data
.align 2 #next item align to 4 vec:
.space 20 #5 elem.*4 bytes
int vec[5] ;
...
.text
main ()
{ .globl main
vec[4] = 8; main:
}
li $t2 8
li $t1 16
sw $t2 vec($t1)
...

ARCOS Computer Structure 136

Exercise

Let V an array on integer elements

V represents the init address

What is the address of V[5]?

Which are the instructions to load in register $t0 the value of
v[5]?

ARCOS Computer Structure 137

Basic data types
Matrix
A matrix m x n consists of m arrays of
length n
1º array
Usually stored by rows
The element aij is stored in address:
init_address + (i · n + j) × p 2º array

where p is the size of each item

ARCOS Computer Structure 138

Basic data types
Matrix
.data
.align 2 #next item align to 4

int vec[5] ; vec: .space 20 #5 elem.*4 bytes

int mat[2][3] = {{11,12,13}, mat: .word 11, 12, 13
{21,22,23}};
... .word 21, 22, 23
...
main ()
{
m[0][1] = m[0][0] + .text
m[1][0] ; .globl main
...
} main: lw $t1 mat+0
lw $t2 mat+12
add $t3 $t1 $t2
sw $t3 mat+4
...

ARCOS Computer Structure 139

Basic data types
String
.data
Array of bytes c1: .space 1 # 1 byte
The end of the string is c2: .byte ‘h’
ac1: .asciiz “hola”
indicated with 0
...

char c1 ; .text
char c2=‘h’ ; .globl main
char *ac1 = “hola” ;
... main: li $v0 4
la $a0 ac1
syscall
main ()
...
{
printf(“%s”,ac1) ;
...
}

ARCOS Computer Structure 140

ARCOS Computer Structure 145

Floating-point instructions

Floating-point register bank (32 registers)

$f0, $f1, .. $31
For single precision: $f0, .. $f31
For float variables
For double precision (64 bits) pairs of registers: $f0, $f2, $f4,
….
Double variables
FPU
$f1 $f0
$f3 $f2
… … B.R.
$f31 $f30

ALU

BUS

ARCOS Computer Structure 146

Floating-point instructions

Single precision addition (add.s) and double (add.d)

Single precision subtraction (sub.s) and double (add.d)
Single precision multiplication (mul.s) and double (mul.d)
Single precision division (div.s) and double (div.d)
Single precision comparison (c.x.s) and duoble (c.x.d)
x can be: eq, neq, lt, le, gt, ge
Conditional branch in floating point
True (bclt) or false (bclf)

ARCOS Computer Structure 147

Floating-point operations

IEEE 754 floating-point operations on FPU

Examples: FPU
Addition in single precision $f1 $f0

add.s $f0 $f1 $f4 $f3

…
$f2
… B.R.
$f31 $f30

f0 = f1 + f4
ALU
Addition in double precision
add.d $f0 $f2 $f4 BUS

(f0,f1) = (f2,f3) + (f4,f5)

Other operations in single precision:
add.s, sub.s, mul.s, div.s, abs.s
Operation in double precision:
add.d, sub.d, mul.d, div.d, abs.d

ARCOS Computer Structure 148

Floating-point operations

Transfer across memory and floating-point registers

lwc1 $f0, address:
Load in $f0 a float value
swc1 $f0, address:
Store the float value loaded in $f0 in memory
l.s y s.s are equivalents
ldc1 $f0, address:
Load in ($f0, $f1) a double value
sdc1 $f0, address
Store the double value stored in ($f0, $f1) in
memory
l.d y s.d are equivalents

ARCOS Computer Structure 149

Basic data types
float
.data
result: .float
float result; op1: .float 100
float op1 = 100 ; op2: .float -10
float op2 = -10 ; ...
...
.text
.globl main

main () main: l.s $f0 op1

l.s $f1 op2
{
add.s $f3 $f1 $f2
result= op1 + op2 ;
s.s $f3 result
...
...
}

ARCOS Computer Structure 150

Basic data types
double
.data
result: .double
double result; op1: .double 100
double op1 = 100 ; op2: .double -10.27
double op2 = -10.27 ; ...
...
.text
.globl main

main () main: l.d $f0 op1 # ($f0,$f1)

l.d $f2 op2 # ($f2,$f3)
{
mul.d $f6 $f0 $f2
result = op1 * op2 ;
s.d $f6 result
...
...
}

ARCOS Computer Structure 151

Operations with registers (CPU, FPU)

mtc1 $t0 $f1

CPU FPU
t0 $f1 $f0
t1
$f3 $f2
B.R. enteros … … B.R.
$f31 $f30

U.C
ALU ALU

BUS BUS

ARCOS Computer Structure 152

Operations with registers (CPU, FPU)

mfc1 $t0 $f1

ARCOS Computer Structure 156

Load instructions

li.s $f4, 8.0

Load the float value 8.0 in register $f4
li.d $f2, 12.4
Load the double value 12.4 in register $f2

ARCOS Computer Structure 157

Example

float PI = 3,1415; .text

int radio = 4; .globl main
float length;
main:
Length = PI * radio;
li.s $f0 3.1415
li $t0 4

mtc1 $t0 $f1 # 4 en Ca2

cvt.s.w $f2 $f1 # 4 ieee754
mul.s $f0 $f2 $f1

ARCOS Computer Structure 158

Example

float PI = 3,1415; .text

int radio = 4; .globl main
float length;
main:
length = PI * radio;
li.s $f0 3.1415
li $t0 4

CPU FPU mtc1 $t0 $f1 # 4 en Ca2

t0 $f1 $f0
t1
$f3 $f2 cvt.s.w $f2 $f1 # 4 ieee754
B.R. enteros … … B.R.
$f31 $f30 mul.s $f0 $f2 $f1
U.C
ALU ALU

BUS BUS

ARCOS Computer Structure 159

Exercise

Write an assembly program that:

Load the value -3.141516 in register $f0
Obtain the exponent and mantissa values stored in the
register $f0 (IEEE 754 format)
Display the sign
Display the exponent
Display the mantissa

ARCOS Computer Structure 160

Solution
li $s0, 0x80000000 #sign
and $a0, $t0, $s0
.data
srl $a0, $a0, 31
line: .asciiz "\n" li $v0, 1
syscall
.text
.globl main la $a0, line
main: li $v0, 4
li.s $f0, -3.141516 syscall

#Display li $s0, 0x7F800000 #exponent

mov.s $f12, $f0 and $a0, $t0, $s0
li $v0, 2 srl $a0, $a0, 23
syscall li $v0, 1
syscall

la $a0, line la $a0, line

li $v0, 4 li $v0, 4
syscall syscall

li $s0, 0x007FFFFF #mantissa

and $a0, $t0, $s0
# copy to prrocessor li $v0, 1
mfc1 $t0, $f12 syscall

jr $ra

ARCOS Computer Structure 161

Contents

Basic concepts on assembly programming

MIPS32 assembly language
Instruction formats and addressing modes
Procedure calls and subroutines

ARCOS Computer Structure 162

Information of an instruction

The instruction size is adjusted to word (or multiples)

Are divided in fields:

Operationn to do
Operands
There can be implicit operands

The instruction format: form of representation of an instruction

composed of fields of binary numbers:
The field size limits the number of values to encode

ARCOS Computer Structure 163

Information of an instruction

Very few formats:

Each instruction belongs to a format

Example: instruction formats in MIPS

Tipo R op. rs rt rd shamt func.

arithmetic
6 bits 5 bits 5 bits 5 bits 5 bits 6 bits
Tipo I op. rs rt offset
Immediate
transfer 6 bits 5 bits 5 bits 16 bits
Tipo J op. offset
branches
6 bits 26 bits

ARCOS Computer Structure 164

Instruction fields

Each field encodes:

Operation (Operation code)

Instruction and format used

Operands
Location of operands
Location for results
Location of next instruction (in branches)
Implicit : PC PC + ‘4’ (next instruction)
Explicit: j 0x01004 (PC modified)

ARCOS Computer Structure 165

Locations of operands

In the instruction
In registers (processor)
Main memory
Input/output modules

ARCOS Computer Structure 166

Addressing modes

Procedure that allows to localize the operands

Types
Immediate
Direct
Register
Indirect
Register indirect
Relative
Base-register
Index-register
PC-relative
Implicit
Stack

ARCOS Computer Structure 167

Immediate addressing

Operand is in the instruction.

Example:
li $a0 25
addi $t1 $t2 50

Fast: Memory access is not required

More size is needed:
li $t1, 0x00800010
Need more than 32 bits; equivalent to:
lui $t1, 0x0080
ori $t1, $t1, 0x0010

ARCOS Computer Structure 168

Operand is in a register.
Example: move $a0 $a1
$a0 and $a1 are encoded in the instruction

op rs rt 16 bits

operand

Advantages: Regs.
No memory access is required
Small address field
Faster access

ARCOS Computer Structure 169

Direct addressing

Operand in memory. The instruction encodes the address

Example (MIPS): lw $t1, 0xFFF0

Load in $t1 the word stored in address 0xFFF0
memory

Operand

op rs rt 16 bits
Problems:
Memory access time is larger than register access time
Large fields=> large instructions

ARCOS Computer Structure 170

The instruction has the register where the address is stored

memory
Example (MIPS): lw $a0 ($a1) Regs.
opernad
Load in $a0 the word stored in address stored
in $a1.
address

op rs rt 16 bits

Advantages:
Small fields
MIPS can allow in a register an address for addressing the entire memory
(registers have 32 bits)

ARCOS Computer Structure 171

Indirect addressing

The instruction has the address where the operand address is

Memory
stored (not available in MIPS)

Example: LD R1 [ADDR] (IEEE 694) operand

Load in R1 the item stored in the address stored in ADDR

Address 2

op address 1

Problems:
Several memory accesses are required
Slower instructions

ARCOS Computer Structure 172

Base-register addressing

Example: lw $a0 12($t1)

Load in $a0 the word stored in address: $t1 + 12

Instruction
Op. cod. Register R Displacement

Memory
Registers bank

Memory address + Operand

ARCOS Computer Structure 173

Uses in arrays

.data
.align 2 #next item align to 4
int vec[5] ;
vec: .space 20 #5 elem.*4 bytes
...
.text
main ()
.globl main
{
v[4] = 8; main: la $t1 vec
li $t2 8
sw $t2 16($t1)
} ...

ARCOS Computer Structure 174

Index-register addressing

Example: lw $a0 address($t1)

Load in $a0 the word stored in address: $t1 + address
$t1 represents an index

Instruction
op. cod. Register R address

Memory
Registers

Index/displacement + Operand

ARCOS Computer Structure 175

Use in arrays

.data
.align 2 # next item align to 4
int vec[5] ;
vec: .space 20 #5 elem.*4 bytes
...
.text
main ()
.globl main
{
v[3] = 8; main: li $t1 12
v[4] = 8; li $t2 8
sw $t2 vec($t1)
addi $t1 $t1 4
} sw $t2 vec($t1)
...

ARCOS Computer Structure 176

PC-relative addressing

Example: beqz $t1 label

If $t1 == 0, then PC => PC = PC + label
Label represents a displacement

Instruction
Op. code Displacement

PC +

ARCOS Computer Structure 177

Program counter in MIPS 32

Registers of 32 bits
Program counter of 32 bits
Instructions of 32 bits (one word)
Program counter stores instruction address
Next instruction is 4 bytes beyond
Program counter is updated:
PC = PC + 4

address: Instruction:
0x00400000 or $2,$0,$0
0x00400004 slt $8,$0,$5
0x00400008 beq $8,$0,3
0x0040000c add $2,$2,$4
0x00400010 addi $5,$5,-1
0x00400014 j 0x100001

ARCOS Computer Structure 178

PC-relative addressing in MIPS

Instruction beq $9,$0, label is encoded as:

6 5 5 16
CO rs rt immediate

Label must be encoded in an “immediate” field

When $t0 == $1, what is the value for end label?
bucle: beq $t0,$1, end
add $t8,$t4,$t4
addi $t0,$0,-1
j bucle
end:

ARCOS Computer Structure 179

PC-relative addressing in MIPS

When the condition in satisfied

PC = PC + (label* 4)
Then:
bucle: beq $t0,$1, end
add $t8,$t4,$4t4
addi $t0,$0,-1
j bucle
end:

end== 3
When an instruction is executed, PC stores the addresss of next
instruction in memory

ARCOS Computer Structure 180

Use in loops

End represents the

address where the li $t0 8
instruction move is li $t1 4
li $t2 1
stored li $t4 0
while: bge $t4 $t1 end
mul $t2 $t2 $t0
addi $t4 $t4 1
b while
end: move $t2 $t4

ARCOS Computer Structure 181

ARCOS Computer Structure 182

Use in loops
Address Content
li $t0 8 0x0000100 li $t0 8
li $t1 4
li $t2 1 0x0000104
li $t1 4
li $t4 0
0x0000108
while: bge $t4 $t1 end li $t2 1
mul $t2 $t2 $t0
0x000010C
addi $t4 $t4 1 li $t4 0
b while 0x0000110 bge $t4 $t1 end
end: move $t2 $t4
0x0000114 mul $t2 $t2 $t0
end represents a displacement relative
to current PC => 3 0x0000118 addi $t4 $t4 1
PC = PC + 3 * 4 0x000011C b while
while represents a displacement relative
to current PC =>-4 0x0000120 move $t2 $t4
PC = PC + (-4)*4

ARCOS Computer Structure 183

Differences between b and j instructions

Instruction j address

op. address
6 bits 26 bits

Branch address => PC = address

Instruction b displacement

op. displacement
6 bits 5 bits 5 bits 16 bits

Branch address => PC = PC + displacement

ARCOS Computer Structure 184

Implicit addressing

The operand is not encoded in the instruction.

Example : beqz $a0 label1

If $a0 is zero, branch to label
$a0 is an operand, $zero is the other one

op rs 16 bits

Advantages
Fast: No access memory is required.
Instructions shorter

ARCOS Computer Structure 185

Satck addressing

PUSH Reg Push the content of a register (item)

item $sp
top $sp top

Stack grows to lower memory addresses

ARCOS Computer Structure 186

Stack addressing

POP Reg Pop the top of the stack (item)

Copy the element in a Reg

item $sp item

top top $sp

Stack grows to lower memory addresses

ARCOS Computer Structure 187

Stack addressing
188

MIPS does not have PUSH or POP instructions

The stack pointer ($sp) is visible
We assume that stack pointer points to the last element in
the stack

PUSH $t0 POP $t0

sub $sp, $sp, 4 lw $t0, ($sp)

sw $t0, ($sp) add $sp, $sp, 4

ARCOS Computer Structure 188

Examples of addressing types

la $t0 label immediate

The second operand is an address
But this address is not accessed, the address is the operand

lw $t0 label direct

The second operand is an address
A memory access is required to obtain the final operand

bne $t0 $t1 label PC-relative

Last operand represents a displacement
Label is encoded as a number that represents a displacement
relative to PC

ARCOS Computer Structure 189

Addressing modes in MIPS

Immediate value
Register $r
Direct dir
Register indirect ($r)
Register relative displacement($r)
PC-relative beq label
Stack-relative displacement($sp)

ARCOS Computer Structure 190

Instruction format

A machine instruction includes:

Operation code
Operand addresses
Result address
Address of the next instruction
How the operands are represented
A machine instruction is divided in fields
Example in MIPS:

op. rs rt rd shamt func.

ARCOS Computer Structure 191

Instruction format

The size of an instruction is usually one word, but there

can be instructions of several words
In MIPS the size of all instructions is one word (32 bits)
Operation code:
With n bits we can encode 2n instructions
We can use extensions fields to encode more instructions
Example: in MIPS, arithmetic instructions have the operation
code 0. The operation is encode in func. field

Type R op. rs rt rd shamt func.

arithmetic

ARCOS Computer Structure 192

Instruction format
193

The format specifies the meaning of each field in the

instruction
Format length: number of bits used to encode the instruction
The instruction is divided in fields
Very few formats
In order to simplify the control unit design.
Usually:
Fields of the same type have the same length.
Operation code is the first field

ARCOS Computer Structure 193

Format length
194

Alternatives:
Unique length: All instructions with the same size
MIPS32: 32 bits
PowerPC: 32 bits
Variable: Different instructions can have different sizes
How to know the length of an instruction? Op. code
IA32 (Intel processors): variable number of bytes

ARCOS Computer Structure 194

Example: MIPS instruction formats
195

6 5 5 5 5 6
CO rs rt rd sa func

6 26 add $t0, $t0, $t1

CO immediate

6 5 5 16 addi $t0, $t0, 1

CO rs rt immediate

ARCOS Computer Structure 195

Example of MIPS formats

MIPS Instruction:
add $8,$9,$10
Format:
6 5 5 5 5 6

CO rs rt rd sa func

Decimal representation:

0 9 10 8 0 32
Binary representation

000000 01001 01010 01000 00000 100000

ARCOS Computer Structure 196
Example of MIPS formats

MIPS Instruction:
addi $21,$22,-50
Format:

6 5 5 16
CO rs rt immediate

Decimal representation:

8 22 21 -50
Binary representation
001000 10110 10101 1111111111001110

ARCOS Computer Structure 197

ARCOS Computer Structure 198

How to use the addi instruction with 32 bits
values?
What happens when this instruction is used in a program?
addi $t0,$t0, 0xABABCDCD
The immediate value has 32 bits. This instruction cannot be
encoded in one word (32 bits)
Solution:
This instruction is translated to:
lui $at, 0xABAB
ori $at, $at, 0xCDCD
add $t0, $t0, $at
The $at is reserved to the assembler

ARCOS Computer Structure 199

Questions
200

How does the unit control know the format of an instruction?

How does the unit control know the number of operands of an

instruction?

How does the unit control know the format of each operand?

ARCOS Computer Structure 200

Operation code
201

Fixed size:
n bits 2n operation codes
m operation codes log2m bits.

Extension fields
MIPS (arithmetic-logic instructions)
Op = 0; The instruction is encoded in func
Tipo R op. rs rt rd shamt func.
aritméticas

Variable sizes:
More frequent instructions= shorter sizes

ARCOS Computer Structure 201

Example

A 16-bit computer has an instruction set of 60 instructions and

a register bank with 8 registers.

Define the format of this instruction: ADDx R1 R2 R3, where

R1, R2 and R3 are registers.

ARCOS Computer Structure 202

Solution
word-> 16 bits
60 instructions
8 registers (in RB)
ADDx R1(reg.), R2(reg.), R3(reg.)

Word of 16 bits

16 bits

ARCOS Computer Structure 203

Solution word-> 16 bits
60 instructions
8 registers (in RB)
ADDx R1(reg.), R2(reg.), R3(reg.)

To encode 60 instructions, 6 bits are required for the operation

The execution modes indicates the number of addresses and

the type of operands that can be specified in an instruction.

0 addresses Stack.
1 address Accumulator register.
2 addresses Registers, Register-memory, Memory-
memory
3 addresses registers, register-memory, memory-
memory.

ARCOS Computer Structure 210

3 addresses model
211

Registers
Three operands in registers.
Require load/store operations.
ADD .R0, .R1, .R2

Memory-memory
Operands in memory addresses
ADD /DIR1, /DIR2, /DIR3

ARCOS Computer Structure 211

Example
212

X = A + B * C
/DA A

/DB B

/DC C

Execution model

/DX X

ARCOS Computer Structure 212

3 addresses: R-R
213

LOAD .R0, /DB 6 instructions

LOAD .R1, /DC
MUL .R0, .R0, .R1
LOAD .R2, /DA 4 accesses to memory
ADD .R0, .R0, .R2
STORE .R0, /DX
10 accesses to registers

ARCOS Computer Structure 213

3 addresses: M-M
214

MUL /DX, /DB, /DC 2 instructions

ADD /DX, /DX, /DA
6 accesses to memory

0 accesses to registers

ARCOS Computer Structure 214

2 addresses model
215

Registers:
Two operands in registers
Load/store operations requiered
ADD .R0, .R1 (R0 <- R0 + R1)
Memory-memory
Two operands in memory
ADD /DIR1, /DIR2 (MP[DIR1] <- MP[DIR1] +
MP[DIR2])
Register-memory
Hybrid.
ADD .R0, /DIR1 (R0 <- R0 + MP[DIR1])

ARCOS Computer Structure 215

2 addresses: R-R
216

LOAD .R0, /DB 6 instructions

LOAD .R1, /DC
MUL .R0, .R1
LOAD .R3, /DA 4 accesses to memory
ADD .R0, .R3
STORE .R0, /DX
8 accesses to registers

ARCOS Computer Structure 216

2 addresses: M-M
217

MOVE /DX, /DB 3 instructions

MUL /DX, /DC
ADD /DX, /DA
6 accesses to memory

0 accesses to registers

ARCOS Computer Structure 217

2 addresses: R-M
218

LOAD .R0, /DB 4 instructions

MUL .R0, /DC
ADD .R0, /DA
STORE .R0, /DX 4 accesses to memory

4 accesses to registers

ARCOS Computer Structure 218

1 address model
219

All operations use an implicit operand:

Accumulator register
Example: ADD R1 -> AC <- AC + R1

Load/store operations on the accumulator

Operations to move data from the accumulator and other

registers

ARCOS Computer Structure 219

1 address
220

LOAD /DB 4 instructions

MUL /DC
ADD /DA
STORE /DX 4 accesses to memory

0 access to registers

ARCOS Computer Structure 220

0 addresses model
221

All operations use the stack

Operands are placed on top of the stack
The operation pop operands from the stack.
Result is stored on top of the stack
Two instructions:
PUSH
POP

ARCOS Computer Structure 221

Stack operations
222

PUSH 5

ARCOS Computer Structure 222

Stack operations
223

PUSH 5
PUSH 7

7
5

ARCOS Computer Structure 223

Stack operations
224

PUSH 5
PUSH 7
ADD

ARCOS Computer Structure 224

Stack operations
225

PUSH 5
PUSH 7
ADD
POP /DX

ARCOS Computer Structure 225

0 addresses
226

PUSH /DB 6 intructions

PUSH /DC
MUL
PUSH /DA 4 accesses to memory
ADD
POP /DX
10 accesses to stack memory

ARCOS Computer Structure 226

Contents

Basic concepts on assembly programming

MIPS32 assembly language
Instruction formats and addressing modes
Procedure calls and subroutines

ARCOS Computer Structure 227

Procedures

A procedure (function, subroutine) is a subprogram that does a

specific task when is invoked
Receives arguments of input parameters
Return one o several results
In assembly programming a procedure is associated with a
symbolic name that represents the init address

ARCOS Computer Structure 228

Steps in the execution of a
procedure/function
Pass the input parameters to the procedure
Transfer the flow control to the procedure
Acquire storage resources needed for the procedure
Make the task
Return the results
Return to the previous point of control

ARCOS Computer Structure 229

Functions in high level languages
230

int main() {
int factorial(int x) {
int z;
int i;
z=factorial(x);
int r=1;
print_int(z);
for (i=1;i<=x;i++) {
}
r*=i;
}
return r;
}

ARCOS Computer Structure 230

Function calls in MIPS
231

Function calls in MIPS (jal instruction)

factorial:

… jr $ra
jal factorial
…
Factorial represents the init
address of the subroutine (function)

ARCOS Computer Structure 231

Function calls in MIPS
232

0x00401000 factorial:

…
0x00001000 jal 0x00401000 jr $ra
0x00001004 …

$ra = PC = 0x00001004
PC = 0x00401000

ARCOS Computer Structure 232

$PC  $ra

ARCOS Computer Structure 236

Nested calls

0x00401000

jal 0x000080000 0x00008000

…
0x00001000 jal 0x00401000 jr $ra
0x00001004 …
jr $ra

$ra = PC = 0x00001004
PC = 0x00401000

ARCOS Computer Structure 237

Nested calls

0x00401000

0x00008000
0x00401020 jal 0x000080000
0x00401024
…
0x00001000 jal 0x00401000 jr $ra
0x00001004 …
jr $ra

$ra = PC = 0x00401024
PC = 0x00008000

ARCOS Computer Structure 238

Nested calls

0x00401000

0x00008000
0x00401020 jal 0x000080000
0x00401024
…
0x00001000 jal 0x00401000 jr $ra
0x00001004 …

jr $ra

PC = $ra = 0x00401024

ARCOS Computer Structure 239

Nested calls

0x00401000

0x00008000
0x00401020 jal 0x000080000
0x00401024
…
0x00001000 jal 0x00401000 jr $ra
0x00001004 …
jr $ra

?
PC = $ra = 0x00401024

ARCOS Computer Structure 240

Nested calls

0x00401000

0x00008000
0x00401020 jal 0x000080000
0x00401024
…
0x00001000 jal 0x00401000 jr $ra
0x00001004 …

jr $ra

?
PC = $ra = 0x00401024

The return address is lost

ARCOS Computer Structure 241

Where to store the return address?

Computers have two storage elements:

Registers
Memory
The number of registers is limited, so registers cannot be used
Return addresses are stored in main memory
In a program area called stack

ARCOS Computer Structure 242

Program execution

Main
Memory

Operating Disk
System

Code

Data
Program

Executable
Stack
File

ARCOS Computer Structure 243

Memory map of a process

memory
User programs are divided in
pc segments:
Text segment 01011001 Stack segment
Local variables
Data segment Function context
Data segment
Static data, global variables
$sp Text segment (code)
01011001 Machine instructions

Stack segment

ARCOS Computer Structure 244

Stack

PUSH Reg Push an element in stack (item)

item $sp
top $sp top

Stack grows to lower memory addresses

ARCOS Computer Structure 245

Stack

POP Reg Pop last element and insert it in a register (item)

item $sp item

top top $sp

Stack grows to lower memory addresses

ARCOS Computer Structure 246

Before to start
247

MIPS does not have PUSH or POP instructions

Stack pointer ($sp) is used to manage the stack
We assume that stack pointer points to the last element in
the stack

PUSH $t0 POP $t0

subu $sp, $sp, 4 lw $t0, ($sp)

sw $t0, ($sp) addu $sp, $sp, 4

ARCOS Computer Structure 247

PUSH operation in MIPS

7 $sp
8

Initial state: stack pointer ($sp) points tto he last element in stack

ARCOS Computer Structure 248

PUSH operation in MIPS

$sp
7
8

subu $sp, $sp, 4

Substract 4 to stack pointer to insert a new word in the stack

ARCOS Computer Structure 249

PUSH operation in MIPS

9 $sp
7
8

li $t2, 9
sw $t2 ($sp)
Insert the content of register $t2 in the stack

ARCOS Computer Structure 250

POP operation in MIPS

9 $sp
7
8

lw $t2 ($sp)
Copy in $t2 the first element of the stack (9)

ARCOS Computer Structure 251

POP operation in MIPS

9
7
$sp
8

addu $sp, $sp, 4

Update the stack pointer to point to the new top. The data (9)
continues in memory but will be overwriten in future PUSH
operations.

ARCOS Computer Structure 252

Stack
Consecutive PUSH and POP

push $a0
push $t1
push $t2
push $s2

...

pop $s2
pop $t2
pop $t1
pop $a0

ARCOS Computer Structure 253

Stack
Consecutive PUSH and POP
sub $sp $sp 4
sw $a0 ($sp)
push $a0 sub $sp $sp 4
push $t1 sw $t1 ($sp)
push $t2 sub $sp $sp 4
push $s2 sw $t2 ($sp)
sub $sp $sp 4
... sw $s2 ($sp)

...

lw $s2 ($sp)
pop $s2
add $sp $sp 4
pop $t2
lw $s2 ($sp)
pop $t1
add $sp $sp 4
pop $a0
lw $s2 ($sp)
add $sp $sp 4
lw $s2 ($sp)
add $sp $sp 4

ARCOS Computer Structure 254

Stack
Consecutive PUSH and POP

push $a0 sub $sp $sp 16

push $t1 sw $a0 12($sp)
push $t2 sw $t1 8($sp)
push $s2
sw $t2 4($sp)
sw $s2 ($sp)

... ...

lw $s2 ($sp)
pop $s2
lw $t2 4($sp)
pop $t2
pop $t1 lw $t1 8($sp)
pop $a0 lw $a0 12($sp)
add $sp $sp 16

ARCOS Computer Structure 255

Example
(1) Suppose a high level language code
256

int main() {
int factorial(int x) {
int z;
int i;
z=factorial(5);
int r=1;
print_int(z);
for (i=1;i<=x;i++) {
.
r*=i;
.
}
.
return r;
}
}

ARCOS Computer Structure 256

Example
(2) Analyze how to pass the arguments
257

Input parameters in MIPS are passed in $a0, $a1, $a2 y $a3

Output parameters are returned in $v0, $v1

In z=factorial(5);
Input parameter in $a0
Result in $v0

ARCOS Computer Structure 257

Input parameter in $a0
Example Result in $v0

(3) Translate to assembly language

258

int main() { li $a0, 5 # argument

int z; jal factorial # function call
z=factorial(5); move $a0, $v0 # result
print_int(z); li $v0, 1
. . . syscall # system call
} # to print an int
...

int factorial(int x) { factorial: li $s1, 1 #s1 for r

li $s0, 1 #s0 for i
int i; loop: bgt $s0, $a0, end
int r=1; mul $s1, $s1, $s0
for (i=1;i<=x;i++) { addi $s0, $s0, 1
r*=i; b loop
} end: move $v0, $s1 #result
return r; jr $ra
}

ARCOS Computer Structure 258

Example
(4) Analyze the registers modified
259

int factorial(int x) { factorial: li $s1, 1 #s1 forr

li $s0, 1 #s0 for i
int i;
loop: bgt $s0, $a0, end
int r=1; mul $s1, $s1, $s0
for (i=1;i<=x;i++) { addi $s0, $s0, 1
r*=i; b loop
} end: move $v0, $s1 #result
return r; jr $ra
}

The function uses (modifies) registers $s0 and $s1

If this registers are modified, the caller function (main) can be affected
Then, factorial function must store this registers in the stack at the beginning and
restore them at the end

ARCOS Computer Structure 259

Example
(5) Store registers in stack
260

int factorial(int x) { factorial: sub $sp, $sp, 8

sw $s0, 4($sp)
int i;
sw $s1, ($sp)
int r=1; li $s1, 1 #s1 for r
for (i=1;i<=x;i++) { li $s0, 1 #s0 fori
r*=i; loop : bgt $s0, $a0, end
} mul $s1, $s1, $s0
return r; addi $s0, $s0, 1
} b bucle
end: move $v0, $s1 #result
lw $s1, ($sp)
lw $s0, 4($sp)
add $sp, $sp, 8
jr $ra
Is not necessary to store $ra in stack, Function is terminal
Registers $s0 and $s1 are stored in the stack
If we had used $t0 and $t1, it would not have need to copy $t0 and $t1 in
thestack (temporary registers)
ARCOS Computer Structure 260
Example 2
261

int f1 (int a, int b)

int main()
{
{
int r;
int z;
r = a + a + f2(b);
z=f1(5, 2);
return r;
}
print_int(z);
}
int f2(int c)
{
int s;

s = c * c * c;
return s;
}

ARCOS Computer Structure 261

Example 2. Call
262

int main() li $a0, 5 # first argument

{ li $a1, 2 # second argument
int z; jal f1 # call
move $a0, $v0 # result
z=f1(5, 2); li $v0, 1
syscall # systam call
print_int(z); # to print an int
}

Parameters are passed in $a0 and $a1

Result is returned in $v0

ARCOS Computer Structure 262

Example 2. function f1
263

f1: add $s0, $a0, $a0

int f1 (int a, int b)
{ move $a0, $a1
int r; jal f2
add $v0, $s0, $v0
r = a + a + f2(b);
return r; jr $ra
}

int f2(int c)
{
int s;

s = c * c * c;
return s;
}

ARCOS Computer Structure 263

Example 2. Analyze registers modified in f1
264

f1: add $s0, $a0, $a0

int f1 (int a, int b)
{ move $a0, $a1
int r; jal f2
add $v0, $s0, $v0
r = a + a + f2(b);
return r; jr $ra
}
F1 modifies $s0 and $ra, then store them in the stack
int f2(int c)
Register $ra is modified in instruction jal f2
{
Register $a0 is modified to pass the argument to function f2
int s;

s = c * c * c;
return s;
}

ARCOS Computer Structure 264

Example 2. Storing registers in the stack
265
f1: sub $sp, $sp, 12
sw $s0, 8($sp)
int f1 (int a, int b) sw $a0, 4($sp)
{ sw $ra, ($sp)
int r;
add $s0, $a0, $a0
r = a + a + f2(b);
return r; move $a0, $a1
} jal f2
add $v0, $s0, $v0
int f2(int c) lw $ra, ($sp)
{ lw $a0, 4($sp)
int s; lw $s0, 8($sp)
add $sp, $sp, 12
s = c * c * c; jr $ra
return s;
}

ARCOS Computer Structure 265

Example 2. function f2
266

int f1 (int a, int b)

{
int r;

r = a + a + f2(b);
return r; f2: mul $t0, $a0, $a0
} mul $t0, $t0, $a0
jr $ra
int f2(int c)
{
int s;
Function f2 does not modify register $ra because is terminal
Register $t0 is not stored in stack because this type of
s = c * c * c; register is temporary and its value does not need be
return s; preserved
}

ARCOS Computer Structure 266

Types of functions
267

Terminal function.
Does not call other functions.

Not terminal function.

Call other functions.

ARCOS Computer Structure 267

Procedure activation
Stack frame
The stack frame is the mechanism used by compilers to
activate the procedures/functions.
The stack frame is built in the stack by the caller (the calling
program) and the callee (procedure called)
The stack frame is managed with two registers:
$sp: stack pointer, that points to the top of the stack
$fp: stack frame pointer, that points to the first word of the
frame of a procedure
The stack frame pointer ($fp) is used in the callee procedure
to:
Access the parameters passed in the stack
Access the local variables of the procedure

ARCOS Computer Structure 268

Stack frame

The stack frame stores:

Parameters passed by the caller procedure
The stack frame pointer of the caller procedure
Registers saved by the procedure ($ra in not
terminal procedures)
Local variables

ARCOS Computer Structure 269

Stack frame

$sp Low addresses

Local variables of the

Calle procedure

Registers saved by

$fp The caller

Stack growing
Old $fp

Arguments of
the calle

High address

ARCOS Computer Structure 270

Access to parameters and local variables
using the stack frame
Low addresses
int f (int n1, n2, n3,
n4, n5, n6)
{
int v[4];
int k;
for (k= 0; k <3; k++)
v[i] = n1+n2+n3+n4+n5+n6;
Stack
return (v[1]);
growing
} $sp
Argument n5
Arguments n1, n2, n3 y n4 are
passed: Argument n6

In $a0, $a1, $a2, $a3

Arguments n5, n6 are passed:
In the stack High addresses

ARCOS Computer Structure 271

Access to parameters and local variables
using the stack frame
Low addresses
int f (int n1, n2, n3,
n4, n5, n6) $sp
{
int v[4]; v[0]
int k;
v[1]
for (k= 0; k <3; k++)
v[i] = n1+n2+n3+n4+n5+n6; v[2]
Stack
return (v[1]); $fp v[3]
growing
} old $fp
Argument n5
Once invoked, f must reserve in
the stack frame space for local Argument n6

variables that cannot be stored

in registers (v in this example)
High addresses

ARCOS Computer Structure 272

The value of n1 is in $a0 Argument n5

The value of n5 is in 4($fp) Argument n6
The value of n6 is in 8($fp)
The value of v[3] is in -4($fp)
The value of v[0] is in -16($fp)
High addresses

ARCOS Computer Structure 273

Parameters passing convention
274

Convention that describes:

The usage of registers (general and FPU)
The usage of stack
Actions to be taken in caller/callee procedures

Different compilers use different convections

ABI Application Binary Interface.

ARCOS Computer Structure 274

MIPS register usage conventions

Register Use Preserve the value

$v0-$v1 Results No
$a0..$a3 Arguments Yes
$t0..$t9 Temporary No
$s0..$s7 Saved Yes
$sp Stack pointer Yes
$fp Stack frame pointer Yes
$ra Return address Yes

ARCOS Computer Structure 275

Subroutines step by step

Caller subroutine Calle subroutine

Save the registers not preserved across the call
Pass the arguments
Make the call
Reserve the stack frame
Saved registers
Execute the subroutine
Restore registers previously saved
Free the stack frame
Return
Restore the registers previousy saved
276

ARCOS Computer Structure 276

Save registers
Caller subroutine
277

A subroutine can modify Registers $t

registers $t
Before to invoke
other subroutine,
these registers must
Stack
be saved in stack
subu $sp, $sp, 8
sw $t0,($sp)
sw $t1, 4($sp)

jal function

lw $t1, 4($sp)
lw $t0, ($sp)
addu $sp, $sp, 8

ARCOS Computer Structure 277

Parameters passing
Caller subroutine
278

First arguments are passed in registers:

$a0, $a1, $a2, $a3
$f12, $f14 (floating point)
Rest of parameters use the stack

ARCOS Computer Structure 278

Passing 2 parameters
279 Registers bank

$a0 Argument 1
$a1 Argument 2
$a2 Argument 3
Registers $t $a3 Argument 4

stack
li $a0, 5 // param 1
li $a1, 8 // param 2

jal func

addu $sp, $sp, 16

ARCOS Computer Structure 279

Passing 6 parameters
Registers bank
280

$a0 Argument 1
$a1 Argument 2
$a2 Argument 3
Argument 5 $a3 Argument 4
Argument 6

Registers $t
li $a0, 5 // param 1
li $a1, 8 // param 2
li $a2, 7 // param 3
li $a3, 9 // param 4

subu $sp, $sp, 8

li $t0, 10 // param 6
stack sw $t0, 4($sp)
li $t0, 7
s2 $t0, ($sp) // param 5

jal func

addu $sp, $sp, 8

ARCOS Computer Structure 280

Calling the subroutine
caller subroutine
281

“Jump and link” instruction

jal label
bal label
bltzal $reg, label
bgezal $reg, label
jalr $reg
jalr $reg, $reg

ARCOS Computer Structure 281

Reserve of the stack frame
Callee subroutine
282

The callee subroutine saves in stack:

Old $fp
Registers saved by the function
Registers $s that are modified.
Register $ra in not terminal subroutines.
Local variables

To reserve the stack frame, subtract the size to the stack

pointer

ARCOS Computer Structure 282

Subroutine execution
283

The subroutine store the return values in:

Usually in registers $v0 and $v1
For floating point $f0 y $f2.
Other return values in stack

ARCOS Computer Structure 283

Finally
284

Callee subroutine:
Restore the saved values

Free the stack frame

Add to $sp the stack frame size
$sp = $fp
Restore the value of $fp

Return to caller subroutine

jr $ra
Caller subroutine:
Restore values saved previously in stack

ARCOS Computer Structure 284

Example: factorial

int factorial ( int a )

{ factorial(a=4)
if (a < 2) then (a < 2) ?
return 1 ; 6 * 4
return a * factorial(a-1) ; factorial(a=3)
} (a < 2) ?
2 * 3
void main () { factorial(a=2)
int result; (a < 2) ?
result=factorial(4) ; 1 * 2
factorial(a=1)
printf(“f(4)=%d”,result);
(a < 2) ?
}

ARCOS Computer Structure 285

Example: factorial

Low addresses
Before the call

$sp

High addresses

ARCOS Computer Structure 286

Example: factorial
factorial:
# frame stack Low addresses
subu $sp $sp 12
sw $ra 4($sp)
sw $fp 8($sp)
addu $fp $sp 8

$sp

$fp $ra
$fp (old)

High addresses

ARCOS Computer Structure 287

Example: factorial
factorial:
Low addresses
# stack frame
subu $sp $sp 12
sw $ra 4($sp)
sw $fp 8($sp)
addu $fp $sp 8

bge $a0 2 b_else $sp

li $v0 1
b b_efs $a0

$fp $ra
b_else: sw $a0 -8($fp)
addi $a0 $a0 -1 $fp (old)
jal factorial
lw $v1 -8($fp)
mul $v0 $v0 $v1

High addresses

ARCOS Computer Structure 288

Example: factorial
factorial:
# frame stack Low addresses
subu $sp $sp 12
sw $ra 4($sp)
sw $fp 8($sp)
addu $fp $sp 8

bge $a0 2 b_else

li $v0 1
b b_efs $a0

$ra
b_else: sw $a0 -8($fp)
addi $a0 $a0 -1 $sp $fp (antiguo)
jal factorial
lw $v1 -8($fp)
mul $v0 $v0 $v1
# end frame stack
b_efs: lw $ra 4($sp)
lw $fp ($fp) High addresses
addu $sp $sp 12
jr $ra
ARCOS Computer Structure 289
O32 convention (MIPS)

First argument are passed in registers

$a0, $a1, $a2, $a3
$f12, $f14 (floating point)
Rest of the arguments in the stack

Always a “hole” must be reserved in the stack for arguments:

(are not copied, only the hole is reserved)
This space is used if function calls other function
To reserve the frame stack, subtract the size to the stack
pointer
Must be multiple of 8 (by convention)

ARCOS Computer Structure 290

O32 convention. Passing 2 arguments
291

Registers bank

Space for $a0 $a0 Argument 1

Space for $a1 $a1 Argument 2
Space for $a2 $a2 Argument 3
Space for $a3 $a3 Argument 4

Registers $t

pila

ARCOS Computer Structure 291

Translation and execution of programs

Elements involved in the translation and execution of

programs:
Compiler
Assembler
Linker
Loader

ARCOS Computer Structure 292

Compiled code versus interpreted

Compiled code:
Programs are translated to machine code by the compiler
Code directly executed by the computer
More efficient
Interpreted code:
An interpreterr is a program that executes other programs
An interpreter executes a set of instruction machine independent.
Example: Java is translated to byte code that is execute by the
interpreter (Java Virtual Machine)
Generally easier to write interpreter. More portability

ARCOS Computer Structure 293

Translation and execution steps (C program)

C program

compiler

Assembly program

Assembler

Objet: Module in machine language Objet: liraries in machine language

Linker

Executable: program in mahcine language

Loader
Memory

ARCOS Computer Structure 294

Compiler

Input: High level language (C, C++, …)

Output: Code in assembly language
Can contain pseudoinstructions
A pseudoinstruction is an instruction that understands the
assembler but not the machine
move $t1, $t2 ⇒ or $t1, $t2, $zero

ARCOS Computer Structure 295

Assembler

Input: Assembly language code

Output: Object code in machine language
The assembler converts pseudoinstructions in machine
instructions
Analyze the sentences in assembly language independently,
sentence to sentence
Produce an object file(.o)

ARCOS Computer Structure 296

Assembly sentences analysis

Check the correctness of instructions (operation code,

operands, valid addressing,…)
Check if the sentence has a label. If sentence has a label, check
if the symbolic label is not repeated and assign a value
corresponding to the memory position that will have
Build a symbol table with all symbolic labels
In a first phase the assembler records in its symbol table the
name of the label and the address of the memory word that
the instruction occupies.
In a second phase all labels are resolved

ARCOS Computer Structure 297

Format of an object file

File header. Describes the size and position of each element

inside the file
Text segment: Includes the machine instructions
Data segment: Include the data of global variables
Relocation information: identifies instructions and data words
that depend on absolute addresses. These references must
change if portions of the program are moved in memory.
Every label of j or jal (internal or external)
Addresses of data
Symbol table: label not defined (external references)
Debugging information. Allows to associate machine
instruction to C code and how to interpret data structures

ARCOS Computer Structure 298

Linker

Input: Object code files

Output: executable file
Combines several objet files (.o) into a single executable file
Resolves all references (branch instructions and addresses of
data)
The linker assumes that the first word of the text segment is in
the address 0x00000000
Enables separate compilation of files
Changes to one file do not require recompilation of whole
program
Allow the use of libraries (.a)

ARCOS Computer Structure 299

Linker
.o file 1
text 1
a.out
data 1
Relocated text 1
info 1
Linker Relocated text 2
.o file 2 Relocated data 1
text 2 Relocated data 2
data 2
info 2

ARCOS Computer Structure 300

Format of an executable file

Header. Describes the size and position of each element inside

the file. Includes the start address of the program
Text segment: contains the machine code
Data segment: Includes the data of global variables with initial
values defined
Relocation information: when dynamic libraries are used

ARCOS Computer Structure 301

Loader

Reads an executable file (a.out) and load it in memory

Main
memory

Operating Disk
System

Code

Data
Program

Executable
Stack
file

ARCOS Computer Structure 302

Loader

Belongs to the operating system

Reads the header of the executable in order to obtain the size
of segments
Builds a new space in memory to allocate the code, data, and
stack segments
Copies the instructions and data with initial values from disk
to memory
Copies the arguments passed to the program in the stack
Initializes the registers. Set the PC and stack

ARCOS Computer Structure 303

Libraries

A library is a set of related objects

The object modules can include references to symbols defined
in libraries (function or exported variables)
The system libraries are a set of predefined libraries that offer
services to applications.
Types:
Static libraries: are linked with objects to produce an
executable that include all references resolved. A change in
the library implies to link and generate the executable again
Dynamic libraries (DLL, dynamically linked library)

ARCOS Computer Structure 304

Dynamic libraries

The library routines are not linked into the executable file and
are loaded when the program is loaded in memory
The program includes information to locate the libraries and to
resolve the external references during the execution
Advantages:
Smaller executables
Only the elements used are loaded
A change in the library does not affect the executable file. Is
not necessary to re compilate the code

ARCOS Computer Structure 305

Example
C ⇒ ASM ⇒ Οbj ⇒ Exe ⇒ execution
Program C: example

#include <stdio.h>
int main (int argc, char *argv[])
{
int i, sum = 0;
for (i = 1; i <= 10; i++)
sum = sum + i + i;

printf (“The sum 1 + ... +10 is %d\n", sum);

}

printf(): library function in libc.a

ARCOS Computer Structure 306

Compilation

.text end:
.align 2 la $a0, str
.globl main li $a1, $t1
main: jal printf
subu $sp,$sp,24 move $v0, $0
sw $ra, 20($sp) lw $ra, 20($sp)
sw $a0, 4($sp) lw $a0, 4($sp)
sw $a1, 8($sp) lw $a1, 8($sp)
addiu $sp,$sp,24
li $t0, 0 jr $ra
li $t1, 0 .data 7 pseudo-
loop: .align 0
instructiones
bgt $t0, 10, end
add $t1, $t1, $t0 str:
addi $t0, $t0, 1 .asciiz "The sum
1 + ... +10 is
b end %d\n "
ARCOS Computer Structure 308
Compilation
Elimination of pseudoinstructions
.text end:
.align 2 lui $4, l.str
.globl main ori $4, $4, r.str
main: addu $4, $0, $9
addiu $29,$29,-24 jal printf
sw $31, 20($29) addu $2, $0, $0
sw $4, 4($29) lw $31, 20($29)
sw $5, 8($29) lw $4, 4($29)
ori $8, $0, 0 lw $5, 8($29)
ori $9, $0, 0 addiu $29,$29,24
loop: jr $31
slti $1, $8, 11
beq $1, $0, end
add $9, $9, $8
addi $8, $8, 1
bgez $0, loop
ARCOS Computer Structure 309
Compilation
Assign addresses
00 addiu $29,$29,-24 2c lui $4, l.str
04 sw $31, 20($29) 30 ori $4, $4, r.str
08 sw $4, 4($29) 34 addu $4, $0, $9
0c sw $5, 8($29) 38 jal printf
10 ori $8, $0, 0 3c addu $2, $0, $0
14 ori $9, $0, 0 40 lw $31, 20($29)
18 slti $1, $8, 11 44 lw $4, 4($29)
1c beq $1, $0, end 48 lw $5, 8($29)
20 add $9, $9, $8 4c addiu $29,$29,24
24 addi $8, $8, 1 50 jr $31
28 bgez $0, loop

ARCOS Computer Structure 310

Compilation
Create symbol table and relocation table
Symbol table
Label address (in module) type
main: 0x00000000 global text
bucle: 0x0000001c local text
str: 0x00000000 local data
Relocation information
Address Instr. type Dependency
0x0000002c lui l.str
0x00000030 ori r.str
0x00000038 jal printf

ARCOS Computer Structure 311

Compilation
Resolve local PC-relative labels
00 addiu $29,$29,-24 2c lui $4, l.str
04 sw $31, 20($29) 30 ori $4, $4, r.str
08 sw $4, 4($29) 34 addu $4, $0, $9
0c sw $5, 8($29) 38 jal printf
10 ori $8, $0, 0 3c addu $2, $0, $0
14 ori $9, $0, 0 40 lw $31, 20($29)
18 slti $1, $8, 11 44 lw $4, 4($29)
1c beq $1, $0, 3 48 lw $5, 8($29)
20 add $9, $9, $8 4c addiu $29,$29,24
24 addi $8, $8, 1 50 jr $31
28 bgez $0, -4

ARCOS Computer Structure 312

Text segment in object file
0x000000 00100111101111011111111111101000
0x000004 10101111101111110000000000010100
0x000008 10101111101001000000000000000100
0x00000c 10101111101001010000000000001000
0x000010 10001101000000000000000000000000
0x000014 10101101001000000000000000011100
0x000018 00101000001010000000000000001011
0x00001C 00010000001000000000000000000011
0x000020 00000001001010000100100000100000
0x000024 00100001000010000000000000000001
0x000028 00000100000000001111111111111100
0x00002C 00111100000001000000000000000000
0x000030 00110100100001000000000000000000
0x000034 00000001001001000000000000100001
0x000038 00001100000000000000000000000000
0x00003c 00000000000000000001000001000001
0x000040 10001111101111110000000000010100
0x000044 10001111101001000000000000000100
0x000048 10001111101001010000000000001000
0x00004c 00000011111000000000000000011000
0x000050 00000000000000001110100000001000

ARCOS Computer Structure 313

Link

Combine example.o and libc.a

Create absolute memory addresses
Modify and merge symbol and relocation tables
Symbol Table
Label Address
main: 0x00000000
loop: 0x0000001c
str: 0x10000430
printf: 0x000003b0 …
Relocation Information
Address Instr. Type Dependency
0x0000002c lui l.str
0x00000030 ori r.str
0x00000038 jal printf …
ARCOS Computer Structure 314
Link
Resolve addresses
00 addiu $29,$29,-24 2c lui $4, 4096
04 sw $31, 20($29) 30 ori $4, $4, 1072
08 sw $4, 4($29) 34 addu $4, $0, $9
0c sw $5, 8($29) 38 jal 812
10 ori $8, $0, 0 3c addu $2, $0, $0
14 ori $9, $0, 0 40 lw $31, 20($29)
18 slti $1, $8, 11 44 lw $4, 4($29)
1c beq $1, $0, 3 48 lw $5, 8($29)
20 add $9, $9, $8 4c addiu $29,$29,24
24 addi $8, $8, 1 50 jr $31
28 bgez $0, -4

ARCOS Computer Structure 315

Link

Generation of executable file

Single text segment
Single data segment
Header with information of each segment

ARCOS Computer Structure 316

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