0% found this document useful (0 votes)
104 views

Interrupts: Intel 8085 Microprocessor

The document discusses interrupts in the Intel 8085 microprocessor. It describes interrupts as a mechanism that allows I/O devices or instructions to suspend normal processor execution to request service. The 8085 supports hardware and software interrupts that are vectored or non-vectored, maskable or non-maskable. Hardware interrupts come through physical pins, while software interrupts are inserted in programs. The 8085 also has interrupt-related instructions like EI, DI, RIM and DIM that control interrupt enabling/disabling and status reading.

Uploaded by

antonio
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
104 views

Interrupts: Intel 8085 Microprocessor

The document discusses interrupts in the Intel 8085 microprocessor. It describes interrupts as a mechanism that allows I/O devices or instructions to suspend normal processor execution to request service. The 8085 supports hardware and software interrupts that are vectored or non-vectored, maskable or non-maskable. Hardware interrupts come through physical pins, while software interrupts are inserted in programs. The 8085 also has interrupt-related instructions like EI, DI, RIM and DIM that control interrupt enabling/disabling and status reading.

Uploaded by

antonio
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 16

Intel 8085 Microprocessor

INTERRUPTS

Aashutosh Aryal
Contents

Introduction
1 A brief introduction to what interrupts are.

Categories of Interrupts
2 Categories of different interrupts present in
the Intel 8085 microprocessor.

Instructions for Interrupts


3 Interrupt related instructions present in the
8085 microprocessor.

2
INTERRUPTS

Interrupt is a mechanism by which an I/O device or an instruction can


suspend the normal execution of the processor and get itself served.

In a microprocessor based system, interrupts are used for transferring


data between the peripheral devices and the microprocessor.

When an interrupt is received, the microprocessor sends an Interrupt


Acknowledgement (INTA) signal to the peripheral device which is
requesting its service.

3
Interrupt Service Routine

The Interrupt Service Routine (ISR) is a small program or a routine


what when executed services the corresponding interrupt source.

4
Classification of the 8085
Interrupts

1. Hardware and Software Interrupts

2. Vectored and Non-vectored Interrupts

3. Maskable and Non-maskable Interrupts


HARDWARE INTERRUPTS

Interrupt Signals received through the physical pins of a


microprocessor are called Hardware Interrupts.

There are five hardware interrupts in the Intel 8085 microprocessor.


They are:
INTR
RST 7.5
RST 6.5
RST 5.5
TRAP

6
HARDWARE INTERRUPTS

7
SOFTWARE INTERRUPTS

Interrupt Signals which are inserted in between the program written


for a microprocessor are called Software Interrupts.

There are eight software interrupts in the Intel 8085 microprocessor.


They are:
RST 0 RST 4
RST 1 RST 5
RST 2 RST 6
RST 3 RST 7

8
VECTORED INTERRUPTS

Vectored Interrupts are those interrupts which have fixed vector


address and after executing these. the program control is transferred
to that address.

Interrupt Vector Address


TRAP 24H
RST 5.5 2CH
RST 6.5 34H
RST 7.5 3CH

9
NON-VECTORED INTERRUPTS

Non-vectored Interrupts are those in which vector address is not


predefined.

The interrupting device gives the address of the sub-routine for these
interrupts.

INTR is the only non-vectored interrupt in the Intel 8085 microprocessor.

10
MASKABLE INTERRUPTS

Maskable Interrupts are those which can be disabled or ignored by the


microprocessor.

Maskable Interrupts are either edge triggered or level-triggered.

INTR, RST 7.5, RST 6.5, RST 5.5 are maskable interrupts of the Intel 8085
microprocessor.

11
NON-MASKABLE INTERRUPTS

Non-Maskable Interrupts are those which cannot be disabled or ignored


by the microprocessor.

Maskable Interrupts are both edge triggered and level-triggered and are
used in power failure condition..

TRAP is the only non-maskable interrupt of the Intel 8085 microprocessor.

12
PRIORITY OF INTERRUPTS

TRAP RST 7.5 RST 6.5 RST 5.5 INTR

Highest Lowest

13
INSTRUCTIONS FOR INTERRUPTS

The Intel 8085 microprocessor supports four instructions for the control of
interrupts. These instructions are:
EI DI RIM DIM

● EI - The EI instruction is used to enable RST 7.5, RST 6.5, RST 5.5, INTR
interrupts. After the interrupt is acknowledged, the interrupt flip-flop
resets and disables all the interrupts.

● DI - The DI instruction is used to reset the enable flip-flop and hence it


disables RST 7.5, RST 6.5, RST 5.5 and INTR interrupts.

14
INSTRUCTIONS FOR INTERRUPTS

● SIM - The Set Interrupt Mask (SIM) instruction is used to set interrupt
mask and send serial output. It transfers the contents of the
accumulator to the interrupt control logic and serial I/O port.

● RIM - The Read Interrupt Mask (RIM) instruction is used to read the
status of hardware interrupts. It also reads the condition of the SID
(Serial Input Data) bit on the microprocessor.

15
Thank you!

Does anyone have any questions?

16

You might also like