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Coa Slide 1 PDF

This document provides an introduction to computer instructions and the MIPS instruction set. It discusses how instructions are the language of the computer and make up its vocabulary through the instruction set. It provides examples of MIPS instructions for arithmetic, logical, and data transfer operations. It also explains how instructions are represented in binary machine language and provides examples of encoding common MIPS instructions.

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94 views

Coa Slide 1 PDF

This document provides an introduction to computer instructions and the MIPS instruction set. It discusses how instructions are the language of the computer and make up its vocabulary through the instruction set. It provides examples of MIPS instructions for arithmetic, logical, and data transfer operations. It also explains how instructions are represented in binary machine language and provides examples of encoding common MIPS instructions.

Uploaded by

Tuli Devi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Computer Organization and

Architecture
Instructions: Language of the Computer
Slide no: 01
Md. Neamul Haque
Lecturer, Computer Science and Engineering, Premier University
Reference book

 Computer System Architecture (3rd Edition)


by M. Morris Mano
 Computer Organization and Design (3rd Edition)
by David A. Patterson
John L. Hennessy
 Internet
Introduction

 Instruction: The words of a computer’s language.


 Instruction set: It’s vocabulary.
 MIPS: Microprocessor without Interlocked Pipeline Stages.
Operations of the computer hardware

add a,b,c # a=b+c


 Rigid notation.
 MIPS instructions can execute only one operation(Three operands).

For that reason--


a=b+c+d+e
 add a,b,c
 add a,a,d
 add a,a,e
Compiling a complex C assignment
into MIPS
f=(g+h)-(i+j)
 add t0 , g , h
 add t1 , I , j
 sub f, t0 , t1
Operands of the Computer Hardware

 The size of a register in the MIPS architecture is 32 bits.


 Groups of 32 bits occur so frequently that they are given the name wors in
the MIPS architecture.
 Registers in use:

Preserved register Not preserved register


Saved : $s0 - $s7 Temporary : $t0 - $t9
Stack pointer : $sp Argument: $a0 - $a3
Return address : $ra Return value : $v0 - $v1
Stack above the stack pointer Stack below the stack pointer
Compiling a C assignment using
Register
f= (g+h) – (i+j)
 f -> $s0 , g -> $s1 , h -> $s2 , i -> $s3 , j -> $s4 (assigned)
 add $t0 , $s1 , $s2
 add $t1 , $s3 , $s4
 sub $s0 , $t0 , $t1
Memory operands
 Arithmetic operations occur only on registers in MIPS instructions.
 So, MIPS must include instructions that transfer data between memory and
register, such instructions are called data transfer instructions.
 load (lw): load word, copies data from memory to register.
 store (sw): store word, copies data from register to memory.

4 100
3 10
Memory
2 21
1 32
0 67

Processor Address data


Compiling an assignment when an
operand is in Memory
g= h + A[8]
 assign g-> $s1, h-> $s2 , base of A-> $s3
 lw $t0 , 8($s3)
# address of array element = base of the array + number to select element 8.
 add $s1 , $s2 , $t0

 The constant in a data transfer instruction is called offset.


 The register added to form the address is called the base register.
Hardware Software interface

 In MIPS, words must start at addresses that are multiples


of 4. This requirement is called an alignment restriction.
 To get the proper byte address in the previous code
(previous page) , the offset to be added to the base
register $s3 must be 4x8 or 32 .
Compiling using load and store

A[12]=h+A[8]
 lw $t0 , 32($s3)
# temporary register $t0 gets A[8]
 add $t0 , $s2 , $t0
# temporary register $t0 gets h+A[8]
 sw $t0 , 48($s3)
# stores h+A[8] back into A[12]
Representing instructions in the
computer
MIPS R-Format Instructions
MIPS I-Format Instructions
chart to remember
 valus are provided in the table are in decimal.
 reg—0 t0 31
 address – 16 bit address

Instruction format op rs rt rd shamt funct address

add R 0 reg reg reg 0 32 n.a.

sub R 0 reg reg reg 0 34 n.a.

add I 8 reg reg n.a. n.a. n.a. constant


immediate
lw I 35 reg reg n.a. n.a. n.a. address

sw I 43 reg reg n.a. n.a. n.a. address


Translating MIPS Assembly Language
into Machine Language
 A[300]=h+A[300]
here if $t1 has the base of the array A and $s2 corresponds to h, then
compiled into –
 lw $t0 , 1200($t1)
 add $t0 , &s2 , $t0
 sw $t0, 1200($t1)
What is the MIPS machine language code for these three instructions?
continue..
op rs rt rd address/ funct
shamt
35 9 8 1200
0 18 8 8 0 32
43 9 8 1200

op rs rt rd address/ funct
shamt
10 011 01 001 01 000 0000 0100 1011 0000
000 000 10 010 01 000 01 000 00 000 100 000
10 011 01 001 01 000 0000 0100 1011 0000
Logical operations
Shift operation
Continue…

 srl- shift right logic


 sll- shift left logic
 0000 0000 0000 1001 before shifting.
after shift left by 4 we get the above number 0000 0000 1001 0000
 sll $t2, $s0, 4 #reg $t2 = reg $s0 << 4 bits
 The machine language version of the above instruction is
op rs rt rd shamt funct
0 0 16 10 4 0
AND operation
OR operation
NOT operation
End of the slide
Thank you
Any question?

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