®

RT8807/A

Two Phases Synchronous Buck PWM Controller

General Description Features
The RT8807/A is a two phases synchronous Buck PWM  Two-Phase Power Conversion with Single 12V
controller with integrated drivers which is optimized for Power Supply
high-performance graphic microprocessor and computer  Embedded 5V Upper Gate Driver and 12V Lower
applications. The IC integrates a voltage mode PWM Gate Driver
controller, two 5V MOSFET drivers with internal bootstrap  Internal Regulated 5V Output
diodes, as well as output current monitoring and protection  Precise Core Voltage Regulation
functions into the V/WQFN-24L 4x4 package.  Selectable Internal / External Reference
 Differential Inductor DCR Current Sense
The inductor currents are sensed by lossless DCR current
 External Programmable Voltage Droop Control
sensing technique for current balance and over current
 Enable Control for External Shutdown
protection. The RT8807/A also features a reference tracking
 Adjustable Operating Frequency
mode operation in which the feedback voltage is regulated
 Adjustable Soft Start
and tracks external input reference voltage. Other features
 Power Good and Output Current Indication
include output current indication, adjustable operating
 Adjustable Over Current Protection
frequency, adjustable soft-start, power good, external
 Over Voltage Protection
compensation, and enable/shutdown functions.
 Under Voltage Protection
 Over Temperature Protection
Ordering Information  Proprietary BTR (Boost Transient Response)
RT8807
Feature Reducing Output Voltage Drop During Load
Package Type Transition (For RT8807 Only)
QV : VQFN-24L 4x4 (V-Type)  RoHS Compliant and 100% Lead(Pb)-Free
(Exposed Pad-Option 1)

Lead Plating System Applications

P : Pb Free
G : Green (Halogen Free and Pb Free)  Middle to High End GPU Core Power
 High End Desktop PC Memory Core Power
RT8807A
 Low Voltage, High Current DC / DC Converter
Package Type  Voltage Regulator Modules
QW : WQFN-24L 4x4 (W-Type)
(Exposed Pad-Option 1)
Lead Plating System Marking Information
G : Green (Halogen Free and Pb Free) For marking information, contact our sales representative
Note : directly or through a Richtek distributor located in your
Richtek products are : area.
RoHS compliant and compatible with the current require-
ments of IPC/JEDEC J-STD-020.
Suitable for use in SnPb or Pb-free soldering processes.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

1
RT8807/A
Pin Configurations
(TOP VIEW)

PHASE1

PHASE2
LGATE1

LGATE2
DROOP
VCC
24 23 22 21 20 19

UGATE1 1 18 UGATE2
BOOT1 2 17 BOOT2
5VCC 3 16 REFOUT/PGOOD
PGND
AGND 4 15 REFIN/EN
EN2B 5 14 SS
25
CSP1 6 13 FB
7 8 9 10 11 12

CSP2
CSN1
CSN2

IOUT/IMAX
RT
COMP
V/WQFN-24L 4x4

Typical Application Circuit

VCC
12V
EXT_12V

+
EXT_12V EXT_12V_DETB
DET R1 C6 C7
RT8807/A
Circuits R2 5 2 R14
EN2B BOOT1
EXT_12V
R3 16 REFOUT/
1 /VCC12V
C1 PGOOD UGATE1 Q1 C8 VOUT
22
VCC L1
Internal Reference mode PHASE1 24
C2 3
5VCC 5VCC
23
+
15 REFIN/ LGATE1 Q2
EN
+

Optional 4 C12 C13

AGND 17 R15 C10 C11
BOOT2
External Reference C3 14 C9
SS
Voltage (0.45 to 2.5V) 18
R4 11 UGATE2 Q3
RT
R5 10 IOUT/ L2
19
PHASE2
IMAX
+

R6 C4 12 20 C14 C15
COMP LGATE2 Q4
C5 8 R10
CSN2
R7 7 R11
13 CSN1
FB
9 R12
R16 R8 CSP2 PHASE2
Optional 6 R13
21 CSP1 PHASE1
C18 DROOP
C16 C17
R9

Figure 1. Typical Application Circuit with 12V Input

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

2
 RT8807/A
Function Block Diagram
5VCC EN2B

5VCC
VCC BOOT1

Gate UGATE1
5VCC Regulator & Control
Power On Reset Logic & PHASE1
Shoot VCC
Oscillator & Through
Pulse Prevention LGATE1
RT Ramp
Width PGND
Generator
Modulator 5VCC
& Central BOOT2
REF Select 0.6V
REFIN/EN Control
REF
Logic Gate UGATE2
SS Soft Start Control
AGND REF Buffer Logic & PHASE2
50% 75% 115% Shoot VCC
Through
Prevention LGATE2
PGND
UV/OV
OCP
REFOUT/PGOOD Protection & + CSP1
PGOOD Error GM1
Amplifier - CSN1
Current SENSE
+
+ CSP2
- GM2
- CSN2

FB COMP IOUT/IMAX DROOP

Power up scheme to support dual power rails application

This feature is to support the following case in the application where one phase is powered by PCIEBUS_12V and the
other phase is powered by EXT_12V.
When the system is powered without EXT_12V Cable, RT8807/A will work with one phase and be able to boot system
into Dos Warning screen.
The Warning message tells user to power off the system first, plug in the EXT_12V Cable, and then reboot the system
again.
After system re-boot, RT8807/A could work with two phases.

Below is the power up sequence for dual VIN (PCIEBUS_12V & EXT_12V) application. This application is classified
into two cases :

<1> The external connector is not plugged while power on

The EXT_12V_DETB is pulled up to High. Soft-start will be released to ramp up after POR. After T1, RT8807/A latches
EN2B signal and determines to operate in single phase. The time interval T1 is used to wait EN2B ready. Once single
phase is confirmed, the external 12V power connector plugged or not will not affect the status.

<2> The external connector is plugged while power on

The EXT_12V_DETB is grounded by external cable detection circuits. RT8807/A latches EN2B at T1 and determines to
operate in two phases. If the connector is removed later, RT8807/A will turn off phase 2 and enter single phase operation
mode. Further plugged in/out will not affect the status anymore.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

3
RT8807/A

~us
First PWM Pulse

VIN Detection Latch Signal

T1

Soft-Start

EN2B/EXT_12V_DETb

One/Two Phase Operation Two Phase One Phase

Figure 2. External Connector is not Plugged

~us
First PWM Pulse

VIN Detection Latch Signal

T1

Soft-Start

EN2B/EXT_12V_DETb

One/Two Phase Operation Two Phase One Phase

Figure 3. External Connector is Plugged

Functional Pin Description

UGATE1 (Pin 1), UGATE2 (Pin 18) 5VCC (Pin 3)
Upper Gate Drivers. Theses pins provide the gate drive for Internal Regulator Power Pin. The regulated voltage
the converter's high-side MOSFET. Connect these pins provides power supply for all low-voltage circuits. Bypass
to the high-side MOSFET gate. at least 1uF ceramic capacitor to sustain high PSRR.

BOOT1 (Pin 2), BOOT2 (Pin 17) AGND (Pin 4)

Bootstrap Power Pins. Theses pins power the high-side Signal ground for the IC. All voltage levels are measured
MOSFET drivers. with respect to this pin.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

4
 RT8807/A
EN2B (Pin 5) REFIN/EN (Pin 15)
EXT_12V Detection Pin. RT8807/A latches high/low status External Reference Input.
of this pin in soft start period. If the result is low, RT8807/ If pulled up to 5VCC, internal reference is used (0.6V)
A will enter two phase operation. If it's high, RT8807/A
turns off phase2 and operate in single phase only. If driven by external voltage ranged from 0.45V to 2.5V,
external reference is used
CSP1 (Pin 6), CSP2 (Pin 9) If pulled below 0.4V, device is disabled.
These pins are positive input of current sensing
transconductance amplifiers 1 and 2. REFOUT/PGOOD (Pin 16)
Reference Out and Power GOOD. This pin drives 1.15V
CSN1 (Pin 7), CSN2 (Pin 8) out once FB exceeds ~72.5% of the reference voltage
These pins are negative input of current sensing after soft- start ends. This pin keeps at this voltage
transconductance amplifiers 1 and 2. regardless of internal or external reference is used.

IOUT/IMAX (Pin10) PHASE1 (Pin 24) PHASE2 (Pin 19)

Output Current Indication. This pin sends a current out These pins are return nodes of the high-side driver.
(IX) referred to the sum of two sensed inductor currents Connect these pins to high-side MOSFET sources
sense value. Connect this pin through a resistor to ground. together with the low-side MOSFET drain and the
(IOUT = 4 x IX). This pin also sets maximum current limit inductors.
threshold.
LGATE1 (Pin 23), LGATE2 (Pin 20)
RT (Pin11)
Lower Gate Drivers. Theses pins provide the gate drive for
Frequency Timing Resistor. Connect a resistor from RT the converter's low-side MOSFET. Connect these pins to
to AGND to set the clock frequency. the low-side MOSFET gate.

COMP (Pin 12) DROOP (Pin 21)

Compensation Pin. This pin is the output of the error amplifier. Set the load line for droop control. Connect this pin with a
resistor to ground.
FB (Pin 13)
Feedback Pin. This pin is connected to the PWM converter VCC (Pin 22)
output's voltage or a resistor divider. This pin also connects Provide a 12V supply voltage for the IC. Connect a
to the inverting input of error amplifier and the PGOOD/ 10Ω/1uF low pass filter to sustain high PSRR.
UV/OV detection circuits.
PGND [Exposed Pad (25)]
SS (Pin 14) Power ground pin. Tie the synchronous PWM converter's
Soft-Start Pin. Connect a capacitor from this pin to ground low-side MOSFET source to this pin.
to set the soft-start interval.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

5
RT8807/A
Absolute Maximum Ratings (Note 1)
 Supply Voltage, VCC ------------------------------------------------------------------------------------- −0.3V to 15V
 PHASE to GND
DC ------------------------------------------------------------------------------------------------------------ −2V to 15V
< 200ns ----------------------------------------------------------------------------------------------------- −5V to 22V
 BOOT to PHASE ----------------------------------------------------------------------------------------- −0.3V to 7V
 BOOT to GND

DC ------------------------------------------------------------------------------------------------------------ −0.3V to VCC + 7V

< 200ns ----------------------------------------------------------------------------------------------------- −0.3V to 30V
 UGATE

DC ------------------------------------------------------------------------------------------------------------ VPHASE −0.3V to VBOOT + 0.3V

< 200ns ----------------------------------------------------------------------------------------------------- VPHASE −2V to VBOOT + 0.3V
 LGATE

DC ------------------------------------------------------------------------------------------------------------ −0.3V to VCC + 0.3V

< 200ns ----------------------------------------------------------------------------------------------------- −2V to VCC + 0.3V
 Other Input, Output or I/O Voltage -------------------------------------------------------------------- −0.3V to 7V
 Power Dissipation, PD @ TA = 25°C

V/WQFN−24L 4x4 ---------------------------------------------------------------------------------------- 1.923W

 Package Thermal Resistance (Note 2)
V/WQFN−24L 4x4, θJA ---------------------------------------------------------------------------------- 52°C/W
 Lead Temperature (Soldering, 10 sec.) -------------------------------------------------------------- 260°C
 Junction Temperature ------------------------------------------------------------------------------------ 150°C
 Storage Temperature Range --------------------------------------------------------------------------- −40°C to 150°C
 ESD Susceptibility (Note 3)
HBM (Human Body Mode) ----------------------------------------------------------------------------- 2kV
MM (Machine Mode) ------------------------------------------------------------------------------------- 200V

Recommended Operating Conditions (Note 4)

 Supply Voltage -------------------------------------------------------------------------------------------- +12V ±10%
 Junction Temperature Range --------------------------------------------------------------------------- −40°C to 125°C
 Ambient Temperature Range --------------------------------------------------------------------------- −40°C to 85°C

Electrical Characteristics
(VIN = 12V, PGND = 0V, TA = 25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Unit
VCC Supply Input
VCC Supply Voltage VCC 10.8 12 13.2 V
VCC Supply Current ICC REFIN/EN = 0V (static) -- 5 -- mA
5VCC Supply Output
5VCC Supply Voltage V5VCC VCC = 12V 4.8 5.15 5.5 V
5VCC Output Sourcing I5VCC VCC = 12V 20 -- -- mA

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

6
 RT8807/A
Parameter Symbol Test Conditions Min Typ Max Unit
Power On Reset
VCC Rising Threshold V VCCTH V CC Rising 6.7 7.5 8.3 V
VCC Hysteresis V VCCHY -- 0.45 -- V
EN2B High Threshold V EN2BTH EN2B Rising 1 1.15 1.3 V
REFIN/EN
Enable Rising Threshold V ENTH REFIN/EN Rising 0.35 0.4 0.45 V
Enable Hysteresis V ENHYS -- 50 -- mV
REFIN Tracking Range 0.45 -- 2.5 V
Reference Voltage Accuracy (use Internal Reference)
Reference Voltage REFIN Pull-High to 5VCC 0.591 0.6 0.609 V
V REF
Accuracy FB Coupled to COMP 1.5 -- +1.5 %
Reference Voltage Accuracy (use External Reference)
V REFIN = 0.45V to 0.6V 6 -- +6 mV
Accuracy
V REFIN = 0.6V to 2.5V 1 -- +1 %
REFOUT / PGOOD
REFOUT/PGOOD Voltage 1.127 1.15 1.173 V
V REFOUT
Accuracy V FB > 75% of Reference Voltage 2 -- +2 %
REFOUT Output Sourcing IREFOUT 3 5 -- mA
Error Amplifier
DC Gain A DC No load -- 70 -- dB
Gain-Bandwidth GBW C LOAD = 10pF -- 8 -- MHz
Slew Rate SR C LOAD = 10pF 5 -- -- V/us
Transconductance GM -- 2400 -- uA/V
Current Sense Amplifier
V CSP = 1V
Max Current IGM(MAX) 100 -- -- uA
Sink Current from CSN
Oscillator
Running Frequency f OSC R RT = 20k 450 500 550 kHz
Max Duty Cycle D 70 75 80 %
Ramp Amplitude ΔVRAMP -- 2.6 -- V
Soft Start
Soft Start Current ISS 14 20 30 uA
Protection
Over Current Threshold V OCP Sweep IOUT/IMAX Voltage 2.07 2.3 2.53 V
Over-Voltage Threshold V OVP Sweep FB Voltage 115 125 135 %
Under-Voltage Threshold V UVP Sweep FB Voltage 45 55 63 %
Over Temperature Threshold T OTP -- 160 -- °C
Power GOOD
Active Threshold V FB Rising 65 72.5 80 %

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

7
RT8807/A
Parameter Symbol Test Conditions Min Typ Max Unit
Gate Driver
BOOT  PHASE = 5V
Upper Drive Source RUSOURCE -- 1.5 3 
250mA Source Current
BOOT PHASE = 5V
Upper Drive Sink RUSINK -- 1.5 4 
250mA Sink Current
VCC = 12V
Lower Drive Source ILSOURCE 1 -- -- A
VLGATE = 6V
VCC = 12V
Lower Drive Sink RLSINK -- 0.9 2 
250mA Sink Current
Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for
stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended
periods may remain possibility to affect device reliability.
Note 2. θ JA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 3. Devices are ESD sensitive. Handling precaution is recommended.
Note 4. The device is not guaranteed to function outside its operating conditions.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

8
 RT8807/A
Typical Operating Characteristics
Switching Frequency vs. Temperature Start Up in Short Circuit
430
VIN = 12V
420
Switching Frequency (kHz)1

IOUT/IMAX
410 (2V/Div)
VOUT
400
(1V/Div)
390

380
I LOAD
370 (50A/Div)

360
PHASE2
(10V/Div)
VIN = 12V, VOUT = 1.2V, No Load, RRT = 26.1k
350
-40 -20 0 20 40 60 80 100 120 140
Time (250us/Div)
Temperature (°C)

Over Current Protection Power On from REFIN

VIN = 12V, VOUT = 1.2V

IOUT/IMAX SS
(2V/Div) (1V/Div)
VOUT
VOUT (1V/Div)
(1V/Div)

I LOAD REFIN
(50A/Div) (200mV/Div)
PHASE2 PGOOD
(10V/Div) (1V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 55A

Time (250us/Div) Time (2ms/Div)

Power Off from REFIN Power On from VCC

SS SS
(1V/Div) (1V/Div)
VOUT VOUT
(1V/Div) (1V/Div)

REFIN
(500mV/Div)
VCC
(5V/Div)
PGOOD
PGOOD
(1V/Div)
VIN = 12V, VOUT = 1.2V, IOUT = 55A (1V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 55A

Time (1ms/Div) Time (2ms/Div)

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

9
RT8807/A

Power Off from VCC Single-phase Operation

SS UGATE1
(1V/Div) (20V/Div)

VOUT EN2B
(1V/Div) (2V/Div)

VCC VOUT
(5V/Div) (1V/Div)
PGOOD UGATE2
(1V/Div) VIN = 12V, VOUT = 1.2V, IOUT = 55A (20V/Div) VIN = 12V, VOUT = 1.2V, No Load

Time (100us/Div) Time (50ms/Div)

Two-phase to Single-phase Inductor Current vs. Output Current

30

UGATE1 25
(20V/Div)
Inductor Current (A)

20
EN2B IL1
(2V/Div) 15

IL2
VOUT 10
(1V/Div)
UGATE2 5
(20V/Div) VIN = 12V, VOUT = 1.2V, No Load VIN = 12V, VOUT = 1.2V, FSW = 400kHz
0
0 5 10 15 20 25 30 35 40 45 50 55
Time (50ms/Div)
Output Current (A)

Efficiency vs. Output Current

90
FSW = 300kHz
85

80 FSW = 400kHz
Efficiency (%)

75

70

65

60

55
VIN = 12V, VOUT = 1.2V
50
0 5 10 15 20 25 30 35 40 45 50 55
Output Current (A)

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

10
 RT8807/A
Application Information
The RT8807/A is a dual-phase voltage-mode synchronous VVCCTH ˜ 7.5V

buck controller with embedded MOSFET drivers and VCC

protection functions for low-voltage high-current
SS
applications. The bootstrap diode is integrated into the IC 72.5% of VOUT

to reduce the external component count. In addition, the VOUT

number of operating phase (two-phase/single-phase) is PGOOD

selectable to provide user with more flexibility in circuit
design. The inductor current is sensed by innovative DCR Figure 1. Power on Sequence
current sensing technique for current balance and over
During the soft start, the voltage on SS pin gradually
current protection.
increases, and the output voltage of the error amplifier is
Power On Reset clamped to prevent the inrush current from the input
capacitors. Once the output voltage exceeds the power
The RT8807/A initiates its soft start cycle only after the
good threshold level (72.5% of output voltage), REFOUT/
IC power supply, VCC, and the internal regulated 5VCC
PGOOD pin will drive and maintain an reference voltage
are ready. The internally regulated 5VCC is used for all of
1.15V unless VCC falls below POR threshold or Under
the internal logic control circuit and the embedded high-
Voltage occurs.
side MOSFET driver. The bootstrap diode for the high-
side MOSFET driver is integrated into the IC to reduce
Internal/External Reference
the external component count. In addition, VCC is used
The RT8807/A supports the selectable internal/external
for the low-side MOSFET driver to reduce the RDS(ON) of
reference voltage to provide more flexibility in practical
the low-side MOSFET for enhanced efficiency
applications. The selection of the internal/external
consideration.
reference is described in detail as follows.
The power on reset (POR) circuitry monitors the supply
voltage to ensure that the supply voltage is high enough a. Using Internal Reference
for controller's normal operation. Once VCC and 5VCC The internal reference voltage of the RT8807/A is set at
exceed the POR rising threshold, the RT8807/A releases 0.6V. When using the internal reference, REFIN/EN pin
the reset state, and works according to the settings. should be connected to 5VCC. REFIN/EN pin is also used
Additionally, once any one of these two voltages is lower for the enable function, the RT8807/A will not be enabled
than its POR falling threshold value, the chip turns off. at start up if the voltage at the REFIN/EN pin is lower than
The hysteresis between the rising and falling thresholds VENTH.
ensures that once the chip is enabled, it will not be
inadvertently turned off unless the bias voltage drops b. Using External Reference
substantially. To use the external reference, the applied voltage on
REFIN/EN pin should be within the tracking range (typically
Soft Start and Power Good between 0.45V to 2.5V). This externally input voltage is
Once the POR state is released, the soft start cycle used as the reference voltage for the error amplifier.
begins. A 20uA current source charges the capacitor, CSS, Therefore, the RT8807/A operates in the tracking mode
which is connected between SS pin and GND to set the because the feedback voltage continuously tracks the
soft start time. Figure 1 shows the power on sequence. external reference voltage.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

11
 RT8807/A
Operating Frequency Setting to the inductor current. When the time constant of the
The converter switching frequency is programmed by R-C network is equal to the time constant of the inductor,
simply connecting the resistor RRT between RT pin and the voltage drop across the DCR is equal to the voltage
GND. Make sure the RRT is firmly connected between RT across the capacitor, namely VDCR = VC.
pin and GND with a short trace length. If the RRT is removed, As shown in Figure 3, the differential GM amplifier converts
there will not be any free running frequency. Figure 2 the voltage signal to a current signal IX for current balance
illustrates the switching frequency versus RRT. and output voltage droop control. The following equations
provide the calculation to determine the parameter values
Switching Frequency vs. RRT
1100 of the current sensing network and RCSN.
1000 If L  R  C, than VC = VDCR = DCR  IL
DCR
Switching Frequency (kHz)

900
800 VC
The GM amplifier output current IX =
700
RCSN
600
L DCR
500
+ V DCR -
400 IL
C
300
200 R + VC -
100 +

0 -
R CSN
0 25 50 75 100 125 150 175 200 225 GMx

RRT (k
(kΩ)) Ix

Figure 2. Switching Frequency vs. RT Resistance Figure 3. DCR Current Sense Circuit

Dead Zone Elimination

Control Loop
When the converter is in the light load condition, the voltage
The RT8807/A is a two-phase voltage-mode PWM
across the sensing capacitor, VC, will be negative. However,
controller. The control loop includes the power stage
the RT8807/A can not provide a negative I X and
(MOSFETs, inductors and output capacitors), the error
consequently is not able to sense the negative inductor
amplifier, the compensation network and the PWM
current. This results in a dead zone in the load line
modulator. The converter's output voltage is sensed as
application. Therefore, a technique as shown in Figure 4
the feedback voltage through the divider resistors and then
is utilized to eliminate the dead zone of the load line at
fed into the negative input of the high-gain error amplifier.
light load condition. Referring to Figure 4, IX can be
The two-phase PWM signals are generated by the PWM
expressed as follows when voltage VC is negative.
modulator, which compares the output voltage of the error
amplifier with two sawtooth waves, which are out of phase. (VOUT  IL  DCR) IL  DCR
IX = 
Therefore, the output voltage of the converter is determined RCSN2 RCSN
by the on-time duty ratio of the PWM signals. With proper
To make sure that the RT8807/A can sense the inductor
compensation, the feedback voltage can be regulated to
current, the right hand side of the above equation should
be equal to the reference voltage VREF with required
always be positive :
transient response.
VOUT I  DCR IL  DCR
 L  0
Inductor Current Sense Setting RCSN2 RCSN2 RCSN
The DCR current sensing is a well-known lossless
technique to obtain a voltage signal which is proportional

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

12
 RT8807/A
Since RCSN2 >> DCR in practical application, the above
Sensed Output
Current
equation can be simplified as : (IX1 + IX2 ) x 2
OCP Circuit
VOUT I  DCR
 L IOUT/IMAX
RCSN2 RCSN
RCSN R IMAX Optional
Therefore, RCSN2  VOUT 
IL  DCR

For example, assuming the negative inductor current is Figure 5. Over Current Protection Function
equal to -5A at no load condition. For RCSN = 390Ω,
Output Voltage Droop Control and Load Line
DCR = 1.7mΩ, VOUT = 1.2V,
Setting
RCSN2  1.2  390 The RT8807/A supports the adaptive voltage droop control.
-5  1.7  10-3 The concept of the output voltage droop control is to set
RCSN2  55.06k the output voltage level to be regulated slightly higher than
Choose RCSN2 = 54.9kΩ the minimum value at light load, and somewhat lower than
the maximum value at full load. As shown in Figure 6, a
L DCR larger downward voltage drop during step load is allowed,
+ V DCR - which means the number of the required output capacitors
IL
C can be reduced or allows the use of capacitor with higher
V OUT
R + VC -
ESR.
+ As a result, the full window of output voltage tolerance
-
R CSN can be used during the transient period (see Figure 7),
GMx
which reduces the overall cost. Another advantage of
Ix
R CSN2 output voltage droop control is that the output power of
the converter at full load is reduced, which greatly facilitates
the thermal design.
Figure 4. Application Circuit for Dead Zone Elimination IOUT

Over Current Protection Function ΔI

?IOUT

The over current threshold is determined by the resistor

connected to IOUT/IMAX pin. The two GM amplifier's V OUT(max)
output currents are summed together and doubled, and
then flows out into the resistor RIMAX, which is connected V OUT ΔV
?V OUT
OUT
With Droop
between IOUT/IMAX pin and the ground. As shown in
V OUT(min)
Figure 5, the RT8807/A uses an external resistor RIMAX to
set a programmable over current trip point. Once the voltage Figure 6. Output Voltage with Droop
across the RIMAX exceeds the threshold VOCP, the OCP
Output Voltage Tolerance

V OUT (V)
function will be triggered. The following equation provides
the calculation of the RIMAX value for a given maximum V OUT(max)
Window

inductor current. If necessary, a small ceramic capacitor

is recommended to be paralleled with the resistor for noise
V OUT(min)
filtering to obtain accurate over current protection.

VOCP  RCSN IOUT (A)

RIMAX 
2  ILOAD(MAX)  DCR No Load Full Load
Figure 7. Load Line
Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

13
RT8807/A
The two GM amplifier output currents (IX1 & IX2) are the threshold will change the controller's operating state
internally summed and doubled, and then sent to DROOP to single-phase operation. However, this operating phase
pin for droop setting. This current flows through the external transition can only be carried out one time and is NOT
resistor RDROOP, which is connected between DROOP and reversible. This means that once the controller changes
GND. its operating state from dual-phase to single-phase, it can
Therefore, the voltage across RDROOP becomes load- not back to dual-phase operation no matter what the
current-dependent. As shown in Figure 8, the voltage voltage change is made at EN2B pin.
across RDROOP is subtracted from the internal/external Besides, also notice that if the RT8807/A is set to be in
reference voltage and then sent to the positive input of the single-phase operation (voltage at EN2B pin is higher the
error amplifier. Therefore, the load line slope can be threshold), it can not be changed to operate in dual-phase
calculated using the following equation. no matter what voltage change is made at EN2B pin. This
dual-phase to single-phase operation transition is
VOUT 2  DCR  RDROOP
Load line slope =  unidirectional.
IOUT RCSN

+ Compensation Network Design

Internal/External +
Reference EA To PWM
- - Comparator In order to have an accurate output voltage regulation with
Sensed Output
fast transient response, an adequate compensator design
Current
(IX1 + IX2) x 2 is necessary.

DROOP FB COMP The RT8807/A uses a high-gain operational

+ transconductance amplifier (OTA) as the error amplifier.
R DROOP V DROOP
-
As Figure 9 shows, the OTA works as the voltage
controlled current source because it takes the difference
Figure 8. Output Voltage Droop Setting of the two voltages as the input for current conversion.
IOUT
Operating Phase Selection GM = , where VM = (VIN+ )  (VIN- )
VM
The number of operating phase is designed to be selectable and VC = IOUT  ZOUT
to have more flexibility in different applications. EN2B pin
is used to select the number of operating phases. V IN+ IOUT
+ GM
VC
After the initial turn-on of RT8807/A, an internal logic circuit
V IN- -
checks the voltage at EN2B pin. The threshold voltage of Z OUT

dual-phase/single-phase operation is typically 1.15V. To

set RT8807/A as the dual-phase PWM controller, the Figure 9. Operational Transconductance Amplifier, OTA
voltage at EN2B pin should be kept below 1.15V.
The OTA output current flows through an impedance to
To set RT8807/A as a pure single-phase PWM controller, produce a voltage, which is referred to as the control
connecting EN2B pin to a voltage that is higher than 1.15V voltage. This control voltage is then fed to the PWM
at power on. The RT8807/A then disables phase 2 modulator to compare with the sawtooth wave.
(UGATE2 and LGATE2 are both held low) and operates as
The first step of compensator design is to calculate the
a single-phase PWM controller.
dc gain of the PWM modulator. Figure 10 shows the PWM
In addition to the selectable number of operating phase, modulator, which is composed of the PWM comparator,
the RT8807/A supports the operating phase transition. the drivers and both the high-side and low-side MOSFET.
Notice that if the controller is set to be in dual-phase The dc gain of the modulator is calculated by the input
operation (voltage at EN2B pin is below the threshold), voltage of the regulator, VIN, divided by the peak-to-peak
further changing the voltage at EN2B pin to be higher than voltage of the oscillator, ΔVOSC.
Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

14
 RT8807/A
VIN
Gainmodulator = V REF
VRAMP R1
+
GM V COMP
V OUT -
C2
V IN FB C1
R2
RF
PWM Driver
Comparator
Error Amplifier Output, V C +
?V OSC PHASE
- Figure 12. Type II Compensator
Driver
Figure 13 shows the Bode diagram of the Type II
Figure 10. PWM Modulator compensator. The frequencies of the single zero and the
two poles are determined as follows.
As shown in Figure 11, the inductor and the output
FP1 = 0
capacitor together form a low-pass L-C output filter. The
FP2 = 1

 
input to the L-C output filter is the PHASE node and the
2  R2  C1 C2
output is the regulator output. The ESR of the output C1+C2
capacitor plays an important role in the compensator 1
FZ1 =
design. The L-C filter introduces a double pole to the 2  R2  C2
system transfer function with a slope of -40dB/dec above
its corner frequency and a total phase lag of 180 degree. F P1
The ESR of the output capacitor introduces a zero to the
system transfer function with a total phase shift of 90
degree.
LOUT DCR
PHASE Regulator
Output F Z1 F P2
ESR
Figure 13. Gain Curve of Type II Compensator
C OUT

Figure 14 shows the Bode plot of the converter's gain vs.

Figure 11. Inductor and Output Capacitor
frequency. The compensator helps to shape the profile of
the gain curve with respect to frequency. The zero gives a
The second step is therefore to calculate the frequencies
90° boost to the phase to counteract the phase decay of
of the pole and the zero. The frequency of the double pole
the double pole of the L-C filter. The first pole, FP1, gives a
is determined as follows.
shift to the gain curve in the low frequency range while the
FP(LC) = 1
second pole, FP2, provides further attenuation in the high
2  LOUT  COUT
frequency range.
The frequency of the zero is determined as follows. In general, a converter system control loop with high
FZ(ESR) = 1 bandwidth can achieve fast transient response but usually
2  COUT  ESR
tends to lose stability. Therefore, it is always a trade-off
Note that the output capacitor(s) should have enough ESR between the control bandwidth and the system stability.
to satisfy the stability requirement. Empirically, FZ1 is placed at about 10% lower than the
The third step is to design the compensation network. double pole frequency of the L-C filter to have enough
There are two kinds of compensation network: Type II and phase margin. In general, the control bandwidth should
Type III, both consist of the error amplifier and the be higher than the frequency of the ESR zero but less
impedance network. Figure 12 shows the Type II than 1/5 of the switching frequency. In addition, the FP2
compensator. should be placed at half of the switching frequency.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

15
RT8807/A
FP3 = 1
80 80
2  R3  C3
Loop Gain
60 FZ1 = 1
2  R2  C2
40 40
Compensation
FZ2 = 1
20
Gain 2  (R1+R3)  C3
Gain (dB)

0
0
F P1
Modulator
-20 Gain

-40-40

-60-60
10Hz 100Hz 1.0KHz 10KHz 100KHz 1.0MHz
10vdb(vo) vdb(comp2)100 1k 10k 100k 1M
vdb(lo)
F Z1 F Z2 F P2 F P3
Frequency
Frequency (Hz)

Figure 14. Converter System Bode Plot with Type II

Compensator Figure 16. Gain Curve of Type III Compensator

For systems with low DCR and ESR parameters, the overall
Figure 17 shows the Bode diagram of the converter's gain
efficiency can be higher and the output voltage ripple can
vs. frequency with Type III compensator. It is recommended
be lower. However, systems that have such L-C filters will
that FZ1 is placed at half of the L-C double pole, FZ2 is
experience a very sharp slope downward in the phase
placed at the LC double pole, FP1 is placed at the ESR
curve at the double pole and will be more difficult to
zero and FP2 is placed at half of the switching frequency.
compensate. Compared to the Type II compensator, the
Type III compensator adds a pole-zero pair. The Type III Loop Gain
compensator utilizes two zeros to give a 180° phase boost, 60
and is usually used to compensate a converter with low
40
ESR output capacitors (e.g. OSCON or pure MLCC) to
Compensation Gain
provide the necessary phase margin for stability. 20

Figure 15 shows the Type III compensator, which 0

dB

introduces an extra pole-zero pair by inserting a series R- Gain

-20
C circuit between the VOUT node and the FB node.
-40
V REF
C3
Modulator Gain
R3
-60
+
R1 GM V COMP
V OUT - -80
C2
FB 2 3 4 5 6 7
C1
R2
RF Log Frequency

Figure 18. Converter System Bode Plot with Type III

Figure 15. Type III Compensator Compensator

Figure 16 shows the Bode diagram of the Type III Over Temperature Protection
compensator. The frequencies of the three poles and two
The operating temperature within the chip is continuously
zeros are determined as follows.
monitored. The chip will be shut down when OTP occurs
FP1 = 0 with a typical trip point of 160°C.
FP2 = 1
2  R2  C1 C2
C1+C2  
Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

16
 RT8807/A
Power Stages choosing power switches. Since there are two drives in
One of the most important concerns in designing a multi- the same package, the total power dissipation must not
phase converter is to determine the number of phases. exceed the maximum allowable power dissipation for the
Determining the number of phases highly depends on the VQFN package. Calculating the power dissipation in the
overall cost, the system constraints, and usually differs drivers is crucial to ensure a safe operation of the controller.
case by case. The main concerns for the circuit designer Exceeding the maximum allowable power dissipation will
include the total available board space, the type of let the IC to be operated beyond the recommended
component that can be used (through-hole/surface mount maximum junction temperature of 125°C.
device), the maximum load current, and of the most The maximum power dissipation for the 4x4 V/WQFN
importance, total cost. In general, the most economical package is approximately equal to 1.923W at room
solutions are those in which each phase handles a current temperature. The following equations provide the integrated
ranging from 20A to 25A (using one high-side MOSFET drivers' power dissipation estimation.
and one low-side MOSFET). Design with all surface mount
PD = (CUGATE x VBOOT − PHASE2 x fSW) + (CLGATE x VCC2 x
devices will tend toward to the lower end of this current
fSW)
range due to the power dissipation capability. If the power
device in through-hole type is available, higher current TJ = TA + (θJA x PD)
per phase is possible. In cases where the board area is where the CUGATE and the CLGATE represent the CISS of the
the design limitation, the current per phase can be pushed high-side MOSFET and the low-side MOSFET,
up to 40A. However, these designs require appropriate respectively. From the above equations, it is clear that
heat sinks and forced air cooling to remove the large the junction temperature is directly proportional to the
amount of heat, which is generated by the power total CISS of all the external MOSFETs.
MOSFETs, the inductors and the PCB copper traces.
For instance, if CUGATE = 1nF, CLGATE = 5nF (two MOSFETs
in parallel), VBOOT−PHASE = 5V, VCC = 12V, switching
MOSFET Selection
frequency fsw = 300kHz, the power dissipation in the driver
The majority of power loss in the step-down power
per phase can be obtained :
conversion is due to the loss in the power MOSFETs. In
the low-voltage high-current applications, the duty cycle PD  1n x 52 x 300k + 2 x 5n x 122 x 300k = 439mW
of the high-side MOSFET is small. Therefore, the switching Assuming the room temperature is equal to 30°C, the
loss of the high-side MOSFET is of concern. Power junction temperature for two-phase operation is :
MOSFETs with lower total gate charge are preferred in
TJ = 30°C + (52°C/W) x (0.439W x 2) = 75.6°C < 125°C,
choosing the high-side power devices.
which means the junction temperature is below the
However, the small duty cycle means the low-side
maximum recommended value for a safe operation.
MOSFET is on for most of the switching cycle. Therefore,
the conduction loss tends to dominate the total power Layout Considerations
loss of the converter. To improve the overall efficiency, the Layout plays a critical role in modern high-frequency
MOSFETs with low RDS(ON) are preferred in the circuit switching converter design. Circuit board with careful
design. In some cases, more than one MOSFET are layout can help the IC function properly and achieve low
connected in parallel to further decrease the on-state losses, low switching noise, and stable operation with
resistance. However, this depends on the low-side improved performance. Without a carefully layout, the PCB
MOSFET driver capability and the budget. could radiate excessive noise, causing noise-induced IC
problems and then contribute to the converter instability.
Package Power dissipation
The following guidelines can be used to achieve optimal
It is also important to consider the amount of power being
IC performance.
dissipated in the two embedded MOSFET drivers when

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

17
RT8807/A
1. Power components should be placed first. Place the 8. Small signal components should be located as close
input capacitors close to the power MOSFETs, then as possible to the IC. The small signal components
locate the filter inductors and output capacitors between include the feedback components, current sensing
the power MOSFETs and the load. components, the compensation components, function
2. Place both the ceramic and bulk input capacitor close setting components and any bypass capacitors. These
to the drain pin of the high-side MOSFET. This can components belong to the high-impedance circuit loop
reduce the impedance presented by the input bulk and are inherently sensitive to noise pick-up. Therefore,
capacitance at high switching frequency. If there is more they must be located close to their respective controller
than one high-side MOSFET in parallel, each should pins and away from the noisy switching nodes.
have its own individual ceramic capacitor. 9. A multi-layer PCB design is recommended. Make use
3. Keep the power loops as short as possible. For low- of one single layer as the power ground and have a
voltage high-current applications, power components separate control signal ground as the reference of all
are the most critical part in the layout because they signals.
switch a large amount of current. The current transition
from one device to another at high speed causes voltage
spikes due to the parasitic components on the circuit
board. Therefore, all of the high-current switching loops
should be kept as short as possible with large and thick
copper traces to minimize the radiation of
electromagnetic interference.
4. Minimize the trace length between the power MOSFETs
and its drivers.
Since the drivers use short, high-current pulses to drive
the power MOSFETs, the driving traces should be sized
as short and large as possible to reduce the trace
inductance. This is especially true for the low-side
MOSFET, since this can reduce the possibility of the
shoot-through.
5. Provide enough copper area around the power
MOSFETs and the inductors to aid in heat sinking.
Use thick copper PCB to reduce the resistance and
inductance for improved efficiency.
6. The bank of output capacitor should be placed physically
close to the load. This can minimize the impedance
seen by the load, and then improves the transient
response.
7. Place all of the high-frequency decoupling ceramic
capacitors close to their decoupling targets.

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

www.richtek.com DS8807/A-02 May 2014

18
 RT8807/A
Outline Dimension

1 1

2 2

DETAIL A
Pin #1 ID and Tie Bar Mark Options

Note : The configuration of the Pin #1 identifier is optional,

but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min. Max. Min. Max.
A 0.800 1.000 0.031 0.039
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 3.950 4.050 0.156 0.159
Option 1 2.400 2.500 0.094 0.098
D2
Option 2 2.650 2.750 0.104 0.108
E 3.950 4.050 0.156 0.159
Option 1 2.400 2.500 0.094 0.098
E2
Option 2 2.650 2.750 0.104 0.108
e 0.500 0.020
L 0.350 0.450 0.014 0.018

V-Type 24L QFN 4x4 Package

Copyright © 2014 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.

DS8807/A-02 May 2014 www.richtek.com

19
RT8807/A

D2 SEE DETAIL A
D

L
1

E E2

1 1

2 2

e b
DETAIL A
A
A3 Pin #1 ID and Tie Bar Mark Options
A1
Note : The configuration of the Pin #1 identifier is optional,
but must be located within the zone indicated.

Dimensions In Millimeters Dimensions In Inches

Symbol
Min Max Min Max
A 0.700 0.800 0.028 0.031
A1 0.000 0.050 0.000 0.002
A3 0.175 0.250 0.007 0.010
b 0.180 0.300 0.007 0.012
D 3.950 4.050 0.156 0.159
Option 1 2.400 2.500 0.094 0.098
D2
Option 2 2.650 2.750 0.104 0.108
E 3.950 4.050 0.156 0.159
Option 1 2.400 2.500 0.094 0.098
E2
Option 2 2.650 2.750 0.104 0.108
e 0.500 0.020
L 0.350 0.450 0.014 0.018

W-Type 24L QFN 4x4 Package

Richtek Technology Corporation

14F, No. 8, Tai Yuen 1st Street, Chupei City
Hsinchu, Taiwan, R.O.C.
Tel: (8863)5526789

Richtek products are sold by description only. Richtek reserves the right to change the circuitry and/or specifications without notice at any time. Customers should
obtain the latest relevant information and data sheets before placing orders and should verify that such information is current and complete. Richtek cannot
assume responsibility for use of any circuitry other than circuitry entirely embodied in a Richtek product. Information furnished by Richtek is believed to be
accurate and reliable. However, no responsibility is assumed by Richtek or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Richtek or its subsidiaries.

www.richtek.com DS8807/A-02 May 2014

20